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openFPGALoader
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Added documentation 

Conditionalization of pin mapping for FX2
This commit is contained in:
phdussud 2021-01-07 10:22:27 -08:00
parent dba31e77a2
commit 93526cddc7
4 changed files with 29 additions and 3 deletions
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13
INSTALL.md
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@ -5,6 +5,16 @@
``` ```
$ git clone https://github.com/trabucayre/openFPGALoader.git $ git clone https://github.com/trabucayre/openFPGALoader.git
``` ```
## For FX2 cable support add the following steps
```
$ git clone https://github.com/makestuff/fpgalink.git
```
```
$ build.sh
```
Add the install/bin directory to the path (for building and running OpenFPGALoader)
## Compile from source ## Compile from source
@ -13,11 +23,14 @@ $ mkdir build
$ cd build $ cd build
$ cmake ../ # add -DBUILD_STATIC=ON to build a static version $ cmake ../ # add -DBUILD_STATIC=ON to build a static version
# add -DENABLE_UDEV=OFF to disable udev support and -d /dev/xxx # add -DENABLE_UDEV=OFF to disable udev support and -d /dev/xxx
# add -DENABLE_FX2=OFF to disable FX2 cable support
$ cmake --build . $ cmake --build .
or or
$ make -j$(nproc) $ make -j$(nproc)
``` ```
## Install ## Install
As root: As root:

9
README.md
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@ -260,6 +260,15 @@ allowed values are:
| DCD | 6 | | DCD | 6 |
| RI | 7 | | RI | 7 |
#### FX2 cables and pins configuration
FX2 cables need to have their pin mapping provided
```bash
openFPGALoader [options] -cfx2 --pins=TDI:TDO:TCK:TMS /path/to/bitstream.ext
```
where:
* TDI:TDO:TCK:TMS may be the pin ID (A0 <= id <= D7) for pins PA0...PD7
### CYC1000 and de0nano ### CYC1000 and de0nano

4
src/cable.hpp
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@ -14,8 +14,8 @@ enum communication_type {
MODE_FTDI_BITBANG = 1, /*! used with ft232RL/ft231x */ MODE_FTDI_BITBANG = 1, /*! used with ft232RL/ft231x */
MODE_FTDI_SERIAL = 2, /*! ft2232, ft232H */ MODE_FTDI_SERIAL = 2, /*! ft2232, ft232H */
MODE_DIRTYJTAG = 3, /*! JTAG probe firmware for STM32F1 */ MODE_DIRTYJTAG = 3, /*! JTAG probe firmware for STM32F1 */
MODE_USBBLASTER = 4, /*! JTAG probe firmware for USBBLASTER */ MODE_USBBLASTER = 4, /*! JTAG probe firmware for USBBLASTER */
MODE_FX2 = 5, /* FX2 support through libFPGAlink */ MODE_FX2 = 5, /* FX2 support through libFPGAlink */
}; };
typedef struct { typedef struct {

6
src/main.cpp
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@ -475,12 +475,16 @@ int parse_opt(int argc, char **argv, struct arguments *args, jtag_pins_conf_t *p
} }
pin_num = pins_list[pins[i]]; pin_num = pins_list[pins[i]];
} }
#ifdef ENABLE_FX2
if ((pin_num > 7 || pin_num < 0) && if ((pin_num > 7 || pin_num < 0) &&
(pin_num > 0xD7 || pin_num < 0xD0) && (pin_num > 0xD7 || pin_num < 0xD0) &&
(pin_num > 0xC7 || pin_num < 0xC0) && (pin_num > 0xC7 || pin_num < 0xC0) &&
(pin_num > 0xB7 || pin_num < 0xB0) && (pin_num > 0xB7 || pin_num < 0xB0) &&
(pin_num > 0xA7 || pin_num < 0xA0)) { (pin_num > 0xA7 || pin_num < 0xA0)) {
#else
if (pin_num > 7 || pin_num < 0) {
#endif
printError("Invalid pin ID"); printError("Invalid pin ID");
throw std::exception(); throw std::exception();
} }