Merge pull request #209 from smunaut/xilinx
Support for a couple of new Xilinx parts
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commit
8ca6084a79
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@ -190,6 +190,13 @@ Xilinx:
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Memory: OK
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Memory: OK
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Flash: OK
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Flash: OK
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- Description: Kintex UltraScale
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Model:
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- xcku040
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URL: https://www.xilinx.com/products/silicon-devices/fpga/kintex-ultrascale.html#productTable
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Memory: OK
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Flash: NA
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- Description: Spartan 3
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- Description: Spartan 3
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Model:
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Model:
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- xc3s200
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- xc3s200
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@ -252,7 +259,10 @@ Xilinx:
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Flash: NA
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Flash: NA
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- Description: ZynqMPSoC
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- Description: ZynqMPSoC
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Model: xczu2cg
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Model:
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- xczu2cg
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- xczu9eg
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- xczu11eg
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URL: https://www.xilinx.com/products/silicon-devices/soc/zynq-ultrascale-mpsoc.html
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URL: https://www.xilinx.com/products/silicon-devices/soc/zynq-ultrascale-mpsoc.html
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Memory: OK
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Memory: OK
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Flash: NA
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Flash: NA
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@ -31,6 +31,8 @@ static std::map <int, fpga_model> fpga_list = {
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{0x03651093, {"xilinx", "kintex7", "xc7k325t", 6}},
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{0x03651093, {"xilinx", "kintex7", "xc7k325t", 6}},
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{0x03656093, {"xilinx", "kintex7", "xc7k410t", 6}},
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{0x03656093, {"xilinx", "kintex7", "xc7k410t", 6}},
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{0x13822093, {"xilinx", "kintexus", "xcku040", 6}},
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{0x01414093, {"xilinx", "spartan3", "xc3s200", 6}},
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{0x01414093, {"xilinx", "spartan3", "xc3s200", 6}},
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{0x01c22093, {"xilinx", "spartan3", "xc3s500e", 6}},
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{0x01c22093, {"xilinx", "spartan3", "xc3s500e", 6}},
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@ -65,9 +67,11 @@ static std::map <int, fpga_model> fpga_list = {
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*/
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*/
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{0x08e22126, {"xilinx", "zynqmp_cfgn", "xczu2cg", 4}},
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{0x08e22126, {"xilinx", "zynqmp_cfgn", "xczu2cg", 4}},
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{0x08e70126, {"xilinx", "zynqmp_cfgn", "xczu9eg", 4}},
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{0x08e70126, {"xilinx", "zynqmp_cfgn", "xczu9eg", 4}},
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{0x08e80126, {"xilinx", "zynqmp_cfgn","xczu11eg", 4}},
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{0x04711093, {"xilinx", "zynqmp", "xczu2cg", 6}},
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{0x04711093, {"xilinx", "zynqmp", "xczu2cg", 6}},
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{0x04738093, {"xilinx", "zynqmp", "xczu9eg", 6}},
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{0x04738093, {"xilinx", "zynqmp", "xczu9eg", 6}},
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{0x04740093, {"xilinx", "zynqmp", "xczu11eg", 6}},
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{0x020f20dd, {"altera", "cyclone III/IV", "EP3C16/EP4CE15", 10}},
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{0x020f20dd, {"altera", "cyclone III/IV", "EP3C16/EP4CE15", 10}},
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@ -65,6 +65,8 @@ Xilinx::Xilinx(Jtag *jtag, const std::string &filename,
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_fpga_family = ZYNQMP_FAMILY;
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_fpga_family = ZYNQMP_FAMILY;
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} else if (family == "kintex7") {
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} else if (family == "kintex7") {
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_fpga_family = KINTEX_FAMILY;
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_fpga_family = KINTEX_FAMILY;
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} else if (family == "kintexus") {
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_fpga_family = KINTEXUS_FAMILY;
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} else if (family == "spartan3") {
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} else if (family == "spartan3") {
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_fpga_family = SPARTAN3_FAMILY;
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_fpga_family = SPARTAN3_FAMILY;
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if (_mode != Device::MEM_MODE) {
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if (_mode != Device::MEM_MODE) {
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@ -155,6 +155,7 @@ class Xilinx: public Device, SPIInterface {
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SPARTAN7_FAMILY,
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SPARTAN7_FAMILY,
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ARTIX_FAMILY,
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ARTIX_FAMILY,
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KINTEX_FAMILY,
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KINTEX_FAMILY,
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KINTEXUS_FAMILY,
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ZYNQ_FAMILY,
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ZYNQ_FAMILY,
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ZYNQMP_FAMILY,
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ZYNQMP_FAMILY,
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XCF_FAMILY,
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XCF_FAMILY,
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