ip CLI arg for XVC

README.md

@@ -76,6 +76,7 @@ openFPGALoader -- a program to flash FPGA
       --freq arg            jtag frequency (Hz)
   -f, --write-flash         write bitstream in flash (default: false)
       --index-chain arg     device index in JTAG-chain
+      --ip arg              IP address (only for XVC client)
       --list-boards         list all supported boards
       --list-cables         list all supported cables
       --list-fpga           list all supported FPGA

src/jtag.cpp

@@ -67,6 +67,7 @@ using namespace std;
 
 Jtag::Jtag(cable_t &cable, const jtag_pins_conf_t *pin_conf, string dev,
 			const string &serial, uint32_t clkHZ, int8_t verbose,
+			const string &ip_adr,
 			const bool invert_read_edge, const string &firmware_path):
 			_verbose(verbose > 1),
 			_state(RUN_TEST_IDLE),
@@ -74,7 +75,7 @@ Jtag::Jtag(cable_t &cable, const jtag_pins_conf_t *pin_conf, string dev,
 			_board_name("nope"), device_index(0)
 {
 	init_internal(cable, dev, serial, pin_conf, clkHZ, firmware_path,
-			invert_read_edge);
+			invert_read_edge, ip_adr);
 	detectChain(5);
 }
 
@@ -86,7 +87,7 @@ Jtag::~Jtag()
 
 void Jtag::init_internal(cable_t &cable, const string &dev, const string &serial,
 	const jtag_pins_conf_t *pin_conf, uint32_t clkHZ, const string &firmware_path,
-	const bool invert_read_edge)
+	const bool invert_read_edge, const string &ip_adr)
 {
 	switch (cable.type) {
 	case MODE_ANLOGICCABLE:
@@ -121,7 +122,7 @@ void Jtag::init_internal(cable_t &cable, const string &dev, const string &serial
 #endif
 #ifdef ENABLE_XVC_CLIENT
 	case MODE_XVC_CLIENT:
-		_jtag = new XVC_client("127.0.0.1", clkHZ, _verbose);
+		_jtag = new XVC_client(ip_adr, clkHZ, _verbose);
 		break;
 #endif
 	default:

src/jtag.hpp

@@ -18,7 +18,8 @@
 class Jtag {
  public:
 	Jtag(cable_t &cable, const jtag_pins_conf_t *pin_conf, std::string dev,
-		const std::string &serial, uint32_t clkHZ, int8_t verbose = 0,
+		const std::string &serial, uint32_t clkHZ, int8_t verbose,
+		const std::string &ip_adr,
 		const bool invert_read_edge = false,
 		const std::string &firmware_path = "");
 	~Jtag();
@@ -107,7 +108,7 @@ class Jtag {
 		const std::string &serial,
 		const jtag_pins_conf_t *pin_conf, uint32_t clkHZ,
 		const std::string &firmware_path,
-		const bool invert_read_edge);
+		const bool invert_read_edge, const std::string &ip_adr);
 	/*!
 	 * \brief search in fpga_list and misc_dev_list for a device with idcode
 	 *        if found insert idcode and irlength in _devices_list and

src/main.cpp

@@ -64,6 +64,7 @@ struct arguments {
 	int16_t altsetting;
 	uint16_t vid;
 	uint16_t pid;
+	string ip_adr;
 	uint32_t protect_flash;
 	bool unprotect_flash;
 	string flash_sector;
@@ -82,7 +83,8 @@ int main(int argc, char **argv)
 	/* command line args. */
 	struct arguments args = {0, false, false, false, 0, "", "", "-", "", -1,
 			0, false, "-", false, false, false, false, Device::PRG_NONE, false,
-			false, false, "", "", "", -1, 0, false, -1, 0, 0, 0, false, ""};
+			false, false, "", "", "", -1, 0, false, -1, 0, 0, "127.0.0.1",
+			0, false, ""};
 	/* parse arguments */
 	try {
 		if (parse_opt(argc, argv, &args, &pins_config))
@@ -370,7 +372,7 @@ int main(int argc, char **argv)
 	Jtag *jtag;
 	try {
 		jtag = new Jtag(cable, &pins_config, args.device, args.ftdi_serial,
-				args.freq, args.verbose, args.invert_read_edge,
+				args.freq, args.verbose, args.ip_adr, args.invert_read_edge,
 				args.probe_firmware);
 	} catch (std::exception &e) {
 		printError("JTAG init failed with: " + string(e.what()));
@@ -610,6 +612,8 @@ int parse_opt(int argc, char **argv, struct arguments *args, jtag_pins_conf_t *p
 				"write bitstream in flash (default: false)")
 			("index-chain",  "device index in JTAG-chain",
 				cxxopts::value<int>(args->index_chain))
+			("ip", "IP address (only for XVC client)",
+				cxxopts::value<string>(args->ip_adr))
 			("list-boards", "list all supported boards",
 				cxxopts::value<bool>(args->list_boards))
 			("list-cables", "list all supported cables",