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openFPGALoader
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Merge branch 'master' of github.com:trabucayre/openFPGALoader

This commit is contained in:
Gwenhael Goavec-Merou 2021-10-03 18:34:07 +02:00
parent 6858cabc7d 823073741a
commit 69ac10e2f7
2 changed files with 8 additions and 8 deletions
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4
CMakeLists.txt
View File

@ -6,7 +6,11 @@ project(openFPGALoader VERSION "0.5.0" LANGUAGES CXX)
add_definitions(-DVERSION=\"v${PROJECT_VERSION}\") add_definitions(-DVERSION=\"v${PROJECT_VERSION}\")
option(BUILD_STATIC "Whether or not to build with static libraries" OFF) option(BUILD_STATIC "Whether or not to build with static libraries" OFF)
if (${CMAKE_SYSTEM_NAME} MATCHES "Windows")
set(ENABLE_UDEV OFF)
else()
option(ENABLE_UDEV "use udev to search JTAG adapter from /dev/xx" ON) option(ENABLE_UDEV "use udev to search JTAG adapter from /dev/xx" ON)
endif()
option(ENABLE_CMSISDAP "enable cmsis DAP interface (requires hidapi)" ON) option(ENABLE_CMSISDAP "enable cmsis DAP interface (requires hidapi)" ON)
option(USE_PKGCONFIG "Use pkgconfig to find libraries" ON) option(USE_PKGCONFIG "Use pkgconfig to find libraries" ON)
option(LINK_CMAKE_THREADS "Use CMake find_package to link the threading library" OFF) option(LINK_CMAKE_THREADS "Use CMake find_package to link the threading library" OFF)

10
src/xilinx.cpp
View File

@ -448,7 +448,7 @@ void Xilinx::flow_enable()
void Xilinx::flow_disable() void Xilinx::flow_disable()
{ {
_jtag->shiftIR(XC95_ISC_DISABLE, 8); _jtag->shiftIR(XC95_ISC_DISABLE, 8);
usleep(100); _jtag->toggleClk((_jtag->getClkFreq() * 100) / 1000000);
_jtag->shiftIR(BYPASS, 8); _jtag->shiftIR(BYPASS, 8);
_jtag->toggleClk(1); _jtag->toggleClk(1);
} }
@ -461,7 +461,7 @@ bool Xilinx::flow_erase()
_jtag->shiftIR(XC95_ISC_ERASE, 8); _jtag->shiftIR(XC95_ISC_ERASE, 8);
_jtag->shiftDR(xfer_buf, NULL, 18); _jtag->shiftDR(xfer_buf, NULL, 18);
_jtag->toggleClk(2000000); _jtag->toggleClk((_jtag->getClkFreq() * 400) / 1000);
_jtag->shiftDR(NULL, xfer_buf, 18); _jtag->shiftDR(NULL, xfer_buf, 18);
if ((xfer_buf[0] & 0x03) != 0x01) { if ((xfer_buf[0] & 0x03) != 0x01) {
printError("FAIL"); printError("FAIL");
@ -500,10 +500,6 @@ bool Xilinx::flow_program()
} }
printSuccess("DONE"); printSuccess("DONE");
/* limit JTAG clock frequency to 1MHz */
if (_jtag->getClkFreq() > 1e6)
_jtag->setClkFreq(1e6);
/* enable ISC */ /* enable ISC */
flow_enable(); flow_enable();
@ -545,7 +541,7 @@ bool Xilinx::flow_program()
_jtag->shiftIR(XC95_ISC_PROGRAM, 8); _jtag->shiftIR(XC95_ISC_PROGRAM, 8);
_jtag->shiftDR(&mode, NULL, 2, Jtag::SHIFT_DR); _jtag->shiftDR(&mode, NULL, 2, Jtag::SHIFT_DR);
_jtag->shiftDR(wr_buf, NULL, 8 * (_xc95_line_len + 2)); _jtag->shiftDR(wr_buf, NULL, 8 * (_xc95_line_len + 2));
_jtag->toggleClk(50000); _jtag->toggleClk((_jtag->getClkFreq() * 50) / 1000);
_jtag->shiftDR(NULL, rd_buf, 8 * (_xc95_line_len + 2) + 2); _jtag->shiftDR(NULL, rd_buf, 8 * (_xc95_line_len + 2) + 2);
if ((rd_buf[0] & 0x03) == 0x01) if ((rd_buf[0] & 0x03) == 0x01)
break; break;