more typo fixes
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0bdef7bab1
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483304344f
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@ -19,7 +19,7 @@
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class Jlink: public JtagInterface {
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class Jlink: public JtagInterface {
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public:
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public:
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/*!
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/*!
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* \brief contructor: open device
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* \brief constructor: open device
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* \param[in] clkHz: output clock frequency
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* \param[in] clkHz: output clock frequency
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* \param[in] verbose: verbose level -1 quiet, 0 normal,
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* \param[in] verbose: verbose level -1 quiet, 0 normal,
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* 1 verbose, 2 debug
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* 1 verbose, 2 debug
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@ -28,7 +28,7 @@ class Jlink: public JtagInterface {
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~Jlink();
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~Jlink();
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// jtagInterface requirement
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// jtag Interface requirement
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/*!
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/*!
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* \brief configure probe clk frequency
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* \brief configure probe clk frequency
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* \param[in] clkHZ: frequency in Hertz
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* \param[in] clkHZ: frequency in Hertz
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@ -58,7 +58,7 @@ class Jlink: public JtagInterface {
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/*!
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/*!
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* \brief access ll_write outer this class / directly receives
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* \brief access ll_write outer this class / directly receives
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* fully filled tms, tdi buffers, and optionnally tdo
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* fully filled tms, tdi buffers, and optionally tdo
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* \param[in] tms: tms buffer
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* \param[in] tms: tms buffer
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* \param[in] tdi: tdi buffer
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* \param[in] tdi: tdi buffer
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* \param[out] tdo: tdo buffer
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* \param[out] tdo: tdo buffer
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@ -295,7 +295,7 @@ class Jlink: public JtagInterface {
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// buffers for xfer, tdi and tdo
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// buffers for xfer, tdi and tdo
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// each jlink's buffer have 2K Byte
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// each jlink's buffer have 2K Byte
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// enough to send full jtag write
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// enough to send full jtag write
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// buffers must be independant
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// buffers must be independent
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uint8_t _xfer_buf[(2048*2) + 4]; /*!> internal buffer */
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uint8_t _xfer_buf[(2048*2) + 4]; /*!> internal buffer */
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uint8_t _tms[2048]; /*!< TMS buffer */
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uint8_t _tms[2048]; /*!< TMS buffer */
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uint8_t _tdi[2048]; /*!< TDI buffer */
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uint8_t _tdi[2048]; /*!< TDI buffer */
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@ -285,7 +285,7 @@ int Jtag::flushTMS(bool flush_buffer)
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void Jtag::go_test_logic_reset()
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void Jtag::go_test_logic_reset()
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{
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{
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/* idenpendly to current state 5 clk with TMS high is enough */
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/* independently to current state 5 clk with TMS high is enough */
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for (int i = 0; i < 6; i++)
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for (int i = 0; i < 6; i++)
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setTMS(0x01);
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setTMS(0x01);
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flushTMS(false);
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flushTMS(false);
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@ -248,7 +248,7 @@ void displayFeabits(uint16_t _featbits)
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printf("\tMy_ASSP : %s\n",
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printf("\tMy_ASSP : %s\n",
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(((_featbits>>4)&0x01)?"enable":"disable"));
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(((_featbits>>4)&0x01)?"enable":"disable"));
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printf("\tPassword (Flash Protect Key) Protect All : %s\n",
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printf("\tPassword (Flash Protect Key) Protect All : %s\n",
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(((_featbits>>3)&0x01)?"Enaabled" : "Disabled"));
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(((_featbits>>3)&0x01)?"Enabled" : "Disabled"));
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printf("\tPassword (Flash Protect Key) Protect : %s\n",
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printf("\tPassword (Flash Protect Key) Protect : %s\n",
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(((_featbits>>2)&0x01)?"Enabled" : "Disabled"));
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(((_featbits>>2)&0x01)?"Enabled" : "Disabled"));
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}
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}
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@ -983,10 +983,10 @@ void Lattice::displayReadReg(uint32_t dev)
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printf("SDM EOF\n");
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printf("SDM EOF\n");
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break;
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break;
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case 8:
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case 8:
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printf("Authentification ERR\n");
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printf("Authentication ERR\n");
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break;
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break;
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case 9:
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case 9:
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printf("Authentification Setup ERR\n");
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printf("Authentication Setup ERR\n");
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break;
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break;
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case 10:
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case 10:
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printf("Bitstream Engine Timeout ERR\n");
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printf("Bitstream Engine Timeout ERR\n");
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@ -1003,7 +1003,7 @@ void Lattice::displayReadReg(uint32_t dev)
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if ((dev >> 46) & 0x01) printf("\tINIT Bus ID Error\n");
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if ((dev >> 46) & 0x01) printf("\tINIT Bus ID Error\n");
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if ((dev >> 47) & 0x01) printf("\tI3C Parity Error1\n");
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if ((dev >> 47) & 0x01) printf("\tI3C Parity Error1\n");
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err = (dev >> 48) & 0x03;
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err = (dev >> 48) & 0x03;
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printf("\tAuthentification mode:\n");
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printf("\tAuthentication mode:\n");
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printf("\t\t");
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printf("\t\t");
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switch (err) {
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switch (err) {
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case 3:
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case 3:
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@ -1017,8 +1017,8 @@ void Lattice::displayReadReg(uint32_t dev)
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printf("HMAC\n");
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printf("HMAC\n");
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break;
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break;
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}
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}
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if ((dev >> 50) & 0x01) printf("\tAuthentification Done\n");
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if ((dev >> 50) & 0x01) printf("\tAuthentication Done\n");
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if ((dev >> 51) & 0x01) printf("\tDry Run Authentification Done\n");
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if ((dev >> 51) & 0x01) printf("\tDry Run Authentication Done\n");
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#endif
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#endif
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}
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}
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@ -24,7 +24,7 @@ using namespace std;
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* 01 -> end of file
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* 01 -> end of file
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* 02 -> extended addr
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* 02 -> extended addr
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* 03 -> start segment addr record
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* 03 -> start segment addr record
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* 04 -> extented linear addr record
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* 04 -> extended linear addr record
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* 05 -> start linear addr record
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* 05 -> start linear addr record
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*/
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*/
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@ -109,7 +109,7 @@ uint32_t POFParser::parseSection(uint16_t flag, uint32_t pos, uint32_t size)
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/* 0x03: bitstream name ? */
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/* 0x03: bitstream name ? */
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/* 0x3b: ? */
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/* 0x3b: ? */
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/* 0x12: ? */
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/* 0x12: ? */
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/* 0x13: containts usercode / checksum */
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/* 0x13: contains usercode / checksum */
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/* 0x24: ? */
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/* 0x24: ? */
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/* 0x11: ? */
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/* 0x11: ? */
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/* 0x18: ? */
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/* 0x18: ? */
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@ -26,7 +26,7 @@ class RawParser: public ConfigBitstreamParser {
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RawParser(const std::string &filename, bool reverseOrder);
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RawParser(const std::string &filename, bool reverseOrder);
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/*!
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/*!
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* \brief read full content of the file, fill the buffer
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* \brief read full content of the file, fill the buffer
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* \return EXIT_SUCCESS is file is fully read, EXIT_FAILURE otherwhise
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* \return EXIT_SUCCESS is file is fully read, EXIT_FAILURE otherwise
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*/
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*/
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int parse() override;
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int parse() override;
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@ -284,7 +284,7 @@ int SPIFlash::erase_and_prog(int base_addr, uint8_t *data, int len)
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bool must_relock = false; // used to relock after write;
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bool must_relock = false; // used to relock after write;
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/* microchip SST26VF032B have global lock set
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/* microchip SST26VF032B have global lock set
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* at powerup. global unlock must be send inconditionally
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* at powerup. global unlock must be send unconditionally
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* with or without block protection
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* with or without block protection
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*/
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*/
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if (_jedec_id == 0xbf2642bf) { // microchip SST26VF032B
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if (_jedec_id == 0xbf2642bf) { // microchip SST26VF032B
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@ -457,7 +457,7 @@ void SPIFlash::read_id()
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_flash_model->nr_sector, _flash_model->nr_sector * 0x80000 / 1048576);
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_flash_model->nr_sector, _flash_model->nr_sector * 0x80000 / 1048576);
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printInfo(content);
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printInfo(content);
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} else {
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} else {
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/* read extented */
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/* read extended */
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if ((_jedec_id & 0xff) != 0) {
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if ((_jedec_id & 0xff) != 0) {
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has_edid = true;
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has_edid = true;
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len += (_jedec_id & 0x0ff);
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len += (_jedec_id & 0x0ff);
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@ -29,7 +29,7 @@ class SPIFlash {
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int disable_protection();
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int disable_protection();
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/*!
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/*!
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* \brief enable protection for selected blocks
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* \brief enable protection for selected blocks
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* \param[in] protect_code: bp + tb combinaison
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* \param[in] protect_code: bp + tb combination
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* \return -1 if write enable or enabling failed
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* \return -1 if write enable or enabling failed
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*/
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*/
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int enable_protection(uint8_t protect_code = 0x1c);
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int enable_protection(uint8_t protect_code = 0x1c);
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@ -84,7 +84,7 @@ class SPIFlash {
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* \brief check if area base_addr to base_addr + len match
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* \brief check if area base_addr to base_addr + len match
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* data content
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* data content
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* \param[in] base_addr: base address to read
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* \param[in] base_addr: base address to read
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* \param[in] data: theorical area content
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* \param[in] data: theoretical area content
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* \param[in] len: length (in Byte) to area and data
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* \param[in] len: length (in Byte) to area and data
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* \param[in] rd_burst: size of packet to read
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* \param[in] rd_burst: size of packet to read
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* \return false if read fails or content didn't match, true otherwise
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* \return false if read fails or content didn't match, true otherwise
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@ -29,7 +29,7 @@ class SPIInterface {
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bool bulk_erase_flash();
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bool bulk_erase_flash();
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/*!
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/*!
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* \brief write len byte into flash starting at offset,
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* \brief write len byte into flash starting at offset,
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* optionnally verify after write and unprotect
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* optionally verify after write and unprotect
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* blocks if required and allowed
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* blocks if required and allowed
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* \param[in] offset: offset into flash
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* \param[in] offset: offset into flash
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* \param[in] data: data to write
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* \param[in] data: data to write
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@ -52,7 +52,7 @@ class Xilinx: public Device, SPIInterface {
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void reset() override;
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void reset() override;
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/* -------------- */
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/* -------------- */
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/* xc3s managment */
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/* xc3s management */
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/* -------------- */
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/* -------------- */
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/*!
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/*!
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@ -119,7 +119,7 @@ class Xilinx: public Device, SPIInterface {
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*/
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*/
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void xc2c_flow_reinit();
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void xc2c_flow_reinit();
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/*!
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/*!
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* \brief erase full internal flash (optionnally verify)
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* \brief erase full internal flash (optionally verify)
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* \return false if erase fails, true otherwise
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* \return false if erase fails, true otherwise
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*/
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*/
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bool xc2c_flow_erase();
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bool xc2c_flow_erase();
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@ -175,7 +175,7 @@ class Xilinx: public Device, SPIInterface {
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/*!
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/*!
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* \brief xilinx ZynqMP Ultrascale+ specific initialization
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* \brief xilinx ZynqMP Ultrascale+ specific initialization
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* \param[in] family name
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* \param[in] family name
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* \return true if device has been correctly initilized
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* \return true if device has been correctly initialized
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*/
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*/
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bool zynqmp_init(const std::string &family);
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bool zynqmp_init(const std::string &family);
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@ -16,7 +16,7 @@
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class XVC_client: public JtagInterface {
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class XVC_client: public JtagInterface {
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public:
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public:
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/*!
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/*!
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* \brief contructor: open device
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* \brief constructor: open device
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* \param[in] ip_addr: server IP addr
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* \param[in] ip_addr: server IP addr
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* \param[in] clkHz: output clock frequency
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* \param[in] clkHz: output clock frequency
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* \param[in] verbose: verbose level -1 quiet, 0 normal,
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* \param[in] verbose: verbose level -1 quiet, 0 normal,
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@ -324,7 +324,7 @@ int XVC_server::handle_data(int fd)
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return 1;
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return 1;
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}
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}
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/* 3. receiv 2 x nr_bytes (TMS + TDI) */
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/* 3. receive 2 x nr_bytes (TMS + TDI) */
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memset(_tmstdi, 0, _buffer_size);
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memset(_tmstdi, 0, _buffer_size);
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if (sread(fd, _tmstdi, nr_bytes * 2) != 1) {
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if (sread(fd, _tmstdi, nr_bytes * 2) != 1) {
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printError("reading data failed");
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printError("reading data failed");
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