mirror of
https://github.com/trabucayre/openFPGALoader.git
synced 2026-08-30 09:59:03 +02:00
initial commit
This commit is contained in:
Gwenhael Goavec-Merou
+388
@@ -0,0 +1,388 @@
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#include <stdio.h>
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#include <stdlib.h>
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#include <ftdi.h>
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#include <unistd.h>
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#include <string.h>
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#include "ftdipp_mpsse.hpp"
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#include "ftdispi.hpp"
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//#include "ftdi_handle.h"
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/*
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* SCLK -> ADBUS0
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* MOSI -> ADBUS1
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* MISO -> ADBUS2
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* CS -> ADBUS3
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*/
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#define SPI_CLK (1 << 0)
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#define cs_bits 0x08
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#define pindir 0x0b
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//uint8_t buffer[1024];
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//int num = 0;
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/* GGM: Faut aussi definir l'etat des broches par defaut */
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/* necessaire en mode0 et 1, ainsi qu'entre 2 et 3
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*/
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/* Rappel :
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* Mode0 : clk idle low, ecriture avant le premier front
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* ie lecture sur le premier front (montant)
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* Mode1 : clk idle low, ecriture sur le premier front (montant)
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* lecture sur le second front (descendant)
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* Mode2 : clk idle high, ecriture avant le premier front
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* lecture sur le premier front (descendant)
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* Mode3 : clk idle high, ecriture sur le premier front (descendant)
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* lecture sur le second front (montant)
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*/
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void FtdiSpi::setMode(uint8_t mode)
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{
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switch (mode) {
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case 0:
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_clk = 0;
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_wr_mode = MPSSE_WRITE_NEG;
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_rd_mode = 0;
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break;
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case 1:
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_clk = 0;
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_wr_mode = 0;
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_rd_mode = MPSSE_READ_NEG;
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break;
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case 2:
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_clk = SPI_CLK;
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_wr_mode = 0; //POS
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_rd_mode = MPSSE_READ_NEG;
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break;
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case 3:
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_clk = SPI_CLK;
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_wr_mode = MPSSE_WRITE_NEG;
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_rd_mode = 0;
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break;
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}
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}
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static FTDIpp_MPSSE::mpsse_bit_config bit_conf =
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{0x08, 0x0B, 0x08, 0x0B};
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FtdiSpi::FtdiSpi(int vid, int pid, unsigned char interface, uint32_t clkHZ):
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FTDIpp_MPSSE(vid, pid, interface, clkHZ)
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{
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setCSmode(SPI_CS_AUTO);
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setEndianness(SPI_MSB_FIRST);
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init(1, 0x00, bit_conf);
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}
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FtdiSpi::~FtdiSpi()
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{
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}
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#if 0
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#define CLOCK 0x08
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#define LATENCY 16
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#define TIMEOUT 0
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#define SIZE 65536
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#define TX_BUFS (60000/8-3)
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int ftdi_spi_init_internal(struct ftdi_spi *spi, uint32_t clk_freq_hz);
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int ftdi_spi_init_by_name(struct ftdi_spi *spi, char *devname,
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uint8_t interface, uint32_t clk_freq_hz)
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{
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spi->ftdic = open_device_by_name(devname, interface, 115200);
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if (spi->ftdic == NULL) {
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printf("erreur d'ouverture\n");
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return EXIT_FAILURE;
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}
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return ftdi_spi_init_internal(spi, clk_freq_hz);
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}
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int ftdi_spi_init(struct ftdi_spi *spi, uint32_t vid, uint32_t pid,
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uint8_t interface, uint32_t clk_freq_hz)
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{
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spi->ftdic = open_device(vid, pid, interface, 115200);
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if (spi->ftdic == NULL) {
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printf("erreur d'ouverture\n");
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return EXIT_FAILURE;
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}
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return ftdi_spi_init_internal(spi, clk_freq_hz);
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}
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#endif
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#if 0
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int ftdi_spi_init_internal(struct ftdi_spi *spi, uint32_t clock_freq_hz)
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{
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setCSmode(spi, SPI_CS_AUTO);
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setEndianness(spi, SPI_MSB_FIRST);
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spi->tx_buff = (uint8_t *)malloc(sizeof(uint8_t) * TX_BUFS);
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if (ftdi_usb_reset(spi->ftdic) != 0) {
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printf("erreur de reset\n");
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return -1;
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}
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if (ftdi_usb_purge_rx_buffer(spi->ftdic) != 0) {
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printf("erreur de reset\n");
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return -1;
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}
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if (ftdi_usb_purge_tx_buffer(spi->ftdic) != 0) {
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printf("erreur de reset\n");
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return -1;
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}
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if (ftdi_read_data_set_chunksize(spi->ftdic, SIZE) != 0) {
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printf("erreur de reset\n");
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return -1;
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}
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if (ftdi_write_data_set_chunksize(spi->ftdic, SIZE) != 0) {
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printf("erreur de reset\n");
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return -1;
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}
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if (ftdi_set_latency_timer(spi->ftdic, LATENCY) != 0) {
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printf("erreur de reset\n");
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return -1;
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}
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if (ftdi_set_event_char(spi->ftdic, 0x00, 0) != 0) {
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printf("erreur de reset\n");
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return -1;
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}
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if (ftdi_set_error_char(spi->ftdic, 0x00, 0) != 0) {
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printf("erreur de reset\n");
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return -1;
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}
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// set the read timeouts in ms for the ft2232H
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spi->ftdic->usb_read_timeout = TIMEOUT;
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// set the write timeouts in ms for the ft2232H
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spi->ftdic->usb_write_timeout = 5000;
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if (ftdi_set_bitmode(spi->ftdic, 0x00, 0x00) != 0) { // reset controller
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printf("erreur de reset\n");
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return -1;
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}
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if (ftdi_set_bitmode(spi->ftdic, 0x00, 0x02) != 0) { // enable mpsse mode
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printf("erreur de reset\n");
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return -1;
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}
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if (ftdi_setClock(spi->ftdic, /*0x08,*/ clock_freq_hz) < 0)
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return -1;
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spi->tx_size = 0;
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spi->tx_buff[spi->tx_size++] = 0x97; // disable adaptive clocking
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// devrait etre 8C pour enable et non 8D
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spi->tx_buff[spi->tx_size++] = 0x8d; //disable tri phase data clocking
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if (ftdi_write_data(spi->ftdic, spi->tx_buff, spi->tx_size) != spi->tx_size) {
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printf("erreur de write pour dis clock, adaptive, tri phase\n");
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return -1;
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}
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spi->tx_size = 0;
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spi->tx_buff[spi->tx_size++] = 0x85; // disable loopback
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if (ftdi_write_data(spi->ftdic, spi->tx_buff, spi->tx_size) != spi->tx_size) {
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printf("erreur disable loopback\n");
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return -1;
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}
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spi->tx_size = 0;
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spi->tx_buff[spi->tx_size++] = 0x80;
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spi->tx_buff[spi->tx_size++] = 0x08;
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spi->tx_buff[spi->tx_size++] = 0x0B;
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if (ftdi_write_data(spi->ftdic, spi->tx_buff, spi->tx_size) != spi->tx_size) {
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printf("erreur de write pour set bit\n");
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return -1;
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}
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spi->tx_size = 0;
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return 0;
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}
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#endif
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//FtdiSpi::~FtdiSpi()
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//int ftdi_spi_close(struct ftdi_spi *spi)
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//{
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//struct ftdi_context *ftdic = spi->ftdic;
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//free(spi->tx_buff);
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//return close_device(ftdic);
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//}
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// mpsse_write
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/*static int send_buf(struct ftdi_context *ftdic, const unsigned char *buf,
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int size)
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{
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int r;
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r = ftdi_write_data(ftdic, (unsigned char *)buf, size);
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if (r < 0) {
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printf("ftdi_write_data: %d, %s\n", r,
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ftdi_get_error_string(ftdic));
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return 1;
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}
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return 0;
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}
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static int ft_flush_buffer(struct ftdi_spi *spi)
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{
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int ret = 0;
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if (spi->tx_size != 0) {
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ret = send_buf(spi->ftdic, spi->tx_buff, spi->tx_size);
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spi->tx_size = 0;
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}
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return ret;
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}*/
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// mpsse_store
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/*static int ft_store_char(struct ftdi_spi *spi, uint8_t c)
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{
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int ret = 0;
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if (spi->tx_size == TX_BUFS)
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ret = ft_flush_buffer(spi);
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spi->tx_buff[spi->tx_size] = c;
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spi->tx_size++;
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return ret;
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}
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static int ft_store_star_char(struct ftdi_spi *spi, uint8_t *buff, int len)
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{
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int ret = 0;
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if (spi->tx_size + len + 1 == TX_BUFS)
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ret = ft_flush_buffer(spi);
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memcpy(spi->tx_buff + spi->tx_size, buff, len);
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spi->tx_size += len;
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return ret;
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}*/
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// mpsse read
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/*static int get_buf(struct ftdi_spi *spi, const unsigned char *buf,
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int size)
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{
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int r;
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ft_store_char(spi, SEND_IMMEDIATE);
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ft_flush_buffer(spi);
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while (size > 0) {
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r = ftdi_read_data(spi->ftdic, (unsigned char *)buf, size);
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if (r < 0) {
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printf("ftdi_read_data: %d, %s\n", r,
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ftdi_get_error_string(spi->ftdic));
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return 1;
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}
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buf += r;
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size -= r;
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}
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return 0;
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}*/
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/* send two consecutive cs configuration */
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void FtdiSpi::confCs(char stat)
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{
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uint8_t tx_buf[6] = {SET_BITS_LOW, _clk, pindir,
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SET_BITS_LOW, _clk, pindir};
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tx_buf[1] |= (stat) ? cs_bits : 0;
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tx_buf[4] |= (stat) ? cs_bits : 0;
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if (mpsse_store(tx_buf, 6) != 0)
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printf("erreur\n");
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}
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void FtdiSpi::setCs()
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{
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_cs = cs_bits;
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confCs(_cs);
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}
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void FtdiSpi::clearCs()
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{
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_cs = 0x00;
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confCs(_cs);
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}
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int FtdiSpi::ft2232_spi_wr_then_rd(
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const uint8_t *tx_data, uint32_t tx_len,
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uint8_t *rx_data, uint32_t rx_len)
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{
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setCSmode(SPI_CS_MANUAL);
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clearCs();
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uint32_t ret = ft2232_spi_wr_and_rd(tx_len, tx_data, NULL);
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if (ret != 0) {
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printf("%s : write error %d %d\n", __func__, ret, tx_len);
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} else {
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ret = ft2232_spi_wr_and_rd(rx_len, NULL, rx_data);
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if (ret != 0) {
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printf("%s : read error\n", __func__);
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}
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}
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setCs();
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setCSmode(SPI_CS_AUTO);
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return ret;
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}
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/* Returns 0 upon success, a negative number upon errors. */
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int FtdiSpi::ft2232_spi_wr_and_rd(//struct ftdi_spi *spi,
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uint32_t writecnt,
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const uint8_t * writearr, uint8_t * readarr)
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{
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#define TX_BUF (60000/8-3)
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//struct ftdi_context *ftdic = spi->ftdic;
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uint8_t buf[TX_BUF+3];//65536+9];
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/* failed is special. We use bitwise ops, but it is essentially bool. */
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int i = 0, failed = 0;
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int ret = 0;
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uint8_t *rx_ptr = readarr;
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uint8_t *tx_ptr = (uint8_t *)writearr;
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int len = writecnt;
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int xfer;
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if (_cs_mode == SPI_CS_AUTO) {
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buf[i++] = SET_BITS_LOW;
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buf[i++] = (0 & ~cs_bits) | _clk; /* assertive */
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buf[i++] = pindir;
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mpsse_store(buf, i);
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i=0;
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}
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/*
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* Minimize USB transfers by packing as many commands as possible
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* together. If we're not expecting to read, we can assert CS#, write,
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* and deassert CS# all in one shot. If reading, we do three separate
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* operations.
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*/
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while (len > 0) {
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xfer = (len > TX_BUF) ? TX_BUF: len;
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buf[i++] = /*(spi->endian == SPI_MSB_FIRST) ? 0 : MPSSE_LSB |*/
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((readarr) ? (MPSSE_DO_READ | _rd_mode) : 0) |
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((writearr) ? (MPSSE_DO_WRITE | _wr_mode) : 0);// |
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/*MPSSE_DO_WRITE |*/// spi->wr_mode | spi->rd_mode;
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buf[i++] = (xfer - 1) & 0xff;
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buf[i++] = ((xfer - 1) >> 8) & 0xff;
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if (writearr) {
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memcpy(buf + i, tx_ptr, xfer);
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tx_ptr += xfer;
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i += xfer;
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}
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ret = mpsse_store(buf, i);
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failed = ret;
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if (ret)
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printf("send_buf failed before read: %i %s\n", ret, "plop");// ftdi_get_error_string(ftdic));
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i = 0;
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if (readarr) {
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//if (ret == 0) {
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ret = mpsse_read(rx_ptr, xfer);
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failed = ret;
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if (ret != xfer)
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printf("get_buf failed: %i\n", ret);
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//}
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rx_ptr += xfer;
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}
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len -= xfer;
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}
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if (_cs_mode == SPI_CS_AUTO) {
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buf[i++] = SET_BITS_LOW;
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buf[i++] = cs_bits | _clk;
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buf[i++] = pindir;
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ret = mpsse_store(buf, i);
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failed |= ret;
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if (ret)
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printf("send_buf failed at end: %i\n", ret);
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}
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return 0;//failed ? -1 : 0;
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}
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