mirror of
https://github.com/trabucayre/openFPGALoader.git
synced 2026-08-30 18:02:38 +02:00
initial commit
This commit is contained in:
Gwenhael Goavec-Merou
+547
@@ -0,0 +1,547 @@
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#include <iostream>
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#include <map>
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#include <vector>
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#include <stdio.h>
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#include <string.h>
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#include <string>
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#include <ft2232_mpsse/ftdi_handle.h>
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#include "ftdijtag.hpp"
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#include "ftdipp_mpsse.hpp"
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using namespace std;
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#define DEBUG 1
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#ifdef DEBUG
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#define display(...) \
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do { if (_verbose) fprintf(stdout, __VA_ARGS__);}while(0)
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#else
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#define display(...) do {}while(0)
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#endif
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/*
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* AD0 -> TCK
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* AD1 -> TDI
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* AD2 -> TD0
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* AD3 -> TMS
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*/
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/* Rmq:
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* pour TMS: l'envoi de n necessite de mettre n-1 comme longueur
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* mais le bit n+1 est utilise pour l'etat suivant le dernier
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* front. Donc il faut envoyer 6bits ([5:0]) pertinents pour
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* utiliser le bit 6 comme etat apres la commande,
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* le bit 7 corresponds a l'etat de TDI (donc si on fait 7 cycles
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* l'etat de TDI va donner l'etat de TMS...)
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* transfert/lecture: le dernier bit de IR ou DR doit etre envoye en
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* meme temps que le TMS qui fait sortir de l'etat donc il faut
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* pour n bits a transferer :
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* - envoyer 8bits * (n/8)-1
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* - envoyer les 7 bits du dernier octet;
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* - envoyer le dernier avec 0x4B ou 0x6B
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*/
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FtdiJtag::FtdiJtag(FTDIpp_MPSSE::mpsse_bit_config &cable,
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unsigned char interface, uint32_t clkHZ):
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FTDIpp_MPSSE(cable.vid, cable.pid, interface, clkHZ),
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_state(RUN_TEST_IDLE),
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_tms_buffer_size(128), _num_tms(0),
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_board_name("nope"), _verbose(false)
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{
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display("board_name %s\n", _board_name.c_str());
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display("%x\n", cable.bit_low_val);
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display("%x\n", cable.bit_low_dir);
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display("%x\n", cable.bit_high_val);
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display("%x\n", cable.bit_high_dir);
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_verbose = false;
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_tms_buffer = (unsigned char *)malloc(sizeof(unsigned char) * _tms_buffer_size);
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bzero(_tms_buffer, _tms_buffer_size);
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init(1, 0xfb, cable);
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}
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FtdiJtag::~FtdiJtag()
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{
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int read;
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/* Before shutdown, we must wait until everything is shifted out
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* Do this by temporary enabling loopback mode, write something
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* and wait until we can read it back
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* */
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static unsigned char tbuf[16] = { SET_BITS_LOW, 0xff, 0x00,
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SET_BITS_HIGH, 0xff, 0x00,
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LOOPBACK_START,
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MPSSE_DO_READ | MPSSE_READ_NEG |
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MPSSE_DO_WRITE | MPSSE_WRITE_NEG | MPSSE_LSB,
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0x04, 0x00,
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0xaa, 0x55, 0x00, 0xff, 0xaa,
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LOOPBACK_END
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};
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mpsse_store(tbuf, 16);
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read = mpsse_read(tbuf, 5);
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if (read != 5)
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fprintf(stderr,
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"Loopback failed, expect problems on later runs %d\n", read);
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free(_tms_buffer);
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}
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int FtdiJtag::detectChain(vector<int> &devices, int max_dev)
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{
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unsigned char rx_buff[4];
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unsigned int tmp;
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devices.clear();
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go_test_logic_reset();
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set_state(SHIFT_DR);
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for (int i = 0; i < max_dev; i++) {
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read_write(NULL, rx_buff, 32, (i == max_dev-1)?1:0);
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tmp = 0;
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for (int ii=0; ii < 4; ii++)
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tmp |= (rx_buff[ii] << (8*ii));
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if (tmp != 0 && tmp != 0xffffffff)
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devices.push_back(tmp);
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}
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go_test_logic_reset();
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return devices.size();
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}
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void FtdiJtag::setTMS(unsigned char tms)
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{
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display("%s %d %d\n", __func__, _num_tms, (_num_tms >> 3));
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if (_num_tms+1 == _tms_buffer_size * 8)
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flushTMS();
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if (tms != 0)
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_tms_buffer[_num_tms>>3] |= (0x1) << (_num_tms & 0x7);
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_num_tms++;
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}
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/* reconstruct byte sent to TMS pins
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* - use up to 6 bits
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* -since next bit after length is use to
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* fix TMS state after sent we copy last bit
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* to bit after next
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* -bit 7 is TDI state for each clk cycles
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*/
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int FtdiJtag::flushTMS(bool flush_buffer)
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{
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int xfer, pos = 0;
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unsigned char buf[3]= {MPSSE_WRITE_TMS | MPSSE_LSB | MPSSE_BITMODE |
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MPSSE_WRITE_NEG, 0, 0};
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if (_num_tms == 0)
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return 0;
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display("%s: %d %x\n", __func__, _num_tms, _tms_buffer[0]);
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while (_num_tms != 0) {
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xfer = (_num_tms > 6) ? 6 : _num_tms;
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buf[1] = xfer - 1;
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buf[2] = 0x80;
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for (int i = 0; i < xfer; i++, pos++) {
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buf[2] |=
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(((_tms_buffer[pos >> 3] & (1 << (pos & 0x07))) ? 1 : 0) << i);
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}
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_num_tms -= xfer;
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mpsse_store(buf, 3);
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}
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/* reset buffer and number of bits */
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bzero(_tms_buffer, _tms_buffer_size);
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_num_tms = 0;
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if (flush_buffer)
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return mpsse_write();
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return 0;
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}
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void FtdiJtag::go_test_logic_reset()
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{
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/* idenpendly to current state 5 clk with TMS high is enough */
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for (int i = 0; i < 6; i++)
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setTMS(0x01);
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flushTMS(true);
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_state = TEST_LOGIC_RESET;
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}
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/* GGM: faut tenir plus compte de la taille de la fifo interne
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* du FT2232 pour maximiser l'envoi au lieu de faire de petits envoies
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*/
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int FtdiJtag::read_write(unsigned char *tdi, unsigned char *tdo, int len, char last)
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{
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/* 3 possible case :
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* - n * 8bits to send -> use byte command
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* - less than 8bits -> use bit command
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* - last bit to send -> sent in conjunction with TMS
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*/
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int tx_buff_size = mpsse_get_buffer_size();
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int real_len = (last) ? len - 1 : len; // if its a buffer in a big send send len
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// else supress last bit -> with TMS
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int nb_byte = real_len >> 3; // number of byte to send
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int nb_bit = (real_len & 0x07); // residual bits
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int xfer = tx_buff_size - 3;
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unsigned char *rx_ptr = (unsigned char *)tdo;
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unsigned char *tx_ptr = (unsigned char *)tdi;
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unsigned char tx_buf[3] = {(unsigned char)(MPSSE_LSB | MPSSE_WRITE_NEG |
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((tdi) ? MPSSE_DO_WRITE : 0) |
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((tdo) ? (MPSSE_DO_READ | MPSSE_READ_NEG) : 0)),
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((xfer - 1) & 0xff), // low
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(((xfer - 1) >> 8) & 0xff)}; // high
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flushTMS(true);
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display("%s len : %d %d %d %d\n", __func__, len, real_len, nb_byte,
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nb_bit);
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while (nb_byte > xfer) {
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mpsse_store(tx_buf, 3);
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if (tdi) {
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mpsse_store(tx_ptr, xfer);
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tx_ptr += xfer;
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}
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if (tdo) {
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mpsse_read(rx_ptr, xfer);
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rx_ptr += xfer;
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}
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nb_byte -= xfer;
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}
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/* 1/ send serie of byte */
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if (nb_byte > 0) {
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display("%s read/write %d byte\n", __func__, nb_byte);
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tx_buf[1] = ((nb_byte - 1) & 0xff); // low
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tx_buf[2] = (((nb_byte - 1) >> 8) & 0xff); // high
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mpsse_store(tx_buf, 3);
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if (tdi) {
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mpsse_store(tx_ptr, nb_byte);
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tx_ptr += nb_byte;
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}
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if (tdo) {
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mpsse_read(rx_ptr, nb_byte);
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rx_ptr += nb_byte;
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}
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}
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unsigned char last_bit = (tdi) ? *tx_ptr : 0;
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if (nb_bit != 0) {
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display("%s read/write %d bit\n", __func__, nb_bit);
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tx_buf[0] |= MPSSE_BITMODE;
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tx_buf[1] = nb_bit - 1;
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mpsse_store(tx_buf, 2);
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if (tdi) {
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display("%s last_bit %x size %d\n", __func__, last_bit, nb_bit-1);
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mpsse_store(last_bit);
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}
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mpsse_write();
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if (tdo) {
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mpsse_read(rx_ptr, 1);
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/* realign we have read nb_bit
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* since LSB add bit by the left and shift
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* we need to complete shift
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*/
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*rx_ptr >>= (8 - nb_bit);
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display("%s %x\n", __func__, *rx_ptr);
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}
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}
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/* display : must be dropped */
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if (_verbose && tdo) {
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display("\n");
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for (int i = (len / 8) - 1; i >= 0; i--)
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display("%x ", (unsigned char)tdo[i]);
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display("\n");
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}
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if (last == 1) {
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last_bit = (tdi)? (*tx_ptr & (1 << nb_bit)) : 0;
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display("%s move to EXIT1_xx and send last bit %x\n", __func__, (last_bit?0x81:0x01));
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/* write the last bit in conjunction with TMS */
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tx_buf[0] = MPSSE_WRITE_TMS | MPSSE_LSB | MPSSE_BITMODE | MPSSE_WRITE_NEG |
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((tdo) ? MPSSE_DO_READ | MPSSE_READ_NEG : 0);
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tx_buf[1] = 0x0 ; // send 1bit
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tx_buf[2] = ((last_bit)?0x81:0x01); // we know in TMS tdi is bit 7
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// and to move to EXIT_XR TMS = 1
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mpsse_store(tx_buf, 3);
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mpsse_write();
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if (tdo) {
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unsigned char c;
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mpsse_read(&c, 1);
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/* in this case for 1 one it's always bit 7 */
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*rx_ptr |= ((c & 0x80) << (7 - nb_bit));
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display("%s %x\n", __func__, c);
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}
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_state = (_state == SHIFT_DR) ? EXIT1_DR : EXIT1_IR;
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}
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return 0;
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}
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void FtdiJtag::toggleClk(int nb)
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{
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unsigned char c = (TEST_LOGIC_RESET == _state) ? 1 : 0;
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for (int i = 0; i < nb; i++)
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setTMS(c);
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flushTMS(true);
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}
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int FtdiJtag::shiftDR(unsigned char *tdi, unsigned char *tdo, int drlen, int end_state)
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{
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set_state(SHIFT_DR);
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// force transmit tms state
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flushTMS(true);
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// currently don't care about multiple device in the chain
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printf("drlen %d\n", drlen);
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read_write(tdi, tdo, drlen, 1);// 1 since only one device
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set_state(end_state);
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return 0;
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}
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int FtdiJtag::shiftIR(unsigned char *tdi, unsigned char *tdo, int irlen, int end_state)
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{
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display("%s: avant shiftIR\n", __func__);
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set_state(SHIFT_IR);
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flushTMS(true);
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// currently don't care about multiple device in the chain
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display("%s: envoi ircode\n", __func__);
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read_write(tdi, tdo, irlen, 1);// 1 since only one device
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set_state(end_state);
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return 0;
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}
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void FtdiJtag::set_state(int newState)
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{
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unsigned char tms;
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while (newState != _state) {
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display("_state : %16s(%02d) -> %s(%02d) ",
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getStateName((tapState_t)_state),
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_state,
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getStateName((tapState_t)newState), newState);
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switch (_state) {
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case TEST_LOGIC_RESET:
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if (newState == TEST_LOGIC_RESET) {
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tms = 1;
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} else {
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tms = 0;
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_state = RUN_TEST_IDLE;
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}
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break;
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case RUN_TEST_IDLE:
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if (newState == RUN_TEST_IDLE) {
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tms = 0;
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} else {
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tms = 1;
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_state = SELECT_DR_SCAN;
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}
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break;
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case SELECT_DR_SCAN:
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switch (newState) {
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case CAPTURE_DR:
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case SHIFT_DR:
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case EXIT1_DR:
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case PAUSE_DR:
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case EXIT2_DR:
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case UPDATE_DR:
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tms = 0;
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_state = CAPTURE_DR;
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break;
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default:
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tms = 1;
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_state = SELECT_IR_SCAN;
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}
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break;
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case SELECT_IR_SCAN:
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switch (newState) {
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case CAPTURE_IR:
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case SHIFT_IR:
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case EXIT1_IR:
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case PAUSE_IR:
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case EXIT2_IR:
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case UPDATE_IR:
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tms = 0;
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_state = CAPTURE_IR;
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break;
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default:
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tms = 1;
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_state = TEST_LOGIC_RESET;
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}
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break;
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/* DR column */
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case CAPTURE_DR:
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if (newState == SHIFT_DR) {
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tms = 0;
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_state = SHIFT_DR;
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} else {
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tms = 1;
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_state = EXIT1_DR;
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}
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break;
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case SHIFT_DR:
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if (newState == SHIFT_DR) {
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tms = 0;
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} else {
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tms = 1;
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_state = EXIT1_DR;
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}
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break;
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||||
case EXIT1_DR:
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switch (newState) {
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case PAUSE_DR:
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case EXIT2_DR:
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case SHIFT_DR:
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case EXIT1_DR:
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tms = 0;
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||||
_state = PAUSE_DR;
|
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break;
|
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default:
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tms = 1;
|
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_state = UPDATE_DR;
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}
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break;
|
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case PAUSE_DR:
|
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if (newState == PAUSE_DR) {
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tms = 0;
|
||||
} else {
|
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tms = 1;
|
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_state = EXIT2_DR;
|
||||
}
|
||||
break;
|
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case EXIT2_DR:
|
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switch (newState) {
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||||
case SHIFT_DR:
|
||||
case EXIT1_DR:
|
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case PAUSE_DR:
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tms = 0;
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_state = SHIFT_DR;
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break;
|
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default:
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tms = 1;
|
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_state = UPDATE_DR;
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}
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break;
|
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case UPDATE_DR:
|
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if (newState == RUN_TEST_IDLE) {
|
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tms = 0;
|
||||
_state = RUN_TEST_IDLE;
|
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} else {
|
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tms = 1;
|
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_state = SELECT_DR_SCAN;
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}
|
||||
break;
|
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/* IR column */
|
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case CAPTURE_IR:
|
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if (newState == SHIFT_IR) {
|
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tms = 0;
|
||||
_state = SHIFT_IR;
|
||||
} else {
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||||
tms = 1;
|
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_state = EXIT1_IR;
|
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}
|
||||
break;
|
||||
case SHIFT_IR:
|
||||
if (newState == SHIFT_IR) {
|
||||
tms = 0;
|
||||
} else {
|
||||
tms = 1;
|
||||
_state = EXIT1_IR;
|
||||
}
|
||||
break;
|
||||
case EXIT1_IR:
|
||||
switch (newState) {
|
||||
case PAUSE_IR:
|
||||
case EXIT2_IR:
|
||||
case SHIFT_IR:
|
||||
case EXIT1_IR:
|
||||
tms = 0;
|
||||
_state = PAUSE_IR;
|
||||
break;
|
||||
default:
|
||||
tms = 1;
|
||||
_state = UPDATE_IR;
|
||||
}
|
||||
break;
|
||||
case PAUSE_IR:
|
||||
if (newState == PAUSE_IR) {
|
||||
tms = 0;
|
||||
} else {
|
||||
tms = 1;
|
||||
_state = EXIT2_IR;
|
||||
}
|
||||
break;
|
||||
case EXIT2_IR:
|
||||
switch (newState) {
|
||||
case SHIFT_IR:
|
||||
case EXIT1_IR:
|
||||
case PAUSE_IR:
|
||||
tms = 0;
|
||||
_state = SHIFT_IR;
|
||||
break;
|
||||
default:
|
||||
tms = 1;
|
||||
_state = UPDATE_IR;
|
||||
}
|
||||
break;
|
||||
case UPDATE_IR:
|
||||
if (newState == RUN_TEST_IDLE) {
|
||||
tms = 0;
|
||||
_state = RUN_TEST_IDLE;
|
||||
} else {
|
||||
tms = 1;
|
||||
_state = SELECT_DR_SCAN;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
setTMS(tms);
|
||||
display("%d %d %d %x\n", tms, _num_tms-1, _state, _tms_buffer[(_num_tms-1) / 8]);
|
||||
}
|
||||
/* force write buffer */
|
||||
flushTMS();
|
||||
}
|
||||
|
||||
const char *FtdiJtag::getStateName(tapState_t s)
|
||||
{
|
||||
switch (s) {
|
||||
case TEST_LOGIC_RESET:
|
||||
return "TEST_LOGIC_RESET";
|
||||
case RUN_TEST_IDLE:
|
||||
return "RUN_TEST_IDLE";
|
||||
case SELECT_DR_SCAN:
|
||||
return "SELECT_DR_SCAN";
|
||||
case CAPTURE_DR:
|
||||
return "CAPTURE_DR";
|
||||
case SHIFT_DR:
|
||||
return "SHIFT_DR";
|
||||
case EXIT1_DR:
|
||||
return "EXIT1_DR";
|
||||
case PAUSE_DR:
|
||||
return "PAUSE_DR";
|
||||
case EXIT2_DR:
|
||||
return "EXIT2_DR";
|
||||
case UPDATE_DR:
|
||||
return "UPDATE_DR";
|
||||
case SELECT_IR_SCAN:
|
||||
return "SELECT_IR_SCAN";
|
||||
case CAPTURE_IR:
|
||||
return "CAPTURE_IR";
|
||||
case SHIFT_IR:
|
||||
return "SHIFT_IR";
|
||||
case EXIT1_IR:
|
||||
return "EXIT1_IR";
|
||||
case PAUSE_IR:
|
||||
return "PAUSE_IR";
|
||||
case EXIT2_IR:
|
||||
return "EXIT2_IR";
|
||||
case UPDATE_IR:
|
||||
return "UPDATE_IR";
|
||||
default:
|
||||
return "Unknown";
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user