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openFPGALoader
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added lilygo-t-fpga board (based on gwu2x #434)

This commit is contained in:
Gwenhael Goavec-Merou 2024-05-20 21:18:20 +02:00
parent 53578876d5
commit 26b4516aeb
2 changed files with 8 additions and 0 deletions
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7
doc/boards.yml
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@ -496,6 +496,13 @@
Memory: OK Memory: OK
Flash: OK Flash: OK
- ID: lilygo-t-fpga
Description: Lilygo T-FPGA
URL: https://www.lilygo.cc/products/t-fpga
FPGA: Gowin GW1NSR-LV4CQN48PC6/15
Memory: OK
Flash: OK
- ID: machXO2EVN - ID: machXO2EVN
Description: Lattice MachXO2 Breakout Board Evaluation Kit Description: Lattice MachXO2 Breakout Board Evaluation Kit
URL: https://www.latticesemi.com/products/developmentboardsandkits/machxo2breakoutboard URL: https://www.latticesemi.com/products/developmentboardsandkits/machxo2breakoutboard

1
src/board.hpp
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@ -177,6 +177,7 @@ static std::map <std::string, target_board_t> board_list = {
JTAG_BOARD("LD-KONFEKT", "LFE5U-12F-6BG256C", "", 0, 0, CABLE_MHZ(6)), JTAG_BOARD("LD-KONFEKT", "LFE5U-12F-6BG256C", "", 0, 0, CABLE_MHZ(6)),
DFU_BOARD("LD-KONFEKT-DFU", "", "dfu", 0x16d0, 0x116d, 0), DFU_BOARD("LD-KONFEKT-DFU", "", "dfu", 0x16d0, 0x116d, 0),
JTAG_BOARD("licheeTang", "", "anlogicCable", 0, 0, CABLE_DEFAULT), JTAG_BOARD("licheeTang", "", "anlogicCable", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("lilygo-t-fpga", "", "gwu2x", 0, 0, CABLE_DEFAULT),
/* left for backward compatibility, use tec0117 instead */ /* left for backward compatibility, use tec0117 instead */
JTAG_BOARD("littleBee", "", "ft2232", 0, 0, CABLE_DEFAULT), JTAG_BOARD("littleBee", "", "ft2232", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("machXO2EVN", "", "ft2232", 0, 0, CABLE_DEFAULT), JTAG_BOARD("machXO2EVN", "", "ft2232", 0, 0, CABLE_DEFAULT),