spiOverJtag: Add new package xc7a (fbg484) and xc7a200tfbg484 bitstream

Add fbg484 package .xdc constraint file and xc7a200tfbg484 bitstream

Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
This commit is contained in:
ame-essi-instr 2023-02-15 15:26:26 +01:00 committed by Gwenhael Goavec-Merou
parent d41c5ea884
commit 2449afa135
3 changed files with 12 additions and 1 deletions

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@ -3,7 +3,7 @@ XILINX_PARTS := xc3s500evq100 xc6slx9tqg144 xc6slx16ftg256 xc6slx16csg324 xc6slx
xc7a35tcpg236 xc7a35tcsg324 xc7a35tftg256 \
xc7a50tcsg324 xc7a50tcpg236 xc7a75tfgg484 \
xc7a100tcsg324 xc7a100tfgg484 xc7a100tfgg676\
xc7a200tsbg484 \
xc7a200tsbg484 xc7a200tfbg484 \
xc7s25csga225 xc7s25csga324 xc7s50csga324 \
xc7k160tffg676 \
xc7k325tffg676 xc7k325tffg900 \

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@ -0,0 +1,11 @@
set_property CFGBVS VCCO [current_design]
set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH {4} [current_design]
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property -dict {PACKAGE_PIN T19 IOSTANDARD LVTTL} [get_ports {csn}]
set_property -dict {PACKAGE_PIN P22 IOSTANDARD LVTTL} [get_ports {sdi_dq0}]
set_property -dict {PACKAGE_PIN R22 IOSTANDARD LVTTL} [get_ports {sdo_dq1}]
set_property -dict {PACKAGE_PIN P21 IOSTANDARD LVTTL} [get_ports {wpn_dq2}]
set_property -dict {PACKAGE_PIN R21 IOSTANDARD LVTTL} [get_ports {hldn_dq3}]

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