README: TOC fix link, add efinix entry, and honeycomb

README.md

@@ -86,12 +86,13 @@ __Supported cables:__
   - [Load bistream](#load-bitstream-device)
   - [Bypass file type detection](#automatic-file-type-detection-bypass)
   - [Bitbang mode and pins configuration](#bitbang-mode-and-pins-configuration)
-- [Altera](#cyc1000)
+- [Altera](#altera)
 - [Xilinx](#xilinx)
 - [Lattice machXO](#lattice-machxo)
 - [Lattice ECP5 and Nexus](#lattice-ecp5-nexus)
 - [Gowin](#gowin)
 - [Anlogic](#anlogic)
+- [Efinix](#efinix)
 - [ice40](#ice40)
 
 ## compile and install
@@ -287,6 +288,7 @@ allowed values are:
 |  RI   | 7  |
 
 
+<a id='altera'></a>
 ### CYC1000, DE0, de0nano
 
 #### loading in memory:
@@ -326,6 +328,7 @@ configured in SPI mode and sfl primitive used to access EPCQ SPI flash.**
 This interface is used for SPI communication only when the dedicated svf is
 loaded in RAM, rest of the time, user is free to use for what he want.**
 
+<a id='xilinx'></a>
 ### <span style="text-decoration:underline">Xilinx based boards</span>
 
 To simplify further explanations, we consider the project is generated in the
@@ -399,6 +402,7 @@ board.hpp level or if the board is not officially supported. device/packagee
 format is something like xc7a35tcsg324 (arty model). See src/board.hpp, or
 spiOverJtag directory for examples.
 
+<a id='lattice-machxo'></a>
 ### MachXO2/MachXO3 Starter Kit
 
 #### Flash memory:
@@ -426,6 +430,7 @@ where *yourboard* may be:
 * *machX02EVN*
 * *machXO3SK*
 
+<a id='lattice-ecp5-nexus'></a>
 ### Lattice ECP5 (Colorlight 5A-75b, Lattice ECP5 5G Evaluation board, ULX3S) CrossLink-NX
 
 #### SRAM:
@@ -452,8 +457,8 @@ To generates *.mcs* file **PROM File** must be checked under **Exports Files** i
 openFPGALoader [-b yourBoard] [-c yourCable] project_name/*.mcs
 ```
 
-
-### GOWIN GW1N (Trenz TEC0117, Sipeed Tang Nano and RUNBER)
+<a id='gowin'></a>
+### GOWIN GW1N (Trenz TEC0117, Sipeed Tang Nano, Honeycomb and RUNBER)
 
 *.fs* file is the default format generated by *Gowin IDE*, so nothing
 special must be done to generates this file.
@@ -485,6 +490,7 @@ where *BOARD_NAME* is:
 - **tec0117**
 - **runber**
 
+<a id='anlogic'></a>
 ### Sipeed Lichee Tang
 
 For this target, *openFPGALoader* support *svf* and *bit*
@@ -529,6 +535,7 @@ tangbit --input /somewhere.bit --svf bitstream.svf
 openFPGALoader -b licheeTang /somewhere/*.svf
 ```
 
+<a id='efinix'></a>
 ### Firant and Xyloni boards (efinix trion T8)
 
 *.hex* file is the default format generated by *Efinity IDE*, so nothing
@@ -548,6 +555,7 @@ openFPGALoader -b xyloni_spi /somewhere/project/outflow/*.hex
 
 Since openFPGALoader access the flash directly in SPI mode the *-b fireant*, *-b xyloni_spi* is required (no autodetection possible)
 
+<a id='ice40'></a>
 ### ice40 boards (icestick, iCE40-HX8K, iCEBreaker, iCE40HX1K-EVB, iCE40HX8K-EVB)
 
 *.bin* is the default format generated by *nextpnr*, so nothing special