fix up line endings and white space issues - also moved the flash sector if block into MachXO3D family - as not required for other types
This commit is contained in:
Martin Beynon
parent
b6979f54f7
commit
07752c37e2
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@ -20,6 +20,49 @@
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#include "display.hpp"
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#include "feaparser.hpp"
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/* FEAbits element defines */
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# define FEA_I2C_DG_FIL_EN (1 << 0) /* I2C deglitch filter enable for Primary I2C Port 0=Disabled (Default), 1=Enabled */
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# define FEA_FLASH_PROT_SEC_SEL (0x7 << 1) /* Flash Protection Sector Selection */
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# define FEA_MY_ASSP_EN (1 << 4) /* MY_ASSP Enabled 0=Disabled (Default), 1=Enabled */
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# define FEA_PROG_PERSIST (1 << 5) /* PROGRAMN Persistence 0=Enabled (Default), 1=Disabled */
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# define FEA_INITN_PERSIST (1 << 6) /* INITN Persistence 0=Disabled (Default), 1=Enabled */
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# define FEA_DONE_PERSIST (1 << 7) /* DONE Persistence 0=Disabled (Default), 1=Enabled */
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# define FEA_JTAG_PERSIST (1 << 8) /* JTAG Port Persistence 0=Enabled (Default), 1=Disabled */
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# define FEA_SSPI_PERSIST (1 << 9) /* Slave SPI Port Persistence 0=Enabled (Default), 1=Disabled */
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# define FEA_I2C_PERSIST (1 << 10) /* I²C Port Persistence 0=Enabled (Default), 1=Disabled */
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# define FEA_MSPI_PERSIST (1 << 11) /* Master SPI Port Persistence 0=Disabled (Default), 1=Enabled */
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# define FEA_BOOT_SEQ_SEL (0x07 << 12) /* Boot Sequence selection (used along with Master SPI Port Persistence bit) */
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# define FEA_I2C_DG_RANGE_SEL (1 << 15) /* I2C deglitch filter range selection on primary I2C port2 0= 8 to 25 ns range (Default) 1= 16 to 50 ns range */
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# define FEA_VERSION_RB_PROT (1 << 16) /* Version Rollback Protection1 0= Disabled (Default) 1= Enabled (Checks if current version of bitstream is similar to the one that is goi>
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# define FEA_RESERVED_ZERO (0xffff << 17)
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/* Feature Row element defines */
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# define FEATURE_CUSTOM_ID (0xffffffff) /* 32 bits of Custom ID code */
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# define FEATURE_TRACE_ID (0xff << 0) /* 8 bits for the user programmable TraceID */
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# define FEATURE_I2C_SLAVE_ADDR (0xff << 8) /* 8 bits for the user programmable I2C Slave Address */
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# define FEATURE_DUAL_BOOT_ADDR (0xffff << 16) /* 16 bits for Dual boot address (Most significant 16- bit of address for secondary boot from external flash) */
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# define FEATURE_MASTER_RETRY_CNT (0x3 << 2) /* Master Retry Count */
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# define FEATURE_MASTER_TIMER_CNT (0x0f << 4) /* Master Timer Count */
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# define FEATURE_SLAVE_IDLE_TIMER_CNT (0x0f << 8) /* Slave Idle Timer Count */
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# define FEATURE_SFDP_CONT_FAIL (1 << 14) /* SFDP Continue on Fail */
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# define FEATURE_SFDP_EN (1 << 15) /* SFDP Enable */
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# define FEATURE_BULK_ERASE_DISABLE (1 << 16) /* No Bulk Erase */
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# define FEATURE_32BIT_SPIM (1 << 17) /* 32-bit SPIM */
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# define FEATURE_MCLK_BYPASS (1 << 18) /* MCLK Bypass */
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# define FEATURE_LSBF (1 << 19) /* LSBF */
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# define FEATURE_RX_EDGE (1 << 20)
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# define FEATURE_TX_EDGE (1 << 21)
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# define FEATURE_CPOL (1 << 22)
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# define FEATURE_CPHA (1 << 23)
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# define FEATURE_HSE_CLOCK_SEL (0x3 << 24)
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# define FEATURE_EBR_ENABLE (1 << 26)
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# define FEATURE_SSPI_AUTO (1 << 28) /* SSPI Auto */
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# define FEATURE_CPU (1 << 29) /* CPU */
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# define FEATURE_CORE_CLK_SEL (0x03 << 30) /* Core Clock Sel */
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using namespace std;
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FeaParser::FeaParser(string filename, bool verbose):
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@ -60,7 +103,7 @@ void FeaParser::displayHeader()
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{
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if (_has_feabits) {
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printf("\nFeature Row: [0x");
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for(int i = 2; i >= 0; i--) {
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for (int i = 2; i >= 0; i--) {
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printf("%08x", _featuresRow[i]);
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}
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printf("]\n");
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@ -131,8 +174,7 @@ void FeaParser::displayHeader()
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printf("Dual Boot, No Boot\n");
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else
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printf("Unknown boot sequence selection");
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}
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else {
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} else {
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if (boot_mode == 0)
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printf("Dual Boot, CFG0 - Ext\n");
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else if ((boot_mode & 0x03) == 1)
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@ -169,8 +211,7 @@ void FeaParser::displayHeader()
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printf("\tFlash Protection : ");
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if (flash_prot == 0) {
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printf("None\n");
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}
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else {
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} else {
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if (flash_prot & 0x04)
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printf("CFG0 & CFG1 ");
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if (flash_prot & 0x02)
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@ -15,48 +15,6 @@
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#include "configBitstreamParser.hpp"
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/* FEAbits element defines */
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# define FEA_I2C_DG_FIL_EN (1 << 0) /* I2C deglitch filter enable for Primary I2C Port 0=Disabled (Default), 1=Enabled */
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# define FEA_FLASH_PROT_SEC_SEL (0x7 << 1) /* Flash Protection Sector Selection */
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# define FEA_MY_ASSP_EN (1 << 4) /* MY_ASSP Enabled 0=Disabled (Default), 1=Enabled */
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# define FEA_PROG_PERSIST (1 << 5) /* PROGRAMN Persistence 0=Enabled (Default), 1=Disabled */
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# define FEA_INITN_PERSIST (1 << 6) /* INITN Persistence 0=Disabled (Default), 1=Enabled */
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# define FEA_DONE_PERSIST (1 << 7) /* DONE Persistence 0=Disabled (Default), 1=Enabled */
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# define FEA_JTAG_PERSIST (1 << 8) /* JTAG Port Persistence 0=Enabled (Default), 1=Disabled */
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# define FEA_SSPI_PERSIST (1 << 9) /* Slave SPI Port Persistence 0=Enabled (Default), 1=Disabled */
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# define FEA_I2C_PERSIST (1 << 10) /* I²C Port Persistence 0=Enabled (Default), 1=Disabled */
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# define FEA_MSPI_PERSIST (1 << 11) /* Master SPI Port Persistence 0=Disabled (Default), 1=Enabled */
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# define FEA_BOOT_SEQ_SEL (0x07 << 12) /* Boot Sequence selection (used along with Master SPI Port Persistence bit) */
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# define FEA_I2C_DG_RANGE_SEL (1 << 15) /* I2C deglitch filter range selection on primary I2C port2 0= 8 to 25 ns range (Default) 1= 16 to 50 ns range */
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# define FEA_VERSION_RB_PROT (1 << 16) /* Version Rollback Protection1 0= Disabled (Default) 1= Enabled (Checks if current version of bitstream is similar to the one that is going to be downloaded) */
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# define FEA_RESERVED_ZERO (0xffff << 17)
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/* Feature Row element defines */
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# define FEATURE_CUSTOM_ID (0xffffffff) /* 32 bits of Custom ID code */
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# define FEATURE_TRACE_ID (0xff << 0) /* 8 bits for the user programmable TraceID */
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# define FEATURE_I2C_SLAVE_ADDR (0xff << 8) /* 8 bits for the user programmable I2C Slave Address */
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# define FEATURE_DUAL_BOOT_ADDR (0xffff << 16) /* 16 bits for Dual boot address (Most significant 16- bit of address for secondary boot from external flash) */
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# define FEATURE_MASTER_RETRY_CNT (0x3 << 2) /* Master Retry Count */
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# define FEATURE_MASTER_TIMER_CNT (0x0f << 4) /* Master Timer Count */
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# define FEATURE_SLAVE_IDLE_TIMER_CNT (0x0f << 8) /* Slave Idle Timer Count */
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# define FEATURE_SFDP_CONT_FAIL (1 << 14) /* SFDP Continue on Fail */
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# define FEATURE_SFDP_EN (1 << 15) /* SFDP Enable */
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# define FEATURE_BULK_ERASE_DISABLE (1 << 16) /* No Bulk Erase */
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# define FEATURE_32BIT_SPIM (1 << 17) /* 32-bit SPIM */
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# define FEATURE_MCLK_BYPASS (1 << 18) /* MCLK Bypass */
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# define FEATURE_LSBF (1 << 19) /* LSBF */
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# define FEATURE_RX_EDGE (1 << 20)
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# define FEATURE_TX_EDGE (1 << 21)
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# define FEATURE_CPOL (1 << 22)
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# define FEATURE_CPHA (1 << 23)
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# define FEATURE_HSE_CLOCK_SEL (0x3 << 24)
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# define FEATURE_EBR_ENABLE (1 << 26)
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# define FEATURE_SSPI_AUTO (1 << 28) /* SSPI Auto */
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# define FEATURE_CPU (1 << 29) /* CPU */
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# define FEATURE_CORE_CLK_SEL (0x03 << 30) /* Core Clock Sel */
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class FeaParser: public ConfigBitstreamParser {
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public:
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FeaParser(std::string filename, bool verbose = false);
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116
src/lattice.cpp
116
src/lattice.cpp
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@ -101,7 +101,7 @@ using namespace std;
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# define REG_STATUS_PP_UFM (1 << 17) /* Password Protection enabled for all UFM flash sectors 0=Disabled (Default), 1=Enabled */
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# define REG_STATUS_AUTH_DONE (1 << 18) /* Authentication done */
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# define REG_STATUS_PRI_BOOT_FAIL (1 << 21) /* Primary boot failure (1= Fail) even though secondary boot successful */
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# define REG_STATUS_CNF_CHK_MASK (0x0f << 22)/* Configuration Status Check */
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# define REG_STATUS_CNF_CHK_MASK (0x0f << 22) /* Configuration Status Check */
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# define REG_STATUS_EXEC_ERR (1 << 26) /*** NOT specified for MachXO3D ***/
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# define REG_STATUS_DEV_VERIFIED (1 << 27) /* I=0 Device verified correct, I=1 Device failed to verify */
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#define READ_STATUS_REGISTER_1 0x3D /* LSC_READ_STATUS_1 */
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@ -118,7 +118,7 @@ using namespace std;
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# define REG_STATUS1_SEC_PLUS_EN_CFG0 (1 << 14) /* Security Plus enabled for CFG0 (1 = Enabled, 0 = Disabled) */
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# define REG_STATUS1_SEC_PLUS_EN_CFG1 (1 << 15) /* Security Plus enabled for CFG1 (1 = Enabled, 0 = Disabled) */
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# define REG_STATUS1_BITSTR_VERSION (1 << 16) /* Bitstream version: 1 = Bitstream in CFG0 is latter (newer) than CFG1, 0 = Bitstream in CFG1 is latter (newer) than CFG0 */
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# define REG_STATUS1_BOOT_SEQ_SEL (0x03 << 17)/* Boot Sequence selection (used along with Master SPI Port Persistence bit) */
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# define REG_STATUS1_BOOT_SEQ_SEL (0x03 << 17) /* Boot Sequence selection (used along with Master SPI Port Persistence bit) */
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# define REG_STATUS1_MSPI_PERS (1 << 20) /* Master SPI Port Persistence 0=Disabled (Default), 1=Enabled */
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# define REG_STATUS1_I2C_DG_FILTER (1 << 21) /* I2C deglitch filter enable for Primary I2C Port 0=Disabled (Default), 1=Enabled */
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# define REG_STATUS1_I2C_DG_RANGE (1 << 22) /* I2C deglitch filter range selection on primary I2C port 0= 8 to 25 ns range (Default), 1= 16 to 50 ns range */
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@ -158,9 +158,35 @@ Lattice::Lattice(Jtag *jtag, const string filename, const string &file_type,
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_fpga_family = MACHXO2_FAMILY;
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else if (family == "MachXO3LF")
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_fpga_family = MACHXO3_FAMILY;
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else if (family == "MachXO3D")
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else if (family == "MachXO3D") {
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_fpga_family = MACHXO3D_FAMILY;
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else if (family == "ECP5")
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if (flash_sector == "CFG0") {
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_flash_sector = LATTICE_FLASH_CFG0;
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printInfo("Flash Sector: CFG0", true);
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} else if (flash_sector == "CFG1") {
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_flash_sector = LATTICE_FLASH_CFG1;
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printInfo("Flash Sector: CFG1", true);
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} else if (flash_sector == "UFM0") {
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_flash_sector = LATTICE_FLASH_UFM0;
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printInfo("Flash Sector: UFM0", true);
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} else if (flash_sector == "UFM1") {
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_flash_sector = LATTICE_FLASH_UFM1;
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printInfo("Flash Sector: UFM1", true);
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} else if (flash_sector == "UFM2") {
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_flash_sector = LATTICE_FLASH_UFM2;
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printInfo("Flash Sector: UFM2", true);
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} else if (flash_sector == "UFM3") {
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_flash_sector = LATTICE_FLASH_UFM3;
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printInfo("Flash Sector: UFM3", true);
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} else if (flash_sector == "FEA") {
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_flash_sector = LATTICE_FLASH_FEA;
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printInfo("Flash Sector: FEA", true);
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} else {
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printError("Unknown flash sector");
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throw std::exception();
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}
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} else if (family == "ECP5")
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_fpga_family = ECP5_FAMILY;
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else if (family == "CrosslinkNX")
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_fpga_family = NEXUS_FAMILY;
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@ -170,39 +196,6 @@ Lattice::Lattice(Jtag *jtag, const string filename, const string &file_type,
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printError("Unknown device family");
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throw std::exception();
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}
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if (flash_sector == "CFG0") {
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_flash_sector = LATTICE_FLASH_CFG0;
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printInfo("Flash Sector: CFG0", true);
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}
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else if (flash_sector == "CFG1") {
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_flash_sector = LATTICE_FLASH_CFG1;
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printInfo("Flash Sector: CFG1", true);
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}
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else if (flash_sector == "UFM0") {
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_flash_sector = LATTICE_FLASH_UFM0;
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printInfo("Flash Sector: UFM0", true);
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}
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else if (flash_sector == "UFM1") {
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_flash_sector = LATTICE_FLASH_UFM1;
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printInfo("Flash Sector: UFM1", true);
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}
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else if (flash_sector == "UFM2") {
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_flash_sector = LATTICE_FLASH_UFM2;
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printInfo("Flash Sector: UFM2", true);
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}
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else if (flash_sector == "UFM3") {
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_flash_sector = LATTICE_FLASH_UFM3;
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printInfo("Flash Sector: UFM3", true);
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}
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else if (flash_sector == "FEA") {
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_flash_sector = LATTICE_FLASH_FEA;
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printInfo("Flash Sector: FEA", true);
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}
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else {
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printError("Unknown flash sector");
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throw std::exception();
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}
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}
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void displayFeabits(uint16_t _featbits)
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@ -619,9 +612,6 @@ bool Lattice::program_flash(unsigned int offset)
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else if (_file_extension == "fea") {
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retval = program_fea_MachXO3D();
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}
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else if (_file_extension == "pub") {
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retval = program_pubkey_MachXO3D();
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}
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else
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retval = program_extFlash(offset);
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@ -1541,52 +1531,6 @@ bool Lattice::program_fea_MachXO3D()
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return true;
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}
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bool Lattice::program_pubkey_MachXO3D()
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{
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bool err;
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bool same = true;
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int len;
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RawParser _pk(_filename, false);
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printInfo("Open file: ", false);
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printSuccess("DONE");
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err = _pk.parse();
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printInfo("Parse file: ", false);
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if (err == EXIT_FAILURE) {
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printError("FAIL");
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return false;
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} else {
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printSuccess("DONE");
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}
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uint8_t* data = _pk.getData();
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len = _pk.getLength()/8;
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printf("Header: [");
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if (data[0] == 0x0f) {
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for (int i = 2; i < len; i++) {
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if (data[i] == 0xf0)
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break;
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printf("%c", data[i]);
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}
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}
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printf("]\n");
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printf("Data: [");
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for (int i = 0; i < len -3; i++) {
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printf("0x%02x ", data[i]);
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}
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printf("\b]\n");
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printf("Trailing bytes: [");
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for (int i = len -3; i < len; i++) {
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printf("0x%02x ", data[i]);
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}
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printf("\b]\n");
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}
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bool Lattice::program_intFlash_MachXO3D()
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{
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bool err, ufm_flag;
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@ -98,7 +98,6 @@ class Lattice: public Device, SPIInterface {
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lattice_flash_sector_t _flash_sector;
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bool program_intFlash_MachXO3D();
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bool program_fea_MachXO3D();
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bool program_pubkey_MachXO3D();
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bool programFeatureRow_MachXO3D(uint8_t* feature_row);
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bool programFeabits_MachXO3D(uint32_t feabits);
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};
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