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<a href="../index.html" class="icon icon-home"> openFPGALoader: universal utility for programming FPGA
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<li class="toctree-l2"><a class="reference internal" href="#loading-a-bitstream">Loading a bitstream</a><ul>
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<li class="toctree-l3"><a class="reference internal" href="#spi-flash">SPI flash</a></li>
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<section id="xilinx-notes">
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<span id="xilinx"></span><h1>Xilinx notes<a class="headerlink" href="#xilinx-notes" title="Link to this heading">¶</a></h1>
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<p>To simplify further explanations, we consider the project is generated in the current directory.</p>
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<div class="admonition note">
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<p class="admonition-title">Note</p>
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<ol class="arabic simple">
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<li><p>Spartan Edge Accelerator Board has only pinheader, so the cable must be provided</p></li>
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<li><p>A <em>JTAG</em> <-> <em>SPI</em> bridge (used to write bitstream in FLASH) is available for some device, see
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<a class="reference external" href="https://github.com/trabucayre/openFPGALoader/blob/master/spiOverJtag">spiOverJtag</a> to check if your model is supported.</p></li>
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<li><p>Board provides the device/package model, but if the targeted board is not officially supported but the FPGA yes,
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you can use <code class="docutils literal notranslate"><span class="pre">--fpga-part</span></code> to provide the model.</p></li>
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<li><p>With spartan3, the flash is an independent JTAG device.
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User has to use <code class="docutils literal notranslate"><span class="pre">--index-chain</span></code> to access FPGA (RAM only) or flash (write/read only).</p></li>
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</ol>
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</div>
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<div class="admonition warning">
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<p class="admonition-title">Warning</p>
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<p><code class="docutils literal notranslate"><span class="pre">*.bin</span></code> may be loaded in memory or in flash, but this extension is a classic extension for CPU firmware and, by
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default, <em>openFPGALoader</em> loads file in memory.
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Double check <code class="docutils literal notranslate"><span class="pre">-m</span></code> / <code class="docutils literal notranslate"><span class="pre">-f</span></code> when you want to use a firmware for a softcore (or anything, other than a bitstream) to
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write somewhere in the FLASH device).</p>
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</div>
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<p><code class="docutils literal notranslate"><span class="pre">.bit</span></code> file is the default format generated by <em>vivado</em>, so nothing special task must be done to generate this
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bitstream.</p>
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<p><code class="docutils literal notranslate"><span class="pre">.bin</span></code> is not, by default, produced.
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To have access to this file you need to configure the tool:</p>
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<ul class="simple">
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<li><p>GUI: <em>Tools</em> -> <em>Settings</em> -> <em>Bitstreams</em> -> check <code class="docutils literal notranslate"><span class="pre">-bin_file</span></code>.</p></li>
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<li><p>TCL: append your <em>TCL</em> file with <code class="docutils literal notranslate"><span class="pre">set_property</span> <span class="pre">STEPS.WRITE_BITSTREAM.ARGS.BIN_FILE</span> <span class="pre">true</span> <span class="pre">[get_runs</span> <span class="pre">impl_1]</span></code>.</p></li>
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</ul>
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<div class="admonition warning">
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<p class="admonition-title">Warning</p>
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<p>For alchitry board the bitstream must be configured with a buswidth of 1 or 2.
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Quad mode can’t be used with alchitry’s FLASH.</p>
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</div>
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<div class="admonition warning">
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<p class="admonition-title">Warning</p>
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<p>For boards based on a Zynq (7000 or MPSoC), boot mode must be configured for JTAG (for Zedboard JP7->JP11 must be
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to GND).</p>
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</div>
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<section id="loading-a-bitstream">
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<h2>Loading a bitstream<a class="headerlink" href="#loading-a-bitstream" title="Link to this heading">¶</a></h2>
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<p><code class="docutils literal notranslate"><span class="pre">.bit</span></code> and <code class="docutils literal notranslate"><span class="pre">.bin</span></code> are allowed to be loaded in memory.</p>
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<p>File load:</p>
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<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>openFPGALoader<span class="w"> </span><span class="o">[</span>-m<span class="o">]</span><span class="w"> </span>-b<span class="w"> </span>arty<span class="w"> </span>*.runs/impl_1/*.bit<span class="w"> </span><span class="o">(</span>or<span class="w"> </span>*.bin<span class="o">)</span>
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</pre></div>
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</div>
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<p>or</p>
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<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>openFPGALoader<span class="w"> </span><span class="o">[</span>-m<span class="o">]</span><span class="w"> </span>-b<span class="w"> </span>spartanEdgeAccelBoard<span class="w"> </span>-c<span class="w"> </span>digilent_hs2<span class="w"> </span>*.runs/impl_1/*.bit<span class="w"> </span><span class="o">(</span>or<span class="w"> </span>*.bin<span class="o">)</span>
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</pre></div>
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</div>
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<section id="spi-flash">
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<h3>SPI flash<a class="headerlink" href="#spi-flash" title="Link to this heading">¶</a></h3>
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<div class="admonition note">
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<p class="admonition-title">Note</p>
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<p><code class="docutils literal notranslate"><span class="pre">.bit</span></code>, <code class="docutils literal notranslate"><span class="pre">.bin</span></code>, and <code class="docutils literal notranslate"><span class="pre">.mcs</span></code> are supported for FLASH.</p>
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</div>
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<p><code class="docutils literal notranslate"><span class="pre">.mcs</span></code> must be generated through Vivado with a tcl script like:</p>
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<div class="admonition warning">
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<p class="admonition-title">Warning</p>
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<p>For boards based on Zynq device (7000 and MPSoC) SPI flash is not accessible through PL.</p>
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</div>
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<div class="highlight-tcl notranslate"><div class="highlight"><pre><span></span><span class="k">set</span><span class="w"> </span>project<span class="w"> </span><span class="k">[</span><span class="nb">lindex</span><span class="w"> </span><span class="nv">$argv</span><span class="w"> </span><span class="mi">0</span><span class="k">]</span>
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<span class="k">set</span><span class="w"> </span>bitfile<span class="w"> </span><span class="s2">"${project}.runs/impl_1/${project}.bit"</span>
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<span class="k">set</span><span class="w"> </span>mcsfile<span class="w"> </span><span class="s2">"${project}.runs/impl_1/${project}.mcs"</span>
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<span class="nv">write_cfgmem</span><span class="w"> </span><span class="o">-</span>format<span class="w"> </span>mcs<span class="w"> </span><span class="o">-</span>interface<span class="w"> </span>spix4<span class="w"> </span><span class="o">-</span>size<span class="w"> </span><span class="mi">16</span><span class="w"> </span><span class="err">\</span>
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<span class="w"> </span><span class="nv">-loadbit</span><span class="w"> </span><span class="s2">"up 0x0 $bitfile"</span><span class="w"> </span><span class="o">-</span>loaddata<span class="w"> </span><span class="s2">""</span><span class="w"> </span><span class="err">\</span>
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<span class="w"> </span><span class="nv">-file</span><span class="w"> </span><span class="nv">$mcsfile</span><span class="w"> </span><span class="o">-</span>force
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</pre></div>
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</div>
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<div class="admonition note">
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<p class="admonition-title">Note</p>
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<p><code class="docutils literal notranslate"><span class="pre">-interface</span> <span class="pre">spix4</span></code> and <code class="docutils literal notranslate"><span class="pre">-size</span> <span class="pre">16</span></code> depends on SPI flash capability and size.</p>
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</div>
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<p>The tcl script is used with:</p>
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<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>vivado<span class="w"> </span>-nolog<span class="w"> </span>-nojournal<span class="w"> </span>-mode<span class="w"> </span>batch<span class="w"> </span>-source<span class="w"> </span>script.tcl<span class="w"> </span>-tclargs<span class="w"> </span>myproject
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</pre></div>
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</div>
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<p>File load:</p>
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<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>openFPGALoader<span class="w"> </span><span class="o">[</span>--fpga-part<span class="w"> </span>xxxx<span class="o">]</span><span class="w"> </span>-f<span class="w"> </span>-b<span class="w"> </span>arty<span class="w"> </span>*.runs/impl_1/*.mcs<span class="w"> </span><span class="o">(</span>or<span class="w"> </span>.bit<span class="w"> </span>/<span class="w"> </span>.bin<span class="o">)</span>
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</pre></div>
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</div>
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<div class="admonition note">
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<p class="admonition-title">Note</p>
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<p><code class="docutils literal notranslate"><span class="pre">-f</span></code> is required to write bitstream (without them <code class="docutils literal notranslate"><span class="pre">.bit</span></code> and <code class="docutils literal notranslate"><span class="pre">.bin</span></code> are loaded in memory).</p>
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</div>
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<div class="admonition note">
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<p class="admonition-title">Note</p>
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<p><code class="docutils literal notranslate"><span class="pre">--fpga-part</span></code> is only required if this information is not provided at <code class="docutils literal notranslate"><span class="pre">board.hpp</span></code> level or if the board is not
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officially supported.
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device/package format is something like xc7a35tcsg324 (arty model).
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See <a class="reference external" href="https://github.com/trabucayre/openFPGALoader/blob/master/src/board.hpp">src/board.hpp</a>, or <a class="reference external" href="https://github.com/trabucayre/openFPGALoader/blob/master/spiOverJtag">spiOverJtag</a> directory for examples.</p>
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</div>
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<p>Some boards with UltraScale FPGAs, like the VCU118 and KCU16, support the SPIx8 (Dual Quad SPI) configuration.
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In this case, the <code class="docutils literal notranslate"><span class="pre">spix8</span></code> option <code class="docutils literal notranslate"><span class="pre">write_cfgmem</span></code> on the above example can be used to generate two <code class="docutils literal notranslate"><span class="pre">.mcs</span></code> files,
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to fit bigger designs or for faster programming. Only <code class="docutils literal notranslate"><span class="pre">.mcs</span></code> files can be used to program the FPGA in this case.</p>
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<p>In this case, to load the two <code class="docutils literal notranslate"><span class="pre">.mcs</span></code> files:</p>
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<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>openFPGALoader<span class="w"> </span>--board<span class="w"> </span>vcu118<span class="w"> </span>-f<span class="w"> </span>--target-flash<span class="w"> </span>both<span class="w"> </span>--bitstream<span class="w"> </span>*.runs/impl_1/*_primary.mcs<span class="w"> </span>--secondary-bitstream<span class="w"> </span>*.runs/impl_1/*_secondary.mcs
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</pre></div>
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</div>
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<p>On these boards, each SPI flash can be programmed independently with the <code class="docutils literal notranslate"><span class="pre">--target-flash</span></code> option.
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The default target is the <code class="docutils literal notranslate"><span class="pre">primary</span></code> flash.</p>
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<p>For example, to program only the secondary flash with arbitrary data not related to FPGA configuration:</p>
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<div class="highlight-bash notranslate"><div class="highlight"><pre><span></span>openFPGALoader<span class="w"> </span>--board<span class="w"> </span>vcu118<span class="w"> </span>-f<span class="w"> </span>--target-flash<span class="w"> </span>secondary<span class="w"> </span>--bitstream<span class="w"> </span>arbitrary_data
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