2021-06-26 15:24:07 +02:00
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// SPDX-License-Identifier: Apache-2.0
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/*
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* Copyright (C) 2019 Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
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*/
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2019-09-26 18:29:20 +02:00
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#include "altera.hpp"
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2020-10-17 18:40:16 +02:00
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#include <string.h>
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#include <string>
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2020-03-06 09:05:57 +01:00
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#include "jtag.hpp"
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2019-09-26 18:29:20 +02:00
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#include "device.hpp"
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#include "epcq.hpp"
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#include "progressBar.hpp"
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#include "rawParser.hpp"
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#define IDCODE 6
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#define BYPASS 0x3FF
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#define IRLENGTH 10
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2020-02-16 13:33:38 +01:00
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// DATA_DIR is defined at compile time.
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#define BIT_FOR_FLASH (DATA_DIR "/openFPGALoader/test_sfl.svf")
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2021-02-21 18:30:13 +01:00
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Altera::Altera(Jtag *jtag, const std::string &filename,
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const std::string &file_type, bool verify, int8_t verbose):
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Device(jtag, filename, file_type, verify, verbose), _svf(_jtag, _verbose)
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{
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if (!_file_extension.empty()) {
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if (_file_extension == "svf" || _file_extension == "rbf")
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_mode = Device::MEM_MODE;
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else
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_mode = Device::SPI_MODE;
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}
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}
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Altera::~Altera()
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{}
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void Altera::reset()
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{
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/* PULSE_NCONFIG */
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unsigned char tx_buff[2] = {0x01, 0x00};
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_jtag->set_state(Jtag::TEST_LOGIC_RESET);
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_jtag->shiftIR(tx_buff, NULL, IRLENGTH);
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_jtag->toggleClk(1);
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_jtag->set_state(Jtag::TEST_LOGIC_RESET);
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}
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void Altera::programMem()
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{
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RawParser _bit(_filename, false);
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_bit.parse();
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int byte_length = _bit.getLength()/8;
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uint8_t *data = _bit.getData();
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uint32_t clk_period = 1e9/(float)_jtag->getClkFreq();
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unsigned char cmd[2];
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unsigned char tx[864/8], rx[864/8];
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memset(tx, 0, 864/8);
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/* enddr idle
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* endir irpause
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* state idle
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*/
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/* ir 0x02 IRLENGTH */
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*reinterpret_cast<uint16_t *>(cmd) = 0x02;
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_jtag->shiftIR(cmd, NULL, IRLENGTH, Jtag::PAUSE_IR);
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/* RUNTEST IDLE 12000 TCK ENDSTATE IDLE; */
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_jtag->set_state(Jtag::RUN_TEST_IDLE);
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_jtag->toggleClk(1000000/clk_period);
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/* write */
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ProgressBar progress("Flash SRAM", byte_length, 50, _quiet);
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int xfer_len = 512;
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int tx_len;
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int tx_end;
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for (int i=0; i < byte_length; i+=xfer_len) {
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if (i + xfer_len > byte_length) { // last packet with some size
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tx_len = (byte_length - i) * 8;
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tx_end = Jtag::EXIT1_DR;
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} else {
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tx_len = xfer_len * 8;
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tx_end = Jtag::SHIFT_DR;
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}
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_jtag->shiftDR(data+i, NULL, tx_len, tx_end);
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progress.display(i);
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}
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progress.done();
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/* reboot */
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/* SIR 10 TDI (004); */
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*reinterpret_cast<uint16_t *>(cmd) = 0x04;
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_jtag->shiftIR(cmd, NULL, IRLENGTH, Jtag::PAUSE_IR);
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/* RUNTEST 60 TCK; */
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_jtag->set_state(Jtag::RUN_TEST_IDLE);
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_jtag->toggleClk(5000/clk_period);
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/*
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* SDR 864 TDI
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* (000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000)
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* TDO (00000000000000000000
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* 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080000000000000000000000000000000000000000)
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* MASK (00000000000000000000000000000000000000000000000000
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* 0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000080000000000000000000000000000000000000000);
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*/
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_jtag->shiftDR(tx, rx, 864, Jtag::RUN_TEST_IDLE);
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/* TBD -> something to check */
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/* SIR 10 TDI (003); */
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*reinterpret_cast<uint16_t *>(cmd) = 0x003;
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_jtag->shiftIR(cmd, NULL, IRLENGTH, Jtag::PAUSE_IR);
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/* RUNTEST 49152 TCK; */
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_jtag->set_state(Jtag::RUN_TEST_IDLE);
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_jtag->toggleClk(4099645/clk_period);
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/* RUNTEST 512 TCK; */
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_jtag->set_state(Jtag::RUN_TEST_IDLE);
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_jtag->toggleClk(512);
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/* SIR 10 TDI (3FF); */
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*reinterpret_cast<uint16_t *>(cmd) = BYPASS;
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_jtag->shiftIR(cmd, NULL, IRLENGTH, Jtag::PAUSE_IR);
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/* RUNTEST 12000 TCK; */
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_jtag->set_state(Jtag::RUN_TEST_IDLE);
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_jtag->toggleClk(1000000/clk_period);
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/* -> idle */
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_jtag->set_state(Jtag::RUN_TEST_IDLE);
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}
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2019-09-28 15:31:43 +02:00
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void Altera::program(unsigned int offset)
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{
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if (_mode == Device::NONE_MODE)
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return;
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/* in all case we consider svf is mandatory
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* MEM_MODE : svf file provided for constructor
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* is the bitstream to use
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* SPI_MODE : svf file provided is bridge to have
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* access to the SPI flash
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*/
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/* mem mode -> svf */
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if (_mode == Device::MEM_MODE) {
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if (_file_extension == "svf")
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_svf.parse(_filename);
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else
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programMem();
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} else if (_mode == Device::SPI_MODE) {
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/* GGM: TODO: fix this issue */
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EPCQ epcq(0x403, 0x6010/*_jtag->vid(), _jtag->pid()*/, 2, 6000000);
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_svf.parse(BIT_FOR_FLASH);
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epcq.program(offset, _filename, (_file_extension == "rpd")? true:false);
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if (_verify)
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printWarn("writing verification not supported");
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reset();
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}
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}
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int Altera::idCode()
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{
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unsigned char tx_data[4] = {IDCODE};
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unsigned char rx_data[4];
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_jtag->go_test_logic_reset();
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_jtag->shiftIR(tx_data, NULL, IRLENGTH);
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2020-07-25 04:55:41 +02:00
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memset(tx_data, 0, 4);
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_jtag->shiftDR(tx_data, rx_data, 32);
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return ((rx_data[0] & 0x000000ff) |
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((rx_data[1] << 8) & 0x0000ff00) |
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((rx_data[2] << 16) & 0x00ff0000) |
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((rx_data[3] << 24) & 0xff000000));
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}
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