Brian Taylor 68f1015075 Example for 7490a Pspice subckt. This exercises jkff, logicexp, and pindly conversions to XSPICE.		2023-07-31 14:27:59 +02:00
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.spiceinit	…
74f524-cp.stim	Add serial load to 74f524 example.	2023-01-09 16:33:10 +01:00
74f524-csi.stim	Add serial load to 74f524 example.	2023-01-09 16:33:10 +01:00
74f524-io.stim	Add serial load to 74f524 example.	2023-01-09 16:33:10 +01:00
74f524-s0s1.stim	Add serial load to 74f524 example.	2023-01-09 16:33:10 +01:00
74f524-sem.stim	Add serial load to 74f524 example.	2023-01-09 16:33:10 +01:00
74f524.cir	Add serial load to 74f524 example.	2023-01-09 16:33:10 +01:00
7490a.cir	Example for 7490a Pspice subckt. This exercises jkff, logicexp, and pindly conversions to XSPICE.	2023-07-31 14:27:59 +02:00
7490a.clk.stim	Example for 7490a Pspice subckt. This exercises jkff, logicexp, and pindly conversions to XSPICE.	2023-07-31 14:27:59 +02:00
7490a.control.stim	Example for 7490a Pspice subckt. This exercises jkff, logicexp, and pindly conversions to XSPICE.	2023-07-31 14:27:59 +02:00
behav-283-1.cir	…
behav-283-1.stim	…
behav-283.cir	…
behav-568.cir	…
behav-568.stim	…
behav-tristate-pulse.cir	…
behav-tristate-pulse.stim	…
behav-tristate.cir	…
behav-tristate.stim	…
counter.cir	…
decoder.cir	…
decoder.stim	…
ex4.cir	…
ex4.stim	…
ex5.cir	Use ~ on the input of a tristate buffer for INV3, and avoid creating an extra inverter. For ff/latch use ~ on set/reset and jkff clock inputs to avoid creating extra inverters.	2023-05-27 10:38:40 +02:00
ex5.stim	…
ex283.cir	…
ex283.stim	…
nggtk.tcl	…
xspice_c4.cir	…