ngspice

History

Giles Atkinson 5114d6c2f4 Add an option to the iplot command: -d sets the number of simulation steps before the window is shown. The value can be chosen to limit rapid resizing when starting and that is used in the PLL examples.		2023-07-15 11:29:32 +02:00
..
README	update to XSPICE phase-locked loop example	2012-08-03 23:22:54 +02:00
f-p-det-d-sub.cir	new XSPICE example: mixed mode pll circuit	2012-07-29 13:52:23 +02:00
loop-filter-2.cir	update to XSPICE phase-locked loop example	2012-08-03 23:22:54 +02:00
loop-filter.cir	update to XSPICE phase-locked loop example	2012-08-03 23:22:54 +02:00
pll-xspice-fstep.cir	Add an option to the iplot command: -d sets the number of simulation	2023-07-15 11:29:32 +02:00
pll-xspice.cir	Add an option to the iplot command: -d sets the number of simulation	2023-07-15 11:29:32 +02:00
test-f-p-det.cir	add BSIM3 model parameters for loop filer with transistor charge pump	2012-08-05 20:15:53 +02:00
test_vco.cir	correct the plot output	2012-08-05 12:06:11 +02:00
vco_sub.cir	update to XSPICE phase-locked loop example	2012-08-03 23:22:54 +02:00
vco_sub_new.cir	update to XSPICE phase-locked loop example	2012-08-03 23:22:54 +02:00

README

This directory contains a mixed mode pll, combining
ngspice and XSPICE circuit blocks.
The pll consists of the following blocks:

** voltage controlled oscillator:
vco_sub.cir
   7 stage ring oscillator with gain cells, CMOS devices
or
vco_sub_new.cir
   vco made from code model d_osc, cntl_array/freq_array data
   are gained by running test-vco.cir with vco_sub.cir

** digital divider and frequency reference:
pll-xspice.cir

** phase frequency detector:
f-p-det-d-sub.cir

** loop filter:
loop-filter.cir
   switched current sources as charge pump, 2nd order
   passive RC filter
or
loop-filter-2.cir
   transistors as switches for charge pump, 2nd or 3rd
   order passive RC filters

** main simulation control:
pll-xspice.cir

Two test files are included:
test-vco.cir simulates vco frequency versus control voltage
test-f-p-det.cir simulates the phase frequency detector and the loop filter.

The main building blocks are organised as subcircuits.

main simulation control with three reference frequencies:
pll-xspice-fstep.cir
   simulates two steps of the reference in one simulation run