72 lines
1.3 KiB
Plaintext
72 lines
1.3 KiB
Plaintext
********************** test circuit No. 3 **************************
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c1g 1 0 1P
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l11a 1 1a 6e-9
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r1a7 1a 7 0.025K
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rin6 in 6 0.075K
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l67 6 7 10e-9
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c7g 7 0 1P
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P2 2 1 7 2 8 PLINE
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.MODEL PLINE CPL
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+R = 2.25 2.25
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+L = 0.6e-6 0.05e-6
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+ 0.05e-6 0.6e-6
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+G = 0
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+C = 1.2e-9 -0.11e-9
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+ -0.11e-9 1.2e-9
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+length = 0.03
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c2g 2 0 0.5P
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r2g 2 0 0.05K
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r23 2 3 0.025K
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l34 3 4 5e-9
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c4g 4 0 2P
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l89 8 9 10e-9
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c9g 9 0 1P
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Y1 9 10 txline
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.model txline txl R = 1 L =0.6e-6 G = 0 C= 1.0e-9 length=0.04
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l1011 10 11 10e-9
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c11g 11 0 0.5P
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r11g 11 0 0.05K
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r1112 11 12 0.025K
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l1213 12 13 5e-9
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c13g 13 0 2P
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r1116 11 16 0.025K
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l1617 16 17 5e-9
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c17g 17 0 2P
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P1 4 4 2 13 17 5 14 15 18 PLINE1
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.MODEL PLINE1 CPL
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+R = 3.5 3.5 3.5 3.5
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+L =
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+1e-6 0.11e-6 0.03e-6 0
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+0.11e-6 1e-6 0.11e-6 0.03e-6
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+0.03e-6 0.11e-6 1e-6 0.11e-6
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+0 0.03e-6 0.11e-6 1e-6
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+G = 0 0 0 0
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+C =
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+1.5e-9 -0.17e-9 -0.03e-9 0
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+-0.17e-9 1.5e-9 -0.17e-9 -0.03e-9
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+-0.03e-9 -0.17e-9 1.5e-9 -0.17e-9
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+0 -0.03e-9 -0.17e-9 1.5e-9
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+length = 0.02
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*D1 5 0 my_diode
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*D2 14 0 my_diode
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*D3 15 0 my_diode
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*D4 18 0 my_diode
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D1 5 0
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D2 14 0
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D3 15 0
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D4 18 0
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VES in 0 PULSE (0 5 0 1.1ns 0.1ns 0.9ns 200ns)
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*.PRINT 6 3 6 7 8 11 15
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*
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.TRAN 0.2N 10.0N
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*.SIMULATE VSTEP = 0.1
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*.SIMULATE EBOUND = 0.05
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*.DC OUTPUT d1
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.END
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