ngspice

History

Giles Atkinson c18447f9f5 Add the support files for co-simulation with Verilog code compiled by Verilator. Also add script files to Visual Studio builds that are already installed by the Makefile builds.		2023-11-27 20:55:59 +00:00
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README.txt	Add the support files for co-simulation with Verilog code	2023-11-27 20:55:59 +00:00
adc.cir	Add the support files for co-simulation with Verilog code	2023-11-27 20:55:59 +00:00
adc.v	Add the support files for co-simulation with Verilog code	2023-11-27 20:55:59 +00:00

README.txt

The circuit adc.cir in this directory illustrates the use of the d_cosim
XSPICE code model as a container for a Verilog simulation.  Before the
simulation can be run, the Verilog code must be compiled by Verilator
using the command:

    ngspice vlnggen adc.v

That should create a shared library file, adc.so (or adc.DLL on Windows)
that will be loaded by the d_cosim code model.  The compiled Verilog code that
it contains will be executed during simulation.