ngspice/src/spicelib/devices
dwarning 766c8d15e2 correct init state vector for qth integration 2026-02-03 13:59:17 +01:00
..
adms Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
asrc Fixes wrong @bxxx[i] return values of B source, ignoring the m parameter. 2025-05-24 11:00:32 +02:00
bjt prevent clang error 2024-02-16 10:12:09 +01:00
bsim1 Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
bsim2 Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
bsim3 icvgs, icvds, and icvbs should be IOP. 2025-07-29 10:51:39 +02:00
bsim3soi_dd Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
bsim3soi_fd Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
bsim3soi_pd Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
bsim3v0 Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
bsim3v1 allow compile w/o NEWCONV defined 2023-12-09 15:43:00 +01:00
bsim3v32 Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
bsim4 remove obsolete bracket 2026-02-03 13:56:57 +01:00
bsim4v5 extend bsim4 operating point info list 2024-11-02 22:35:10 +01:00
bsim4v6 Typo 2026-02-03 13:59:03 +01:00
bsim4v7 extend bsim4 operating point info list 2024-11-02 22:35:10 +01:00
bsimsoi format: rm misleading indentation 2024-11-02 22:28:39 +01:00
cap Initial fix for Bug 710 - 2024-12-06 22:43:53 +01:00
cccs Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
ccvs Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
cpl Improve error message during setup of TXL or CPL 2024-11-02 22:46:01 +01:00
csw Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
dio correct init state vector for qth integration 2026-02-03 13:59:17 +01:00
hfet1 Fix bug 711 reported by Sonia Edward 2024-11-02 22:44:21 +01:00
hfet2 Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
hicum2 Authorship for HICUM 2024-06-24 17:21:50 +02:00
hisim2 prevent unused warning 2025-08-08 11:45:49 +02:00
hisimhv1 prevent unused warning 2025-08-08 11:45:49 +02:00
hisimhv2 prevent unused warning 2025-08-08 11:45:49 +02:00
ind Initial fix for Bug 710 - 2024-12-06 22:43:53 +01:00
isrc Update to V/I sources, SFFM and AM 2024-01-08 13:21:43 +01:00
jfet Temperature handling inconsistency in jfetnoise.c fixed. 2025-05-24 11:03:13 +02:00
jfet2 dtemp bug fixed. 2025-07-29 10:50:35 +02:00
ltra Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
mes MESFET m and ic parameters fixed. 2025-07-29 10:51:05 +02:00
mesa Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
mos1 Fixed MOS1 noise scaling. 2025-05-24 11:21:19 +02:00
mos2 Fixed MOS2 scaling. 2025-05-24 11:21:26 +02:00
mos3 Fixed MOS3 scaling. 2025-05-24 11:21:32 +02:00
mos6 Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
mos9 Fixed MOS9 scaling. 2025-05-24 11:21:39 +02:00
nbjt Enable CIDER with KLU for DC, OP, and TRAN analyses. Small signal AC analysis is not yet supported for CIDER complex valued device KLU matrices. The examples/cider testcases produce printed simulation result values which have slight differences between Sparse and KLU. Differences are probably expected and in a few cases are ~1-2%, sometimes a little more. This should be good enough for most CIDER analyses. Francesco did a good piece of work. Runtimes are significantly shorter with KLU. 2026-02-03 13:55:12 +01:00
nbjt2 Enable CIDER with KLU for DC, OP, and TRAN analyses. Small signal AC analysis is not yet supported for CIDER complex valued device KLU matrices. The examples/cider testcases produce printed simulation result values which have slight differences between Sparse and KLU. Differences are probably expected and in a few cases are ~1-2%, sometimes a little more. This should be good enough for most CIDER analyses. Francesco did a good piece of work. Runtimes are significantly shorter with KLU. 2026-02-03 13:55:12 +01:00
ndev KLU Integration from scratch #5, devices 2023-08-16 11:14:10 +02:00
numd Enable CIDER with KLU for DC, OP, and TRAN analyses. Small signal AC analysis is not yet supported for CIDER complex valued device KLU matrices. The examples/cider testcases produce printed simulation result values which have slight differences between Sparse and KLU. Differences are probably expected and in a few cases are ~1-2%, sometimes a little more. This should be good enough for most CIDER analyses. Francesco did a good piece of work. Runtimes are significantly shorter with KLU. 2026-02-03 13:55:12 +01:00
numd2 Enable CIDER with KLU for DC, OP, and TRAN analyses. Small signal AC analysis is not yet supported for CIDER complex valued device KLU matrices. The examples/cider testcases produce printed simulation result values which have slight differences between Sparse and KLU. Differences are probably expected and in a few cases are ~1-2%, sometimes a little more. This should be good enough for most CIDER analyses. Francesco did a good piece of work. Runtimes are significantly shorter with KLU. 2026-02-03 13:55:12 +01:00
numos Enable CIDER with KLU for DC, OP, and TRAN analyses. Small signal AC analysis is not yet supported for CIDER complex valued device KLU matrices. The examples/cider testcases produce printed simulation result values which have slight differences between Sparse and KLU. Differences are probably expected and in a few cases are ~1-2%, sometimes a little more. This should be good enough for most CIDER analyses. Francesco did a good piece of work. Runtimes are significantly shorter with KLU. 2026-02-03 13:55:12 +01:00
res Initial fix for Bug 710 - 2024-12-06 22:43:53 +01:00
soi3 Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
sw Getting rid of SPARSE for Initial Circuit Matrix creation. Now KLU is totally independent from SPARSE. This opens up the interface for other solvers as well 2023-08-16 11:14:18 +02:00
tra A quick fix for a bug reported in the Help forum by Tom Hajjar on 2024-01-12 17:14:05 +00:00
txl Improve error message during setup of TXL or CPL 2024-11-02 22:46:01 +01:00
urc KLU Integration from scratch #5, devices 2023-08-16 11:14:10 +02:00
vbic VBIC: simplify nqs derivatives 2025-05-24 11:18:08 +02:00
vccs Remove unused instance parameter ic (initial condition of controlling source). 2023-10-01 10:51:31 +02:00
vcvs Remove unused instance parameter ic (initial condition of controlling source). 2023-10-01 10:51:31 +02:00
vdmos Involve optional d-s shunt in ac and pz analysis 2025-05-24 11:23:18 +02:00
vsrc Cosmetics: Indentation 2026-02-03 13:57:14 +01:00
ChangeLog
Makefile.am Remove ADMS related code 2025-05-24 11:17:56 +02:00
cktaccept.c For memcpy in PREDICTOR 2023-01-09 16:32:16 +01:00
cktaccept.h remove prototypes, avoid redeclarations 2010-10-16 15:58:14 +00:00
cktask.c free errMsg only if available 2020-03-15 08:51:14 +01:00
cktbindnode.c GENmodel, GENinstance, change layout, #4/4, complete the change 2018-02-17 11:53:06 +01:00
cktcrte.c Add another error qualifier to decribe the current policy 2023-05-27 10:43:40 +02:00
cktfinddev.c Add comment 2023-10-02 10:07:52 +02:00
cktinit.c Per-device load timing support. 2025-05-24 10:56:33 +02:00
cktsoachk.c introduce CKTsoaInit() 2014-01-02 09:32:36 +01:00
dev.c Remove ADMS related code 2025-05-24 11:17:56 +02:00
dev.h prototype for Verilog-A integration using OSDI and OpenVAF 2022-12-27 13:51:57 +01:00
devsup.c Don't show message for every iteration 2021-07-05 14:31:47 +02:00
limit.c #1/4 #include <ngspice/...> --> #include "ngspice/..." 2011-12-11 18:05:00 +00:00