Holger Vogt b8357edddc Add analog code model astate. ... It reports the previous state (delayed by 1 to 3 time steps) of the input node. Single or differential voltage or current.		2025-09-21 15:52:51 +02:00
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analog_models1_transient.sp	Examples moved to folder /various	2022-12-11 15:28:01 +01:00
astate.cir	Add analog code model astate.	2025-09-21 15:52:51 +02:00
astate_pulse.cir	Add analog code model astate.	2025-09-21 15:52:51 +02:00
filesource-test.sp	rename example file	2022-12-11 15:28:23 +01:00
pwlts1.cir	Examples moved to folder /various	2022-12-11 15:28:01 +01:00
simple-diode.cir	Examples moved to folder /various	2022-12-11 15:28:01 +01:00
sine.m	Examples moved to folder /various	2022-12-11 15:28:01 +01:00
vswitch-test-lin.cir	Examples moved to folder /various	2022-12-11 15:28:01 +01:00
vswitch-test-log.cir	Examples moved to folder /various	2022-12-11 15:28:01 +01:00
x_fer.cir	Various filter examples using Laplace expression x_fer	2023-01-20 15:07:37 +01:00
xspice_c1.cir	Examples moved to folder /various	2022-12-11 15:28:01 +01:00
xspice_c2.cir	Examples moved to folder /various	2022-12-11 15:28:01 +01:00
xspice_c3.cir	Examples moved to folder /various	2022-12-11 15:28:01 +01:00