Brian Taylor af4da75f1d Enable CIDER with KLU for DC, OP, and TRAN analyses. Small signal AC analysis is not yet supported for CIDER complex valued device KLU matrices. The examples/cider testcases produce printed simulation result values which have slight differences between Sparse and KLU. Differences are probably expected and in a few cases are ~1-2%, sometimes a little more. This should be good enough for most CIDER analyses. Francesco did a good piece of work. Runtimes are significantly shorter with KLU.

2025-09-03 16:56:36 -07:00

..

input

Add EXITPOINTs, if reading inputs etc. fails

2020-04-27 10:09:30 +02:00

oned

Enable CIDER with KLU for DC, OP, and TRAN analyses. Small signal AC analysis is not yet supported for CIDER complex valued device KLU matrices. The examples/cider testcases produce printed simulation result values which have slight differences between Sparse and KLU. Differences are probably expected and in a few cases are ~1-2%, sometimes a little more. This should be good enough for most CIDER analyses. Francesco did a good piece of work. Runtimes are significantly shorter with KLU.

2025-09-03 16:56:36 -07:00

support

Replace all BOOLEAN, BOOL, _Bool by bool

2024-12-09 16:07:36 +01:00

twod

Enable CIDER with KLU for DC, OP, and TRAN analyses. Small signal AC analysis is not yet supported for CIDER complex valued device KLU matrices. The examples/cider testcases produce printed simulation result values which have slight differences between Sparse and KLU. Differences are probably expected and in a few cases are ~1-2%, sometimes a little more. This should be good enough for most CIDER analyses. Francesco did a good piece of work. Runtimes are significantly shorter with KLU.

2025-09-03 16:56:36 -07:00

Makefile.am

Cider simulator (simulator routines) Import.

2003-08-11 19:25:28 +00:00

notes

Cider simulator (simulator routines) Import.

2003-08-11 19:25:28 +00:00