86 lines
2.4 KiB
Plaintext
86 lines
2.4 KiB
Plaintext
vsrc-pwl-1
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* (compile (concat "../../../../w32/src/ngspice -b " buffer-file-name) t)
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* (compile (concat "valgrind --track-origins=yes --leak-check=full --show-reachable=yes ../../../../w32/src/ngspice -b " buffer-file-name) t)
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*
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* broken, stept nicht wo er soll
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* wenn r=0 td=15 ...
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* in vsrcacct war td nicht berücksichtigt
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*
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* was ist die semantic von r genau, laut doku muss das exact matchen zu einem punkt
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*
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* case VSRC_TD:
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* here->VSRCrdelay = value->rValue;
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* break;
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* case VSRC_R: {
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* double end_time;
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* here->VSRCr = value->rValue;
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* here->VSRCrGiven = TRUE;
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*
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* here->VSRCrBreakpt = i; der index des matchenden elements ...
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* if kleiner erster punkt dann erster punkt
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*
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* repeat_time = 0, ...
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* repeat_time = (end_time - breakpt_time)* ++num_repeat;
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* also der rest von punkten wird wiederhohlt
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* wie genau ?? der punkt wird exact über den endpunkt gesetzt, step !! ?
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* FIXME,
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* teste varianten mit step in zero time, auch an repeat grenze ...
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* manual example ?
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* v2 1 0 pwl(0 -7 10ns -7 11ns -3 17ns -3 18ns -7 50ns -7) r=0 td=15ns
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v1 1 0 dc=0 pwl(0 10.0 10ns 10.0 11ns 11.0 17ns 11.0 18ns 18.0 1us 18.0)
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v2 2 0 dc=0 pwl(0 10.0 10ns 10.0 11ns 11.0 17ns 11.0 18ns 18.0 1us 18.0) r=0 td=15ns
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v3 3 0 dc=0 pwl(0 10.0 10ns 10.0 11ns 11.0 17ns 11.0 30ns 10.0) r=10ns
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v4 4 0 dc=0 pwl(0 10.0 10ns 10.0 11ns 11.0 17ns 11.0 18ns 18.0 60ns 18.0) r=0 td=15ns
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.control
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tran 200ps 100ns
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*--------------------
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* setup the tests
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* wegen eines bugs, müssen die check-vsrc am schluss kommen (bug-2)
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* FIXME, how to append vectoren ?
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let vv1 = v(1)
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let seq1 = @v1[pwl]
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let td1 = 0
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let vv2 = v(2)
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let seq2 = @v2[pwl]
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let td2 = 15ns
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let vv3 = v(3)
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let td3 = 0
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compose seq3 values
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+ 0 10.0 10ns 10.0 11ns 11.0 17ns 11.0 30ns 10.0
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+ 31ns 11.0 37ns 11.0 50ns 10.0
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+ 51ns 11.0 57ns 11.0 70ns 10.0
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+ 71ns 11.0 77ns 11.0 90ns 10.0
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+ 91ns 11.0 97ns 11.0 110ns 10.0
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+ 111ns 11.0 117ns 11.0 130ns 10.0
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let vv4 = v(4)
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let td4 = 15ns
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compose seq4 values
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+ 0ns 10.0 10ns 10.0 11ns 11.0 17ns 11.0 18ns 18 60ns 18.0
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+ 60ns 10.0 70ns 10.0 71ns 11.0 77ns 11.0 78ns 18 120ns 18.0
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check-vsrc.sp vv1 seq1 td1 5
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check-vsrc.sp vv2 seq2 td2 5
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check-vsrc.sp vv3 seq3 td3 16
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check-vsrc.sp vv4 seq4 td4 10
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.endc
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.end
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