devices/bsim3v32: whitespace cleanup
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7b2bd10b64
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@ -28,9 +28,6 @@ double limitJunctionVoltage( double, double, int * );
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double limitVbe( double, double, int * );
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double limitVce( double, double, int * );
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double limitVgb( double, double, int * );
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/* Area Calculation Method (ACM) for MOS models (devsup.c) */
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int
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@ -2452,84 +2452,85 @@ finished:
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along gate side
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*/
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if (model->BSIM3v32acmMod == 0)
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{
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/* Added revision dependent code */
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switch (model->BSIM3v32intVersion) {
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case BSIM3v32V324:
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case BSIM3v32V323:
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czbd = model->BSIM3v32unitAreaTempJctCap * here->BSIM3v32drainArea; /*bug fix */
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czbs = model->BSIM3v32unitAreaTempJctCap * here->BSIM3v32sourceArea;
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break;
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case BSIM3v32V322:
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case BSIM3v32V32:
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default:
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czbd = model->BSIM3v32unitAreaJctCap * here->BSIM3v32drainArea;
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czbs = model->BSIM3v32unitAreaJctCap * here->BSIM3v32sourceArea;
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}
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if (model->BSIM3v32acmMod == 0)
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{
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/* Added revision dependent code */
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switch (model->BSIM3v32intVersion) {
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case BSIM3v32V324:
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case BSIM3v32V323:
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czbd = model->BSIM3v32unitAreaTempJctCap * here->BSIM3v32drainArea; /*bug fix */
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czbs = model->BSIM3v32unitAreaTempJctCap * here->BSIM3v32sourceArea;
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break;
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case BSIM3v32V322:
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case BSIM3v32V32:
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default:
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czbd = model->BSIM3v32unitAreaJctCap * here->BSIM3v32drainArea;
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czbs = model->BSIM3v32unitAreaJctCap * here->BSIM3v32sourceArea;
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}
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if (here->BSIM3v32drainPerimeter < pParam->BSIM3v32weff)
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{
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/* Added revision dependent code */
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switch (model->BSIM3v32intVersion) {
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case BSIM3v32V324:
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case BSIM3v32V323:
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czbdswg = model->BSIM3v32unitLengthGateSidewallTempJctCap
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* here->BSIM3v32drainPerimeter;
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break;
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case BSIM3v32V322:
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case BSIM3v32V32:
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default:
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czbdswg = model->BSIM3v32unitLengthGateSidewallJctCap
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* here->BSIM3v32drainPerimeter;
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}
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czbdsw = 0.0;
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}
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else
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{
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czbdsw = model->BSIM3v32unitLengthSidewallTempJctCap
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* (here->BSIM3v32drainPerimeter - pParam->BSIM3v32weff);
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czbdswg = model->BSIM3v32unitLengthGateSidewallTempJctCap
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* pParam->BSIM3v32weff;
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}
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if (here->BSIM3v32sourcePerimeter < pParam->BSIM3v32weff)
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{
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czbssw = 0.0;
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/* Added revision dependent code */
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switch (model->BSIM3v32intVersion) {
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case BSIM3v32V324:
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case BSIM3v32V323:
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czbsswg = model->BSIM3v32unitLengthGateSidewallTempJctCap
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* here->BSIM3v32sourcePerimeter;
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break;
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case BSIM3v32V322:
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case BSIM3v32V32:
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default:
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czbsswg = model->BSIM3v32unitLengthGateSidewallJctCap
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* here->BSIM3v32sourcePerimeter;
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}
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}
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else
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{
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/* Added revision dependent code */
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switch (model->BSIM3v32intVersion) {
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case BSIM3v32V324:
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case BSIM3v32V323:
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czbssw = model->BSIM3v32unitLengthSidewallTempJctCap
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* (here->BSIM3v32sourcePerimeter - pParam->BSIM3v32weff);
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czbsswg = model->BSIM3v32unitLengthGateSidewallTempJctCap
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* pParam->BSIM3v32weff;
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break;
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case BSIM3v32V322:
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case BSIM3v32V32:
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default:
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czbssw = model->BSIM3v32unitLengthSidewallJctCap
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* (here->BSIM3v32sourcePerimeter - pParam->BSIM3v32weff);
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czbsswg = model->BSIM3v32unitLengthGateSidewallJctCap
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* pParam->BSIM3v32weff;
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}
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}
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if (here->BSIM3v32drainPerimeter < pParam->BSIM3v32weff)
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{
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/* Added revision dependent code */
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switch (model->BSIM3v32intVersion) {
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case BSIM3v32V324:
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case BSIM3v32V323:
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czbdswg = model->BSIM3v32unitLengthGateSidewallTempJctCap
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* here->BSIM3v32drainPerimeter;
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break;
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case BSIM3v32V322:
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case BSIM3v32V32:
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default:
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czbdswg = model->BSIM3v32unitLengthGateSidewallJctCap
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* here->BSIM3v32drainPerimeter;
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}
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czbdsw = 0.0;
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}
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else
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{
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czbdsw = model->BSIM3v32unitLengthSidewallTempJctCap
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* (here->BSIM3v32drainPerimeter - pParam->BSIM3v32weff);
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czbdswg = model->BSIM3v32unitLengthGateSidewallTempJctCap
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* pParam->BSIM3v32weff;
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}
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if (here->BSIM3v32sourcePerimeter < pParam->BSIM3v32weff)
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{
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czbssw = 0.0;
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/* Added revision dependent code */
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switch (model->BSIM3v32intVersion) {
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case BSIM3v32V324:
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case BSIM3v32V323:
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czbsswg = model->BSIM3v32unitLengthGateSidewallTempJctCap
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* here->BSIM3v32sourcePerimeter;
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break;
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case BSIM3v32V322:
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case BSIM3v32V32:
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default:
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czbsswg = model->BSIM3v32unitLengthGateSidewallJctCap
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* here->BSIM3v32sourcePerimeter;
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}
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}
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else
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{
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/* Added revision dependent code */
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switch (model->BSIM3v32intVersion) {
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case BSIM3v32V324:
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case BSIM3v32V323:
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czbssw = model->BSIM3v32unitLengthSidewallTempJctCap
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* (here->BSIM3v32sourcePerimeter - pParam->BSIM3v32weff);
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czbsswg = model->BSIM3v32unitLengthGateSidewallTempJctCap
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* pParam->BSIM3v32weff;
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break;
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case BSIM3v32V322:
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case BSIM3v32V32:
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default:
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czbssw = model->BSIM3v32unitLengthSidewallJctCap
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* (here->BSIM3v32sourcePerimeter - pParam->BSIM3v32weff);
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czbsswg = model->BSIM3v32unitLengthGateSidewallJctCap
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* pParam->BSIM3v32weff;
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}
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}
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} else {
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} else {
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error = ACM_junctionCapacitances(
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model->BSIM3v32acmMod,
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model->BSIM3v32calcacm,
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@ -2558,7 +2559,7 @@ finished:
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);
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if (error)
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return(error);
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}
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}
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MJ = model->BSIM3v32bulkJctBotGradingCoeff;
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MJSW = model->BSIM3v32bulkJctSideGradingCoeff;
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@ -1001,14 +1001,14 @@ IFuid tmpName;
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{ here->BSIM3v32sNodePrime = here->BSIM3v32sNode;
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}
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/* internal charge node */
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/* internal charge node */
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if (here->BSIM3v32nqsMod)
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{ if(here->BSIM3v32qNode == 0)
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{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v32name,"charge");
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if(error) return(error);
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here->BSIM3v32qNode = tmp->number;
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}
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{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v32name,"charge");
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if(error) return(error);
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here->BSIM3v32qNode = tmp->number;
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}
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}
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else
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{ here->BSIM3v32qNode = 0;
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@ -880,10 +880,10 @@ int Size_Not_Found, error;
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/* ACM model */
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if (model->BSIM3v32acmMod == 0)
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{
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here->BSIM3v32drainConductance = model->BSIM3v32sheetResistance
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* here->BSIM3v32drainSquares;
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here->BSIM3v32sourceConductance = model->BSIM3v32sheetResistance
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* here->BSIM3v32sourceSquares;
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here->BSIM3v32drainConductance = model->BSIM3v32sheetResistance
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* here->BSIM3v32drainSquares;
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here->BSIM3v32sourceConductance = model->BSIM3v32sheetResistance
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* here->BSIM3v32sourceSquares;
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}
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else /* ACM > 0 */
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{
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@ -1012,7 +1012,6 @@ int Size_Not_Found, error;
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break;
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}
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}
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}
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}
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return(OK);
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@ -1757,7 +1757,6 @@ typedef struct sBSIM3v32model
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/* ACM parameters */
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#define BSIM3v32_MOD_XL 703
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#define BSIM3v32_MOD_XW 704
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#define BSIM3v32_MOD_HDIF 711
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#define BSIM3v32_MOD_LDIF 712
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#define BSIM3v32_MOD_LD 713
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