VBIC: lean and mean code revision
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@ -36,14 +36,16 @@ IFparm VBICpTable[] = { /* parameters */
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OPU("baseBPnode",VBIC_QUEST_BASEBPNODE,IF_INTEGER, "Internal base node"),
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OPU("baseBPnode",VBIC_QUEST_BASEBPNODE,IF_INTEGER, "Internal base node"),
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OPU("emitEInode",VBIC_QUEST_EMITEINODE,IF_INTEGER, "Internal emitter node"),
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OPU("emitEInode",VBIC_QUEST_EMITEINODE,IF_INTEGER, "Internal emitter node"),
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OPU("subsSInode",VBIC_QUEST_SUBSSINODE,IF_INTEGER, "Internal substrate node"),
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OPU("subsSInode",VBIC_QUEST_SUBSSINODE,IF_INTEGER, "Internal substrate node"),
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OPU("xf1node", VBIC_QUEST_XF1NODE, IF_INTEGER, "Internal phase node xf1"),
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OPU("xf2node", VBIC_QUEST_XF2NODE, IF_INTEGER, "Internal phase node xf2"),
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OP("vbe", VBIC_QUEST_VBE, IF_REAL, "B-E voltage"),
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OP("vbe", VBIC_QUEST_VBE, IF_REAL, "B-E voltage"),
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OP("vbc", VBIC_QUEST_VBC, IF_REAL, "B-C voltage"),
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OP("vbc", VBIC_QUEST_VBC, IF_REAL, "B-C voltage"),
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OP("ic", VBIC_QUEST_CC, IF_REAL, "Collector current"),
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OP("ic", VBIC_QUEST_CC, IF_REAL, "Collector current"),
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OP("ib", VBIC_QUEST_CB, IF_REAL, "Base current"),
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OP("ib", VBIC_QUEST_CB, IF_REAL, "Base current"),
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OP("ie", VBIC_QUEST_CE, IF_REAL, "Emitter current"),
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OP("ie", VBIC_QUEST_CE, IF_REAL, "Emitter current"),
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OP("is", VBIC_QUEST_CS, IF_REAL, "Substrate current"),
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OP("is", VBIC_QUEST_CS, IF_REAL, "Substrate current"),
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OP("p", VBIC_QUEST_POWER,IF_REAL, "Power dissipation"),
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OPR("power",VBIC_QUEST_POWER,IF_REAL, "Power dissipation"),
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OP("beta", VBIC_QUEST_BETA, IF_REAL, "CE current gain DC"),
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OPR("betad",VBIC_QUEST_BETA, IF_REAL, "CE current gain DC"),
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OP("gm", VBIC_QUEST_GM, IF_REAL, "Small signal transconductance dIc/dVbe"),
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OP("gm", VBIC_QUEST_GM, IF_REAL, "Small signal transconductance dIc/dVbe"),
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OP("go", VBIC_QUEST_GO, IF_REAL, "Small signal output conductance dIc/dVbc"),
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OP("go", VBIC_QUEST_GO, IF_REAL, "Small signal output conductance dIc/dVbc"),
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OP("gpi", VBIC_QUEST_GPI, IF_REAL, "Small signal input conductance dIb/dVbe"),
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OP("gpi", VBIC_QUEST_GPI, IF_REAL, "Small signal input conductance dIb/dVbe"),
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@ -55,15 +57,8 @@ IFparm VBICpTable[] = { /* parameters */
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OP("cbcx", VBIC_QUEST_CBCX, IF_REAL, "External Base to collector capacitance"),
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OP("cbcx", VBIC_QUEST_CBCX, IF_REAL, "External Base to collector capacitance"),
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OP("cbep", VBIC_QUEST_CBEP, IF_REAL, "Parasitic Base to emitter capacitance"),
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OP("cbep", VBIC_QUEST_CBEP, IF_REAL, "Parasitic Base to emitter capacitance"),
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OP("cbcp", VBIC_QUEST_CBCP, IF_REAL, "Parasitic Base to collector capacitance"),
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OP("cbcp", VBIC_QUEST_CBCP, IF_REAL, "Parasitic Base to collector capacitance"),
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OP("p", VBIC_QUEST_POWER,IF_REAL, "Power dissipation"),
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OPU("geqcb",VBIC_QUEST_GEQCB,IF_REAL, "Internal C-B-base cap. equiv. cond."),
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OPU("geqbx",VBIC_QUEST_GEQBX,IF_REAL, "External C-B-base cap. equiv. cond."),
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OPU("qbe", VBIC_QUEST_QBE, IF_REAL, "Charge storage B-E junction"),
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OPU("qbe", VBIC_QUEST_QBE, IF_REAL, "Charge storage B-E junction"),
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OPU("cqbe", VBIC_QUEST_CQBE, IF_REAL, "Cap. due to charge storage in B-E jct."),
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OPU("qbc", VBIC_QUEST_QBC, IF_REAL, "Charge storage B-C junction"),
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OPU("qbc", VBIC_QUEST_QBC, IF_REAL, "Charge storage B-C junction"),
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OPU("cqbc", VBIC_QUEST_CQBC, IF_REAL, "Cap. due to charge storage in B-C jct."),
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OPU("qbx", VBIC_QUEST_QBX, IF_REAL, "Charge storage B-X junction"),
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OPU("cqbx", VBIC_QUEST_CQBX, IF_REAL, "Cap. due to charge storage in B-X jct.")
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};
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};
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IFparm VBICmPTable[] = { /* model parameters */
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IFparm VBICmPTable[] = { /* model parameters */
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@ -251,7 +251,6 @@ c Stamp element: Rs
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Ibe_Vrth = here->VBICibe_Vrth;
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Ibe_Vrth = here->VBICibe_Vrth;
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Ibex_Vrth = here->VBICibex_Vrth;
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Ibex_Vrth = here->VBICibex_Vrth;
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Iciei_Vrth = here->VBICiciei_Vrth;
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Ibc_Vrth = here->VBICibc_Vrth;
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Ibc_Vrth = here->VBICibc_Vrth;
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Ibep_Vrth = here->VBICibep_Vrth;
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Ibep_Vrth = here->VBICibep_Vrth;
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Ircx_Vrth = here->VBICircx_Vrth;
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Ircx_Vrth = here->VBICircx_Vrth;
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@ -22,9 +22,11 @@ Spice3 Implementation: 2003 Dietmar Warning DAnalyse GmbH
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int
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int
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VBICask(CKTcircuit *ckt, GENinstance *instPtr, int which, IFvalue *value, IFvalue *select)
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VBICask(CKTcircuit *ckt, GENinstance *instPtr, int which, IFvalue *value, IFvalue *select)
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{
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{
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IFvalue IC, IB, IE, IS;
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NG_IGNORE(select);
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VBICinstance *here = (VBICinstance*)instPtr;
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VBICinstance *here = (VBICinstance*)instPtr;
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IFvalue IC, IB;
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switch(which) {
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switch(which) {
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case VBIC_AREA:
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case VBIC_AREA:
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value->rValue = here->VBICarea;
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value->rValue = here->VBICarea;
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@ -76,6 +78,7 @@ VBICask(CKTcircuit *ckt, GENinstance *instPtr, int which, IFvalue *value, IFvalu
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return(OK);
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return(OK);
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case VBIC_QUEST_CC:
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case VBIC_QUEST_CC:
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value->rValue = *(ckt->CKTstate0 + here->VBICiciei) -
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value->rValue = *(ckt->CKTstate0 + here->VBICiciei) -
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*(ckt->CKTstate0 + here->VBICiccp) -
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*(ckt->CKTstate0 + here->VBICibc);
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*(ckt->CKTstate0 + here->VBICibc);
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value->rValue *= VBICmodPtr(here)->VBICtype;
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value->rValue *= VBICmodPtr(here)->VBICtype;
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return(OK);
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return(OK);
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@ -99,26 +102,16 @@ VBICask(CKTcircuit *ckt, GENinstance *instPtr, int which, IFvalue *value, IFvalu
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value->rValue *= VBICmodPtr(here)->VBICtype;
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value->rValue *= VBICmodPtr(here)->VBICtype;
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return(OK);
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return(OK);
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case VBIC_QUEST_POWER:
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case VBIC_QUEST_POWER:
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value->rValue = fabs(here->VBICpower);
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return(OK);
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case VBIC_QUEST_BETA:
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VBICask(ckt, instPtr, VBIC_QUEST_CC, &IC, select);
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VBICask(ckt, instPtr, VBIC_QUEST_CC, &IC, select);
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VBICask(ckt, instPtr, VBIC_QUEST_CB, &IB, select);
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VBICask(ckt, instPtr, VBIC_QUEST_CB, &IB, select);
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VBICask(ckt, instPtr, VBIC_QUEST_CE, &IE, select);
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if (IB.rValue != 0.0) {
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VBICask(ckt, instPtr, VBIC_QUEST_CS, &IS, select);
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value->rValue = IC.rValue/IB.rValue;
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if (!here->VBIC_excessPhase)
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} else {
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value->rValue = fabs(*(ckt->CKTstate0 + here->VBICibe) * *(ckt->CKTstate0 + here->VBICvbei)) +
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value->rValue = 0.0;
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fabs(*(ckt->CKTstate0 + here->VBICibc) * *(ckt->CKTstate0 + here->VBICvbci)) +
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}
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fabs(*(ckt->CKTstate0 + here->VBICiciei))
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* fabs(*(ckt->CKTstate0 + here->VBICvbei) - *(ckt->CKTstate0 + here->VBICvbci)) +
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fabs(*(ckt->CKTstate0 + here->VBICibex) * *(ckt->CKTstate0 + here->VBICvbex)) +
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fabs(*(ckt->CKTstate0 + here->VBICibep) * *(ckt->CKTstate0 + here->VBICvbep)) +
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fabs(*(ckt->CKTstate0 + here->VBICibcp) * *(ckt->CKTstate0 + here->VBICvbcp)) +
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fabs(*(ckt->CKTstate0 + here->VBICiccp))
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* fabs(*(ckt->CKTstate0 + here->VBICvbep) - *(ckt->CKTstate0 + here->VBICvbcp)) +
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fabs(IC.rValue * IC.rValue * here->VBICtextCollResist) +
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fabs(IC.rValue * *(ckt->CKTstate0 + here->VBICvrci)) +
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fabs(IB.rValue * IB.rValue * here->VBICtextBaseResist) +
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fabs(IB.rValue * *(ckt->CKTstate0 + here->VBICvrbi)) +
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fabs(IE.rValue * IE.rValue * here->VBICtemitterResist) +
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fabs(IS.rValue * *(ckt->CKTstate0 + here->VBICvrbp));
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return(OK);
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return(OK);
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case VBIC_QUEST_GM:
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case VBIC_QUEST_GM:
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value->rValue = *(ckt->CKTstate0 + here->VBICiciei_Vbei);
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value->rValue = *(ckt->CKTstate0 + here->VBICiciei_Vbei);
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@ -312,6 +312,8 @@ typedef struct sVBICinstance {
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double VBICith_Vre;
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double VBICith_Vre;
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double VBICith_Vrs;
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double VBICith_Vrs;
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double VBICpower;
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int VBIC_selfheat; /* self-heating enabled */
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int VBIC_selfheat; /* self-heating enabled */
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int VBIC_excessPhase; /* excess phase enabled */
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int VBIC_excessPhase; /* excess phase enabled */
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@ -933,8 +935,7 @@ enum {
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/* device questions */
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/* device questions */
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enum {
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enum {
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VBIC_QUEST_FT = 221,
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VBIC_QUEST_COLLNODE = 221,
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VBIC_QUEST_COLLNODE,
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VBIC_QUEST_BASENODE,
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VBIC_QUEST_BASENODE,
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VBIC_QUEST_EMITNODE,
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VBIC_QUEST_EMITNODE,
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VBIC_QUEST_SUBSNODE,
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VBIC_QUEST_SUBSNODE,
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@ -945,39 +946,27 @@ enum {
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VBIC_QUEST_BASEBPNODE,
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VBIC_QUEST_BASEBPNODE,
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VBIC_QUEST_EMITEINODE,
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VBIC_QUEST_EMITEINODE,
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VBIC_QUEST_SUBSSINODE,
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VBIC_QUEST_SUBSSINODE,
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VBIC_QUEST_XF1NODE,
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VBIC_QUEST_XF2NODE,
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VBIC_QUEST_VBE,
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VBIC_QUEST_VBE,
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VBIC_QUEST_VBC,
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VBIC_QUEST_VBC,
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VBIC_QUEST_CC,
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VBIC_QUEST_CC,
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VBIC_QUEST_CB,
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VBIC_QUEST_CB,
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VBIC_QUEST_CE,
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VBIC_QUEST_CE,
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VBIC_QUEST_CS,
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VBIC_QUEST_CS,
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VBIC_QUEST_POWER,
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VBIC_QUEST_BETA,
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VBIC_QUEST_GM,
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VBIC_QUEST_GM,
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VBIC_QUEST_GO,
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VBIC_QUEST_GO,
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VBIC_QUEST_GPI,
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VBIC_QUEST_GPI,
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VBIC_QUEST_GMU,
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VBIC_QUEST_GMU,
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VBIC_QUEST_GX,
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VBIC_QUEST_GX,
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VBIC_QUEST_QBE,
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VBIC_QUEST_CQBE,
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VBIC_QUEST_QBC,
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VBIC_QUEST_CQBC,
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VBIC_QUEST_QBX,
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VBIC_QUEST_CQBX,
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VBIC_QUEST_QBCP,
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VBIC_QUEST_CQBCP,
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VBIC_QUEST_CEXBC,
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VBIC_QUEST_GEQCB,
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VBIC_QUEST_GCSUB,
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VBIC_QUEST_GDSUB,
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VBIC_QUEST_GEQBX,
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VBIC_QUEST_CBE,
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VBIC_QUEST_CBE,
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VBIC_QUEST_CBEX,
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VBIC_QUEST_CBEX,
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VBIC_QUEST_CBC,
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VBIC_QUEST_CBC,
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VBIC_QUEST_CBCX,
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VBIC_QUEST_CBCX,
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VBIC_QUEST_CBEP,
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VBIC_QUEST_CBEP,
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VBIC_QUEST_CBCP,
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VBIC_QUEST_CBCP,
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VBIC_QUEST_POWER,
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VBIC_QUEST_QBE,
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VBIC_QUEST_QBC,
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};
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};
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/* model questions */
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/* model questions */
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File diff suppressed because it is too large
Load Diff
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@ -66,6 +66,7 @@ VBICpzLoad(GENmodel *inModel, CKTcircuit *ckt, SPcomplex *s)
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Ibex_Vbex = *(ckt->CKTstate0 + here->VBICibex_Vbex);
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Ibex_Vbex = *(ckt->CKTstate0 + here->VBICibex_Vbex);
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Iciei_Vbei = *(ckt->CKTstate0 + here->VBICiciei_Vbei);
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Iciei_Vbei = *(ckt->CKTstate0 + here->VBICiciei_Vbei);
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Iciei_Vbci = *(ckt->CKTstate0 + here->VBICiciei_Vbci);
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Iciei_Vbci = *(ckt->CKTstate0 + here->VBICiciei_Vbci);
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Iciei_Vrth = *(ckt->CKTstate0 + here->VBICiciei_Vrth);
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Iciei_Vxf2 = *(ckt->CKTstate0 + here->VBICiciei_Vxf2);
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Iciei_Vxf2 = *(ckt->CKTstate0 + here->VBICiciei_Vxf2);
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Ibc_Vbci = *(ckt->CKTstate0 + here->VBICibc_Vbci);
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Ibc_Vbci = *(ckt->CKTstate0 + here->VBICibc_Vbci);
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Ibc_Vbei = *(ckt->CKTstate0 + here->VBICibc_Vbei);
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Ibc_Vbei = *(ckt->CKTstate0 + here->VBICibc_Vbei);
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@ -250,7 +251,6 @@ c Stamp element: Rs
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Ibe_Vrth = here->VBICibe_Vrth;
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Ibe_Vrth = here->VBICibe_Vrth;
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Ibex_Vrth = here->VBICibex_Vrth;
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Ibex_Vrth = here->VBICibex_Vrth;
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Iciei_Vrth = here->VBICiciei_Vrth;
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Ibc_Vrth = here->VBICibc_Vrth;
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Ibc_Vrth = here->VBICibc_Vrth;
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Ibep_Vrth = here->VBICibep_Vrth;
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Ibep_Vrth = here->VBICibep_Vrth;
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Ircx_Vrth = here->VBICircx_Vrth;
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Ircx_Vrth = here->VBICircx_Vrth;
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