devices/*/*ld.c, bug fix, missing assignment to 'model'

src/spicelib/devices/bsim3/b3ld.c

@@ -3136,6 +3136,7 @@ void BSIM3LoadRhsMat(GENmodel *inModel, CKTcircuit *ckt)
 
     for(idx = 0; idx < InstCount; idx++) {
        here = InstArray[idx];
+       model = here->BSIM3modPtr;
         /* Update b for Ax = b */
        (*(ckt->CKTrhs + here->BSIM3gNode) -= here->BSIM3rhsG);
        (*(ckt->CKTrhs + here->BSIM3bNode) -= here->BSIM3rhsB);

src/spicelib/devices/bsim3v32/b3v32ld.c

@@ -3438,6 +3438,7 @@ void BSIM3v32LoadRhsMat(GENmodel *inModel, CKTcircuit *ckt)
 
     for (idx = 0; idx < InstCount; idx++) {
         here = InstArray[idx];
+        model = here->BSIM3v32modPtr;
         /* Update b for Ax = b */
         (*(ckt->CKTrhs + here->BSIM3v32gNode) -= here->BSIM3v32rhsG);
         (*(ckt->CKTrhs + here->BSIM3v32bNode) -= here->BSIM3v32rhsB);

src/spicelib/devices/bsim4/b4ld.c

@@ -5420,6 +5420,7 @@ void BSIM4LoadRhsMat(GENmodel *inModel, CKTcircuit *ckt)
 
     for(idx = 0; idx < InstCount; idx++) {
        here = InstArray[idx];
+       model = here->BSIM4modPtr;
         /* Update b for Ax = b */
            (*(ckt->CKTrhs + here->BSIM4dNodePrime) += here->BSIM4rhsdPrime);
            (*(ckt->CKTrhs + here->BSIM4gNodePrime) -= here->BSIM4rhsgPrime);

src/spicelib/devices/bsim4v5/b4v5ld.c

@@ -4998,6 +4998,7 @@ void BSIM4v5LoadRhsMat(GENmodel *inModel, CKTcircuit *ckt)
 
     for(idx = 0; idx < InstCount; idx++) {
        here = InstArray[idx];
+       model = here->BSIM4v5modPtr;
         /* Update b for Ax = b */
            (*(ckt->CKTrhs + here->BSIM4v5dNodePrime) += here->BSIM4v5rhsdPrime);
            (*(ckt->CKTrhs + here->BSIM4v5gNodePrime) -= here->BSIM4v5rhsgPrime);

src/spicelib/devices/bsim4v6/b4v6ld.c

@@ -5210,6 +5210,7 @@ void BSIM4v6LoadRhsMat(GENmodel *inModel, CKTcircuit *ckt)
 
     for(idx = 0; idx < InstCount; idx++) {
        here = InstArray[idx];
+       model = here->BSIM4v6modPtr;
         /* Update b for Ax = b */
            (*(ckt->CKTrhs + here->BSIM4v6dNodePrime) += here->BSIM4v6rhsdPrime);
            (*(ckt->CKTrhs + here->BSIM4v6gNodePrime) -= here->BSIM4v6rhsgPrime);

src/spicelib/devices/bsim4v7/b4v7ld.c

@@ -5365,6 +5365,7 @@ void BSIM4v7LoadRhsMat(GENmodel *inModel, CKTcircuit *ckt)
 
     for(idx = 0; idx < InstCount; idx++) {
        here = InstArray[idx];
+       model = here->BSIM4v7modPtr;
         /* Update b for Ax = b */
            (*(ckt->CKTrhs + here->BSIM4v7dNodePrime) += here->BSIM4v7rhsdPrime);
            (*(ckt->CKTrhs + here->BSIM4v7gNodePrime) -= here->BSIM4v7rhsgPrime);

src/spicelib/devices/bsimsoi/b4soild.c

@@ -10969,6 +10969,7 @@ void B4SOILoadRhsMat(GENmodel *inModel, CKTcircuit *ckt)
 
     for(idx = 0; idx < InstCount; idx++) {
        here = InstArray[idx];
+       model = here->B4SOImodPtr;
         /* Update b for Ax = b */
 
             /* v3.1 */

src/spicelib/devices/hisim2/hsm2ld.c

@@ -1502,6 +1502,7 @@ void HSM2LoadRhsMat(GENmodel *inModel, CKTcircuit *ckt)
 
     for (idx = 0; idx < InstCount; idx++) {
        here = InstArray[idx];
+       model = here->HSM2modPtr;
         /* Update b for Ax = b */
         *(ckt->CKTrhs + here->HSM2dNodePrime) += here->HSM2rhsdPrime;
         *(ckt->CKTrhs + here->HSM2gNodePrime) -= here->HSM2rhsgPrime;