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Fix another error in 9c71db3a72.

This commit is contained in:
Giles Atkinson 2023-05-14 17:16:24 +01:00 committed by Holger Vogt
parent 9099a922fd
commit f4f2f41940
1 changed files with 1 additions and 0 deletions
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1
src/spicelib/devices/vsrc/vsrcload.c
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@ -319,6 +319,7 @@ VSRCload(GENmodel *inModel, CKTcircuit *ckt)
period = end_time -
here->VSRCcoeffs[here->VSRCrBreakpt];
time -= period * floor(time / period);
time += here->VSRCcoeffs[here->VSRCrBreakpt];
} else {
value =
here->VSRCcoeffs[here->VSRCfunctionOrder - 1];