move the condition inside

This commit is contained in:
rlar 2015-04-17 20:23:15 +02:00
parent 291106ac94
commit f48c61efd8
1 changed files with 3 additions and 3 deletions

View File

@ -30,8 +30,6 @@ CAPload(GENmodel *inModel, CKTcircuit *ckt)
cond1 = ((ckt->CKTmode & MODEDC) && (ckt->CKTmode & MODEINITJCT)) cond1 = ((ckt->CKTmode & MODEDC) && (ckt->CKTmode & MODEINITJCT))
|| ((ckt->CKTmode & MODEUIC) && (ckt->CKTmode & MODEINITTRAN)); || ((ckt->CKTmode & MODEUIC) && (ckt->CKTmode & MODEINITTRAN));
/* check if capacitors are in the circuit or are open circuited */
if(ckt->CKTmode & (MODETRAN|MODEAC|MODETRANOP) ) {
/* loop through all the capacitor models */ /* loop through all the capacitor models */
for( ; model != NULL; model = model->CAPnextModel ) { for( ; model != NULL; model = model->CAPnextModel ) {
@ -47,6 +45,8 @@ CAPload(GENmodel *inModel, CKTcircuit *ckt)
vcap = *(ckt->CKTrhsOld+here->CAPposNode) - vcap = *(ckt->CKTrhsOld+here->CAPposNode) -
*(ckt->CKTrhsOld+here->CAPnegNode) ; *(ckt->CKTrhsOld+here->CAPnegNode) ;
} }
/* check if capacitors are in the circuit or are open circuited */
if(ckt->CKTmode & (MODETRAN|MODEAC|MODETRANOP) ) {
if(ckt->CKTmode & (MODETRAN | MODEAC)) { if(ckt->CKTmode & (MODETRAN | MODEAC)) {
#ifndef PREDICTOR #ifndef PREDICTOR
if(ckt->CKTmode & MODEINITPRED) { if(ckt->CKTmode & MODEINITPRED) {
@ -77,9 +77,9 @@ CAPload(GENmodel *inModel, CKTcircuit *ckt)
*(ckt->CKTrhs+here->CAPnegNode) += m * ceq; *(ckt->CKTrhs+here->CAPnegNode) += m * ceq;
} else } else
*(ckt->CKTstate0+here->CAPqcap) = here->CAPcapac * vcap; *(ckt->CKTstate0+here->CAPqcap) = here->CAPcapac * vcap;
}
} }
} }
}
return(OK); return(OK);
} }