Add command 'write_ic'

Write out the right hand side status of the matrix in format
    .ic = V(node_xx)
    This may be possible at the end of a simulation or after a 'stop'
    of the simulation, which may be resumed again afterwars. This
    status may be used to start another simulation with these
    parameters by inluding into the netlist.
This commit is contained in:
Holger Vogt 2021-04-10 16:53:24 +02:00
parent 0e72287af7
commit f0cb886af1
2 changed files with 72 additions and 0 deletions

61
src/frontend/com_wr_ic.c Normal file
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/* ngspice file
Copyright Holger Vogt 2021
License: BSD 3-clause
*/
/* Print the current node status to a file with format
.ic V(node) = value
*/
#include "ngspice/ngspice.h"
#include "ngspice/cpdefs.h"
#include "ngspice/ftedefs.h"
#include "ngspice/ftedev.h"
#include "ngspice/ftedebug.h"
#include "ngspice/cktdefs.h"
/* Print the current node status to a file with format
.ic V(node) = value
*/
void
com_wric(wordlist* wl) {
CKTnode* node;
CKTcircuit* ckt = NULL;
FILE* fp;
char* file;
if (wl)
file = wl->wl_word;
else
file = "dot_ic_out.txt";
if ((fp = fopen(file, "w")) == NULL) {
perror(file);
return;
}
if (!ft_curckt) {
fprintf(cp_err, "Error: there aren't any circuits loaded.\n");
return;
}
else if (ft_curckt->ci_ckt == NULL) { /* Set noparse? */
fprintf(cp_err, "Error: circuit not parsed.\n");
return;
}
ckt = ft_curckt->ci_ckt;
fprintf(fp, "* Intermediate Transient Solution\n");
fprintf(fp, "* Circuit: %s\n", ft_curckt->ci_name);
fprintf(fp, "* Recorded at simulation time: %g\n", ckt->CKTtime);
for (node = ckt->CKTnodes->next; node; node = node->next) {
if (!strstr(node->name, "#branch") && !strchr(node->name, '#'))
fprintf(fp, ".ic v(%s) = %g\n", node->name,
ckt->CKTrhsOld[node->number]);
}
fprintf(stdout, "\nNode data saved to file %s\n", file);
fclose(fp);
}

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src/frontend/com_wr_ic.h Normal file
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/* ngspice file
Copyright Holger Vogt 2021
License: BSD 3-clause
*/
/* Print the current node status to a file with format
.ic V(node) = value
*/
extern void
com_wric(wordlist* wl);