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VDMOS few variable name changes

This commit is contained in:
dwarning 2020-03-13 18:55:47 +01:00 committed by Holger Vogt
parent 020c5578a1
commit ee7599b33f
2 changed files with 17 additions and 17 deletions
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2
src/spicelib/devices/vdmos/vdmosdefs.h
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@ -248,7 +248,7 @@ typedef struct sVDMOSinstance {
#define VDMOSvgs VDMOSstates+ 0 /* gate-source voltage */ #define VDMOSvgs VDMOSstates+ 0 /* gate-source voltage */
#define VDMOSvds VDMOSstates+ 1 /* drain-source voltage */ #define VDMOSvds VDMOSstates+ 1 /* drain-source voltage */
#define VDMOSdeltemp VDMOSstates+ 2 #define VDMOSdelTemp VDMOSstates+ 2
#define VDMOScapgs VDMOSstates+3 /* gate-source capacitor value */ #define VDMOScapgs VDMOSstates+3 /* gate-source capacitor value */
#define VDMOSqgs VDMOSstates+ 4 /* gate-source capacitor charge */ #define VDMOSqgs VDMOSstates+ 4 /* gate-source capacitor charge */

32
src/spicelib/devices/vdmos/vdmosload.c
View File

@ -83,7 +83,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
double capgs = 0.0; /* total gate-source capacitance */ double capgs = 0.0; /* total gate-source capacitance */
double capgd = 0.0; /* total gate-drain capacitance */ double capgd = 0.0; /* total gate-drain capacitance */
double capth = 0.0; /* total thermal capacitance */ double capth = 0.0; /* total thermal capacitance */
int Check_mos, Check_diode; int Check_th, Check_diode;
int error; int error;
register int selfheat; register int selfheat;
@ -106,9 +106,9 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
selfheat = (here->VDMOSthermalGiven) && (model->VDMOSrthjcGiven); selfheat = (here->VDMOSthermalGiven) && (model->VDMOSrthjcGiven);
if (selfheat) if (selfheat)
Check_mos = 1; Check_th = 1;
else else
Check_mos = 0; Check_th = 0;
vt = CONSTKoverQ * here->VDMOStemp; vt = CONSTKoverQ * here->VDMOStemp;
@ -121,11 +121,11 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
if ((ckt->CKTmode & MODEINITSMSIG)) { if ((ckt->CKTmode & MODEINITSMSIG)) {
vgs = *(ckt->CKTstate0 + here->VDMOSvgs); vgs = *(ckt->CKTstate0 + here->VDMOSvgs);
vds = *(ckt->CKTstate0 + here->VDMOSvds); vds = *(ckt->CKTstate0 + here->VDMOSvds);
delTemp = *(ckt->CKTstate0 + here->VDMOSdeltemp); delTemp = *(ckt->CKTstate0 + here->VDMOSdelTemp);
} else if ((ckt->CKTmode & MODEINITTRAN)) { } else if ((ckt->CKTmode & MODEINITTRAN)) {
vgs = *(ckt->CKTstate1 + here->VDMOSvgs); vgs = *(ckt->CKTstate1 + here->VDMOSvgs);
vds = *(ckt->CKTstate1 + here->VDMOSvds); vds = *(ckt->CKTstate1 + here->VDMOSvds);
delTemp = *(ckt->CKTstate1 + here->VDMOSdeltemp); delTemp = *(ckt->CKTstate1 + here->VDMOSdelTemp);
} else if ((ckt->CKTmode & MODEINITJCT) && !here->VDMOSoff) { } else if ((ckt->CKTmode & MODEINITJCT) && !here->VDMOSoff) {
/* ok - not one of the simple cases, so we have to /* ok - not one of the simple cases, so we have to
* look at all of the possibilities for why we were * look at all of the possibilities for why we were
@ -170,10 +170,10 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
*(ckt->CKTstate1 + here->VDMOSvds); *(ckt->CKTstate1 + here->VDMOSvds);
vds = (1 + xfact)* (*(ckt->CKTstate1 + here->VDMOSvds)) vds = (1 + xfact)* (*(ckt->CKTstate1 + here->VDMOSvds))
- (xfact * (*(ckt->CKTstate2 + here->VDMOSvds))); - (xfact * (*(ckt->CKTstate2 + here->VDMOSvds)));
*(ckt->CKTstate0 + here->VDMOSdeltemp) = *(ckt->CKTstate0 + here->VDMOSdelTemp) =
*(ckt->CKTstate1 + here->VDMOSdeltemp); *(ckt->CKTstate1 + here->VDMOSdelTemp);
delTemp = (1 + xfact)* (*(ckt->CKTstate1 + here->VDMOSdeltemp)) delTemp = (1 + xfact)* (*(ckt->CKTstate1 + here->VDMOSdelTemp))
- (xfact * (*(ckt->CKTstate2 + here->VDMOSdeltemp))); - (xfact * (*(ckt->CKTstate2 + here->VDMOSdelTemp)));
} }
else else
{ {
@ -204,7 +204,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
delvds = vds - *(ckt->CKTstate0 + here->VDMOSvds); delvds = vds - *(ckt->CKTstate0 + here->VDMOSvds);
delvgd = vgd - vgdo; delvgd = vgd - vgdo;
deldelTemp = delTemp - *(ckt->CKTstate0 + here->VDMOSdeltemp); deldelTemp = delTemp - *(ckt->CKTstate0 + here->VDMOSdelTemp);
/* these are needed for convergence testing */ /* these are needed for convergence testing */
@ -242,7 +242,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
ckt->CKTabstol)) && ckt->CKTabstol)) &&
((here->VDMOStempNode == 0) || ((here->VDMOStempNode == 0) ||
(fabs(deldelTemp) < (ckt->CKTreltol * MAX(fabs(delTemp), (fabs(deldelTemp) < (ckt->CKTreltol * MAX(fabs(delTemp),
fabs(*(ckt->CKTstate0+here->VDMOSdeltemp))) fabs(*(ckt->CKTstate0+here->VDMOSdelTemp)))
+ ckt->CKTvoltTol*1e4)))) + ckt->CKTvoltTol*1e4))))
{ {
/* bypass code */ /* bypass code */
@ -254,7 +254,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
vgs = *(ckt->CKTstate0 + here->VDMOSvgs); vgs = *(ckt->CKTstate0 + here->VDMOSvgs);
vds = *(ckt->CKTstate0 + here->VDMOSvds); vds = *(ckt->CKTstate0 + here->VDMOSvds);
vgd = vgs - vds; vgd = vgs - vds;
delTemp = *(ckt->CKTstate0 + here->VDMOSdeltemp); delTemp = *(ckt->CKTstate0 + here->VDMOSdelTemp);
/* calculate Vds for temperature conductance calculation /* calculate Vds for temperature conductance calculation
in bypass (used later when filling Temp node matrix) */ in bypass (used later when filling Temp node matrix) */
Vds = here->VDMOSmode > 0 ? vds : -vds; Vds = here->VDMOSmode > 0 ? vds : -vds;
@ -300,7 +300,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
} }
if (selfheat) if (selfheat)
delTemp = VDMOSlimitlog(delTemp, delTemp = VDMOSlimitlog(delTemp,
*(ckt->CKTstate0 + here->VDMOSdeltemp),100,&Check_mos); *(ckt->CKTstate0 + here->VDMOSdelTemp),100,&Check_th);
else else
delTemp = 0.0; delTemp = 0.0;
#endif /*NODELIMITING*/ #endif /*NODELIMITING*/
@ -422,7 +422,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
*(ckt->CKTstate0 + here->VDMOSvgs) = vgs; *(ckt->CKTstate0 + here->VDMOSvgs) = vgs;
*(ckt->CKTstate0 + here->VDMOSvds) = vds; *(ckt->CKTstate0 + here->VDMOSvds) = vds;
*(ckt->CKTstate0 + here->VDMOSdeltemp) = delTemp; *(ckt->CKTstate0 + here->VDMOSdelTemp) = delTemp;
/* quasi saturation /* quasi saturation
* according to Vincenzo d'Alessandro's Quasi-Saturation Model, simplified: * according to Vincenzo d'Alessandro's Quasi-Saturation Model, simplified:
@ -486,7 +486,7 @@ VDMOSload(GENmodel *inModel, CKTcircuit *ckt)
vgs1 = *(ckt->CKTstate1 + here->VDMOSvgs); vgs1 = *(ckt->CKTstate1 + here->VDMOSvgs);
vgd1 = vgs1 - *(ckt->CKTstate1 + here->VDMOSvds); vgd1 = vgs1 - *(ckt->CKTstate1 + here->VDMOSvds);
delTemp1 = *(ckt->CKTstate1 + here->VDMOSdeltemp); delTemp1 = *(ckt->CKTstate1 + here->VDMOSdelTemp);
if (ckt->CKTmode & (MODETRANOP | MODEINITSMSIG)) { if (ckt->CKTmode & (MODETRANOP | MODEINITSMSIG)) {
capgs = 2 * *(ckt->CKTstate0 + here->VDMOScapgs); capgs = 2 * *(ckt->CKTstate0 + here->VDMOScapgs);
capgd = 2 * *(ckt->CKTstate0 + here->VDMOScapgd); capgd = 2 * *(ckt->CKTstate0 + here->VDMOScapgd);
@ -857,7 +857,7 @@ bypass:
* check convergence * check convergence
*/ */
if ((Check_mos == 1) || (Check_diode == 1)) { if ((Check_th == 1) || (Check_diode == 1)) {
ckt->CKTnoncon++; ckt->CKTnoncon++;
ckt->CKTtroubleElt = (GENinstance *)here; ckt->CKTtroubleElt = (GENinstance *)here;
} }