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add a hint to run the table generator before 

simulation is possible
This commit is contained in:
Holger Vogt 2018-08-10 19:41:02 +02:00
parent a6f525f6c1
commit e8e5823955
3 changed files with 8 additions and 0 deletions
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2
examples/xspice/table/clc409mod.sub
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@ -1,3 +1,5 @@
* please run the table generator table-generator-q-2d.sp in ngspice to
* create the table data file qinn-clc409-2d-1.table as is required here
* *
* This is a Very Wide band, Low Distortion Monolithic * This is a Very Wide band, Low Distortion Monolithic
* Current Feedback Op Amp. * Current Feedback Op Amp.

3
examples/xspice/table/table-model-bip-2d-1.sp
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@ -1,5 +1,7 @@
** npn bipolar: table 2D (Vce, Ib) compared to q model ** npn bipolar: table 2D (Vce, Ib) compared to q model
* bipolar transistor qinn from National Semi op-amp clc409 * bipolar transistor qinn from National Semi op-amp clc409
* please run the table generator table-generator-q-2d.sp in ngspice to
* create the table data file qinn-clc409-2d-1.table as required here
** Circuit Description ** ** Circuit Description **
Q3 2 1 3 QINN Q3 2 1 3 QINN
@ -12,6 +14,7 @@ ib2 0 bb 2u
vce2 cc 0 1 vce2 cc 0 1
vee2 ee 0 0 vee2 ee 0 0
* set a simulation temperature
.options temp=1 .options temp=1
.subckt tbqnpn c b e .subckt tbqnpn c b e

3
examples/xspice/table/table-model-bip-2d-2.sp
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@ -1,4 +1,6 @@
OpAmp Test with Bipolar Table Model OpAmp Test with Bipolar Table Model
* please run the table generator table-generator-q-2d.sp in ngspice to
* create the table data file qinn-clc409-2d-1.table required by clc409mod.sub
vddp vp 0 3 vddp vp 0 3
vddn vn 0 -3 vddn vn 0 -3
@ -12,6 +14,7 @@ vin in 0 dc 0 PULSE(-1 1 20NS 20NS 20NS 500NS 1000NS)
* circuit with standard bip model * circuit with standard bip model
*.include clc409.sub *.include clc409.sub
* circuit with qinn bipolar table model * circuit with qinn bipolar table model
.include clc409mod.sub .include clc409mod.sub