consistent naming convention 4v4
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@ -0,0 +1,33 @@
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The terms under which the software is provided are as the following.
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Software is distributed as is, completely without warranty or service
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support. The University of California and its employees are not liable
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for the condition or performance of the software.
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The University owns the copyright but shall not be liable for any
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infringement of copyright or other proprietary rights brought by third
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parties against the users of the software.
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The University of California hereby disclaims all implied warranties.
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The University of California grants the users the right to modify, copy,
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and redistribute the software and documentation, both within the user's
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organization and externally, subject to the following restrictions:
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1. The users agree not to charge for the University of California code
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itself but may charge for additions, extensions, or support.
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2. In any product based on the software, the users agree to acknowledge
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the UC Berkeley BSIM Research Group that developed the software. This
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acknowledgment shall appear in the product documentation.
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3. The users agree to obey all U.S. Government restrictions governing
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redistribution or export of the software.
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4. The users agree to reproduce any copyright notice which appears on
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the software on any copy or modification of such made available
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to others.
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Chenming Hu, and Jane Xuemei Xi
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April. 2003
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@ -1,6 +1,6 @@
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## Process this file with automake to produce Makefile.in
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pkglib_LIBRARIES = libbsim4v4.a
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noinst_LIBRARIES = libbsim4v4.a
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libbsim4v4_a_SOURCES = \
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b4v4.c \
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File diff suppressed because it is too large
Load Diff
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@ -17,12 +17,12 @@
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int
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BSIM4V4acLoad(inModel,ckt)
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BSIM4v4acLoad(inModel,ckt)
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GENmodel *inModel;
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CKTcircuit *ckt;
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{
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BSIM4V4model *model = (BSIM4V4model*)inModel;
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BSIM4V4instance *here;
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BSIM4v4model *model = (BSIM4v4model*)inModel;
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BSIM4v4instance *here;
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double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb;
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double xcbgb, xcbdb, xcbsb, xcbbb;
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@ -55,44 +55,44 @@ double ggidld, ggidlg, ggidlb, ggislg, ggislb, ggisls;
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double m;
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omega = ckt->CKTomega;
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for (; model != NULL; model = model->BSIM4V4nextModel)
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{ for (here = model->BSIM4V4instances; here!= NULL;
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here = here->BSIM4V4nextInstance)
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{ if (here->BSIM4V4owner != ARCHme) continue;
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for (; model != NULL; model = model->BSIM4v4nextModel)
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{ for (here = model->BSIM4v4instances; here!= NULL;
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here = here->BSIM4v4nextInstance)
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{ if (here->BSIM4v4owner != ARCHme) continue;
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pParam = here->pParam;
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capbd = here->BSIM4V4capbd;
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capbs = here->BSIM4V4capbs;
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cgso = here->BSIM4V4cgso;
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cgdo = here->BSIM4V4cgdo;
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cgbo = pParam->BSIM4V4cgbo;
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capbd = here->BSIM4v4capbd;
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capbs = here->BSIM4v4capbs;
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cgso = here->BSIM4v4cgso;
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cgdo = here->BSIM4v4cgdo;
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cgbo = pParam->BSIM4v4cgbo;
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Csd = -(here->BSIM4V4cddb + here->BSIM4V4cgdb + here->BSIM4V4cbdb);
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Csg = -(here->BSIM4V4cdgb + here->BSIM4V4cggb + here->BSIM4V4cbgb);
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Css = -(here->BSIM4V4cdsb + here->BSIM4V4cgsb + here->BSIM4V4cbsb);
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Csd = -(here->BSIM4v4cddb + here->BSIM4v4cgdb + here->BSIM4v4cbdb);
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Csg = -(here->BSIM4v4cdgb + here->BSIM4v4cggb + here->BSIM4v4cbgb);
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Css = -(here->BSIM4v4cdsb + here->BSIM4v4cgsb + here->BSIM4v4cbsb);
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if (here->BSIM4V4acnqsMod)
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{ T0 = omega * here->BSIM4V4taunet;
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if (here->BSIM4v4acnqsMod)
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{ T0 = omega * here->BSIM4v4taunet;
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T1 = T0 * T0;
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T2 = 1.0 / (1.0 + T1);
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T3 = T0 * T2;
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gmr = here->BSIM4V4gm * T2;
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gmbsr = here->BSIM4V4gmbs * T2;
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gdsr = here->BSIM4V4gds * T2;
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gmr = here->BSIM4v4gm * T2;
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gmbsr = here->BSIM4v4gmbs * T2;
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gdsr = here->BSIM4v4gds * T2;
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gmi = -here->BSIM4V4gm * T3;
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gmbsi = -here->BSIM4V4gmbs * T3;
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gdsi = -here->BSIM4V4gds * T3;
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gmi = -here->BSIM4v4gm * T3;
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gmbsi = -here->BSIM4v4gmbs * T3;
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gdsi = -here->BSIM4v4gds * T3;
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Cddr = here->BSIM4V4cddb * T2;
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Cdgr = here->BSIM4V4cdgb * T2;
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Cdsr = here->BSIM4V4cdsb * T2;
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Cddr = here->BSIM4v4cddb * T2;
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Cdgr = here->BSIM4v4cdgb * T2;
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Cdsr = here->BSIM4v4cdsb * T2;
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Cdbr = -(Cddr + Cdgr + Cdsr);
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/* WDLiu: Cxyi mulitplied by jomega below, and actually to be of conductance */
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Cddi = here->BSIM4V4cddb * T3 * omega;
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Cdgi = here->BSIM4V4cdgb * T3 * omega;
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Cdsi = here->BSIM4V4cdsb * T3 * omega;
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Cddi = here->BSIM4v4cddb * T3 * omega;
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Cdgi = here->BSIM4v4cdgb * T3 * omega;
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Cdsi = here->BSIM4v4cdsb * T3 * omega;
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Cdbi = -(Cddi + Cdgi + Cdsi);
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Csdr = Csd * T2;
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@ -105,9 +105,9 @@ double m;
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Cssi = Css * T3 * omega;
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Csbi = -(Csdi + Csgi + Cssi);
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Cgdr = -(Cddr + Csdr + here->BSIM4V4cbdb);
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Cggr = -(Cdgr + Csgr + here->BSIM4V4cbgb);
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Cgsr = -(Cdsr + Cssr + here->BSIM4V4cbsb);
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Cgdr = -(Cddr + Csdr + here->BSIM4v4cbdb);
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Cggr = -(Cdgr + Csgr + here->BSIM4v4cbgb);
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Cgsr = -(Cdsr + Cssr + here->BSIM4v4cbsb);
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Cgbr = -(Cgdr + Cggr + Cgsr);
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Cgdi = -(Cddi + Csdi);
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@ -116,14 +116,14 @@ double m;
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Cgbi = -(Cgdi + Cggi + Cgsi);
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}
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else /* QS */
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{ gmr = here->BSIM4V4gm;
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gmbsr = here->BSIM4V4gmbs;
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gdsr = here->BSIM4V4gds;
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{ gmr = here->BSIM4v4gm;
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gmbsr = here->BSIM4v4gmbs;
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gdsr = here->BSIM4v4gds;
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gmi = gmbsi = gdsi = 0.0;
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Cddr = here->BSIM4V4cddb;
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Cdgr = here->BSIM4V4cdgb;
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Cdsr = here->BSIM4V4cdsb;
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Cddr = here->BSIM4v4cddb;
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Cdgr = here->BSIM4v4cdgb;
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Cdsr = here->BSIM4v4cdsb;
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Cdbr = -(Cddr + Cdgr + Cdsr);
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Cddi = Cdgi = Cdsi = Cdbi = 0.0;
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@ -133,15 +133,15 @@ double m;
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Csbr = -(Csdr + Csgr + Cssr);
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Csdi = Csgi = Cssi = Csbi = 0.0;
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Cgdr = here->BSIM4V4cgdb;
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Cggr = here->BSIM4V4cggb;
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Cgsr = here->BSIM4V4cgsb;
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Cgdr = here->BSIM4v4cgdb;
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Cggr = here->BSIM4v4cggb;
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Cgsr = here->BSIM4v4cgsb;
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Cgbr = -(Cgdr + Cggr + Cgsr);
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Cgdi = Cggi = Cgsi = Cgbi = 0.0;
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}
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if (here->BSIM4V4mode >= 0)
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if (here->BSIM4v4mode >= 0)
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{ Gmr = gmr;
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Gmbsr = gmbsr;
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FwdSumr = Gmr + Gmbsr;
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@ -151,11 +151,11 @@ double m;
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FwdSumi = Gmi + Gmbsi;
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RevSumi = 0.0;
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gbbdp = -(here->BSIM4V4gbds);
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gbbsp = here->BSIM4V4gbds + here->BSIM4V4gbgs + here->BSIM4V4gbbs;
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gbdpg = here->BSIM4V4gbgs;
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gbdpdp = here->BSIM4V4gbds;
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gbdpb = here->BSIM4V4gbbs;
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gbbdp = -(here->BSIM4v4gbds);
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gbbsp = here->BSIM4v4gbds + here->BSIM4v4gbgs + here->BSIM4v4gbbs;
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gbdpg = here->BSIM4v4gbgs;
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gbdpdp = here->BSIM4v4gbds;
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gbdpb = here->BSIM4v4gbbs;
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gbdpsp = -(gbdpg + gbdpdp + gbdpb);
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gbspdp = 0.0;
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@ -163,32 +163,32 @@ double m;
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gbspb = 0.0;
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gbspsp = 0.0;
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if (model->BSIM4V4igcMod)
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{ gIstotg = here->BSIM4V4gIgsg + here->BSIM4V4gIgcsg;
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gIstotd = here->BSIM4V4gIgcsd;
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gIstots = here->BSIM4V4gIgss + here->BSIM4V4gIgcss;
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gIstotb = here->BSIM4V4gIgcsb;
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if (model->BSIM4v4igcMod)
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{ gIstotg = here->BSIM4v4gIgsg + here->BSIM4v4gIgcsg;
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gIstotd = here->BSIM4v4gIgcsd;
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gIstots = here->BSIM4v4gIgss + here->BSIM4v4gIgcss;
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gIstotb = here->BSIM4v4gIgcsb;
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gIdtotg = here->BSIM4V4gIgdg + here->BSIM4V4gIgcdg;
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gIdtotd = here->BSIM4V4gIgdd + here->BSIM4V4gIgcdd;
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gIdtots = here->BSIM4V4gIgcds;
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gIdtotb = here->BSIM4V4gIgcdb;
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gIdtotg = here->BSIM4v4gIgdg + here->BSIM4v4gIgcdg;
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gIdtotd = here->BSIM4v4gIgdd + here->BSIM4v4gIgcdd;
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gIdtots = here->BSIM4v4gIgcds;
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gIdtotb = here->BSIM4v4gIgcdb;
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}
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else
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{ gIstotg = gIstotd = gIstots = gIstotb = 0.0;
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gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0;
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}
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if (model->BSIM4V4igbMod)
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{ gIbtotg = here->BSIM4V4gIgbg;
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gIbtotd = here->BSIM4V4gIgbd;
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gIbtots = here->BSIM4V4gIgbs;
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gIbtotb = here->BSIM4V4gIgbb;
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if (model->BSIM4v4igbMod)
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{ gIbtotg = here->BSIM4v4gIgbg;
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gIbtotd = here->BSIM4v4gIgbd;
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gIbtots = here->BSIM4v4gIgbs;
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gIbtotb = here->BSIM4v4gIgbb;
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}
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else
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gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0;
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if ((model->BSIM4V4igcMod != 0) || (model->BSIM4V4igbMod != 0))
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if ((model->BSIM4v4igcMod != 0) || (model->BSIM4v4igbMod != 0))
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{ gIgtotg = gIstotg + gIdtotg + gIbtotg;
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gIgtotd = gIstotd + gIdtotd + gIbtotd ;
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gIgtots = gIstots + gIdtots + gIbtots;
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@ -197,28 +197,28 @@ double m;
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else
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gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0;
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if (here->BSIM4V4rgateMod == 2)
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T0 = *(ckt->CKTstates[0] + here->BSIM4V4vges)
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- *(ckt->CKTstates[0] + here->BSIM4V4vgs);
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else if (here->BSIM4V4rgateMod == 3)
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T0 = *(ckt->CKTstates[0] + here->BSIM4V4vgms)
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- *(ckt->CKTstates[0] + here->BSIM4V4vgs);
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if (here->BSIM4V4rgateMod > 1)
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{ gcrgd = here->BSIM4V4gcrgd * T0;
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gcrgg = here->BSIM4V4gcrgg * T0;
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gcrgs = here->BSIM4V4gcrgs * T0;
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gcrgb = here->BSIM4V4gcrgb * T0;
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gcrgg -= here->BSIM4V4gcrg;
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gcrg = here->BSIM4V4gcrg;
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if (here->BSIM4v4rgateMod == 2)
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T0 = *(ckt->CKTstates[0] + here->BSIM4v4vges)
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- *(ckt->CKTstates[0] + here->BSIM4v4vgs);
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else if (here->BSIM4v4rgateMod == 3)
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T0 = *(ckt->CKTstates[0] + here->BSIM4v4vgms)
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- *(ckt->CKTstates[0] + here->BSIM4v4vgs);
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if (here->BSIM4v4rgateMod > 1)
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{ gcrgd = here->BSIM4v4gcrgd * T0;
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gcrgg = here->BSIM4v4gcrgg * T0;
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gcrgs = here->BSIM4v4gcrgs * T0;
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gcrgb = here->BSIM4v4gcrgb * T0;
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gcrgg -= here->BSIM4v4gcrg;
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gcrg = here->BSIM4v4gcrg;
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}
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else
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gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0;
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if (here->BSIM4V4rgateMod == 3)
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{ xcgmgmb = (cgdo + cgso + pParam->BSIM4V4cgbo) * omega;
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if (here->BSIM4v4rgateMod == 3)
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{ xcgmgmb = (cgdo + cgso + pParam->BSIM4v4cgbo) * omega;
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xcgmdb = -cgdo * omega;
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xcgmsb = -cgso * omega;
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xcgmbb = -pParam->BSIM4V4cgbo * omega;
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xcgmbb = -pParam->BSIM4v4cgbo * omega;
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xcdgmb = xcgmdb;
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xcsgmb = xcgmsb;
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@ -231,43 +231,43 @@ double m;
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xcdgbr = Cdgr * omega;
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xcsgbr = Csgr * omega;
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xcbgb = here->BSIM4V4cbgb * omega;
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xcbgb = here->BSIM4v4cbgb * omega;
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}
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else
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{ xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4V4cgbo ) * omega;
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{ xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4v4cgbo ) * omega;
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xcgdbr = (Cgdr - cgdo) * omega;
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xcgsbr = (Cgsr - cgso) * omega;
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xcgbbr = -(xcggbr + xcgdbr + xcgsbr);
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xcdgbr = (Cdgr - cgdo) * omega;
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xcsgbr = (Csgr - cgso) * omega;
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xcbgb = (here->BSIM4V4cbgb - pParam->BSIM4V4cgbo) * omega;
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xcbgb = (here->BSIM4v4cbgb - pParam->BSIM4v4cgbo) * omega;
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xcdgmb = xcsgmb = xcbgmb = 0.0;
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}
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xcddbr = (Cddr + here->BSIM4V4capbd + cgdo) * omega;
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xcddbr = (Cddr + here->BSIM4v4capbd + cgdo) * omega;
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xcdsbr = Cdsr * omega;
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xcsdbr = Csdr * omega;
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xcssbr = (here->BSIM4V4capbs + cgso + Cssr) * omega;
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xcssbr = (here->BSIM4v4capbs + cgso + Cssr) * omega;
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if (!here->BSIM4V4rbodyMod)
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if (!here->BSIM4v4rbodyMod)
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{ xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb);
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xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb);
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xcbdb = (here->BSIM4V4cbdb - here->BSIM4V4capbd) * omega;
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xcbsb = (here->BSIM4V4cbsb - here->BSIM4V4capbs) * omega;
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xcbdb = (here->BSIM4v4cbdb - here->BSIM4v4capbd) * omega;
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xcbsb = (here->BSIM4v4cbsb - here->BSIM4v4capbs) * omega;
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xcdbdb = 0.0;
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}
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else
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{ xcdbbr = Cdbr * omega;
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xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb)
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+ here->BSIM4V4capbs * omega;
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+ here->BSIM4v4capbs * omega;
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xcbdb = here->BSIM4V4cbdb * omega;
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xcbsb = here->BSIM4V4cbsb * omega;
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xcbdb = here->BSIM4v4cbdb * omega;
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xcbsb = here->BSIM4v4cbsb * omega;
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xcdbdb = -here->BSIM4V4capbd * omega;
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xcsbsb = -here->BSIM4V4capbs * omega;
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xcdbdb = -here->BSIM4v4capbd * omega;
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xcsbsb = -here->BSIM4v4capbs * omega;
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}
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xcbbb = -(xcbdb + xcbgb + xcbsb + xcbgmb);
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@ -294,45 +294,45 @@ double m;
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FwdSumi = 0.0;
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RevSumi = -(Gmi + Gmbsi);
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gbbsp = -(here->BSIM4V4gbds);
|
||||
gbbdp = here->BSIM4V4gbds + here->BSIM4V4gbgs + here->BSIM4V4gbbs;
|
||||
gbbsp = -(here->BSIM4v4gbds);
|
||||
gbbdp = here->BSIM4v4gbds + here->BSIM4v4gbgs + here->BSIM4v4gbbs;
|
||||
|
||||
gbdpg = 0.0;
|
||||
gbdpsp = 0.0;
|
||||
gbdpb = 0.0;
|
||||
gbdpdp = 0.0;
|
||||
|
||||
gbspg = here->BSIM4V4gbgs;
|
||||
gbspsp = here->BSIM4V4gbds;
|
||||
gbspb = here->BSIM4V4gbbs;
|
||||
gbspg = here->BSIM4v4gbgs;
|
||||
gbspsp = here->BSIM4v4gbds;
|
||||
gbspb = here->BSIM4v4gbbs;
|
||||
gbspdp = -(gbspg + gbspsp + gbspb);
|
||||
|
||||
if (model->BSIM4V4igcMod)
|
||||
{ gIstotg = here->BSIM4V4gIgsg + here->BSIM4V4gIgcdg;
|
||||
gIstotd = here->BSIM4V4gIgcds;
|
||||
gIstots = here->BSIM4V4gIgss + here->BSIM4V4gIgcdd;
|
||||
gIstotb = here->BSIM4V4gIgcdb;
|
||||
if (model->BSIM4v4igcMod)
|
||||
{ gIstotg = here->BSIM4v4gIgsg + here->BSIM4v4gIgcdg;
|
||||
gIstotd = here->BSIM4v4gIgcds;
|
||||
gIstots = here->BSIM4v4gIgss + here->BSIM4v4gIgcdd;
|
||||
gIstotb = here->BSIM4v4gIgcdb;
|
||||
|
||||
gIdtotg = here->BSIM4V4gIgdg + here->BSIM4V4gIgcsg;
|
||||
gIdtotd = here->BSIM4V4gIgdd + here->BSIM4V4gIgcss;
|
||||
gIdtots = here->BSIM4V4gIgcsd;
|
||||
gIdtotb = here->BSIM4V4gIgcsb;
|
||||
gIdtotg = here->BSIM4v4gIgdg + here->BSIM4v4gIgcsg;
|
||||
gIdtotd = here->BSIM4v4gIgdd + here->BSIM4v4gIgcss;
|
||||
gIdtots = here->BSIM4v4gIgcsd;
|
||||
gIdtotb = here->BSIM4v4gIgcsb;
|
||||
}
|
||||
else
|
||||
{ gIstotg = gIstotd = gIstots = gIstotb = 0.0;
|
||||
gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0;
|
||||
}
|
||||
|
||||
if (model->BSIM4V4igbMod)
|
||||
{ gIbtotg = here->BSIM4V4gIgbg;
|
||||
gIbtotd = here->BSIM4V4gIgbs;
|
||||
gIbtots = here->BSIM4V4gIgbd;
|
||||
gIbtotb = here->BSIM4V4gIgbb;
|
||||
if (model->BSIM4v4igbMod)
|
||||
{ gIbtotg = here->BSIM4v4gIgbg;
|
||||
gIbtotd = here->BSIM4v4gIgbs;
|
||||
gIbtots = here->BSIM4v4gIgbd;
|
||||
gIbtotb = here->BSIM4v4gIgbb;
|
||||
}
|
||||
else
|
||||
gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0;
|
||||
|
||||
if ((model->BSIM4V4igcMod != 0) || (model->BSIM4V4igbMod != 0))
|
||||
if ((model->BSIM4v4igcMod != 0) || (model->BSIM4v4igbMod != 0))
|
||||
{ gIgtotg = gIstotg + gIdtotg + gIbtotg;
|
||||
gIgtotd = gIstotd + gIdtotd + gIbtotd ;
|
||||
gIgtots = gIstots + gIdtots + gIbtots;
|
||||
|
|
@ -341,28 +341,28 @@ double m;
|
|||
else
|
||||
gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0;
|
||||
|
||||
if (here->BSIM4V4rgateMod == 2)
|
||||
T0 = *(ckt->CKTstates[0] + here->BSIM4V4vges)
|
||||
- *(ckt->CKTstates[0] + here->BSIM4V4vgs);
|
||||
else if (here->BSIM4V4rgateMod == 3)
|
||||
T0 = *(ckt->CKTstates[0] + here->BSIM4V4vgms)
|
||||
- *(ckt->CKTstates[0] + here->BSIM4V4vgs);
|
||||
if (here->BSIM4V4rgateMod > 1)
|
||||
{ gcrgd = here->BSIM4V4gcrgs * T0;
|
||||
gcrgg = here->BSIM4V4gcrgg * T0;
|
||||
gcrgs = here->BSIM4V4gcrgd * T0;
|
||||
gcrgb = here->BSIM4V4gcrgb * T0;
|
||||
gcrgg -= here->BSIM4V4gcrg;
|
||||
gcrg = here->BSIM4V4gcrg;
|
||||
if (here->BSIM4v4rgateMod == 2)
|
||||
T0 = *(ckt->CKTstates[0] + here->BSIM4v4vges)
|
||||
- *(ckt->CKTstates[0] + here->BSIM4v4vgs);
|
||||
else if (here->BSIM4v4rgateMod == 3)
|
||||
T0 = *(ckt->CKTstates[0] + here->BSIM4v4vgms)
|
||||
- *(ckt->CKTstates[0] + here->BSIM4v4vgs);
|
||||
if (here->BSIM4v4rgateMod > 1)
|
||||
{ gcrgd = here->BSIM4v4gcrgs * T0;
|
||||
gcrgg = here->BSIM4v4gcrgg * T0;
|
||||
gcrgs = here->BSIM4v4gcrgd * T0;
|
||||
gcrgb = here->BSIM4v4gcrgb * T0;
|
||||
gcrgg -= here->BSIM4v4gcrg;
|
||||
gcrg = here->BSIM4v4gcrg;
|
||||
}
|
||||
else
|
||||
gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0;
|
||||
|
||||
if (here->BSIM4V4rgateMod == 3)
|
||||
{ xcgmgmb = (cgdo + cgso + pParam->BSIM4V4cgbo) * omega;
|
||||
if (here->BSIM4v4rgateMod == 3)
|
||||
{ xcgmgmb = (cgdo + cgso + pParam->BSIM4v4cgbo) * omega;
|
||||
xcgmdb = -cgdo * omega;
|
||||
xcgmsb = -cgso * omega;
|
||||
xcgmbb = -pParam->BSIM4V4cgbo * omega;
|
||||
xcgmbb = -pParam->BSIM4v4cgbo * omega;
|
||||
|
||||
xcdgmb = xcgmdb;
|
||||
xcsgmb = xcgmsb;
|
||||
|
|
@ -375,42 +375,42 @@ double m;
|
|||
|
||||
xcdgbr = Csgr * omega;
|
||||
xcsgbr = Cdgr * omega;
|
||||
xcbgb = here->BSIM4V4cbgb * omega;
|
||||
xcbgb = here->BSIM4v4cbgb * omega;
|
||||
}
|
||||
else
|
||||
{ xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4V4cgbo ) * omega;
|
||||
{ xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4v4cgbo ) * omega;
|
||||
xcgdbr = (Cgsr - cgdo) * omega;
|
||||
xcgsbr = (Cgdr - cgso) * omega;
|
||||
xcgbbr = -(xcggbr + xcgdbr + xcgsbr);
|
||||
|
||||
xcdgbr = (Csgr - cgdo) * omega;
|
||||
xcsgbr = (Cdgr - cgso) * omega;
|
||||
xcbgb = (here->BSIM4V4cbgb - pParam->BSIM4V4cgbo) * omega;
|
||||
xcbgb = (here->BSIM4v4cbgb - pParam->BSIM4v4cgbo) * omega;
|
||||
|
||||
xcdgmb = xcsgmb = xcbgmb = 0.0;
|
||||
}
|
||||
xcddbr = (here->BSIM4V4capbd + cgdo + Cssr) * omega;
|
||||
xcddbr = (here->BSIM4v4capbd + cgdo + Cssr) * omega;
|
||||
xcdsbr = Csdr * omega;
|
||||
xcsdbr = Cdsr * omega;
|
||||
xcssbr = (Cddr + here->BSIM4V4capbs + cgso) * omega;
|
||||
xcssbr = (Cddr + here->BSIM4v4capbs + cgso) * omega;
|
||||
|
||||
if (!here->BSIM4V4rbodyMod)
|
||||
if (!here->BSIM4v4rbodyMod)
|
||||
{ xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb);
|
||||
xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb);
|
||||
|
||||
xcbdb = (here->BSIM4V4cbsb - here->BSIM4V4capbd) * omega;
|
||||
xcbsb = (here->BSIM4V4cbdb - here->BSIM4V4capbs) * omega;
|
||||
xcbdb = (here->BSIM4v4cbsb - here->BSIM4v4capbd) * omega;
|
||||
xcbsb = (here->BSIM4v4cbdb - here->BSIM4v4capbs) * omega;
|
||||
xcdbdb = 0.0;
|
||||
}
|
||||
else
|
||||
{ xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb)
|
||||
+ here->BSIM4V4capbd * omega;
|
||||
+ here->BSIM4v4capbd * omega;
|
||||
xcsbbr = Cdbr * omega;
|
||||
|
||||
xcbdb = here->BSIM4V4cbsb * omega;
|
||||
xcbsb = here->BSIM4V4cbdb * omega;
|
||||
xcdbdb = -here->BSIM4V4capbd * omega;
|
||||
xcsbsb = -here->BSIM4V4capbs * omega;
|
||||
xcbdb = here->BSIM4v4cbsb * omega;
|
||||
xcbsb = here->BSIM4v4cbdb * omega;
|
||||
xcdbdb = -here->BSIM4v4capbd * omega;
|
||||
xcsbsb = -here->BSIM4v4capbs * omega;
|
||||
}
|
||||
xcbbb = -(xcbgb + xcbdb + xcbsb + xcbgmb);
|
||||
|
||||
|
|
@ -428,18 +428,18 @@ double m;
|
|||
xcgbbi = Cgbi;
|
||||
}
|
||||
|
||||
if (model->BSIM4V4rdsMod == 1)
|
||||
{ gstot = here->BSIM4V4gstot;
|
||||
gstotd = here->BSIM4V4gstotd;
|
||||
gstotg = here->BSIM4V4gstotg;
|
||||
gstots = here->BSIM4V4gstots - gstot;
|
||||
gstotb = here->BSIM4V4gstotb;
|
||||
if (model->BSIM4v4rdsMod == 1)
|
||||
{ gstot = here->BSIM4v4gstot;
|
||||
gstotd = here->BSIM4v4gstotd;
|
||||
gstotg = here->BSIM4v4gstotg;
|
||||
gstots = here->BSIM4v4gstots - gstot;
|
||||
gstotb = here->BSIM4v4gstotb;
|
||||
|
||||
gdtot = here->BSIM4V4gdtot;
|
||||
gdtotd = here->BSIM4V4gdtotd - gdtot;
|
||||
gdtotg = here->BSIM4V4gdtotg;
|
||||
gdtots = here->BSIM4V4gdtots;
|
||||
gdtotb = here->BSIM4V4gdtotb;
|
||||
gdtot = here->BSIM4v4gdtot;
|
||||
gdtotd = here->BSIM4v4gdtotd - gdtot;
|
||||
gdtotg = here->BSIM4v4gdtotg;
|
||||
gdtots = here->BSIM4v4gdtots;
|
||||
gdtotb = here->BSIM4v4gdtotb;
|
||||
}
|
||||
else
|
||||
{ gstot = gstotd = gstotg = gstots = gstotb = 0.0;
|
||||
|
|
@ -451,201 +451,201 @@ double m;
|
|||
* Loading AC matrix
|
||||
*/
|
||||
|
||||
m = here->BSIM4V4m;
|
||||
m = here->BSIM4v4m;
|
||||
|
||||
if (!model->BSIM4V4rdsMod)
|
||||
{ gdpr = here->BSIM4V4drainConductance;
|
||||
gspr = here->BSIM4V4sourceConductance;
|
||||
if (!model->BSIM4v4rdsMod)
|
||||
{ gdpr = here->BSIM4v4drainConductance;
|
||||
gspr = here->BSIM4v4sourceConductance;
|
||||
}
|
||||
else
|
||||
gdpr = gspr = 0.0;
|
||||
|
||||
if (!here->BSIM4V4rbodyMod)
|
||||
{ gjbd = here->BSIM4V4gbd;
|
||||
gjbs = here->BSIM4V4gbs;
|
||||
if (!here->BSIM4v4rbodyMod)
|
||||
{ gjbd = here->BSIM4v4gbd;
|
||||
gjbs = here->BSIM4v4gbs;
|
||||
}
|
||||
else
|
||||
gjbd = gjbs = 0.0;
|
||||
|
||||
geltd = here->BSIM4V4grgeltd;
|
||||
geltd = here->BSIM4v4grgeltd;
|
||||
|
||||
if (here->BSIM4V4rgateMod == 1)
|
||||
{ *(here->BSIM4V4GEgePtr) += m * geltd;
|
||||
*(here->BSIM4V4GPgePtr) -= m * geltd;
|
||||
*(here->BSIM4V4GEgpPtr) -= m * geltd;
|
||||
if (here->BSIM4v4rgateMod == 1)
|
||||
{ *(here->BSIM4v4GEgePtr) += m * geltd;
|
||||
*(here->BSIM4v4GPgePtr) -= m * geltd;
|
||||
*(here->BSIM4v4GEgpPtr) -= m * geltd;
|
||||
|
||||
*(here->BSIM4V4GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4V4GPgpPtr) += m * (geltd + xcggbi + gIgtotg);
|
||||
*(here->BSIM4V4GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4V4GPdpPtr) += m * (xcgdbi + gIgtotd);
|
||||
*(here->BSIM4V4GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4V4GPspPtr) += m * (xcgsbi + gIgtots);
|
||||
*(here->BSIM4V4GPbpPtr +1) += m * xcgbbr;
|
||||
*(here->BSIM4V4GPbpPtr) += m * (xcgbbi + gIgtotb);
|
||||
*(here->BSIM4v4GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4v4GPgpPtr) += m * (geltd + xcggbi + gIgtotg);
|
||||
*(here->BSIM4v4GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4v4GPdpPtr) += m * (xcgdbi + gIgtotd);
|
||||
*(here->BSIM4v4GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4v4GPspPtr) += m * (xcgsbi + gIgtots);
|
||||
*(here->BSIM4v4GPbpPtr +1) += m * xcgbbr;
|
||||
*(here->BSIM4v4GPbpPtr) += m * (xcgbbi + gIgtotb);
|
||||
} /* WDLiu: gcrg already subtracted from all gcrgg below */
|
||||
else if (here->BSIM4V4rgateMod == 2)
|
||||
{ *(here->BSIM4V4GEgePtr) += m * gcrg;
|
||||
*(here->BSIM4V4GEgpPtr) += m * gcrgg;
|
||||
*(here->BSIM4V4GEdpPtr) += m * gcrgd;
|
||||
*(here->BSIM4V4GEspPtr) += m * gcrgs;
|
||||
*(here->BSIM4V4GEbpPtr) += m * gcrgb;
|
||||
else if (here->BSIM4v4rgateMod == 2)
|
||||
{ *(here->BSIM4v4GEgePtr) += m * gcrg;
|
||||
*(here->BSIM4v4GEgpPtr) += m * gcrgg;
|
||||
*(here->BSIM4v4GEdpPtr) += m * gcrgd;
|
||||
*(here->BSIM4v4GEspPtr) += m * gcrgs;
|
||||
*(here->BSIM4v4GEbpPtr) += m * gcrgb;
|
||||
|
||||
*(here->BSIM4V4GPgePtr) -= m * gcrg;
|
||||
*(here->BSIM4V4GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4V4GPgpPtr) -= m * (gcrgg - xcggbi - gIgtotg);
|
||||
*(here->BSIM4V4GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4V4GPdpPtr) -= m * (gcrgd - xcgdbi - gIgtotd);
|
||||
*(here->BSIM4V4GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4V4GPspPtr) -= m * (gcrgs - xcgsbi - gIgtots);
|
||||
*(here->BSIM4V4GPbpPtr +1) += m * xcgbbr;
|
||||
*(here->BSIM4V4GPbpPtr) -= m * (gcrgb - xcgbbi - gIgtotb);
|
||||
*(here->BSIM4v4GPgePtr) -= m * gcrg;
|
||||
*(here->BSIM4v4GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4v4GPgpPtr) -= m * (gcrgg - xcggbi - gIgtotg);
|
||||
*(here->BSIM4v4GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4v4GPdpPtr) -= m * (gcrgd - xcgdbi - gIgtotd);
|
||||
*(here->BSIM4v4GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4v4GPspPtr) -= m * (gcrgs - xcgsbi - gIgtots);
|
||||
*(here->BSIM4v4GPbpPtr +1) += m * xcgbbr;
|
||||
*(here->BSIM4v4GPbpPtr) -= m * (gcrgb - xcgbbi - gIgtotb);
|
||||
}
|
||||
else if (here->BSIM4V4rgateMod == 3)
|
||||
{ *(here->BSIM4V4GEgePtr) += m * geltd;
|
||||
*(here->BSIM4V4GEgmPtr) -= m * geltd;
|
||||
*(here->BSIM4V4GMgePtr) -= m * geltd;
|
||||
*(here->BSIM4V4GMgmPtr) += m * (geltd + gcrg);
|
||||
*(here->BSIM4V4GMgmPtr +1) += m * xcgmgmb;
|
||||
else if (here->BSIM4v4rgateMod == 3)
|
||||
{ *(here->BSIM4v4GEgePtr) += m * geltd;
|
||||
*(here->BSIM4v4GEgmPtr) -= m * geltd;
|
||||
*(here->BSIM4v4GMgePtr) -= m * geltd;
|
||||
*(here->BSIM4v4GMgmPtr) += m * (geltd + gcrg);
|
||||
*(here->BSIM4v4GMgmPtr +1) += m * xcgmgmb;
|
||||
|
||||
*(here->BSIM4V4GMdpPtr) += m * gcrgd;
|
||||
*(here->BSIM4V4GMdpPtr +1) += m * xcgmdb;
|
||||
*(here->BSIM4V4GMgpPtr) += m * gcrgg;
|
||||
*(here->BSIM4V4GMspPtr) += m * gcrgs;
|
||||
*(here->BSIM4V4GMspPtr +1) += m * xcgmsb;
|
||||
*(here->BSIM4V4GMbpPtr) += m * gcrgb;
|
||||
*(here->BSIM4V4GMbpPtr +1) += m * xcgmbb;
|
||||
*(here->BSIM4v4GMdpPtr) += m * gcrgd;
|
||||
*(here->BSIM4v4GMdpPtr +1) += m * xcgmdb;
|
||||
*(here->BSIM4v4GMgpPtr) += m * gcrgg;
|
||||
*(here->BSIM4v4GMspPtr) += m * gcrgs;
|
||||
*(here->BSIM4v4GMspPtr +1) += m * xcgmsb;
|
||||
*(here->BSIM4v4GMbpPtr) += m * gcrgb;
|
||||
*(here->BSIM4v4GMbpPtr +1) += m * xcgmbb;
|
||||
|
||||
*(here->BSIM4V4DPgmPtr +1) += m * xcdgmb;
|
||||
*(here->BSIM4V4GPgmPtr) -= m * gcrg;
|
||||
*(here->BSIM4V4SPgmPtr +1) += m * xcsgmb;
|
||||
*(here->BSIM4V4BPgmPtr +1) += m * xcbgmb;
|
||||
*(here->BSIM4v4DPgmPtr +1) += m * xcdgmb;
|
||||
*(here->BSIM4v4GPgmPtr) -= m * gcrg;
|
||||
*(here->BSIM4v4SPgmPtr +1) += m * xcsgmb;
|
||||
*(here->BSIM4v4BPgmPtr +1) += m * xcbgmb;
|
||||
|
||||
*(here->BSIM4V4GPgpPtr) -= m * (gcrgg - xcggbi - gIgtotg);
|
||||
*(here->BSIM4V4GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4V4GPdpPtr) -= m * (gcrgd - xcgdbi - gIgtotd);
|
||||
*(here->BSIM4V4GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4V4GPspPtr) -= m * (gcrgs - xcgsbi - gIgtots);
|
||||
*(here->BSIM4V4GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4V4GPbpPtr) -= m * (gcrgb - xcgbbi - gIgtotb);
|
||||
*(here->BSIM4V4GPbpPtr +1) += m * xcgbbr;
|
||||
*(here->BSIM4v4GPgpPtr) -= m * (gcrgg - xcggbi - gIgtotg);
|
||||
*(here->BSIM4v4GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4v4GPdpPtr) -= m * (gcrgd - xcgdbi - gIgtotd);
|
||||
*(here->BSIM4v4GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4v4GPspPtr) -= m * (gcrgs - xcgsbi - gIgtots);
|
||||
*(here->BSIM4v4GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4v4GPbpPtr) -= m * (gcrgb - xcgbbi - gIgtotb);
|
||||
*(here->BSIM4v4GPbpPtr +1) += m * xcgbbr;
|
||||
}
|
||||
else
|
||||
{ *(here->BSIM4V4GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4V4GPgpPtr) += m * (xcggbi + gIgtotg);
|
||||
*(here->BSIM4V4GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4V4GPdpPtr) += m * (xcgdbi + gIgtotd);
|
||||
*(here->BSIM4V4GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4V4GPspPtr) += m * (xcgsbi + gIgtots);
|
||||
*(here->BSIM4V4GPbpPtr +1) += m * xcgbbr;
|
||||
*(here->BSIM4V4GPbpPtr) += m * (xcgbbi + gIgtotb);
|
||||
{ *(here->BSIM4v4GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4v4GPgpPtr) += m * (xcggbi + gIgtotg);
|
||||
*(here->BSIM4v4GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4v4GPdpPtr) += m * (xcgdbi + gIgtotd);
|
||||
*(here->BSIM4v4GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4v4GPspPtr) += m * (xcgsbi + gIgtots);
|
||||
*(here->BSIM4v4GPbpPtr +1) += m * xcgbbr;
|
||||
*(here->BSIM4v4GPbpPtr) += m * (xcgbbi + gIgtotb);
|
||||
}
|
||||
|
||||
if (model->BSIM4V4rdsMod)
|
||||
{ (*(here->BSIM4V4DgpPtr) += m * gdtotg);
|
||||
(*(here->BSIM4V4DspPtr) += m * gdtots);
|
||||
(*(here->BSIM4V4DbpPtr) += m * gdtotb);
|
||||
(*(here->BSIM4V4SdpPtr) += m * gstotd);
|
||||
(*(here->BSIM4V4SgpPtr) += m * gstotg);
|
||||
(*(here->BSIM4V4SbpPtr) += m * gstotb);
|
||||
if (model->BSIM4v4rdsMod)
|
||||
{ (*(here->BSIM4v4DgpPtr) += m * gdtotg);
|
||||
(*(here->BSIM4v4DspPtr) += m * gdtots);
|
||||
(*(here->BSIM4v4DbpPtr) += m * gdtotb);
|
||||
(*(here->BSIM4v4SdpPtr) += m * gstotd);
|
||||
(*(here->BSIM4v4SgpPtr) += m * gstotg);
|
||||
(*(here->BSIM4v4SbpPtr) += m * gstotb);
|
||||
}
|
||||
|
||||
*(here->BSIM4V4DPdpPtr +1) += m * (xcddbr + gdsi + RevSumi);
|
||||
*(here->BSIM4V4DPdpPtr) += m * (gdpr + xcddbi + gdsr + here->BSIM4V4gbd
|
||||
*(here->BSIM4v4DPdpPtr +1) += m * (xcddbr + gdsi + RevSumi);
|
||||
*(here->BSIM4v4DPdpPtr) += m * (gdpr + xcddbi + gdsr + here->BSIM4v4gbd
|
||||
- gdtotd + RevSumr + gbdpdp - gIdtotd);
|
||||
*(here->BSIM4V4DPdPtr) -= m * (gdpr + gdtot);
|
||||
*(here->BSIM4V4DPgpPtr +1) += m * (xcdgbr + Gmi);
|
||||
*(here->BSIM4V4DPgpPtr) += m * (Gmr + xcdgbi - gdtotg + gbdpg - gIdtotg);
|
||||
*(here->BSIM4V4DPspPtr +1) += m * (xcdsbr - gdsi - FwdSumi);
|
||||
*(here->BSIM4V4DPspPtr) -= m * (gdsr - xcdsbi + FwdSumr + gdtots - gbdpsp + gIdtots);
|
||||
*(here->BSIM4V4DPbpPtr +1) += m * (xcdbbr + Gmbsi);
|
||||
*(here->BSIM4V4DPbpPtr) -= m * (gjbd + gdtotb - xcdbbi - Gmbsr - gbdpb + gIdtotb);
|
||||
*(here->BSIM4v4DPdPtr) -= m * (gdpr + gdtot);
|
||||
*(here->BSIM4v4DPgpPtr +1) += m * (xcdgbr + Gmi);
|
||||
*(here->BSIM4v4DPgpPtr) += m * (Gmr + xcdgbi - gdtotg + gbdpg - gIdtotg);
|
||||
*(here->BSIM4v4DPspPtr +1) += m * (xcdsbr - gdsi - FwdSumi);
|
||||
*(here->BSIM4v4DPspPtr) -= m * (gdsr - xcdsbi + FwdSumr + gdtots - gbdpsp + gIdtots);
|
||||
*(here->BSIM4v4DPbpPtr +1) += m * (xcdbbr + Gmbsi);
|
||||
*(here->BSIM4v4DPbpPtr) -= m * (gjbd + gdtotb - xcdbbi - Gmbsr - gbdpb + gIdtotb);
|
||||
|
||||
*(here->BSIM4V4DdpPtr) -= m * (gdpr - gdtotd);
|
||||
*(here->BSIM4V4DdPtr) += m * (gdpr + gdtot);
|
||||
*(here->BSIM4v4DdpPtr) -= m * (gdpr - gdtotd);
|
||||
*(here->BSIM4v4DdPtr) += m * (gdpr + gdtot);
|
||||
|
||||
*(here->BSIM4V4SPdpPtr +1) += m * (xcsdbr - gdsi - RevSumi);
|
||||
*(here->BSIM4V4SPdpPtr) -= m * (gdsr - xcsdbi + gstotd + RevSumr - gbspdp + gIstotd);
|
||||
*(here->BSIM4V4SPgpPtr +1) += m * (xcsgbr - Gmi);
|
||||
*(here->BSIM4V4SPgpPtr) -= m * (Gmr - xcsgbi + gstotg - gbspg + gIstotg);
|
||||
*(here->BSIM4V4SPspPtr +1) += m * (xcssbr + gdsi + FwdSumi);
|
||||
*(here->BSIM4V4SPspPtr) += m * (gspr + xcssbi + gdsr + here->BSIM4V4gbs
|
||||
*(here->BSIM4v4SPdpPtr +1) += m * (xcsdbr - gdsi - RevSumi);
|
||||
*(here->BSIM4v4SPdpPtr) -= m * (gdsr - xcsdbi + gstotd + RevSumr - gbspdp + gIstotd);
|
||||
*(here->BSIM4v4SPgpPtr +1) += m * (xcsgbr - Gmi);
|
||||
*(here->BSIM4v4SPgpPtr) -= m * (Gmr - xcsgbi + gstotg - gbspg + gIstotg);
|
||||
*(here->BSIM4v4SPspPtr +1) += m * (xcssbr + gdsi + FwdSumi);
|
||||
*(here->BSIM4v4SPspPtr) += m * (gspr + xcssbi + gdsr + here->BSIM4v4gbs
|
||||
- gstots + FwdSumr + gbspsp - gIstots);
|
||||
*(here->BSIM4V4SPsPtr) -= m * (gspr + gstot);
|
||||
*(here->BSIM4V4SPbpPtr +1) += m * (xcsbbr - Gmbsi);
|
||||
*(here->BSIM4V4SPbpPtr) -= m * (gjbs + gstotb - xcsbbi + Gmbsr - gbspb + gIstotb);
|
||||
*(here->BSIM4v4SPsPtr) -= m * (gspr + gstot);
|
||||
*(here->BSIM4v4SPbpPtr +1) += m * (xcsbbr - Gmbsi);
|
||||
*(here->BSIM4v4SPbpPtr) -= m * (gjbs + gstotb - xcsbbi + Gmbsr - gbspb + gIstotb);
|
||||
|
||||
*(here->BSIM4V4SspPtr) -= m * (gspr - gstots);
|
||||
*(here->BSIM4V4SsPtr) += m * (gspr + gstot);
|
||||
*(here->BSIM4v4SspPtr) -= m * (gspr - gstots);
|
||||
*(here->BSIM4v4SsPtr) += m * (gspr + gstot);
|
||||
|
||||
*(here->BSIM4V4BPdpPtr +1) += m * xcbdb;
|
||||
*(here->BSIM4V4BPdpPtr) -= m * (gjbd - gbbdp + gIbtotd);
|
||||
*(here->BSIM4V4BPgpPtr +1) += m * xcbgb;
|
||||
*(here->BSIM4V4BPgpPtr) -= m * (here->BSIM4V4gbgs + gIbtotg);
|
||||
*(here->BSIM4V4BPspPtr +1) += m * xcbsb;
|
||||
*(here->BSIM4V4BPspPtr) -= m * (gjbs - gbbsp + gIbtots);
|
||||
*(here->BSIM4V4BPbpPtr +1) += m * xcbbb;
|
||||
*(here->BSIM4V4BPbpPtr) += m * (gjbd + gjbs - here->BSIM4V4gbbs
|
||||
*(here->BSIM4v4BPdpPtr +1) += m * xcbdb;
|
||||
*(here->BSIM4v4BPdpPtr) -= m * (gjbd - gbbdp + gIbtotd);
|
||||
*(here->BSIM4v4BPgpPtr +1) += m * xcbgb;
|
||||
*(here->BSIM4v4BPgpPtr) -= m * (here->BSIM4v4gbgs + gIbtotg);
|
||||
*(here->BSIM4v4BPspPtr +1) += m * xcbsb;
|
||||
*(here->BSIM4v4BPspPtr) -= m * (gjbs - gbbsp + gIbtots);
|
||||
*(here->BSIM4v4BPbpPtr +1) += m * xcbbb;
|
||||
*(here->BSIM4v4BPbpPtr) += m * (gjbd + gjbs - here->BSIM4v4gbbs
|
||||
- gIbtotb);
|
||||
ggidld = here->BSIM4V4ggidld;
|
||||
ggidlg = here->BSIM4V4ggidlg;
|
||||
ggidlb = here->BSIM4V4ggidlb;
|
||||
ggislg = here->BSIM4V4ggislg;
|
||||
ggisls = here->BSIM4V4ggisls;
|
||||
ggislb = here->BSIM4V4ggislb;
|
||||
ggidld = here->BSIM4v4ggidld;
|
||||
ggidlg = here->BSIM4v4ggidlg;
|
||||
ggidlb = here->BSIM4v4ggidlb;
|
||||
ggislg = here->BSIM4v4ggislg;
|
||||
ggisls = here->BSIM4v4ggisls;
|
||||
ggislb = here->BSIM4v4ggislb;
|
||||
|
||||
/* stamp gidl */
|
||||
(*(here->BSIM4V4DPdpPtr) += m * ggidld);
|
||||
(*(here->BSIM4V4DPgpPtr) += m * ggidlg);
|
||||
(*(here->BSIM4V4DPspPtr) -= m * ((ggidlg + ggidld) + ggidlb));
|
||||
(*(here->BSIM4V4DPbpPtr) += m * ggidlb);
|
||||
(*(here->BSIM4V4BPdpPtr) -= m * ggidld);
|
||||
(*(here->BSIM4V4BPgpPtr) -= m * ggidlg);
|
||||
(*(here->BSIM4V4BPspPtr) += m * ((ggidlg + ggidld) + ggidlb));
|
||||
(*(here->BSIM4V4BPbpPtr) -= m * ggidlb);
|
||||
(*(here->BSIM4v4DPdpPtr) += m * ggidld);
|
||||
(*(here->BSIM4v4DPgpPtr) += m * ggidlg);
|
||||
(*(here->BSIM4v4DPspPtr) -= m * ((ggidlg + ggidld) + ggidlb));
|
||||
(*(here->BSIM4v4DPbpPtr) += m * ggidlb);
|
||||
(*(here->BSIM4v4BPdpPtr) -= m * ggidld);
|
||||
(*(here->BSIM4v4BPgpPtr) -= m * ggidlg);
|
||||
(*(here->BSIM4v4BPspPtr) += m * ((ggidlg + ggidld) + ggidlb));
|
||||
(*(here->BSIM4v4BPbpPtr) -= m * ggidlb);
|
||||
/* stamp gisl */
|
||||
(*(here->BSIM4V4SPdpPtr) -= m * ((ggisls + ggislg) + ggislb));
|
||||
(*(here->BSIM4V4SPgpPtr) += m * ggislg);
|
||||
(*(here->BSIM4V4SPspPtr) += m * ggisls);
|
||||
(*(here->BSIM4V4SPbpPtr) += m * ggislb);
|
||||
(*(here->BSIM4V4BPdpPtr) += m * ((ggislg + ggisls) + ggislb));
|
||||
(*(here->BSIM4V4BPgpPtr) -= m * ggislg);
|
||||
(*(here->BSIM4V4BPspPtr) -= m * ggisls);
|
||||
(*(here->BSIM4V4BPbpPtr) -= m * ggislb);
|
||||
(*(here->BSIM4v4SPdpPtr) -= m * ((ggisls + ggislg) + ggislb));
|
||||
(*(here->BSIM4v4SPgpPtr) += m * ggislg);
|
||||
(*(here->BSIM4v4SPspPtr) += m * ggisls);
|
||||
(*(here->BSIM4v4SPbpPtr) += m * ggislb);
|
||||
(*(here->BSIM4v4BPdpPtr) += m * ((ggislg + ggisls) + ggislb));
|
||||
(*(here->BSIM4v4BPgpPtr) -= m * ggislg);
|
||||
(*(here->BSIM4v4BPspPtr) -= m * ggisls);
|
||||
(*(here->BSIM4v4BPbpPtr) -= m * ggislb);
|
||||
|
||||
if (here->BSIM4V4rbodyMod)
|
||||
{ (*(here->BSIM4V4DPdbPtr +1) += m * xcdbdb);
|
||||
(*(here->BSIM4V4DPdbPtr) -= m * here->BSIM4V4gbd);
|
||||
(*(here->BSIM4V4SPsbPtr +1) += m * xcsbsb);
|
||||
(*(here->BSIM4V4SPsbPtr) -= m * here->BSIM4V4gbs);
|
||||
if (here->BSIM4v4rbodyMod)
|
||||
{ (*(here->BSIM4v4DPdbPtr +1) += m * xcdbdb);
|
||||
(*(here->BSIM4v4DPdbPtr) -= m * here->BSIM4v4gbd);
|
||||
(*(here->BSIM4v4SPsbPtr +1) += m * xcsbsb);
|
||||
(*(here->BSIM4v4SPsbPtr) -= m * here->BSIM4v4gbs);
|
||||
|
||||
(*(here->BSIM4V4DBdpPtr +1) += m * xcdbdb);
|
||||
(*(here->BSIM4V4DBdpPtr) -= m * here->BSIM4V4gbd);
|
||||
(*(here->BSIM4V4DBdbPtr +1) -= m * xcdbdb);
|
||||
(*(here->BSIM4V4DBdbPtr) += m * (here->BSIM4V4gbd + here->BSIM4V4grbpd
|
||||
+ here->BSIM4V4grbdb));
|
||||
(*(here->BSIM4V4DBbpPtr) -= m * here->BSIM4V4grbpd);
|
||||
(*(here->BSIM4V4DBbPtr) -= m * here->BSIM4V4grbdb);
|
||||
(*(here->BSIM4v4DBdpPtr +1) += m * xcdbdb);
|
||||
(*(here->BSIM4v4DBdpPtr) -= m * here->BSIM4v4gbd);
|
||||
(*(here->BSIM4v4DBdbPtr +1) -= m * xcdbdb);
|
||||
(*(here->BSIM4v4DBdbPtr) += m * (here->BSIM4v4gbd + here->BSIM4v4grbpd
|
||||
+ here->BSIM4v4grbdb));
|
||||
(*(here->BSIM4v4DBbpPtr) -= m * here->BSIM4v4grbpd);
|
||||
(*(here->BSIM4v4DBbPtr) -= m * here->BSIM4v4grbdb);
|
||||
|
||||
(*(here->BSIM4V4BPdbPtr) -= m * here->BSIM4V4grbpd);
|
||||
(*(here->BSIM4V4BPbPtr) -= m * here->BSIM4V4grbpb);
|
||||
(*(here->BSIM4V4BPsbPtr) -= m * here->BSIM4V4grbps);
|
||||
(*(here->BSIM4V4BPbpPtr) += m * (here->BSIM4V4grbpd + here->BSIM4V4grbps
|
||||
+ here->BSIM4V4grbpb));
|
||||
/* WDLiu: (-here->BSIM4V4gbbs) already added to BPbpPtr */
|
||||
(*(here->BSIM4v4BPdbPtr) -= m * here->BSIM4v4grbpd);
|
||||
(*(here->BSIM4v4BPbPtr) -= m * here->BSIM4v4grbpb);
|
||||
(*(here->BSIM4v4BPsbPtr) -= m * here->BSIM4v4grbps);
|
||||
(*(here->BSIM4v4BPbpPtr) += m * (here->BSIM4v4grbpd + here->BSIM4v4grbps
|
||||
+ here->BSIM4v4grbpb));
|
||||
/* WDLiu: (-here->BSIM4v4gbbs) already added to BPbpPtr */
|
||||
|
||||
(*(here->BSIM4V4SBspPtr +1) += m * xcsbsb);
|
||||
(*(here->BSIM4V4SBspPtr) -= m * here->BSIM4V4gbs);
|
||||
(*(here->BSIM4V4SBbpPtr) -= m * here->BSIM4V4grbps);
|
||||
(*(here->BSIM4V4SBbPtr) -= m * here->BSIM4V4grbsb);
|
||||
(*(here->BSIM4V4SBsbPtr +1) -= m * xcsbsb);
|
||||
(*(here->BSIM4V4SBsbPtr) += m * (here->BSIM4V4gbs
|
||||
+ here->BSIM4V4grbps + here->BSIM4V4grbsb));
|
||||
(*(here->BSIM4v4SBspPtr +1) += m * xcsbsb);
|
||||
(*(here->BSIM4v4SBspPtr) -= m * here->BSIM4v4gbs);
|
||||
(*(here->BSIM4v4SBbpPtr) -= m * here->BSIM4v4grbps);
|
||||
(*(here->BSIM4v4SBbPtr) -= m * here->BSIM4v4grbsb);
|
||||
(*(here->BSIM4v4SBsbPtr +1) -= m * xcsbsb);
|
||||
(*(here->BSIM4v4SBsbPtr) += m * (here->BSIM4v4gbs
|
||||
+ here->BSIM4v4grbps + here->BSIM4v4grbsb));
|
||||
|
||||
(*(here->BSIM4V4BdbPtr) -= m * here->BSIM4V4grbdb);
|
||||
(*(here->BSIM4V4BbpPtr) -= m * here->BSIM4V4grbpb);
|
||||
(*(here->BSIM4V4BsbPtr) -= m * here->BSIM4V4grbsb);
|
||||
(*(here->BSIM4V4BbPtr) += m * (here->BSIM4V4grbsb + here->BSIM4V4grbdb
|
||||
+ here->BSIM4V4grbpb));
|
||||
(*(here->BSIM4v4BdbPtr) -= m * here->BSIM4v4grbdb);
|
||||
(*(here->BSIM4v4BbpPtr) -= m * here->BSIM4v4grbpb);
|
||||
(*(here->BSIM4v4BsbPtr) -= m * here->BSIM4v4grbsb);
|
||||
(*(here->BSIM4v4BbPtr) += m * (here->BSIM4v4grbsb + here->BSIM4v4grbdb
|
||||
+ here->BSIM4v4grbpb));
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -655,16 +655,16 @@ double m;
|
|||
* otherwise a singular AC NQS matrix may occur if the transient NQS is on.
|
||||
* The charge node is isolated from the instance.
|
||||
*/
|
||||
if (here->BSIM4V4trnqsMod)
|
||||
{ (*(here->BSIM4V4QqPtr) += m * 1.0);
|
||||
(*(here->BSIM4V4QgpPtr) += 0.0);
|
||||
(*(here->BSIM4V4QdpPtr) += 0.0);
|
||||
(*(here->BSIM4V4QspPtr) += 0.0);
|
||||
(*(here->BSIM4V4QbpPtr) += 0.0);
|
||||
if (here->BSIM4v4trnqsMod)
|
||||
{ (*(here->BSIM4v4QqPtr) += m * 1.0);
|
||||
(*(here->BSIM4v4QgpPtr) += 0.0);
|
||||
(*(here->BSIM4v4QdpPtr) += 0.0);
|
||||
(*(here->BSIM4v4QspPtr) += 0.0);
|
||||
(*(here->BSIM4v4QbpPtr) += 0.0);
|
||||
|
||||
(*(here->BSIM4V4DPqPtr) += 0.0);
|
||||
(*(here->BSIM4V4SPqPtr) += 0.0);
|
||||
(*(here->BSIM4V4GPqPtr) += 0.0);
|
||||
(*(here->BSIM4v4DPqPtr) += 0.0);
|
||||
(*(here->BSIM4v4SPqPtr) += 0.0);
|
||||
(*(here->BSIM4v4GPqPtr) += 0.0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -20,300 +20,300 @@
|
|||
#include "suffix.h"
|
||||
|
||||
int
|
||||
BSIM4V4ask(ckt,inst,which,value,select)
|
||||
BSIM4v4ask(ckt,inst,which,value,select)
|
||||
CKTcircuit *ckt;
|
||||
GENinstance *inst;
|
||||
int which;
|
||||
IFvalue *value;
|
||||
IFvalue *select;
|
||||
{
|
||||
BSIM4V4instance *here = (BSIM4V4instance*)inst;
|
||||
BSIM4v4instance *here = (BSIM4v4instance*)inst;
|
||||
|
||||
switch(which)
|
||||
{ case BSIM4V4_L:
|
||||
value->rValue = here->BSIM4V4l;
|
||||
{ case BSIM4v4_L:
|
||||
value->rValue = here->BSIM4v4l;
|
||||
return(OK);
|
||||
case BSIM4V4_W:
|
||||
value->rValue = here->BSIM4V4w;
|
||||
case BSIM4v4_W:
|
||||
value->rValue = here->BSIM4v4w;
|
||||
return(OK);
|
||||
case BSIM4V4_M:
|
||||
value->rValue = here->BSIM4V4m;
|
||||
case BSIM4v4_M:
|
||||
value->rValue = here->BSIM4v4m;
|
||||
return(OK);
|
||||
case BSIM4V4_NF:
|
||||
value->rValue = here->BSIM4V4nf;
|
||||
case BSIM4v4_NF:
|
||||
value->rValue = here->BSIM4v4nf;
|
||||
return(OK);
|
||||
case BSIM4V4_MIN:
|
||||
value->iValue = here->BSIM4V4min;
|
||||
case BSIM4v4_MIN:
|
||||
value->iValue = here->BSIM4v4min;
|
||||
return(OK);
|
||||
case BSIM4V4_AS:
|
||||
value->rValue = here->BSIM4V4sourceArea;
|
||||
case BSIM4v4_AS:
|
||||
value->rValue = here->BSIM4v4sourceArea;
|
||||
return(OK);
|
||||
case BSIM4V4_AD:
|
||||
value->rValue = here->BSIM4V4drainArea;
|
||||
case BSIM4v4_AD:
|
||||
value->rValue = here->BSIM4v4drainArea;
|
||||
return(OK);
|
||||
case BSIM4V4_PS:
|
||||
value->rValue = here->BSIM4V4sourcePerimeter;
|
||||
case BSIM4v4_PS:
|
||||
value->rValue = here->BSIM4v4sourcePerimeter;
|
||||
return(OK);
|
||||
case BSIM4V4_PD:
|
||||
value->rValue = here->BSIM4V4drainPerimeter;
|
||||
case BSIM4v4_PD:
|
||||
value->rValue = here->BSIM4v4drainPerimeter;
|
||||
return(OK);
|
||||
case BSIM4V4_NRS:
|
||||
value->rValue = here->BSIM4V4sourceSquares;
|
||||
case BSIM4v4_NRS:
|
||||
value->rValue = here->BSIM4v4sourceSquares;
|
||||
return(OK);
|
||||
case BSIM4V4_NRD:
|
||||
value->rValue = here->BSIM4V4drainSquares;
|
||||
case BSIM4v4_NRD:
|
||||
value->rValue = here->BSIM4v4drainSquares;
|
||||
return(OK);
|
||||
case BSIM4V4_OFF:
|
||||
value->rValue = here->BSIM4V4off;
|
||||
case BSIM4v4_OFF:
|
||||
value->rValue = here->BSIM4v4off;
|
||||
return(OK);
|
||||
case BSIM4V4_SA:
|
||||
value->rValue = here->BSIM4V4sa ;
|
||||
case BSIM4v4_SA:
|
||||
value->rValue = here->BSIM4v4sa ;
|
||||
return(OK);
|
||||
case BSIM4V4_SB:
|
||||
value->rValue = here->BSIM4V4sb ;
|
||||
case BSIM4v4_SB:
|
||||
value->rValue = here->BSIM4v4sb ;
|
||||
return(OK);
|
||||
case BSIM4V4_SD:
|
||||
value->rValue = here->BSIM4V4sd ;
|
||||
case BSIM4v4_SD:
|
||||
value->rValue = here->BSIM4v4sd ;
|
||||
return(OK);
|
||||
case BSIM4V4_RBSB:
|
||||
value->rValue = here->BSIM4V4rbsb;
|
||||
case BSIM4v4_RBSB:
|
||||
value->rValue = here->BSIM4v4rbsb;
|
||||
return(OK);
|
||||
case BSIM4V4_RBDB:
|
||||
value->rValue = here->BSIM4V4rbdb;
|
||||
case BSIM4v4_RBDB:
|
||||
value->rValue = here->BSIM4v4rbdb;
|
||||
return(OK);
|
||||
case BSIM4V4_RBPB:
|
||||
value->rValue = here->BSIM4V4rbpb;
|
||||
case BSIM4v4_RBPB:
|
||||
value->rValue = here->BSIM4v4rbpb;
|
||||
return(OK);
|
||||
case BSIM4V4_RBPS:
|
||||
value->rValue = here->BSIM4V4rbps;
|
||||
case BSIM4v4_RBPS:
|
||||
value->rValue = here->BSIM4v4rbps;
|
||||
return(OK);
|
||||
case BSIM4V4_RBPD:
|
||||
value->rValue = here->BSIM4V4rbpd;
|
||||
case BSIM4v4_RBPD:
|
||||
value->rValue = here->BSIM4v4rbpd;
|
||||
return(OK);
|
||||
case BSIM4V4_TRNQSMOD:
|
||||
value->iValue = here->BSIM4V4trnqsMod;
|
||||
case BSIM4v4_TRNQSMOD:
|
||||
value->iValue = here->BSIM4v4trnqsMod;
|
||||
return(OK);
|
||||
case BSIM4V4_ACNQSMOD:
|
||||
value->iValue = here->BSIM4V4acnqsMod;
|
||||
case BSIM4v4_ACNQSMOD:
|
||||
value->iValue = here->BSIM4v4acnqsMod;
|
||||
return(OK);
|
||||
case BSIM4V4_RBODYMOD:
|
||||
value->iValue = here->BSIM4V4rbodyMod;
|
||||
case BSIM4v4_RBODYMOD:
|
||||
value->iValue = here->BSIM4v4rbodyMod;
|
||||
return(OK);
|
||||
case BSIM4V4_RGATEMOD:
|
||||
value->iValue = here->BSIM4V4rgateMod;
|
||||
case BSIM4v4_RGATEMOD:
|
||||
value->iValue = here->BSIM4v4rgateMod;
|
||||
return(OK);
|
||||
case BSIM4V4_GEOMOD:
|
||||
value->iValue = here->BSIM4V4geoMod;
|
||||
case BSIM4v4_GEOMOD:
|
||||
value->iValue = here->BSIM4v4geoMod;
|
||||
return(OK);
|
||||
case BSIM4V4_RGEOMOD:
|
||||
value->iValue = here->BSIM4V4rgeoMod;
|
||||
case BSIM4v4_RGEOMOD:
|
||||
value->iValue = here->BSIM4v4rgeoMod;
|
||||
return(OK);
|
||||
case BSIM4V4_IC_VDS:
|
||||
value->rValue = here->BSIM4V4icVDS;
|
||||
case BSIM4v4_IC_VDS:
|
||||
value->rValue = here->BSIM4v4icVDS;
|
||||
return(OK);
|
||||
case BSIM4V4_IC_VGS:
|
||||
value->rValue = here->BSIM4V4icVGS;
|
||||
case BSIM4v4_IC_VGS:
|
||||
value->rValue = here->BSIM4v4icVGS;
|
||||
return(OK);
|
||||
case BSIM4V4_IC_VBS:
|
||||
value->rValue = here->BSIM4V4icVBS;
|
||||
case BSIM4v4_IC_VBS:
|
||||
value->rValue = here->BSIM4v4icVBS;
|
||||
return(OK);
|
||||
case BSIM4V4_DNODE:
|
||||
value->iValue = here->BSIM4V4dNode;
|
||||
case BSIM4v4_DNODE:
|
||||
value->iValue = here->BSIM4v4dNode;
|
||||
return(OK);
|
||||
case BSIM4V4_GNODEEXT:
|
||||
value->iValue = here->BSIM4V4gNodeExt;
|
||||
case BSIM4v4_GNODEEXT:
|
||||
value->iValue = here->BSIM4v4gNodeExt;
|
||||
return(OK);
|
||||
case BSIM4V4_SNODE:
|
||||
value->iValue = here->BSIM4V4sNode;
|
||||
case BSIM4v4_SNODE:
|
||||
value->iValue = here->BSIM4v4sNode;
|
||||
return(OK);
|
||||
case BSIM4V4_BNODE:
|
||||
value->iValue = here->BSIM4V4bNode;
|
||||
case BSIM4v4_BNODE:
|
||||
value->iValue = here->BSIM4v4bNode;
|
||||
return(OK);
|
||||
case BSIM4V4_DNODEPRIME:
|
||||
value->iValue = here->BSIM4V4dNodePrime;
|
||||
case BSIM4v4_DNODEPRIME:
|
||||
value->iValue = here->BSIM4v4dNodePrime;
|
||||
return(OK);
|
||||
case BSIM4V4_GNODEPRIME:
|
||||
value->iValue = here->BSIM4V4gNodePrime;
|
||||
case BSIM4v4_GNODEPRIME:
|
||||
value->iValue = here->BSIM4v4gNodePrime;
|
||||
return(OK);
|
||||
case BSIM4V4_GNODEMID:
|
||||
value->iValue = here->BSIM4V4gNodeMid;
|
||||
case BSIM4v4_GNODEMID:
|
||||
value->iValue = here->BSIM4v4gNodeMid;
|
||||
return(OK);
|
||||
case BSIM4V4_SNODEPRIME:
|
||||
value->iValue = here->BSIM4V4sNodePrime;
|
||||
case BSIM4v4_SNODEPRIME:
|
||||
value->iValue = here->BSIM4v4sNodePrime;
|
||||
return(OK);
|
||||
case BSIM4V4_DBNODE:
|
||||
value->iValue = here->BSIM4V4dbNode;
|
||||
case BSIM4v4_DBNODE:
|
||||
value->iValue = here->BSIM4v4dbNode;
|
||||
return(OK);
|
||||
case BSIM4V4_BNODEPRIME:
|
||||
value->iValue = here->BSIM4V4bNodePrime;
|
||||
case BSIM4v4_BNODEPRIME:
|
||||
value->iValue = here->BSIM4v4bNodePrime;
|
||||
return(OK);
|
||||
case BSIM4V4_SBNODE:
|
||||
value->iValue = here->BSIM4V4sbNode;
|
||||
case BSIM4v4_SBNODE:
|
||||
value->iValue = here->BSIM4v4sbNode;
|
||||
return(OK);
|
||||
case BSIM4V4_SOURCECONDUCT:
|
||||
value->rValue = here->BSIM4V4sourceConductance;
|
||||
case BSIM4v4_SOURCECONDUCT:
|
||||
value->rValue = here->BSIM4v4sourceConductance;
|
||||
return(OK);
|
||||
case BSIM4V4_DRAINCONDUCT:
|
||||
value->rValue = here->BSIM4V4drainConductance;
|
||||
case BSIM4v4_DRAINCONDUCT:
|
||||
value->rValue = here->BSIM4v4drainConductance;
|
||||
return(OK);
|
||||
case BSIM4V4_VBD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4V4vbd);
|
||||
case BSIM4v4_VBD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4vbd);
|
||||
return(OK);
|
||||
case BSIM4V4_VBS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4V4vbs);
|
||||
case BSIM4v4_VBS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4vbs);
|
||||
return(OK);
|
||||
case BSIM4V4_VGS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4V4vgs);
|
||||
case BSIM4v4_VGS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4vgs);
|
||||
return(OK);
|
||||
case BSIM4V4_VDS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4V4vds);
|
||||
case BSIM4v4_VDS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4vds);
|
||||
return(OK);
|
||||
case BSIM4V4_CD:
|
||||
value->rValue = here->BSIM4V4cd;
|
||||
case BSIM4v4_CD:
|
||||
value->rValue = here->BSIM4v4cd;
|
||||
return(OK);
|
||||
case BSIM4V4_CBS:
|
||||
value->rValue = here->BSIM4V4cbs;
|
||||
case BSIM4v4_CBS:
|
||||
value->rValue = here->BSIM4v4cbs;
|
||||
return(OK);
|
||||
case BSIM4V4_CBD:
|
||||
value->rValue = here->BSIM4V4cbd;
|
||||
case BSIM4v4_CBD:
|
||||
value->rValue = here->BSIM4v4cbd;
|
||||
return(OK);
|
||||
case BSIM4V4_CSUB:
|
||||
value->rValue = here->BSIM4V4csub;
|
||||
case BSIM4v4_CSUB:
|
||||
value->rValue = here->BSIM4v4csub;
|
||||
return(OK);
|
||||
case BSIM4V4_IGIDL:
|
||||
value->rValue = here->BSIM4V4Igidl;
|
||||
case BSIM4v4_IGIDL:
|
||||
value->rValue = here->BSIM4v4Igidl;
|
||||
return(OK);
|
||||
case BSIM4V4_IGISL:
|
||||
value->rValue = here->BSIM4V4Igisl;
|
||||
case BSIM4v4_IGISL:
|
||||
value->rValue = here->BSIM4v4Igisl;
|
||||
return(OK);
|
||||
case BSIM4V4_IGS:
|
||||
value->rValue = here->BSIM4V4Igs;
|
||||
case BSIM4v4_IGS:
|
||||
value->rValue = here->BSIM4v4Igs;
|
||||
return(OK);
|
||||
case BSIM4V4_IGD:
|
||||
value->rValue = here->BSIM4V4Igd;
|
||||
case BSIM4v4_IGD:
|
||||
value->rValue = here->BSIM4v4Igd;
|
||||
return(OK);
|
||||
case BSIM4V4_IGB:
|
||||
value->rValue = here->BSIM4V4Igb;
|
||||
case BSIM4v4_IGB:
|
||||
value->rValue = here->BSIM4v4Igb;
|
||||
return(OK);
|
||||
case BSIM4V4_IGCS:
|
||||
value->rValue = here->BSIM4V4Igcs;
|
||||
case BSIM4v4_IGCS:
|
||||
value->rValue = here->BSIM4v4Igcs;
|
||||
return(OK);
|
||||
case BSIM4V4_IGCD:
|
||||
value->rValue = here->BSIM4V4Igcd;
|
||||
case BSIM4v4_IGCD:
|
||||
value->rValue = here->BSIM4v4Igcd;
|
||||
return(OK);
|
||||
case BSIM4V4_GM:
|
||||
value->rValue = here->BSIM4V4gm;
|
||||
case BSIM4v4_GM:
|
||||
value->rValue = here->BSIM4v4gm;
|
||||
return(OK);
|
||||
case BSIM4V4_GDS:
|
||||
value->rValue = here->BSIM4V4gds;
|
||||
case BSIM4v4_GDS:
|
||||
value->rValue = here->BSIM4v4gds;
|
||||
return(OK);
|
||||
case BSIM4V4_GMBS:
|
||||
value->rValue = here->BSIM4V4gmbs;
|
||||
case BSIM4v4_GMBS:
|
||||
value->rValue = here->BSIM4v4gmbs;
|
||||
return(OK);
|
||||
case BSIM4V4_GBD:
|
||||
value->rValue = here->BSIM4V4gbd;
|
||||
case BSIM4v4_GBD:
|
||||
value->rValue = here->BSIM4v4gbd;
|
||||
return(OK);
|
||||
case BSIM4V4_GBS:
|
||||
value->rValue = here->BSIM4V4gbs;
|
||||
case BSIM4v4_GBS:
|
||||
value->rValue = here->BSIM4v4gbs;
|
||||
return(OK);
|
||||
/* case BSIM4V4_QB:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4V4qb);
|
||||
/* case BSIM4v4_QB:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4qb);
|
||||
return(OK); */
|
||||
case BSIM4V4_CQB:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4V4cqb);
|
||||
case BSIM4v4_CQB:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4cqb);
|
||||
return(OK);
|
||||
/* case BSIM4V4_QG:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4V4qg);
|
||||
/* case BSIM4v4_QG:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4qg);
|
||||
return(OK); */
|
||||
case BSIM4V4_CQG:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4V4cqg);
|
||||
case BSIM4v4_CQG:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4cqg);
|
||||
return(OK);
|
||||
/* case BSIM4V4_QD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4V4qd);
|
||||
/* case BSIM4v4_QD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4qd);
|
||||
return(OK); */
|
||||
case BSIM4V4_CQD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4V4cqd);
|
||||
case BSIM4v4_CQD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4cqd);
|
||||
return(OK);
|
||||
/* case BSIM4V4_QS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4V4qs);
|
||||
/* case BSIM4v4_QS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4qs);
|
||||
return(OK); */
|
||||
case BSIM4V4_QB:
|
||||
value->rValue = here->BSIM4V4qbulk;
|
||||
case BSIM4v4_QB:
|
||||
value->rValue = here->BSIM4v4qbulk;
|
||||
return(OK);
|
||||
case BSIM4V4_QG:
|
||||
value->rValue = here->BSIM4V4qgate;
|
||||
case BSIM4v4_QG:
|
||||
value->rValue = here->BSIM4v4qgate;
|
||||
return(OK);
|
||||
case BSIM4V4_QS:
|
||||
value->rValue = here->BSIM4V4qsrc;
|
||||
case BSIM4v4_QS:
|
||||
value->rValue = here->BSIM4v4qsrc;
|
||||
return(OK);
|
||||
case BSIM4V4_QD:
|
||||
value->rValue = here->BSIM4V4qdrn;
|
||||
case BSIM4v4_QD:
|
||||
value->rValue = here->BSIM4v4qdrn;
|
||||
return(OK);
|
||||
case BSIM4V4_CGGB:
|
||||
value->rValue = here->BSIM4V4cggb;
|
||||
case BSIM4v4_CGGB:
|
||||
value->rValue = here->BSIM4v4cggb;
|
||||
return(OK);
|
||||
case BSIM4V4_CGDB:
|
||||
value->rValue = here->BSIM4V4cgdb;
|
||||
case BSIM4v4_CGDB:
|
||||
value->rValue = here->BSIM4v4cgdb;
|
||||
return(OK);
|
||||
case BSIM4V4_CGSB:
|
||||
value->rValue = here->BSIM4V4cgsb;
|
||||
case BSIM4v4_CGSB:
|
||||
value->rValue = here->BSIM4v4cgsb;
|
||||
return(OK);
|
||||
case BSIM4V4_CDGB:
|
||||
value->rValue = here->BSIM4V4cdgb;
|
||||
case BSIM4v4_CDGB:
|
||||
value->rValue = here->BSIM4v4cdgb;
|
||||
return(OK);
|
||||
case BSIM4V4_CDDB:
|
||||
value->rValue = here->BSIM4V4cddb;
|
||||
case BSIM4v4_CDDB:
|
||||
value->rValue = here->BSIM4v4cddb;
|
||||
return(OK);
|
||||
case BSIM4V4_CDSB:
|
||||
value->rValue = here->BSIM4V4cdsb;
|
||||
case BSIM4v4_CDSB:
|
||||
value->rValue = here->BSIM4v4cdsb;
|
||||
return(OK);
|
||||
case BSIM4V4_CBGB:
|
||||
value->rValue = here->BSIM4V4cbgb;
|
||||
case BSIM4v4_CBGB:
|
||||
value->rValue = here->BSIM4v4cbgb;
|
||||
return(OK);
|
||||
case BSIM4V4_CBDB:
|
||||
value->rValue = here->BSIM4V4cbdb;
|
||||
case BSIM4v4_CBDB:
|
||||
value->rValue = here->BSIM4v4cbdb;
|
||||
return(OK);
|
||||
case BSIM4V4_CBSB:
|
||||
value->rValue = here->BSIM4V4cbsb;
|
||||
case BSIM4v4_CBSB:
|
||||
value->rValue = here->BSIM4v4cbsb;
|
||||
return(OK);
|
||||
case BSIM4V4_CSGB:
|
||||
value->rValue = here->BSIM4V4csgb;
|
||||
case BSIM4v4_CSGB:
|
||||
value->rValue = here->BSIM4v4csgb;
|
||||
return(OK);
|
||||
case BSIM4V4_CSDB:
|
||||
value->rValue = here->BSIM4V4csdb;
|
||||
case BSIM4v4_CSDB:
|
||||
value->rValue = here->BSIM4v4csdb;
|
||||
return(OK);
|
||||
case BSIM4V4_CSSB:
|
||||
value->rValue = here->BSIM4V4cssb;
|
||||
case BSIM4v4_CSSB:
|
||||
value->rValue = here->BSIM4v4cssb;
|
||||
return(OK);
|
||||
case BSIM4V4_CGBB:
|
||||
value->rValue = here->BSIM4V4cgbb;
|
||||
case BSIM4v4_CGBB:
|
||||
value->rValue = here->BSIM4v4cgbb;
|
||||
return(OK);
|
||||
case BSIM4V4_CDBB:
|
||||
value->rValue = here->BSIM4V4cdbb;
|
||||
case BSIM4v4_CDBB:
|
||||
value->rValue = here->BSIM4v4cdbb;
|
||||
return(OK);
|
||||
case BSIM4V4_CSBB:
|
||||
value->rValue = here->BSIM4V4csbb;
|
||||
case BSIM4v4_CSBB:
|
||||
value->rValue = here->BSIM4v4csbb;
|
||||
return(OK);
|
||||
case BSIM4V4_CBBB:
|
||||
value->rValue = here->BSIM4V4cbbb;
|
||||
case BSIM4v4_CBBB:
|
||||
value->rValue = here->BSIM4v4cbbb;
|
||||
return(OK);
|
||||
case BSIM4V4_CAPBD:
|
||||
value->rValue = here->BSIM4V4capbd;
|
||||
case BSIM4v4_CAPBD:
|
||||
value->rValue = here->BSIM4v4capbd;
|
||||
return(OK);
|
||||
case BSIM4V4_CAPBS:
|
||||
value->rValue = here->BSIM4V4capbs;
|
||||
case BSIM4v4_CAPBS:
|
||||
value->rValue = here->BSIM4v4capbs;
|
||||
return(OK);
|
||||
case BSIM4V4_VON:
|
||||
value->rValue = here->BSIM4V4von;
|
||||
case BSIM4v4_VON:
|
||||
value->rValue = here->BSIM4v4von;
|
||||
return(OK);
|
||||
case BSIM4V4_VDSAT:
|
||||
value->rValue = here->BSIM4V4vdsat;
|
||||
case BSIM4v4_VDSAT:
|
||||
value->rValue = here->BSIM4v4vdsat;
|
||||
return(OK);
|
||||
case BSIM4V4_QBS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4V4qbs);
|
||||
case BSIM4v4_QBS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4qbs);
|
||||
return(OK);
|
||||
case BSIM4V4_QBD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4V4qbd);
|
||||
case BSIM4v4_QBD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v4qbd);
|
||||
return(OK);
|
||||
default:
|
||||
return(E_BADPARM);
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -22,12 +22,12 @@
|
|||
|
||||
|
||||
int
|
||||
BSIM4V4convTest(inModel,ckt)
|
||||
BSIM4v4convTest(inModel,ckt)
|
||||
GENmodel *inModel;
|
||||
CKTcircuit *ckt;
|
||||
{
|
||||
BSIM4V4model *model = (BSIM4V4model*)inModel;
|
||||
BSIM4V4instance *here;
|
||||
BSIM4v4model *model = (BSIM4v4model*)inModel;
|
||||
BSIM4v4instance *here;
|
||||
double delvbd, delvbs, delvds, delvgd, delvgs;
|
||||
double delvdbd, delvsbs;
|
||||
double delvbd_jct, delvbs_jct;
|
||||
|
|
@ -39,112 +39,112 @@ double Isestot, cseshat, Idedtot, cdedhat;
|
|||
double Igstot, cgshat, Igdtot, cgdhat, Igbtot, cgbhat;
|
||||
double tol0, tol1, tol2, tol3, tol4, tol5, tol6;
|
||||
|
||||
for (; model != NULL; model = model->BSIM4V4nextModel)
|
||||
{ for (here = model->BSIM4V4instances; here != NULL ;
|
||||
here=here->BSIM4V4nextInstance)
|
||||
for (; model != NULL; model = model->BSIM4v4nextModel)
|
||||
{ for (here = model->BSIM4v4instances; here != NULL ;
|
||||
here=here->BSIM4v4nextInstance)
|
||||
{
|
||||
if (here->BSIM4V4owner != ARCHme) continue;
|
||||
vds = model->BSIM4V4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4V4dNodePrime)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4V4sNodePrime));
|
||||
vgs = model->BSIM4V4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4V4gNodePrime)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4V4sNodePrime));
|
||||
vbs = model->BSIM4V4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4V4bNodePrime)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4V4sNodePrime));
|
||||
vdbs = model->BSIM4V4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4V4dbNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4V4sNodePrime));
|
||||
vsbs = model->BSIM4V4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4V4sbNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4V4sNodePrime));
|
||||
vses = model->BSIM4V4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4V4sNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4V4sNodePrime));
|
||||
vdes = model->BSIM4V4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4V4dNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4V4sNodePrime));
|
||||
if (here->BSIM4v4owner != ARCHme) continue;
|
||||
vds = model->BSIM4v4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4v4dNodePrime)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4v4sNodePrime));
|
||||
vgs = model->BSIM4v4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4v4gNodePrime)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4v4sNodePrime));
|
||||
vbs = model->BSIM4v4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4v4bNodePrime)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4v4sNodePrime));
|
||||
vdbs = model->BSIM4v4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4v4dbNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4v4sNodePrime));
|
||||
vsbs = model->BSIM4v4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4v4sbNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4v4sNodePrime));
|
||||
vses = model->BSIM4v4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4v4sNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4v4sNodePrime));
|
||||
vdes = model->BSIM4v4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4v4dNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4v4sNodePrime));
|
||||
|
||||
vgdo = *(ckt->CKTstate0 + here->BSIM4V4vgs)
|
||||
- *(ckt->CKTstate0 + here->BSIM4V4vds);
|
||||
vgdo = *(ckt->CKTstate0 + here->BSIM4v4vgs)
|
||||
- *(ckt->CKTstate0 + here->BSIM4v4vds);
|
||||
vbd = vbs - vds;
|
||||
vdbd = vdbs - vds;
|
||||
vgd = vgs - vds;
|
||||
|
||||
delvbd = vbd - *(ckt->CKTstate0 + here->BSIM4V4vbd);
|
||||
delvdbd = vdbd - *(ckt->CKTstate0 + here->BSIM4V4vdbd);
|
||||
delvbd = vbd - *(ckt->CKTstate0 + here->BSIM4v4vbd);
|
||||
delvdbd = vdbd - *(ckt->CKTstate0 + here->BSIM4v4vdbd);
|
||||
delvgd = vgd - vgdo;
|
||||
|
||||
delvds = vds - *(ckt->CKTstate0 + here->BSIM4V4vds);
|
||||
delvgs = vgs - *(ckt->CKTstate0 + here->BSIM4V4vgs);
|
||||
delvbs = vbs - *(ckt->CKTstate0 + here->BSIM4V4vbs);
|
||||
delvsbs = vsbs - *(ckt->CKTstate0 + here->BSIM4V4vsbs);
|
||||
delvds = vds - *(ckt->CKTstate0 + here->BSIM4v4vds);
|
||||
delvgs = vgs - *(ckt->CKTstate0 + here->BSIM4v4vgs);
|
||||
delvbs = vbs - *(ckt->CKTstate0 + here->BSIM4v4vbs);
|
||||
delvsbs = vsbs - *(ckt->CKTstate0 + here->BSIM4v4vsbs);
|
||||
|
||||
delvses = vses - (*(ckt->CKTstate0 + here->BSIM4V4vses));
|
||||
vdedo = *(ckt->CKTstate0 + here->BSIM4V4vdes)
|
||||
- *(ckt->CKTstate0 + here->BSIM4V4vds);
|
||||
delvdes = vdes - *(ckt->CKTstate0 + here->BSIM4V4vdes);
|
||||
delvses = vses - (*(ckt->CKTstate0 + here->BSIM4v4vses));
|
||||
vdedo = *(ckt->CKTstate0 + here->BSIM4v4vdes)
|
||||
- *(ckt->CKTstate0 + here->BSIM4v4vds);
|
||||
delvdes = vdes - *(ckt->CKTstate0 + here->BSIM4v4vdes);
|
||||
delvded = vdes - vds - vdedo;
|
||||
|
||||
delvbd_jct = (!here->BSIM4V4rbodyMod) ? delvbd : delvdbd;
|
||||
delvbs_jct = (!here->BSIM4V4rbodyMod) ? delvbs : delvsbs;
|
||||
delvbd_jct = (!here->BSIM4v4rbodyMod) ? delvbd : delvdbd;
|
||||
delvbs_jct = (!here->BSIM4v4rbodyMod) ? delvbs : delvsbs;
|
||||
|
||||
if (here->BSIM4V4mode >= 0)
|
||||
{ Idtot = here->BSIM4V4cd + here->BSIM4V4csub - here->BSIM4V4cbd
|
||||
+ here->BSIM4V4Igidl;
|
||||
cdhat = Idtot - here->BSIM4V4gbd * delvbd_jct
|
||||
+ (here->BSIM4V4gmbs + here->BSIM4V4gbbs + here->BSIM4V4ggidlb) * delvbs
|
||||
+ (here->BSIM4V4gm + here->BSIM4V4gbgs + here->BSIM4V4ggidlg) * delvgs
|
||||
+ (here->BSIM4V4gds + here->BSIM4V4gbds + here->BSIM4V4ggidld) * delvds;
|
||||
if (here->BSIM4v4mode >= 0)
|
||||
{ Idtot = here->BSIM4v4cd + here->BSIM4v4csub - here->BSIM4v4cbd
|
||||
+ here->BSIM4v4Igidl;
|
||||
cdhat = Idtot - here->BSIM4v4gbd * delvbd_jct
|
||||
+ (here->BSIM4v4gmbs + here->BSIM4v4gbbs + here->BSIM4v4ggidlb) * delvbs
|
||||
+ (here->BSIM4v4gm + here->BSIM4v4gbgs + here->BSIM4v4ggidlg) * delvgs
|
||||
+ (here->BSIM4v4gds + here->BSIM4v4gbds + here->BSIM4v4ggidld) * delvds;
|
||||
|
||||
Igstot = here->BSIM4V4Igs + here->BSIM4V4Igcs;
|
||||
cgshat = Igstot + (here->BSIM4V4gIgsg + here->BSIM4V4gIgcsg) * delvgs
|
||||
+ here->BSIM4V4gIgcsd * delvds + here->BSIM4V4gIgcsb * delvbs;
|
||||
Igstot = here->BSIM4v4Igs + here->BSIM4v4Igcs;
|
||||
cgshat = Igstot + (here->BSIM4v4gIgsg + here->BSIM4v4gIgcsg) * delvgs
|
||||
+ here->BSIM4v4gIgcsd * delvds + here->BSIM4v4gIgcsb * delvbs;
|
||||
|
||||
Igdtot = here->BSIM4V4Igd + here->BSIM4V4Igcd;
|
||||
cgdhat = Igdtot + here->BSIM4V4gIgdg * delvgd + here->BSIM4V4gIgcdg * delvgs
|
||||
+ here->BSIM4V4gIgcdd * delvds + here->BSIM4V4gIgcdb * delvbs;
|
||||
Igdtot = here->BSIM4v4Igd + here->BSIM4v4Igcd;
|
||||
cgdhat = Igdtot + here->BSIM4v4gIgdg * delvgd + here->BSIM4v4gIgcdg * delvgs
|
||||
+ here->BSIM4v4gIgcdd * delvds + here->BSIM4v4gIgcdb * delvbs;
|
||||
|
||||
Igbtot = here->BSIM4V4Igb;
|
||||
cgbhat = here->BSIM4V4Igb + here->BSIM4V4gIgbg * delvgs + here->BSIM4V4gIgbd
|
||||
* delvds + here->BSIM4V4gIgbb * delvbs;
|
||||
Igbtot = here->BSIM4v4Igb;
|
||||
cgbhat = here->BSIM4v4Igb + here->BSIM4v4gIgbg * delvgs + here->BSIM4v4gIgbd
|
||||
* delvds + here->BSIM4v4gIgbb * delvbs;
|
||||
}
|
||||
else
|
||||
{ Idtot = here->BSIM4V4cd + here->BSIM4V4cbd - here->BSIM4V4Igidl; /* bugfix */
|
||||
cdhat = Idtot + here->BSIM4V4gbd * delvbd_jct + here->BSIM4V4gmbs
|
||||
* delvbd + here->BSIM4V4gm * delvgd
|
||||
- (here->BSIM4V4gds + here->BSIM4V4ggidls) * delvds
|
||||
- here->BSIM4V4ggidlg * delvgs - here->BSIM4V4ggidlb * delvbs;
|
||||
{ Idtot = here->BSIM4v4cd + here->BSIM4v4cbd - here->BSIM4v4Igidl; /* bugfix */
|
||||
cdhat = Idtot + here->BSIM4v4gbd * delvbd_jct + here->BSIM4v4gmbs
|
||||
* delvbd + here->BSIM4v4gm * delvgd
|
||||
- (here->BSIM4v4gds + here->BSIM4v4ggidls) * delvds
|
||||
- here->BSIM4v4ggidlg * delvgs - here->BSIM4v4ggidlb * delvbs;
|
||||
|
||||
Igstot = here->BSIM4V4Igs + here->BSIM4V4Igcd;
|
||||
cgshat = Igstot + here->BSIM4V4gIgsg * delvgs + here->BSIM4V4gIgcdg * delvgd
|
||||
- here->BSIM4V4gIgcdd * delvds + here->BSIM4V4gIgcdb * delvbd;
|
||||
Igstot = here->BSIM4v4Igs + here->BSIM4v4Igcd;
|
||||
cgshat = Igstot + here->BSIM4v4gIgsg * delvgs + here->BSIM4v4gIgcdg * delvgd
|
||||
- here->BSIM4v4gIgcdd * delvds + here->BSIM4v4gIgcdb * delvbd;
|
||||
|
||||
Igdtot = here->BSIM4V4Igd + here->BSIM4V4Igcs;
|
||||
cgdhat = Igdtot + (here->BSIM4V4gIgdg + here->BSIM4V4gIgcsg) * delvgd
|
||||
- here->BSIM4V4gIgcsd * delvds + here->BSIM4V4gIgcsb * delvbd;
|
||||
Igdtot = here->BSIM4v4Igd + here->BSIM4v4Igcs;
|
||||
cgdhat = Igdtot + (here->BSIM4v4gIgdg + here->BSIM4v4gIgcsg) * delvgd
|
||||
- here->BSIM4v4gIgcsd * delvds + here->BSIM4v4gIgcsb * delvbd;
|
||||
|
||||
Igbtot = here->BSIM4V4Igb;
|
||||
cgbhat = here->BSIM4V4Igb + here->BSIM4V4gIgbg * delvgd - here->BSIM4V4gIgbd
|
||||
* delvds + here->BSIM4V4gIgbb * delvbd;
|
||||
Igbtot = here->BSIM4v4Igb;
|
||||
cgbhat = here->BSIM4v4Igb + here->BSIM4v4gIgbg * delvgd - here->BSIM4v4gIgbd
|
||||
* delvds + here->BSIM4v4gIgbb * delvbd;
|
||||
}
|
||||
|
||||
Isestot = here->BSIM4V4gstot * (*(ckt->CKTstate0 + here->BSIM4V4vses));
|
||||
cseshat = Isestot + here->BSIM4V4gstot * delvses
|
||||
+ here->BSIM4V4gstotd * delvds + here->BSIM4V4gstotg * delvgs
|
||||
+ here->BSIM4V4gstotb * delvbs;
|
||||
Isestot = here->BSIM4v4gstot * (*(ckt->CKTstate0 + here->BSIM4v4vses));
|
||||
cseshat = Isestot + here->BSIM4v4gstot * delvses
|
||||
+ here->BSIM4v4gstotd * delvds + here->BSIM4v4gstotg * delvgs
|
||||
+ here->BSIM4v4gstotb * delvbs;
|
||||
|
||||
Idedtot = here->BSIM4V4gdtot * vdedo;
|
||||
cdedhat = Idedtot + here->BSIM4V4gdtot * delvded
|
||||
+ here->BSIM4V4gdtotd * delvds + here->BSIM4V4gdtotg * delvgs
|
||||
+ here->BSIM4V4gdtotb * delvbs;
|
||||
Idedtot = here->BSIM4v4gdtot * vdedo;
|
||||
cdedhat = Idedtot + here->BSIM4v4gdtot * delvded
|
||||
+ here->BSIM4v4gdtotd * delvds + here->BSIM4v4gdtotg * delvgs
|
||||
+ here->BSIM4v4gdtotb * delvbs;
|
||||
|
||||
/*
|
||||
* Check convergence
|
||||
*/
|
||||
|
||||
if ((here->BSIM4V4off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
||||
if ((here->BSIM4v4off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
||||
{ tol0 = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot))
|
||||
+ ckt->CKTabstol;
|
||||
tol1 = ckt->CKTreltol * MAX(fabs(cseshat), fabs(Isestot))
|
||||
|
|
@ -170,21 +170,21 @@ double tol0, tol1, tol2, tol3, tol4, tol5, tol6;
|
|||
return(OK);
|
||||
}
|
||||
|
||||
Ibtot = here->BSIM4V4cbs + here->BSIM4V4cbd
|
||||
- here->BSIM4V4Igidl - here->BSIM4V4Igisl - here->BSIM4V4csub;
|
||||
if (here->BSIM4V4mode >= 0)
|
||||
{ cbhat = Ibtot + here->BSIM4V4gbd * delvbd_jct
|
||||
+ here->BSIM4V4gbs * delvbs_jct - (here->BSIM4V4gbbs + here->BSIM4V4ggidlb)
|
||||
* delvbs - (here->BSIM4V4gbgs + here->BSIM4V4ggidlg) * delvgs
|
||||
- (here->BSIM4V4gbds + here->BSIM4V4ggidld) * delvds
|
||||
- here->BSIM4V4ggislg * delvgd - here->BSIM4V4ggislb* delvbd + here->BSIM4V4ggisls * delvds ;
|
||||
Ibtot = here->BSIM4v4cbs + here->BSIM4v4cbd
|
||||
- here->BSIM4v4Igidl - here->BSIM4v4Igisl - here->BSIM4v4csub;
|
||||
if (here->BSIM4v4mode >= 0)
|
||||
{ cbhat = Ibtot + here->BSIM4v4gbd * delvbd_jct
|
||||
+ here->BSIM4v4gbs * delvbs_jct - (here->BSIM4v4gbbs + here->BSIM4v4ggidlb)
|
||||
* delvbs - (here->BSIM4v4gbgs + here->BSIM4v4ggidlg) * delvgs
|
||||
- (here->BSIM4v4gbds + here->BSIM4v4ggidld) * delvds
|
||||
- here->BSIM4v4ggislg * delvgd - here->BSIM4v4ggislb* delvbd + here->BSIM4v4ggisls * delvds ;
|
||||
}
|
||||
else
|
||||
{ cbhat = Ibtot + here->BSIM4V4gbs * delvbs_jct + here->BSIM4V4gbd
|
||||
* delvbd_jct - (here->BSIM4V4gbbs + here->BSIM4V4ggislb) * delvbd
|
||||
- (here->BSIM4V4gbgs + here->BSIM4V4ggislg) * delvgd
|
||||
+ (here->BSIM4V4gbds + here->BSIM4V4ggisld - here->BSIM4V4ggidls) * delvds
|
||||
- here->BSIM4V4ggidlg * delvgs - here->BSIM4V4ggidlb * delvbs;
|
||||
{ cbhat = Ibtot + here->BSIM4v4gbs * delvbs_jct + here->BSIM4v4gbd
|
||||
* delvbd_jct - (here->BSIM4v4gbbs + here->BSIM4v4ggislb) * delvbd
|
||||
- (here->BSIM4v4gbgs + here->BSIM4v4ggislg) * delvgd
|
||||
+ (here->BSIM4v4gbds + here->BSIM4v4ggisld - here->BSIM4v4ggidls) * delvds
|
||||
- here->BSIM4v4ggidlg * delvgs - here->BSIM4v4ggidlb * delvbs;
|
||||
}
|
||||
tol6 = ckt->CKTreltol * MAX(fabs(cbhat),
|
||||
fabs(Ibtot)) + ckt->CKTabstol;
|
||||
|
|
|
|||
|
|
@ -16,25 +16,25 @@
|
|||
|
||||
|
||||
int
|
||||
BSIM4V4delete(inModel,name,inInst)
|
||||
BSIM4v4delete(inModel,name,inInst)
|
||||
GENmodel *inModel;
|
||||
IFuid name;
|
||||
GENinstance **inInst;
|
||||
{
|
||||
BSIM4V4instance **fast = (BSIM4V4instance**)inInst;
|
||||
BSIM4V4model *model = (BSIM4V4model*)inModel;
|
||||
BSIM4V4instance **prev = NULL;
|
||||
BSIM4V4instance *here;
|
||||
BSIM4v4instance **fast = (BSIM4v4instance**)inInst;
|
||||
BSIM4v4model *model = (BSIM4v4model*)inModel;
|
||||
BSIM4v4instance **prev = NULL;
|
||||
BSIM4v4instance *here;
|
||||
|
||||
for (; model ; model = model->BSIM4V4nextModel)
|
||||
{ prev = &(model->BSIM4V4instances);
|
||||
for (; model ; model = model->BSIM4v4nextModel)
|
||||
{ prev = &(model->BSIM4v4instances);
|
||||
for (here = *prev; here ; here = *prev)
|
||||
{ if (here->BSIM4V4name == name || (fast && here==*fast))
|
||||
{ *prev= here->BSIM4V4nextInstance;
|
||||
{ if (here->BSIM4v4name == name || (fast && here==*fast))
|
||||
{ *prev= here->BSIM4v4nextInstance;
|
||||
FREE(here);
|
||||
return(OK);
|
||||
}
|
||||
prev = &(here->BSIM4V4nextInstance);
|
||||
prev = &(here->BSIM4v4nextInstance);
|
||||
}
|
||||
}
|
||||
return(E_NODEV);
|
||||
|
|
|
|||
|
|
@ -13,20 +13,20 @@
|
|||
#include "suffix.h"
|
||||
|
||||
void
|
||||
BSIM4V4destroy(inModel)
|
||||
BSIM4v4destroy(inModel)
|
||||
GENmodel **inModel;
|
||||
{
|
||||
BSIM4V4model **model = (BSIM4V4model**)inModel;
|
||||
BSIM4V4instance *here;
|
||||
BSIM4V4instance *prev = NULL;
|
||||
BSIM4V4model *mod = *model;
|
||||
BSIM4V4model *oldmod = NULL;
|
||||
BSIM4v4model **model = (BSIM4v4model**)inModel;
|
||||
BSIM4v4instance *here;
|
||||
BSIM4v4instance *prev = NULL;
|
||||
BSIM4v4model *mod = *model;
|
||||
BSIM4v4model *oldmod = NULL;
|
||||
|
||||
for (; mod ; mod = mod->BSIM4V4nextModel)
|
||||
for (; mod ; mod = mod->BSIM4v4nextModel)
|
||||
{ if(oldmod) FREE(oldmod);
|
||||
oldmod = mod;
|
||||
prev = (BSIM4V4instance *)NULL;
|
||||
for (here = mod->BSIM4V4instances; here; here = here->BSIM4V4nextInstance)
|
||||
prev = (BSIM4v4instance *)NULL;
|
||||
for (here = mod->BSIM4v4instances; here; here = here->BSIM4v4nextInstance)
|
||||
{ if(prev) FREE(prev);
|
||||
prev = here;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -13,17 +13,17 @@
|
|||
/*
|
||||
* WDLiu:
|
||||
* This subrutine is a special module to process the geometry dependent
|
||||
* parasitics for BSIM4V4, which calculates Ps, Pd, As, Ad, and Rs and Rd
|
||||
* parasitics for BSIM4v4, which calculates Ps, Pd, As, Ad, and Rs and Rd
|
||||
* for multi-fingers and varous GEO and RGEO options.
|
||||
*/
|
||||
|
||||
int
|
||||
BSIM4V4RdsEndIso(double, double, double, double, double, double, int, int, double *);
|
||||
BSIM4v4RdsEndIso(double, double, double, double, double, double, int, int, double *);
|
||||
int
|
||||
BSIM4V4RdsEndSha(double, double, double, double, double, double, int, int, double *);
|
||||
BSIM4v4RdsEndSha(double, double, double, double, double, double, int, int, double *);
|
||||
|
||||
int
|
||||
BSIM4V4NumFingerDiff(nf, minSD, nuIntD, nuEndD, nuIntS, nuEndS)
|
||||
BSIM4v4NumFingerDiff(nf, minSD, nuIntD, nuEndD, nuIntS, nuEndS)
|
||||
int minSD;
|
||||
double nf, *nuIntD, *nuEndD, *nuIntS, *nuEndS;
|
||||
{
|
||||
|
|
@ -52,7 +52,7 @@ return 0;
|
|||
|
||||
|
||||
int
|
||||
BSIM4V4PAeffGeo(nf, geo, minSD, Weffcj, DMCG, DMCI, DMDG, Ps, Pd, As, Ad)
|
||||
BSIM4v4PAeffGeo(nf, geo, minSD, Weffcj, DMCG, DMCI, DMDG, Ps, Pd, As, Ad)
|
||||
int geo, minSD;
|
||||
double Weffcj, DMCG, DMCI, DMDG;
|
||||
double nf, *Ps, *Pd, *As, *Ad;
|
||||
|
|
@ -63,7 +63,7 @@ double PDiso, PDsha, PDmer, PSiso, PSsha, PSmer;
|
|||
double nuIntD = 0.0, nuEndD = 0.0, nuIntS = 0.0, nuEndS = 0.0;
|
||||
|
||||
if (geo < 9) /* For geo = 9 and 10, the numbers of S/D diffusions already known */
|
||||
BSIM4V4NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS);
|
||||
BSIM4v4NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS);
|
||||
|
||||
T0 = DMCG + DMCI;
|
||||
T1 = DMCG + DMCG;
|
||||
|
|
@ -152,7 +152,7 @@ return 0;
|
|||
|
||||
|
||||
int
|
||||
BSIM4V4RdseffGeo(nf, geo, rgeo, minSD, Weffcj, Rsh, DMCG, DMCI, DMDG, Type, Rtot)
|
||||
BSIM4v4RdseffGeo(nf, geo, rgeo, minSD, Weffcj, Rsh, DMCG, DMCI, DMDG, Type, Rtot)
|
||||
int geo, rgeo, minSD, Type;
|
||||
double nf, Weffcj, Rsh, DMCG, DMCI, DMDG;
|
||||
double *Rtot;
|
||||
|
|
@ -161,7 +161,7 @@ double Rint=0.0, Rend = 0.0;
|
|||
double nuIntD = 0.0, nuEndD = 0.0, nuIntS = 0.0, nuEndS = 0.0;
|
||||
|
||||
if (geo < 9) /* since geo = 9 and 10 only happen when nf = even */
|
||||
{ BSIM4V4NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS);
|
||||
{ BSIM4v4NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS);
|
||||
|
||||
/* Internal S/D resistance -- assume shared S or D and all wide contacts */
|
||||
if (Type == 1)
|
||||
|
|
@ -181,47 +181,47 @@ double nuIntD = 0.0, nuEndD = 0.0, nuIntS = 0.0, nuEndS = 0.0;
|
|||
/* End S/D resistance -- geo dependent */
|
||||
switch(geo)
|
||||
{ case 0:
|
||||
if (Type == 1) BSIM4V4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
if (Type == 1) BSIM4v4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndS, rgeo, 1, &Rend);
|
||||
else BSIM4V4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
else BSIM4v4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndD, rgeo, 0, &Rend);
|
||||
break;
|
||||
case 1:
|
||||
if (Type == 1) BSIM4V4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
if (Type == 1) BSIM4v4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndS, rgeo, 1, &Rend);
|
||||
else BSIM4V4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
else BSIM4v4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndD, rgeo, 0, &Rend);
|
||||
break;
|
||||
case 2:
|
||||
if (Type == 1) BSIM4V4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
if (Type == 1) BSIM4v4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndS, rgeo, 1, &Rend);
|
||||
else BSIM4V4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
else BSIM4v4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndD, rgeo, 0, &Rend);
|
||||
break;
|
||||
case 3:
|
||||
if (Type == 1) BSIM4V4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
if (Type == 1) BSIM4v4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndS, rgeo, 1, &Rend);
|
||||
else BSIM4V4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
else BSIM4v4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndD, rgeo, 0, &Rend);
|
||||
break;
|
||||
case 4:
|
||||
if (Type == 1) BSIM4V4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
if (Type == 1) BSIM4v4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndS, rgeo, 1, &Rend);
|
||||
else Rend = Rsh * DMDG / Weffcj;
|
||||
break;
|
||||
case 5:
|
||||
if (Type == 1) BSIM4V4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
if (Type == 1) BSIM4v4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndS, rgeo, 1, &Rend);
|
||||
else Rend = Rsh * DMDG / (Weffcj * nuEndD);
|
||||
break;
|
||||
case 6:
|
||||
if (Type == 1) Rend = Rsh * DMDG / Weffcj;
|
||||
else BSIM4V4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
else BSIM4v4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndD, rgeo, 0, &Rend);
|
||||
break;
|
||||
case 7:
|
||||
if (Type == 1) Rend = Rsh * DMDG / (Weffcj * nuEndS);
|
||||
else BSIM4V4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
else BSIM4v4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndD, rgeo, 0, &Rend);
|
||||
break;
|
||||
case 8:
|
||||
|
|
@ -270,7 +270,7 @@ return 0;
|
|||
|
||||
|
||||
int
|
||||
BSIM4V4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, nuEnd, rgeo, Type, Rend)
|
||||
BSIM4v4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG, nuEnd, rgeo, Type, Rend)
|
||||
double Weffcj, Rsh, DMCG, DMCI, DMDG;
|
||||
int rgeo, Type;
|
||||
double nuEnd, *Rend;
|
||||
|
|
@ -328,7 +328,7 @@ return 0;
|
|||
|
||||
|
||||
int
|
||||
BSIM4V4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, nuEnd, rgeo, Type, Rend)
|
||||
BSIM4v4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG, nuEnd, rgeo, Type, Rend)
|
||||
double Weffcj, Rsh, DMCG, DMCI, DMDG;
|
||||
int rgeo, Type;
|
||||
double nuEnd, *Rend;
|
||||
|
|
|
|||
|
|
@ -16,27 +16,27 @@
|
|||
|
||||
|
||||
int
|
||||
BSIM4V4getic(inModel,ckt)
|
||||
BSIM4v4getic(inModel,ckt)
|
||||
GENmodel *inModel;
|
||||
CKTcircuit *ckt;
|
||||
{
|
||||
BSIM4V4model *model = (BSIM4V4model*)inModel;
|
||||
BSIM4V4instance *here;
|
||||
BSIM4v4model *model = (BSIM4v4model*)inModel;
|
||||
BSIM4v4instance *here;
|
||||
|
||||
for (; model ; model = model->BSIM4V4nextModel)
|
||||
{ for (here = model->BSIM4V4instances; here; here = here->BSIM4V4nextInstance)
|
||||
{ if (here->BSIM4V4owner != ARCHme) continue;
|
||||
if (!here->BSIM4V4icVDSGiven)
|
||||
{ here->BSIM4V4icVDS = *(ckt->CKTrhs + here->BSIM4V4dNode)
|
||||
- *(ckt->CKTrhs + here->BSIM4V4sNode);
|
||||
for (; model ; model = model->BSIM4v4nextModel)
|
||||
{ for (here = model->BSIM4v4instances; here; here = here->BSIM4v4nextInstance)
|
||||
{ if (here->BSIM4v4owner != ARCHme) continue;
|
||||
if (!here->BSIM4v4icVDSGiven)
|
||||
{ here->BSIM4v4icVDS = *(ckt->CKTrhs + here->BSIM4v4dNode)
|
||||
- *(ckt->CKTrhs + here->BSIM4v4sNode);
|
||||
}
|
||||
if (!here->BSIM4V4icVGSGiven)
|
||||
{ here->BSIM4V4icVGS = *(ckt->CKTrhs + here->BSIM4V4gNodeExt)
|
||||
- *(ckt->CKTrhs + here->BSIM4V4sNode);
|
||||
if (!here->BSIM4v4icVGSGiven)
|
||||
{ here->BSIM4v4icVGS = *(ckt->CKTrhs + here->BSIM4v4gNodeExt)
|
||||
- *(ckt->CKTrhs + here->BSIM4v4sNode);
|
||||
}
|
||||
if(!here->BSIM4V4icVBSGiven)
|
||||
{ here->BSIM4V4icVBS = *(ckt->CKTrhs + here->BSIM4V4bNode)
|
||||
- *(ckt->CKTrhs + here->BSIM4V4sNode);
|
||||
if(!here->BSIM4v4icVBSGiven)
|
||||
{ here->BSIM4v4icVBS = *(ckt->CKTrhs + here->BSIM4v4bNode)
|
||||
- *(ckt->CKTrhs + here->BSIM4v4sNode);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -14,20 +14,20 @@
|
|||
#include "suffix.h"
|
||||
|
||||
int
|
||||
BSIM4V4mDelete(inModel,modname,kill)
|
||||
BSIM4v4mDelete(inModel,modname,kill)
|
||||
GENmodel **inModel;
|
||||
IFuid modname;
|
||||
GENmodel *kill;
|
||||
{
|
||||
BSIM4V4model **model = (BSIM4V4model**)inModel;
|
||||
BSIM4V4model *modfast = (BSIM4V4model*)kill;
|
||||
BSIM4V4instance *here;
|
||||
BSIM4V4instance *prev = NULL;
|
||||
BSIM4V4model **oldmod;
|
||||
BSIM4v4model **model = (BSIM4v4model**)inModel;
|
||||
BSIM4v4model *modfast = (BSIM4v4model*)kill;
|
||||
BSIM4v4instance *here;
|
||||
BSIM4v4instance *prev = NULL;
|
||||
BSIM4v4model **oldmod;
|
||||
|
||||
oldmod = model;
|
||||
for (; *model ; model = &((*model)->BSIM4V4nextModel))
|
||||
{ if ((*model)->BSIM4V4modName == modname ||
|
||||
for (; *model ; model = &((*model)->BSIM4v4nextModel))
|
||||
{ if ((*model)->BSIM4v4modName == modname ||
|
||||
(modfast && *model == modfast))
|
||||
goto delgot;
|
||||
oldmod = model;
|
||||
|
|
@ -35,8 +35,8 @@ BSIM4V4model **oldmod;
|
|||
return(E_NOMOD);
|
||||
|
||||
delgot:
|
||||
*oldmod = (*model)->BSIM4V4nextModel; /* cut deleted device out of list */
|
||||
for (here = (*model)->BSIM4V4instances; here; here = here->BSIM4V4nextInstance)
|
||||
*oldmod = (*model)->BSIM4v4nextModel; /* cut deleted device out of list */
|
||||
for (here = (*model)->BSIM4v4instances; here; here = here->BSIM4v4nextInstance)
|
||||
{ if(prev) FREE(prev);
|
||||
prev = here;
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -32,64 +32,64 @@ extern double Nintegrate();
|
|||
*/
|
||||
|
||||
static double
|
||||
Eval1ovFNoise(Vds, model, here, freq, temp)
|
||||
BSIM4v4Eval1ovFNoise(Vds, model, here, freq, temp)
|
||||
double Vds, freq, temp;
|
||||
BSIM4V4model *model;
|
||||
BSIM4V4instance *here;
|
||||
BSIM4v4model *model;
|
||||
BSIM4v4instance *here;
|
||||
{
|
||||
struct bsim4SizeDependParam *pParam;
|
||||
double cd, esat, DelClm, EffFreq, N0, Nl, Leff, Leffsq;
|
||||
double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi;
|
||||
|
||||
pParam = here->pParam;
|
||||
cd = fabs(here->BSIM4V4cd);
|
||||
Leff = pParam->BSIM4V4leff - 2.0 * model->BSIM4V4lintnoi;
|
||||
cd = fabs(here->BSIM4v4cd);
|
||||
Leff = pParam->BSIM4v4leff - 2.0 * model->BSIM4v4lintnoi;
|
||||
Leffsq = Leff * Leff;
|
||||
esat = 2.0 * here->BSIM4V4vsattemp / here->BSIM4V4ueff;
|
||||
if(model->BSIM4V4em<=0.0) DelClm = 0.0; /* flicker noise modified -JX */
|
||||
esat = 2.0 * here->BSIM4v4vsattemp / here->BSIM4v4ueff;
|
||||
if(model->BSIM4v4em<=0.0) DelClm = 0.0; /* flicker noise modified -JX */
|
||||
else {
|
||||
T0 = ((((Vds - here->BSIM4V4Vdseff) / pParam->BSIM4V4litl)
|
||||
+ model->BSIM4V4em) / esat);
|
||||
DelClm = pParam->BSIM4V4litl * log (MAX(T0, N_MINLOG));
|
||||
T0 = ((((Vds - here->BSIM4v4Vdseff) / pParam->BSIM4v4litl)
|
||||
+ model->BSIM4v4em) / esat);
|
||||
DelClm = pParam->BSIM4v4litl * log (MAX(T0, N_MINLOG));
|
||||
}
|
||||
EffFreq = pow(freq, model->BSIM4V4ef);
|
||||
T1 = CHARGE * CHARGE * CONSTboltz * cd * temp * here->BSIM4V4ueff;
|
||||
T2 = 1.0e10 * EffFreq * here->BSIM4V4Abulk * model->BSIM4V4coxe * Leffsq;
|
||||
N0 = model->BSIM4V4coxe * here->BSIM4V4Vgsteff / CHARGE;
|
||||
Nl = model->BSIM4V4coxe * here->BSIM4V4Vgsteff
|
||||
* (1.0 - here->BSIM4V4AbovVgst2Vtm * here->BSIM4V4Vdseff) / CHARGE;
|
||||
EffFreq = pow(freq, model->BSIM4v4ef);
|
||||
T1 = CHARGE * CHARGE * CONSTboltz * cd * temp * here->BSIM4v4ueff;
|
||||
T2 = 1.0e10 * EffFreq * here->BSIM4v4Abulk * model->BSIM4v4coxe * Leffsq;
|
||||
N0 = model->BSIM4v4coxe * here->BSIM4v4Vgsteff / CHARGE;
|
||||
Nl = model->BSIM4v4coxe * here->BSIM4v4Vgsteff
|
||||
* (1.0 - here->BSIM4v4AbovVgst2Vtm * here->BSIM4v4Vdseff) / CHARGE;
|
||||
|
||||
T3 = model->BSIM4V4oxideTrapDensityA
|
||||
* log(MAX(((N0 + here->BSIM4V4nstar) / (Nl + here->BSIM4V4nstar)), N_MINLOG));
|
||||
T4 = model->BSIM4V4oxideTrapDensityB * (N0 - Nl);
|
||||
T5 = model->BSIM4V4oxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl);
|
||||
T3 = model->BSIM4v4oxideTrapDensityA
|
||||
* log(MAX(((N0 + here->BSIM4v4nstar) / (Nl + here->BSIM4v4nstar)), N_MINLOG));
|
||||
T4 = model->BSIM4v4oxideTrapDensityB * (N0 - Nl);
|
||||
T5 = model->BSIM4v4oxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl);
|
||||
|
||||
T6 = CONSTboltz * temp * cd * cd;
|
||||
T7 = 1.0e10 * EffFreq * Leffsq * pParam->BSIM4V4weff;
|
||||
T8 = model->BSIM4V4oxideTrapDensityA + model->BSIM4V4oxideTrapDensityB * Nl
|
||||
+ model->BSIM4V4oxideTrapDensityC * Nl * Nl;
|
||||
T9 = (Nl + here->BSIM4V4nstar) * (Nl + here->BSIM4V4nstar);
|
||||
T7 = 1.0e10 * EffFreq * Leffsq * pParam->BSIM4v4weff;
|
||||
T8 = model->BSIM4v4oxideTrapDensityA + model->BSIM4v4oxideTrapDensityB * Nl
|
||||
+ model->BSIM4v4oxideTrapDensityC * Nl * Nl;
|
||||
T9 = (Nl + here->BSIM4v4nstar) * (Nl + here->BSIM4v4nstar);
|
||||
Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9;
|
||||
return Ssi;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
BSIM4V4noise (mode, operation, inModel, ckt, data, OnDens)
|
||||
BSIM4v4noise (mode, operation, inModel, ckt, data, OnDens)
|
||||
int mode, operation;
|
||||
GENmodel *inModel;
|
||||
CKTcircuit *ckt;
|
||||
Ndata *data;
|
||||
double *OnDens;
|
||||
{
|
||||
BSIM4V4model *model = (BSIM4V4model *)inModel;
|
||||
BSIM4V4instance *here;
|
||||
BSIM4v4model *model = (BSIM4v4model *)inModel;
|
||||
BSIM4v4instance *here;
|
||||
struct bsim4SizeDependParam *pParam;
|
||||
char name[N_MXVLNTH];
|
||||
double tempOnoise;
|
||||
double tempInoise;
|
||||
double noizDens[BSIM4V4NSRCS];
|
||||
double lnNdens[BSIM4V4NSRCS];
|
||||
double noizDens[BSIM4v4NSRCS];
|
||||
double lnNdens[BSIM4v4NSRCS];
|
||||
|
||||
double T0, T1, T2, T5, T10, T11;
|
||||
double Vds, Ssi, Swi;
|
||||
|
|
@ -100,7 +100,7 @@ double m;
|
|||
int i;
|
||||
|
||||
/* define the names of the noise sources */
|
||||
static char *BSIM4V4nNames[BSIM4V4NSRCS] =
|
||||
static char *BSIM4v4nNames[BSIM4v4NSRCS] =
|
||||
{ /* Note that we have to keep the order */
|
||||
".rd", /* noise due to rd */
|
||||
".rs", /* noise due to rs */
|
||||
|
|
@ -118,9 +118,9 @@ int i;
|
|||
"" /* total transistor noise */
|
||||
};
|
||||
|
||||
for (; model != NULL; model = model->BSIM4V4nextModel)
|
||||
{ for (here = model->BSIM4V4instances; here != NULL;
|
||||
here = here->BSIM4V4nextInstance)
|
||||
for (; model != NULL; model = model->BSIM4v4nextModel)
|
||||
{ for (here = model->BSIM4v4instances; here != NULL;
|
||||
here = here->BSIM4v4nextInstance)
|
||||
{ pParam = here->pParam;
|
||||
switch (operation)
|
||||
{ case N_OPEN:
|
||||
|
|
@ -130,10 +130,10 @@ int i;
|
|||
if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0)
|
||||
{ switch (mode)
|
||||
{ case N_DENS:
|
||||
for (i = 0; i < BSIM4V4NSRCS; i++)
|
||||
for (i = 0; i < BSIM4v4NSRCS; i++)
|
||||
{ (void) sprintf(name, "onoise.%s%s",
|
||||
here->BSIM4V4name,
|
||||
BSIM4V4nNames[i]);
|
||||
here->BSIM4v4name,
|
||||
BSIM4v4nNames[i]);
|
||||
data->namelist = (IFuid *) trealloc(
|
||||
(char *) data->namelist,
|
||||
(data->numPlots + 1)
|
||||
|
|
@ -148,10 +148,10 @@ int i;
|
|||
}
|
||||
break;
|
||||
case INT_NOIZ:
|
||||
for (i = 0; i < BSIM4V4NSRCS; i++)
|
||||
for (i = 0; i < BSIM4v4NSRCS; i++)
|
||||
{ (void) sprintf(name, "onoise_total.%s%s",
|
||||
here->BSIM4V4name,
|
||||
BSIM4V4nNames[i]);
|
||||
here->BSIM4v4name,
|
||||
BSIM4v4nNames[i]);
|
||||
data->namelist = (IFuid *) trealloc(
|
||||
(char *) data->namelist,
|
||||
(data->numPlots + 1)
|
||||
|
|
@ -165,8 +165,8 @@ int i;
|
|||
/* we've added one more plot */
|
||||
|
||||
(void) sprintf(name, "inoise_total.%s%s",
|
||||
here->BSIM4V4name,
|
||||
BSIM4V4nNames[i]);
|
||||
here->BSIM4v4name,
|
||||
BSIM4v4nNames[i]);
|
||||
data->namelist = (IFuid *) trealloc(
|
||||
(char *) data->namelist,
|
||||
(data->numPlots + 1)
|
||||
|
|
@ -184,221 +184,221 @@ int i;
|
|||
}
|
||||
break;
|
||||
case N_CALC:
|
||||
m = here->BSIM4V4m;
|
||||
m = here->BSIM4v4m;
|
||||
switch (mode)
|
||||
{ case N_DENS:
|
||||
if (model->BSIM4V4tnoiMod == 0)
|
||||
{ if (model->BSIM4V4rdsMod == 0)
|
||||
{ gspr = here->BSIM4V4sourceConductance;
|
||||
gdpr = here->BSIM4V4drainConductance;
|
||||
if (here->BSIM4V4grdsw > 0.0)
|
||||
tmp = 1.0 / here->BSIM4V4grdsw; /* tmp used below */
|
||||
if (model->BSIM4v4tnoiMod == 0)
|
||||
{ if (model->BSIM4v4rdsMod == 0)
|
||||
{ gspr = here->BSIM4v4sourceConductance;
|
||||
gdpr = here->BSIM4v4drainConductance;
|
||||
if (here->BSIM4v4grdsw > 0.0)
|
||||
tmp = 1.0 / here->BSIM4v4grdsw; /* tmp used below */
|
||||
else
|
||||
tmp = 0.0;
|
||||
}
|
||||
else
|
||||
{ gspr = here->BSIM4V4gstot;
|
||||
gdpr = here->BSIM4V4gdtot;
|
||||
{ gspr = here->BSIM4v4gstot;
|
||||
gdpr = here->BSIM4v4gdtot;
|
||||
tmp = 0.0;
|
||||
}
|
||||
}
|
||||
else
|
||||
{ T5 = here->BSIM4V4Vgsteff / here->BSIM4V4EsatL;
|
||||
{ T5 = here->BSIM4v4Vgsteff / here->BSIM4v4EsatL;
|
||||
T5 *= T5;
|
||||
npart_beta = model->BSIM4V4rnoia * (1.0 + T5
|
||||
* model->BSIM4V4tnoia * pParam->BSIM4V4leff);
|
||||
npart_theta = model->BSIM4V4rnoib * (1.0 + T5
|
||||
* model->BSIM4V4tnoib * pParam->BSIM4V4leff);
|
||||
npart_beta = model->BSIM4v4rnoia * (1.0 + T5
|
||||
* model->BSIM4v4tnoia * pParam->BSIM4v4leff);
|
||||
npart_theta = model->BSIM4v4rnoib * (1.0 + T5
|
||||
* model->BSIM4v4tnoib * pParam->BSIM4v4leff);
|
||||
|
||||
if (model->BSIM4V4rdsMod == 0)
|
||||
{ gspr = here->BSIM4V4sourceConductance;
|
||||
gdpr = here->BSIM4V4drainConductance;
|
||||
if (model->BSIM4v4rdsMod == 0)
|
||||
{ gspr = here->BSIM4v4sourceConductance;
|
||||
gdpr = here->BSIM4v4drainConductance;
|
||||
}
|
||||
else
|
||||
{ gspr = here->BSIM4V4gstot;
|
||||
gdpr = here->BSIM4V4gdtot;
|
||||
{ gspr = here->BSIM4v4gstot;
|
||||
gdpr = here->BSIM4v4gdtot;
|
||||
}
|
||||
|
||||
if ((*(ckt->CKTstates[0] + here->BSIM4V4vds)) >= 0.0)
|
||||
if ((*(ckt->CKTstates[0] + here->BSIM4v4vds)) >= 0.0)
|
||||
gspr = gspr / (1.0 + npart_theta * npart_theta * gspr
|
||||
/ here->BSIM4V4IdovVds); /* bugfix */
|
||||
/ here->BSIM4v4IdovVds); /* bugfix */
|
||||
else
|
||||
gdpr = gdpr / (1.0 + npart_theta * npart_theta * gdpr
|
||||
/ here->BSIM4V4IdovVds);
|
||||
/ here->BSIM4v4IdovVds);
|
||||
}
|
||||
|
||||
NevalSrc(&noizDens[BSIM4V4RDNOIZ],
|
||||
&lnNdens[BSIM4V4RDNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4V4dNodePrime, here->BSIM4V4dNode,
|
||||
NevalSrc(&noizDens[BSIM4v4RDNOIZ],
|
||||
&lnNdens[BSIM4v4RDNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v4dNodePrime, here->BSIM4v4dNode,
|
||||
gdpr * m);
|
||||
|
||||
NevalSrc(&noizDens[BSIM4V4RSNOIZ],
|
||||
&lnNdens[BSIM4V4RSNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4V4sNodePrime, here->BSIM4V4sNode,
|
||||
NevalSrc(&noizDens[BSIM4v4RSNOIZ],
|
||||
&lnNdens[BSIM4v4RSNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v4sNodePrime, here->BSIM4v4sNode,
|
||||
gspr * m);
|
||||
|
||||
|
||||
if ((here->BSIM4V4rgateMod == 1) || (here->BSIM4V4rgateMod == 2))
|
||||
{ NevalSrc(&noizDens[BSIM4V4RGNOIZ],
|
||||
&lnNdens[BSIM4V4RGNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4V4gNodePrime, here->BSIM4V4gNodeExt,
|
||||
here->BSIM4V4grgeltd * m);
|
||||
if ((here->BSIM4v4rgateMod == 1) || (here->BSIM4v4rgateMod == 2))
|
||||
{ NevalSrc(&noizDens[BSIM4v4RGNOIZ],
|
||||
&lnNdens[BSIM4v4RGNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v4gNodePrime, here->BSIM4v4gNodeExt,
|
||||
here->BSIM4v4grgeltd * m);
|
||||
}
|
||||
else if (here->BSIM4V4rgateMod == 3)
|
||||
{ NevalSrc(&noizDens[BSIM4V4RGNOIZ],
|
||||
&lnNdens[BSIM4V4RGNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4V4gNodeMid, here->BSIM4V4gNodeExt,
|
||||
here->BSIM4V4grgeltd * m);
|
||||
else if (here->BSIM4v4rgateMod == 3)
|
||||
{ NevalSrc(&noizDens[BSIM4v4RGNOIZ],
|
||||
&lnNdens[BSIM4v4RGNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v4gNodeMid, here->BSIM4v4gNodeExt,
|
||||
here->BSIM4v4grgeltd * m);
|
||||
}
|
||||
else
|
||||
{ noizDens[BSIM4V4RGNOIZ] = 0.0;
|
||||
lnNdens[BSIM4V4RGNOIZ] =
|
||||
log(MAX(noizDens[BSIM4V4RGNOIZ], N_MINLOG));
|
||||
{ noizDens[BSIM4v4RGNOIZ] = 0.0;
|
||||
lnNdens[BSIM4v4RGNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v4RGNOIZ], N_MINLOG));
|
||||
}
|
||||
|
||||
|
||||
if (here->BSIM4V4rbodyMod)
|
||||
{ NevalSrc(&noizDens[BSIM4V4RBPSNOIZ],
|
||||
&lnNdens[BSIM4V4RBPSNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4V4bNodePrime, here->BSIM4V4sbNode,
|
||||
here->BSIM4V4grbps * m);
|
||||
NevalSrc(&noizDens[BSIM4V4RBPDNOIZ],
|
||||
&lnNdens[BSIM4V4RBPDNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4V4bNodePrime, here->BSIM4V4dbNode,
|
||||
here->BSIM4V4grbpd * m);
|
||||
NevalSrc(&noizDens[BSIM4V4RBPBNOIZ],
|
||||
&lnNdens[BSIM4V4RBPBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4V4bNodePrime, here->BSIM4V4bNode,
|
||||
here->BSIM4V4grbpb * m);
|
||||
NevalSrc(&noizDens[BSIM4V4RBSBNOIZ],
|
||||
&lnNdens[BSIM4V4RBSBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4V4bNode, here->BSIM4V4sbNode,
|
||||
here->BSIM4V4grbsb * m);
|
||||
NevalSrc(&noizDens[BSIM4V4RBDBNOIZ],
|
||||
&lnNdens[BSIM4V4RBDBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4V4bNode, here->BSIM4V4dbNode,
|
||||
here->BSIM4V4grbdb * m);
|
||||
if (here->BSIM4v4rbodyMod)
|
||||
{ NevalSrc(&noizDens[BSIM4v4RBPSNOIZ],
|
||||
&lnNdens[BSIM4v4RBPSNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v4bNodePrime, here->BSIM4v4sbNode,
|
||||
here->BSIM4v4grbps * m);
|
||||
NevalSrc(&noizDens[BSIM4v4RBPDNOIZ],
|
||||
&lnNdens[BSIM4v4RBPDNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v4bNodePrime, here->BSIM4v4dbNode,
|
||||
here->BSIM4v4grbpd * m);
|
||||
NevalSrc(&noizDens[BSIM4v4RBPBNOIZ],
|
||||
&lnNdens[BSIM4v4RBPBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v4bNodePrime, here->BSIM4v4bNode,
|
||||
here->BSIM4v4grbpb * m);
|
||||
NevalSrc(&noizDens[BSIM4v4RBSBNOIZ],
|
||||
&lnNdens[BSIM4v4RBSBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v4bNode, here->BSIM4v4sbNode,
|
||||
here->BSIM4v4grbsb * m);
|
||||
NevalSrc(&noizDens[BSIM4v4RBDBNOIZ],
|
||||
&lnNdens[BSIM4v4RBDBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v4bNode, here->BSIM4v4dbNode,
|
||||
here->BSIM4v4grbdb * m);
|
||||
}
|
||||
else
|
||||
{ noizDens[BSIM4V4RBPSNOIZ] = noizDens[BSIM4V4RBPDNOIZ] = 0.0;
|
||||
noizDens[BSIM4V4RBPBNOIZ] = 0.0;
|
||||
noizDens[BSIM4V4RBSBNOIZ] = noizDens[BSIM4V4RBDBNOIZ] = 0.0;
|
||||
lnNdens[BSIM4V4RBPSNOIZ] =
|
||||
log(MAX(noizDens[BSIM4V4RBPSNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4V4RBPDNOIZ] =
|
||||
log(MAX(noizDens[BSIM4V4RBPDNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4V4RBPBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4V4RBPBNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4V4RBSBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4V4RBSBNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4V4RBDBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4V4RBDBNOIZ], N_MINLOG));
|
||||
{ noizDens[BSIM4v4RBPSNOIZ] = noizDens[BSIM4v4RBPDNOIZ] = 0.0;
|
||||
noizDens[BSIM4v4RBPBNOIZ] = 0.0;
|
||||
noizDens[BSIM4v4RBSBNOIZ] = noizDens[BSIM4v4RBDBNOIZ] = 0.0;
|
||||
lnNdens[BSIM4v4RBPSNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v4RBPSNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4v4RBPDNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v4RBPDNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4v4RBPBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v4RBPBNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4v4RBSBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v4RBSBNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4v4RBDBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v4RBDBNOIZ], N_MINLOG));
|
||||
}
|
||||
|
||||
|
||||
switch(model->BSIM4V4tnoiMod)
|
||||
switch(model->BSIM4v4tnoiMod)
|
||||
{ case 0:
|
||||
T0 = m * here->BSIM4V4ueff * fabs(here->BSIM4V4qinv);
|
||||
T1 = T0 * tmp + pParam->BSIM4V4leff
|
||||
* pParam->BSIM4V4leff;
|
||||
NevalSrc(&noizDens[BSIM4V4IDNOIZ],
|
||||
&lnNdens[BSIM4V4IDNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM4V4dNodePrime,
|
||||
here->BSIM4V4sNodePrime,
|
||||
(T0 / T1) * model->BSIM4V4ntnoi);
|
||||
T0 = m * here->BSIM4v4ueff * fabs(here->BSIM4v4qinv);
|
||||
T1 = T0 * tmp + pParam->BSIM4v4leff
|
||||
* pParam->BSIM4v4leff;
|
||||
NevalSrc(&noizDens[BSIM4v4IDNOIZ],
|
||||
&lnNdens[BSIM4v4IDNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM4v4dNodePrime,
|
||||
here->BSIM4v4sNodePrime,
|
||||
(T0 / T1) * model->BSIM4v4ntnoi);
|
||||
break;
|
||||
case 1:
|
||||
T0 = m * (here->BSIM4V4gm + here->BSIM4V4gmbs + here->BSIM4V4gds);
|
||||
T0 = m * (here->BSIM4v4gm + here->BSIM4v4gmbs + here->BSIM4v4gds);
|
||||
T0 *= T0;
|
||||
igsquare = npart_theta * npart_theta * T0 / here->BSIM4V4IdovVds;
|
||||
T1 = npart_beta * (here->BSIM4V4gm
|
||||
+ here->BSIM4V4gmbs) + here->BSIM4V4gds;
|
||||
T2 = T1 * T1 / here->BSIM4V4IdovVds;
|
||||
NevalSrc(&noizDens[BSIM4V4IDNOIZ],
|
||||
&lnNdens[BSIM4V4IDNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM4V4dNodePrime,
|
||||
here->BSIM4V4sNodePrime, (T2 - igsquare));
|
||||
igsquare = npart_theta * npart_theta * T0 / here->BSIM4v4IdovVds;
|
||||
T1 = npart_beta * (here->BSIM4v4gm
|
||||
+ here->BSIM4v4gmbs) + here->BSIM4v4gds;
|
||||
T2 = T1 * T1 / here->BSIM4v4IdovVds;
|
||||
NevalSrc(&noizDens[BSIM4v4IDNOIZ],
|
||||
&lnNdens[BSIM4v4IDNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM4v4dNodePrime,
|
||||
here->BSIM4v4sNodePrime, (T2 - igsquare));
|
||||
break;
|
||||
}
|
||||
|
||||
NevalSrc(&noizDens[BSIM4V4FLNOIZ], (double*) NULL,
|
||||
ckt, N_GAIN, here->BSIM4V4dNodePrime,
|
||||
here->BSIM4V4sNodePrime, (double) 0.0);
|
||||
NevalSrc(&noizDens[BSIM4v4FLNOIZ], (double*) NULL,
|
||||
ckt, N_GAIN, here->BSIM4v4dNodePrime,
|
||||
here->BSIM4v4sNodePrime, (double) 0.0);
|
||||
|
||||
switch(model->BSIM4V4fnoiMod)
|
||||
switch(model->BSIM4v4fnoiMod)
|
||||
{ case 0:
|
||||
noizDens[BSIM4V4FLNOIZ] *= m * model->BSIM4V4kf
|
||||
* exp(model->BSIM4V4af
|
||||
* log(MAX(fabs(here->BSIM4V4cd),
|
||||
noizDens[BSIM4v4FLNOIZ] *= m * model->BSIM4v4kf
|
||||
* exp(model->BSIM4v4af
|
||||
* log(MAX(fabs(here->BSIM4v4cd),
|
||||
N_MINLOG)))
|
||||
/ (pow(data->freq, model->BSIM4V4ef)
|
||||
* pParam->BSIM4V4leff
|
||||
* pParam->BSIM4V4leff
|
||||
* model->BSIM4V4coxe);
|
||||
/ (pow(data->freq, model->BSIM4v4ef)
|
||||
* pParam->BSIM4v4leff
|
||||
* pParam->BSIM4v4leff
|
||||
* model->BSIM4v4coxe);
|
||||
break;
|
||||
case 1:
|
||||
Vds = *(ckt->CKTstates[0] + here->BSIM4V4vds);
|
||||
Vds = *(ckt->CKTstates[0] + here->BSIM4v4vds);
|
||||
if (Vds < 0.0)
|
||||
Vds = -Vds;
|
||||
|
||||
Ssi = Eval1ovFNoise(Vds, model, here,
|
||||
Ssi = BSIM4v4Eval1ovFNoise(Vds, model, here,
|
||||
data->freq, ckt->CKTtemp);
|
||||
T10 = model->BSIM4V4oxideTrapDensityA
|
||||
T10 = model->BSIM4v4oxideTrapDensityA
|
||||
* CONSTboltz * ckt->CKTtemp;
|
||||
T11 = pParam->BSIM4V4weff * pParam->BSIM4V4leff
|
||||
* pow(data->freq, model->BSIM4V4ef) * 1.0e10
|
||||
* here->BSIM4V4nstar * here->BSIM4V4nstar;
|
||||
Swi = T10 / T11 * here->BSIM4V4cd
|
||||
* here->BSIM4V4cd;
|
||||
T11 = pParam->BSIM4v4weff * pParam->BSIM4v4leff
|
||||
* pow(data->freq, model->BSIM4v4ef) * 1.0e10
|
||||
* here->BSIM4v4nstar * here->BSIM4v4nstar;
|
||||
Swi = T10 / T11 * here->BSIM4v4cd
|
||||
* here->BSIM4v4cd;
|
||||
T1 = Swi + Ssi;
|
||||
if (T1 > 0.0)
|
||||
noizDens[BSIM4V4FLNOIZ] *= m * (Ssi * Swi) / T1;
|
||||
noizDens[BSIM4v4FLNOIZ] *= m * (Ssi * Swi) / T1;
|
||||
else
|
||||
noizDens[BSIM4V4FLNOIZ] *= 0.0;
|
||||
noizDens[BSIM4v4FLNOIZ] *= 0.0;
|
||||
break;
|
||||
}
|
||||
|
||||
lnNdens[BSIM4V4FLNOIZ] =
|
||||
log(MAX(noizDens[BSIM4V4FLNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4v4FLNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v4FLNOIZ], N_MINLOG));
|
||||
|
||||
|
||||
if(here->BSIM4V4mode >= 0) { /* bugfix */
|
||||
NevalSrc(&noizDens[BSIM4V4IGSNOIZ],
|
||||
&lnNdens[BSIM4V4IGSNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4V4gNodePrime, here->BSIM4V4sNodePrime,
|
||||
m * (here->BSIM4V4Igs + here->BSIM4V4Igcs));
|
||||
NevalSrc(&noizDens[BSIM4V4IGDNOIZ],
|
||||
&lnNdens[BSIM4V4IGDNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4V4gNodePrime, here->BSIM4V4dNodePrime,
|
||||
m * (here->BSIM4V4Igd + here->BSIM4V4Igcd));
|
||||
if(here->BSIM4v4mode >= 0) { /* bugfix */
|
||||
NevalSrc(&noizDens[BSIM4v4IGSNOIZ],
|
||||
&lnNdens[BSIM4v4IGSNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4v4gNodePrime, here->BSIM4v4sNodePrime,
|
||||
m * (here->BSIM4v4Igs + here->BSIM4v4Igcs));
|
||||
NevalSrc(&noizDens[BSIM4v4IGDNOIZ],
|
||||
&lnNdens[BSIM4v4IGDNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4v4gNodePrime, here->BSIM4v4dNodePrime,
|
||||
m * (here->BSIM4v4Igd + here->BSIM4v4Igcd));
|
||||
} else {
|
||||
NevalSrc(&noizDens[BSIM4V4IGSNOIZ],
|
||||
&lnNdens[BSIM4V4IGSNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4V4gNodePrime, here->BSIM4V4sNodePrime,
|
||||
m * (here->BSIM4V4Igs + here->BSIM4V4Igcd));
|
||||
NevalSrc(&noizDens[BSIM4V4IGDNOIZ],
|
||||
&lnNdens[BSIM4V4IGDNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4V4gNodePrime, here->BSIM4V4dNodePrime,
|
||||
m * (here->BSIM4V4Igd + here->BSIM4V4Igcs));
|
||||
NevalSrc(&noizDens[BSIM4v4IGSNOIZ],
|
||||
&lnNdens[BSIM4v4IGSNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4v4gNodePrime, here->BSIM4v4sNodePrime,
|
||||
m * (here->BSIM4v4Igs + here->BSIM4v4Igcd));
|
||||
NevalSrc(&noizDens[BSIM4v4IGDNOIZ],
|
||||
&lnNdens[BSIM4v4IGDNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4v4gNodePrime, here->BSIM4v4dNodePrime,
|
||||
m * (here->BSIM4v4Igd + here->BSIM4v4Igcs));
|
||||
}
|
||||
NevalSrc(&noizDens[BSIM4V4IGBNOIZ],
|
||||
&lnNdens[BSIM4V4IGBNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4V4gNodePrime, here->BSIM4V4bNodePrime,
|
||||
m * here->BSIM4V4Igb);
|
||||
NevalSrc(&noizDens[BSIM4v4IGBNOIZ],
|
||||
&lnNdens[BSIM4v4IGBNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4v4gNodePrime, here->BSIM4v4bNodePrime,
|
||||
m * here->BSIM4v4Igb);
|
||||
|
||||
|
||||
noizDens[BSIM4V4TOTNOIZ] = noizDens[BSIM4V4RDNOIZ]
|
||||
+ noizDens[BSIM4V4RSNOIZ] + noizDens[BSIM4V4RGNOIZ]
|
||||
+ noizDens[BSIM4V4RBPSNOIZ] + noizDens[BSIM4V4RBPDNOIZ]
|
||||
+ noizDens[BSIM4V4RBPBNOIZ]
|
||||
+ noizDens[BSIM4V4RBSBNOIZ] + noizDens[BSIM4V4RBDBNOIZ]
|
||||
+ noizDens[BSIM4V4IDNOIZ] + noizDens[BSIM4V4FLNOIZ]
|
||||
+ noizDens[BSIM4V4IGSNOIZ] + noizDens[BSIM4V4IGDNOIZ]
|
||||
+ noizDens[BSIM4V4IGBNOIZ];
|
||||
lnNdens[BSIM4V4TOTNOIZ] =
|
||||
log(MAX(noizDens[BSIM4V4TOTNOIZ], N_MINLOG));
|
||||
noizDens[BSIM4v4TOTNOIZ] = noizDens[BSIM4v4RDNOIZ]
|
||||
+ noizDens[BSIM4v4RSNOIZ] + noizDens[BSIM4v4RGNOIZ]
|
||||
+ noizDens[BSIM4v4RBPSNOIZ] + noizDens[BSIM4v4RBPDNOIZ]
|
||||
+ noizDens[BSIM4v4RBPBNOIZ]
|
||||
+ noizDens[BSIM4v4RBSBNOIZ] + noizDens[BSIM4v4RBDBNOIZ]
|
||||
+ noizDens[BSIM4v4IDNOIZ] + noizDens[BSIM4v4FLNOIZ]
|
||||
+ noizDens[BSIM4v4IGSNOIZ] + noizDens[BSIM4v4IGDNOIZ]
|
||||
+ noizDens[BSIM4v4IGBNOIZ];
|
||||
lnNdens[BSIM4v4TOTNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v4TOTNOIZ], N_MINLOG));
|
||||
|
||||
*OnDens += noizDens[BSIM4V4TOTNOIZ];
|
||||
*OnDens += noizDens[BSIM4v4TOTNOIZ];
|
||||
|
||||
if (data->delFreq == 0.0)
|
||||
{ /* if we haven't done any previous
|
||||
|
|
@ -406,8 +406,8 @@ int i;
|
|||
"history" variables.
|
||||
*/
|
||||
|
||||
for (i = 0; i < BSIM4V4NSRCS; i++)
|
||||
{ here->BSIM4V4nVar[LNLSTDENS][i] =
|
||||
for (i = 0; i < BSIM4v4NSRCS; i++)
|
||||
{ here->BSIM4v4nVar[LNLSTDENS][i] =
|
||||
lnNdens[i];
|
||||
}
|
||||
|
||||
|
|
@ -416,9 +416,9 @@ int i;
|
|||
*/
|
||||
if (data->freq ==
|
||||
((NOISEAN*) ckt->CKTcurJob)->NstartFreq)
|
||||
{ for (i = 0; i < BSIM4V4NSRCS; i++)
|
||||
{ here->BSIM4V4nVar[OUTNOIZ][i] = 0.0;
|
||||
here->BSIM4V4nVar[INNOIZ][i] = 0.0;
|
||||
{ for (i = 0; i < BSIM4v4NSRCS; i++)
|
||||
{ here->BSIM4v4nVar[OUTNOIZ][i] = 0.0;
|
||||
here->BSIM4v4nVar[INNOIZ][i] = 0.0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -426,37 +426,37 @@ int i;
|
|||
{ /* data->delFreq != 0.0,
|
||||
we have to integrate.
|
||||
*/
|
||||
for (i = 0; i < BSIM4V4NSRCS; i++)
|
||||
{ if (i != BSIM4V4TOTNOIZ)
|
||||
for (i = 0; i < BSIM4v4NSRCS; i++)
|
||||
{ if (i != BSIM4v4TOTNOIZ)
|
||||
{ tempOnoise = Nintegrate(noizDens[i],
|
||||
lnNdens[i],
|
||||
here->BSIM4V4nVar[LNLSTDENS][i],
|
||||
here->BSIM4v4nVar[LNLSTDENS][i],
|
||||
data);
|
||||
tempInoise = Nintegrate(noizDens[i]
|
||||
* data->GainSqInv, lnNdens[i]
|
||||
+ data->lnGainInv,
|
||||
here->BSIM4V4nVar[LNLSTDENS][i]
|
||||
here->BSIM4v4nVar[LNLSTDENS][i]
|
||||
+ data->lnGainInv, data);
|
||||
here->BSIM4V4nVar[LNLSTDENS][i] =
|
||||
here->BSIM4v4nVar[LNLSTDENS][i] =
|
||||
lnNdens[i];
|
||||
data->outNoiz += tempOnoise;
|
||||
data->inNoise += tempInoise;
|
||||
if (((NOISEAN*)
|
||||
ckt->CKTcurJob)->NStpsSm != 0)
|
||||
{ here->BSIM4V4nVar[OUTNOIZ][i]
|
||||
{ here->BSIM4v4nVar[OUTNOIZ][i]
|
||||
+= tempOnoise;
|
||||
here->BSIM4V4nVar[OUTNOIZ][BSIM4V4TOTNOIZ]
|
||||
here->BSIM4v4nVar[OUTNOIZ][BSIM4v4TOTNOIZ]
|
||||
+= tempOnoise;
|
||||
here->BSIM4V4nVar[INNOIZ][i]
|
||||
here->BSIM4v4nVar[INNOIZ][i]
|
||||
+= tempInoise;
|
||||
here->BSIM4V4nVar[INNOIZ][BSIM4V4TOTNOIZ]
|
||||
here->BSIM4v4nVar[INNOIZ][BSIM4v4TOTNOIZ]
|
||||
+= tempInoise;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
if (data->prtSummary)
|
||||
{ for (i = 0; i < BSIM4V4NSRCS; i++)
|
||||
{ for (i = 0; i < BSIM4v4NSRCS; i++)
|
||||
{ /* print a summary report */
|
||||
data->outpVector[data->outNumber++]
|
||||
= noizDens[i];
|
||||
|
|
@ -466,11 +466,11 @@ int i;
|
|||
case INT_NOIZ:
|
||||
/* already calculated, just output */
|
||||
if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0)
|
||||
{ for (i = 0; i < BSIM4V4NSRCS; i++)
|
||||
{ for (i = 0; i < BSIM4v4NSRCS; i++)
|
||||
{ data->outpVector[data->outNumber++]
|
||||
= here->BSIM4V4nVar[OUTNOIZ][i];
|
||||
= here->BSIM4v4nVar[OUTNOIZ][i];
|
||||
data->outpVector[data->outNumber++]
|
||||
= here->BSIM4V4nVar[INNOIZ][i];
|
||||
= here->BSIM4v4nVar[INNOIZ][i];
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@
|
|||
#include "fteext.h"
|
||||
|
||||
int
|
||||
BSIM4V4param(param,value,inst,select)
|
||||
BSIM4v4param(param,value,inst,select)
|
||||
int param;
|
||||
IFvalue *value;
|
||||
GENinstance *inst;
|
||||
|
|
@ -29,134 +29,134 @@ IFvalue *select;
|
|||
|
||||
if ( !cp_getvar( "scale", CP_REAL, (double*) &scale ) ) scale = 1;
|
||||
|
||||
BSIM4V4instance *here = (BSIM4V4instance*)inst;
|
||||
BSIM4v4instance *here = (BSIM4v4instance*)inst;
|
||||
switch(param)
|
||||
{ case BSIM4V4_W:
|
||||
here->BSIM4V4w = value->rValue*scale;
|
||||
here->BSIM4V4wGiven = TRUE;
|
||||
{ case BSIM4v4_W:
|
||||
here->BSIM4v4w = value->rValue*scale;
|
||||
here->BSIM4v4wGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_L:
|
||||
here->BSIM4V4l = value->rValue*scale;
|
||||
here->BSIM4V4lGiven = TRUE;
|
||||
case BSIM4v4_L:
|
||||
here->BSIM4v4l = value->rValue*scale;
|
||||
here->BSIM4v4lGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_M:
|
||||
here->BSIM4V4m = value->rValue;
|
||||
here->BSIM4V4mGiven = TRUE;
|
||||
case BSIM4v4_M:
|
||||
here->BSIM4v4m = value->rValue;
|
||||
here->BSIM4v4mGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_NF:
|
||||
here->BSIM4V4nf = value->rValue;
|
||||
here->BSIM4V4nfGiven = TRUE;
|
||||
case BSIM4v4_NF:
|
||||
here->BSIM4v4nf = value->rValue;
|
||||
here->BSIM4v4nfGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_MIN:
|
||||
here->BSIM4V4min = value->iValue;
|
||||
here->BSIM4V4minGiven = TRUE;
|
||||
case BSIM4v4_MIN:
|
||||
here->BSIM4v4min = value->iValue;
|
||||
here->BSIM4v4minGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_AS:
|
||||
here->BSIM4V4sourceArea = value->rValue*scale*scale;
|
||||
here->BSIM4V4sourceAreaGiven = TRUE;
|
||||
case BSIM4v4_AS:
|
||||
here->BSIM4v4sourceArea = value->rValue*scale*scale;
|
||||
here->BSIM4v4sourceAreaGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_AD:
|
||||
here->BSIM4V4drainArea = value->rValue*scale*scale;
|
||||
here->BSIM4V4drainAreaGiven = TRUE;
|
||||
case BSIM4v4_AD:
|
||||
here->BSIM4v4drainArea = value->rValue*scale*scale;
|
||||
here->BSIM4v4drainAreaGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_PS:
|
||||
here->BSIM4V4sourcePerimeter = value->rValue*scale;
|
||||
here->BSIM4V4sourcePerimeterGiven = TRUE;
|
||||
case BSIM4v4_PS:
|
||||
here->BSIM4v4sourcePerimeter = value->rValue*scale;
|
||||
here->BSIM4v4sourcePerimeterGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_PD:
|
||||
here->BSIM4V4drainPerimeter = value->rValue*scale;
|
||||
here->BSIM4V4drainPerimeterGiven = TRUE;
|
||||
case BSIM4v4_PD:
|
||||
here->BSIM4v4drainPerimeter = value->rValue*scale;
|
||||
here->BSIM4v4drainPerimeterGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_NRS:
|
||||
here->BSIM4V4sourceSquares = value->rValue;
|
||||
here->BSIM4V4sourceSquaresGiven = TRUE;
|
||||
case BSIM4v4_NRS:
|
||||
here->BSIM4v4sourceSquares = value->rValue;
|
||||
here->BSIM4v4sourceSquaresGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_NRD:
|
||||
here->BSIM4V4drainSquares = value->rValue;
|
||||
here->BSIM4V4drainSquaresGiven = TRUE;
|
||||
case BSIM4v4_NRD:
|
||||
here->BSIM4v4drainSquares = value->rValue;
|
||||
here->BSIM4v4drainSquaresGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_OFF:
|
||||
here->BSIM4V4off = value->iValue;
|
||||
case BSIM4v4_OFF:
|
||||
here->BSIM4v4off = value->iValue;
|
||||
break;
|
||||
case BSIM4V4_SA:
|
||||
here->BSIM4V4sa = value->rValue*scale;
|
||||
here->BSIM4V4saGiven = TRUE;
|
||||
case BSIM4v4_SA:
|
||||
here->BSIM4v4sa = value->rValue*scale;
|
||||
here->BSIM4v4saGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_SB:
|
||||
here->BSIM4V4sb = value->rValue*scale;
|
||||
here->BSIM4V4sbGiven = TRUE;
|
||||
case BSIM4v4_SB:
|
||||
here->BSIM4v4sb = value->rValue*scale;
|
||||
here->BSIM4v4sbGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_SD:
|
||||
here->BSIM4V4sd = value->rValue*scale;
|
||||
here->BSIM4V4sdGiven = TRUE;
|
||||
case BSIM4v4_SD:
|
||||
here->BSIM4v4sd = value->rValue*scale;
|
||||
here->BSIM4v4sdGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_RBSB:
|
||||
here->BSIM4V4rbsb = value->rValue;
|
||||
here->BSIM4V4rbsbGiven = TRUE;
|
||||
case BSIM4v4_RBSB:
|
||||
here->BSIM4v4rbsb = value->rValue;
|
||||
here->BSIM4v4rbsbGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_RBDB:
|
||||
here->BSIM4V4rbdb = value->rValue;
|
||||
here->BSIM4V4rbdbGiven = TRUE;
|
||||
case BSIM4v4_RBDB:
|
||||
here->BSIM4v4rbdb = value->rValue;
|
||||
here->BSIM4v4rbdbGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_RBPB:
|
||||
here->BSIM4V4rbpb = value->rValue;
|
||||
here->BSIM4V4rbpbGiven = TRUE;
|
||||
case BSIM4v4_RBPB:
|
||||
here->BSIM4v4rbpb = value->rValue;
|
||||
here->BSIM4v4rbpbGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_RBPS:
|
||||
here->BSIM4V4rbps = value->rValue;
|
||||
here->BSIM4V4rbpsGiven = TRUE;
|
||||
case BSIM4v4_RBPS:
|
||||
here->BSIM4v4rbps = value->rValue;
|
||||
here->BSIM4v4rbpsGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_RBPD:
|
||||
here->BSIM4V4rbpd = value->rValue;
|
||||
here->BSIM4V4rbpdGiven = TRUE;
|
||||
case BSIM4v4_RBPD:
|
||||
here->BSIM4v4rbpd = value->rValue;
|
||||
here->BSIM4v4rbpdGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_TRNQSMOD:
|
||||
here->BSIM4V4trnqsMod = value->iValue;
|
||||
here->BSIM4V4trnqsModGiven = TRUE;
|
||||
case BSIM4v4_TRNQSMOD:
|
||||
here->BSIM4v4trnqsMod = value->iValue;
|
||||
here->BSIM4v4trnqsModGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_ACNQSMOD:
|
||||
here->BSIM4V4acnqsMod = value->iValue;
|
||||
here->BSIM4V4acnqsModGiven = TRUE;
|
||||
case BSIM4v4_ACNQSMOD:
|
||||
here->BSIM4v4acnqsMod = value->iValue;
|
||||
here->BSIM4v4acnqsModGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_RBODYMOD:
|
||||
here->BSIM4V4rbodyMod = value->iValue;
|
||||
here->BSIM4V4rbodyModGiven = TRUE;
|
||||
case BSIM4v4_RBODYMOD:
|
||||
here->BSIM4v4rbodyMod = value->iValue;
|
||||
here->BSIM4v4rbodyModGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_RGATEMOD:
|
||||
here->BSIM4V4rgateMod = value->iValue;
|
||||
here->BSIM4V4rgateModGiven = TRUE;
|
||||
case BSIM4v4_RGATEMOD:
|
||||
here->BSIM4v4rgateMod = value->iValue;
|
||||
here->BSIM4v4rgateModGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_GEOMOD:
|
||||
here->BSIM4V4geoMod = value->iValue;
|
||||
here->BSIM4V4geoModGiven = TRUE;
|
||||
case BSIM4v4_GEOMOD:
|
||||
here->BSIM4v4geoMod = value->iValue;
|
||||
here->BSIM4v4geoModGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_RGEOMOD:
|
||||
here->BSIM4V4rgeoMod = value->iValue;
|
||||
here->BSIM4V4rgeoModGiven = TRUE;
|
||||
case BSIM4v4_RGEOMOD:
|
||||
here->BSIM4v4rgeoMod = value->iValue;
|
||||
here->BSIM4v4rgeoModGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_IC_VDS:
|
||||
here->BSIM4V4icVDS = value->rValue;
|
||||
here->BSIM4V4icVDSGiven = TRUE;
|
||||
case BSIM4v4_IC_VDS:
|
||||
here->BSIM4v4icVDS = value->rValue;
|
||||
here->BSIM4v4icVDSGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_IC_VGS:
|
||||
here->BSIM4V4icVGS = value->rValue;
|
||||
here->BSIM4V4icVGSGiven = TRUE;
|
||||
case BSIM4v4_IC_VGS:
|
||||
here->BSIM4v4icVGS = value->rValue;
|
||||
here->BSIM4v4icVGSGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_IC_VBS:
|
||||
here->BSIM4V4icVBS = value->rValue;
|
||||
here->BSIM4V4icVBSGiven = TRUE;
|
||||
case BSIM4v4_IC_VBS:
|
||||
here->BSIM4v4icVBS = value->rValue;
|
||||
here->BSIM4v4icVBSGiven = TRUE;
|
||||
break;
|
||||
case BSIM4V4_IC:
|
||||
case BSIM4v4_IC:
|
||||
switch(value->v.numValue)
|
||||
{ case 3:
|
||||
here->BSIM4V4icVBS = *(value->v.vec.rVec+2);
|
||||
here->BSIM4V4icVBSGiven = TRUE;
|
||||
here->BSIM4v4icVBS = *(value->v.vec.rVec+2);
|
||||
here->BSIM4v4icVBSGiven = TRUE;
|
||||
case 2:
|
||||
here->BSIM4V4icVGS = *(value->v.vec.rVec+1);
|
||||
here->BSIM4V4icVGSGiven = TRUE;
|
||||
here->BSIM4v4icVGS = *(value->v.vec.rVec+1);
|
||||
here->BSIM4v4icVGSGiven = TRUE;
|
||||
case 1:
|
||||
here->BSIM4V4icVDS = *(value->v.vec.rVec);
|
||||
here->BSIM4V4icVDSGiven = TRUE;
|
||||
here->BSIM4v4icVDS = *(value->v.vec.rVec);
|
||||
here->BSIM4v4icVDSGiven = TRUE;
|
||||
break;
|
||||
default:
|
||||
return(E_BADPARM);
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -15,41 +15,41 @@
|
|||
#include "suffix.h"
|
||||
|
||||
int
|
||||
BSIM4V4trunc(inModel,ckt,timeStep)
|
||||
BSIM4v4trunc(inModel,ckt,timeStep)
|
||||
GENmodel *inModel;
|
||||
CKTcircuit *ckt;
|
||||
double *timeStep;
|
||||
{
|
||||
BSIM4V4model *model = (BSIM4V4model*)inModel;
|
||||
BSIM4V4instance *here;
|
||||
BSIM4v4model *model = (BSIM4v4model*)inModel;
|
||||
BSIM4v4instance *here;
|
||||
|
||||
#ifdef STEPDEBUG
|
||||
double debugtemp;
|
||||
#endif /* STEPDEBUG */
|
||||
|
||||
for (; model != NULL; model = model->BSIM4V4nextModel)
|
||||
{ for (here = model->BSIM4V4instances; here != NULL;
|
||||
here = here->BSIM4V4nextInstance)
|
||||
for (; model != NULL; model = model->BSIM4v4nextModel)
|
||||
{ for (here = model->BSIM4v4instances; here != NULL;
|
||||
here = here->BSIM4v4nextInstance)
|
||||
{
|
||||
if (here->BSIM4V4owner != ARCHme) continue;
|
||||
if (here->BSIM4v4owner != ARCHme) continue;
|
||||
#ifdef STEPDEBUG
|
||||
debugtemp = *timeStep;
|
||||
#endif /* STEPDEBUG */
|
||||
CKTterr(here->BSIM4V4qb,ckt,timeStep);
|
||||
CKTterr(here->BSIM4V4qg,ckt,timeStep);
|
||||
CKTterr(here->BSIM4V4qd,ckt,timeStep);
|
||||
if (here->BSIM4V4trnqsMod)
|
||||
CKTterr(here->BSIM4V4qcdump,ckt,timeStep);
|
||||
if (here->BSIM4V4rbodyMod)
|
||||
{ CKTterr(here->BSIM4V4qbs,ckt,timeStep);
|
||||
CKTterr(here->BSIM4V4qbd,ckt,timeStep);
|
||||
CKTterr(here->BSIM4v4qb,ckt,timeStep);
|
||||
CKTterr(here->BSIM4v4qg,ckt,timeStep);
|
||||
CKTterr(here->BSIM4v4qd,ckt,timeStep);
|
||||
if (here->BSIM4v4trnqsMod)
|
||||
CKTterr(here->BSIM4v4qcdump,ckt,timeStep);
|
||||
if (here->BSIM4v4rbodyMod)
|
||||
{ CKTterr(here->BSIM4v4qbs,ckt,timeStep);
|
||||
CKTterr(here->BSIM4v4qbd,ckt,timeStep);
|
||||
}
|
||||
if (here->BSIM4V4rgateMod == 3)
|
||||
CKTterr(here->BSIM4V4qgmid,ckt,timeStep);
|
||||
if (here->BSIM4v4rgateMod == 3)
|
||||
CKTterr(here->BSIM4v4qgmid,ckt,timeStep);
|
||||
#ifdef STEPDEBUG
|
||||
if(debugtemp != *timeStep)
|
||||
{ printf("device %s reduces step from %g to %g\n",
|
||||
here->BSIM4V4name,debugtemp,*timeStep);
|
||||
here->BSIM4v4name,debugtemp,*timeStep);
|
||||
}
|
||||
#endif /* STEPDEBUG */
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -6,28 +6,28 @@ File: bsim4ext.h
|
|||
**********/
|
||||
|
||||
|
||||
extern int BSIM4V4acLoad(GENmodel *,CKTcircuit*);
|
||||
extern int BSIM4V4ask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*);
|
||||
extern int BSIM4V4convTest(GENmodel *,CKTcircuit*);
|
||||
extern int BSIM4V4delete(GENmodel*,IFuid,GENinstance**);
|
||||
extern void BSIM4V4destroy(GENmodel**);
|
||||
extern int BSIM4V4getic(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4V4load(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4V4mAsk(CKTcircuit*,GENmodel *,int, IFvalue*);
|
||||
extern int BSIM4V4mDelete(GENmodel**,IFuid,GENmodel*);
|
||||
extern int BSIM4V4mParam(int,IFvalue*,GENmodel*);
|
||||
extern void BSIM4V4mosCap(CKTcircuit*, double, double, double, double,
|
||||
extern int BSIM4v4acLoad(GENmodel *,CKTcircuit*);
|
||||
extern int BSIM4v4ask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*);
|
||||
extern int BSIM4v4convTest(GENmodel *,CKTcircuit*);
|
||||
extern int BSIM4v4delete(GENmodel*,IFuid,GENinstance**);
|
||||
extern void BSIM4v4destroy(GENmodel**);
|
||||
extern int BSIM4v4getic(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4v4load(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4v4mAsk(CKTcircuit*,GENmodel *,int, IFvalue*);
|
||||
extern int BSIM4v4mDelete(GENmodel**,IFuid,GENmodel*);
|
||||
extern int BSIM4v4mParam(int,IFvalue*,GENmodel*);
|
||||
extern void BSIM4v4mosCap(CKTcircuit*, double, double, double, double,
|
||||
double, double, double, double, double, double, double,
|
||||
double, double, double, double, double, double, double*,
|
||||
double*, double*, double*, double*, double*, double*, double*,
|
||||
double*, double*, double*, double*, double*, double*, double*,
|
||||
double*);
|
||||
extern int BSIM4V4param(int,IFvalue*,GENinstance*,IFvalue*);
|
||||
extern int BSIM4V4pzLoad(GENmodel*,CKTcircuit*,SPcomplex*);
|
||||
extern int BSIM4V4setup(SMPmatrix*,GENmodel*,CKTcircuit*,int*);
|
||||
extern int BSIM4V4temp(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4V4trunc(GENmodel*,CKTcircuit*,double*);
|
||||
extern int BSIM4V4noise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*);
|
||||
extern int BSIM4V4unsetup(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4v4param(int,IFvalue*,GENinstance*,IFvalue*);
|
||||
extern int BSIM4v4pzLoad(GENmodel*,CKTcircuit*,SPcomplex*);
|
||||
extern int BSIM4v4setup(SMPmatrix*,GENmodel*,CKTcircuit*,int*);
|
||||
extern int BSIM4v4temp(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4v4trunc(GENmodel*,CKTcircuit*,double*);
|
||||
extern int BSIM4v4noise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*);
|
||||
extern int BSIM4v4unsetup(GENmodel*,CKTcircuit*);
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -7,20 +7,20 @@
|
|||
#include "bsim4v4init.h"
|
||||
|
||||
|
||||
SPICEdev BSIM4V4info = {
|
||||
SPICEdev BSIM4v4info = {
|
||||
{
|
||||
"BSIM4v4",
|
||||
"Berkeley Short Channel IGFET Model-4",
|
||||
|
||||
&BSIM4V4nSize,
|
||||
&BSIM4V4nSize,
|
||||
BSIM4V4names,
|
||||
&BSIM4v4nSize,
|
||||
&BSIM4v4nSize,
|
||||
BSIM4v4names,
|
||||
|
||||
&BSIM4V4pTSize,
|
||||
BSIM4V4pTable,
|
||||
&BSIM4v4pTSize,
|
||||
BSIM4v4pTable,
|
||||
|
||||
&BSIM4V4mPTSize,
|
||||
BSIM4V4mPTable,
|
||||
&BSIM4v4mPTSize,
|
||||
BSIM4v4mPTable,
|
||||
|
||||
#ifdef XSPICE
|
||||
/*---- Fixed by SDB 5.2.2003 to enable XSPICE/tclspice integration -----*/
|
||||
|
|
@ -40,25 +40,25 @@ SPICEdev BSIM4V4info = {
|
|||
DEV_DEFAULT
|
||||
},
|
||||
|
||||
BSIM4V4param, /* DEVparam */
|
||||
BSIM4V4mParam, /* DEVmodParam */
|
||||
BSIM4V4load, /* DEVload */
|
||||
BSIM4V4setup, /* DEVsetup */
|
||||
BSIM4V4unsetup, /* DEVunsetup */
|
||||
BSIM4V4setup, /* DEVpzSetup */
|
||||
BSIM4V4temp, /* DEVtemperature */
|
||||
BSIM4V4trunc, /* DEVtrunc */
|
||||
BSIM4v4param, /* DEVparam */
|
||||
BSIM4v4mParam, /* DEVmodParam */
|
||||
BSIM4v4load, /* DEVload */
|
||||
BSIM4v4setup, /* DEVsetup */
|
||||
BSIM4v4unsetup, /* DEVunsetup */
|
||||
BSIM4v4setup, /* DEVpzSetup */
|
||||
BSIM4v4temp, /* DEVtemperature */
|
||||
BSIM4v4trunc, /* DEVtrunc */
|
||||
NULL, /* DEVfindBranch */
|
||||
BSIM4V4acLoad, /* DEVacLoad */
|
||||
BSIM4v4acLoad, /* DEVacLoad */
|
||||
NULL, /* DEVaccept */
|
||||
BSIM4V4destroy, /* DEVdestroy */
|
||||
BSIM4V4mDelete, /* DEVmodDelete */
|
||||
BSIM4V4delete, /* DEVdelete */
|
||||
BSIM4V4getic, /* DEVsetic */
|
||||
BSIM4V4ask, /* DEVask */
|
||||
BSIM4V4mAsk, /* DEVmodAsk */
|
||||
BSIM4V4pzLoad, /* DEVpzLoad */
|
||||
BSIM4V4convTest, /* DEVconvTest */
|
||||
BSIM4v4destroy, /* DEVdestroy */
|
||||
BSIM4v4mDelete, /* DEVmodDelete */
|
||||
BSIM4v4delete, /* DEVdelete */
|
||||
BSIM4v4getic, /* DEVsetic */
|
||||
BSIM4v4ask, /* DEVask */
|
||||
BSIM4v4mAsk, /* DEVmodAsk */
|
||||
BSIM4v4pzLoad, /* DEVpzLoad */
|
||||
BSIM4v4convTest, /* DEVconvTest */
|
||||
NULL, /* DEVsenSetup */
|
||||
NULL, /* DEVsenLoad */
|
||||
NULL, /* DEVsenUpdate */
|
||||
|
|
@ -66,18 +66,18 @@ SPICEdev BSIM4V4info = {
|
|||
NULL, /* DEVsenPrint */
|
||||
NULL, /* DEVsenTrunc */
|
||||
NULL, /* DEVdisto */
|
||||
BSIM4V4noise, /* DEVnoise */
|
||||
BSIM4v4noise, /* DEVnoise */
|
||||
#ifdef CIDER
|
||||
NULL, /* DEVdump */
|
||||
NULL, /* DEVacct */
|
||||
#endif
|
||||
&BSIM4V4iSize, /* DEVinstSize */
|
||||
&BSIM4V4mSize /* DEVmodSize */
|
||||
&BSIM4v4iSize, /* DEVinstSize */
|
||||
&BSIM4v4mSize /* DEVmodSize */
|
||||
};
|
||||
|
||||
|
||||
SPICEdev *
|
||||
get_bsim4v4_info(void)
|
||||
{
|
||||
return &BSIM4V4info;
|
||||
return &BSIM4v4info;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,13 +1,13 @@
|
|||
#ifndef _BSIM4V4INIT_H
|
||||
#define _BSIM4V4INIT_H
|
||||
|
||||
extern IFparm BSIM4V4pTable[ ];
|
||||
extern IFparm BSIM4V4mPTable[ ];
|
||||
extern char *BSIM4V4names[ ];
|
||||
extern int BSIM4V4pTSize;
|
||||
extern int BSIM4V4mPTSize;
|
||||
extern int BSIM4V4nSize;
|
||||
extern int BSIM4V4iSize;
|
||||
extern int BSIM4V4mSize;
|
||||
extern IFparm BSIM4v4pTable[ ];
|
||||
extern IFparm BSIM4v4mPTable[ ];
|
||||
extern char *BSIM4v4names[ ];
|
||||
extern int BSIM4v4pTSize;
|
||||
extern int BSIM4v4mPTSize;
|
||||
extern int BSIM4v4nSize;
|
||||
extern int BSIM4v4iSize;
|
||||
extern int BSIM4v4mSize;
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue