Two patches from Dietmar.

This commit is contained in:
pnenzi 2004-05-30 08:24:07 +00:00
parent 7056d37343
commit c5438903ac
3 changed files with 15 additions and 5 deletions

View File

@ -1,3 +1,13 @@
2004-05-30 Paolo Nenzi <p.nenzi@ieee.org>
* src/frontend/subckt.c: patch from Dietmar Warning
(warning@danalyse.de) to fix memory errors when using very
long model card.
src/spicelibe/devices/vbic/vbicsetup.c: patch from Dietmar Warning
(warning@danalyse.de) to fix vbic behavior.
2004-02-14 Paolo Nenzi <p.nenzi@ieee.ord>
* Trimmed the autoconf interfaces. Added dummy ".out" files

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@ -609,7 +609,7 @@ translate(struct line *deck, char *formal, char *actual, char *scname, char *sub
case '*':
case '.':
/* Just a pointer to the line into s and then break */
buffer = tmalloc(2000); /* XXXXX */
buffer = tmalloc(2000+strlen(c->li_line)); /* DW,VA */
s = c->li_line;
break;

View File

@ -42,7 +42,7 @@ VBICsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
model->VBICtnom = 27.0;
}
if(!model->VBICextCollResistGiven) {
model->VBICextCollResist = 0.0;
model->VBICextCollResist = 0.1;
}
if(!model->VBICintCollResistGiven) {
model->VBICintCollResist = 0.1;
@ -57,16 +57,16 @@ VBICsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
model->VBIChighCurFac = 1.0;
}
if(!model->VBICextBaseResistGiven) {
model->VBICextBaseResist = 0.0;
model->VBICextBaseResist = 0.1;
}
if(!model->VBICintBaseResistGiven) {
model->VBICintBaseResist = 0.1;
}
if(!model->VBICemitterResistGiven) {
model->VBICemitterResist = 0.0;
model->VBICemitterResist = 0.1;
}
if(!model->VBICsubstrateResistGiven) {
model->VBICsubstrateResist = 0.0;
model->VBICsubstrateResist = 0.1;
}
if(!model->VBICparBaseResistGiven) {
model->VBICparBaseResist = 0.1;