luke
/
ngspice
mirror of https://git.code.sf.net/p/ngspice/ngspice
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Update the example structure for OSDI/OpenVAF: 

all compiled models into lib/ngspice
spinit updated to load the models via command 'osdi'
local calls with 'pre_osdi' commanted out.
This commit is contained in:
Holger Vogt 2023-01-25 13:12:27 +01:00
parent 62290952a6
commit b9eef23eed
50 changed files with 149 additions and 400 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

75
examples/osdi/EKV2.6/Modelcards/ekv26_0u15.par
View File

@ -1,75 +0,0 @@
*** SPICE Models
*** Models created by Daniel Foty.
*** (c) 2001, Gilgamesh Associates and EPFL – All rights reserved.
*** These models are provided without warranty or support.
*** These models represent a completely fictitious 0.15um process, and do
*** NOT correspond to any real silicon process. They are provided expressly for
*** use in the examples provided in this text, and should not be used for any
*** real silicon product design.
*** NMOS EKV MOSFET Model ***************************************************
*** Level=44 in WinSPICE and ELDO, Level=55 in ADM/HSPICE, Level=5 in PSPICE,
*** Level=EKV in Spectre
*** Lmin=0.15u Wmin=1.05u (If Scale=0.15u then Lmin=1 and Wmin=7)
*—————
.MODEL nmos nmos
+ LEVEL=44
*** Setup Parameters
+ UPDATE=2.6
*** Process Related Model Parameters
+ COX=9.083E-3 XJ=0.15E-6
*** Intrinsic Model Parameters
+ VTO=0.4 GAMMA=0.71 PHI=0.97 KP=453E-6
+ E0=88.0E6 UCRIT=4.0E6
+ DL=-0.05E-6 DW=-0.02E-6
+ LAMBDA = 0.30 LETA=0.28 WETA=0
+ Q0=280E-6 LK=0.5E-6
*** Substrate Current Parameters
+ IBN=1.0 IBA=200E6 IBB=350E6
*** Intrinsic Model Temperature Parameters
+ TNOM=27.0 TCV=1.5E-3 BEX=-1.5 UCEX=1.7 IBBT=0
*** 1/f Noise Model Parameters
+ KF=1E-27 AF=1
*** Series Resistance and Area Calculation Parameters
+ HDIF=0.24e-6 ACM=3 RSH=5.0 RS=1250.526
+ RD=1250.526 LDIF=0.07e-6
*** Junction Current Parameters
+ JS=1.0E-6 JSW=5.0E-11 XTI=0 N=1.5
*** Junction Capacitances Parameters
+ CJ=1.0E-3 CJSW=2.0E-10 CJGATE=5.0E-10
+ MJ=0.5 MJSW=0.3 PB=0.9 PBSW=0.9 FC=0.5
*** Gate Overlap Capacitances
+ CGSO=3.0E-10 CGDO=3.0E-10 CGBO=3.0E-11
*** PMOS EKV MOSFET Model ***************************************************
*** Level=44 in WinSPICE and ELDO, Level=55 in ADM/HSPICE, Level=5 in PSPICE,
*** Level=EKV in Spectre
*** Lmin=0.15u Wmin=1.05u (If Scale=0.15u then Lmin=1 and Wmin=7)
*—————
.MODEL pmos pmos
+ LEVEL = 44
*** Setup Parameters
+ UPDATE = 2.6
*** Process Related Model Parameters
+ COX=9.083E-3 XJ=0.15E-6
*** Intrinsic Model Parameters
+ VTO=-0.4 GAMMA=0.69 PHI=0.87 KP=92.15E-6
+ E0=51.0E6 UCRIT=18.0E6
+ DL=-0.05E-6 DW=-0.03E-6
+ LAMBDA=1.1 LETA=0.45 WETA=0
+ Q0=200E-6 LK=0.6E-6
*** Substrate Current Parameters
+ IBN=1.0 IBA=0.0 IBB=300E6
*** Intrinsic Model Temperature Parameters
+ TNOM=25.0 TCV=-1.4E-3 BEX=-1.4 UCEX=2.0 IBBT=0.0
*** 1/f Noise Model Parameters
+ KF=1.0E-28 AF=1
*** Series Resistance and Area Calculation Parameters
+ HDIF=0.24E-6 ACM=3 RSH=5.0 RS=3145.263
+ RD=3145.263 LDIF=0.07e-6
*** Junction Current Parameters
+ JS=1.0E-7 JSW=5.0E-12 XTI=0 N=1.8
*** Junction Capacitances Parameters
+ CJ=1.3E-3 CJSW=2.5E-10 CJGATE=5.5E-10
+ MJ=0.5 MJSW=0.35 PB=0.9 PBSW=0.9 FC=0.5
*** Gate Overlap Capacitances
+ CGSO=3.2E-10 CGDO=3.2E-10 CGBO=3.0E-11

157
examples/osdi/EKV2.6/Modelcards/ekv26_0u5.par
View File

@ -1,157 +0,0 @@
**********************************************************************
* EKV v2.6 parameters for 0.5um CMOS C. EPFL-LEG, 1999
* ----------------------------------
*
* ELDO (LEVEL = 44) / PSPICE (LEVEL = 5) example parameter set
* for the EKV v2.6 model is provided for NMOS and PMOS.
*
*
* IMPORTANT NOTES:
* ----------------
*
* Parameters do not correspond to a particular technology but
* have reasonable values for standard 0.5um CMOS.
* Not intended for use in real design.
*
* Includes all intrinsic model parameters. An example set for
* extrinsic model parameters is provided.
*
* Geometry range: W >= 0.8um, L >= 0.5um
* Voltage range: |Vgb| < 3.3V, |Vdb| < 3.3V, |Vsb| < 2V
*
* For use with either simulator, comment/uncomment respective lines.
* Use of extrinsic model parameters and models (series resistance,
* junction currents/capacitances) is in general simulator-dependent.
*
**********************************************************************
* EKV v2.6 NMOS
*---------------
.MODEL NCH EKV_VA
*+ LEVEL = 44
*** Setup Parameters
*+ UPDATE = 2.6
*+ XQC = 0.4
+ TYPE = 1
*** Process Related Model Parameters
+ COX = 3.45E-3
+ XJ = 0.15E-6
*** Intrinsic Model Parameters
+ VTO = 0.6
+ GAMMA = 0.71
+ PHI = 0.97
+ KP = 150E-6
+ E0 = 88.0E6
+ UCRIT = 4.5E6
+ DL = -0.05E-6
+ DW = -0.02E-6
+ LAMBDA = 0.23
+ LETA = 0.28
+ WETA = 0.05
+ Q0 = 280E-6
+ LK = 0.5E-6
*** Substrate Current Parameters
+ IBN = 1.0
+ IBA = 200E6
+ IBB = 350E6
*** Intrinsic Model Temperature Parameters
+ TNOM = 25.0
+ TCV = 1.5E-3
+ BEX = -1.5
+ UCEX = 1.7
+ IBBT = 0.0
*** 1/f Noise Model Parameters
+ KF = 1E-27
+ AF = 1
*** Short-Distance Matching Statistical Parameters (for MC simulation only)
*+ AVTO = 0 DEV = 10.0E-3 ; ELDO v4.6
*+ AGAMMA = 0 DEV = 10.0E-3 ; ELDO v4.6
*+ AKP = 0 DEV = 25.0E-3 ; ELDO v4.6
*** Series Resistance and Area Calulation Parameters
*+ RLEV = 3
+ HDIF = 0.9E-6
+ RSH = 510
*** Junction Current Parameters
*+ ALEV = 3
+ JS = 8.0E-6
+ JSW = 1.5E-10
+ XTI = 0
+ N = 1.5
*** Junction Capacitances Parameters
+ CJ = 8.0E-4
+ CJSW = 3.0E-10
+ MJ = 0.5
+ MJSW = 0.3
+ PB = 0.9
+ PBSW = 0.5
+ FC = 0.5
*** Gate Overlap Capacitances
+ CGSO = 1.5E-10
+ CGDO = 1.5E-10
+ CGBO = 4.0E-10
* EKV v2.6 PMOS
*---------------
.MODEL PCH EKV_VA
*+ LEVEL = 44
*** Setup Parameters
*+ UPDATE = 2.6
*+ XQC = 0.4
+ TYPE = -1
*** Process Related Model Parameters
+ COX = 3.45E-3
+ XJ = 0.15E-6
*** Intrinsic Model Parameters
+ VTO = -0.55
+ GAMMA = 0.69
+ PHI = 0.87
+ KP = 35.0E-6
+ E0 = 51.0E6
+ UCRIT = 18.0E6
+ DL = -0.05E-6
+ DW = -0.03E-6
+ LAMBDA = 1.1
+ LETA = 0.45
+ WETA = 0.0
+ Q0 = 200E-6
+ LK = 0.6E-6
*** Substrate Current Parameters
+ IBN = 1.0
+ IBA = 10E6
+ IBB = 300E6
*** Intrinsic Model Temperature Parameters
+ TNOM = 25.0
+ TCV = -1.4E-3
+ BEX = -1.4
+ UCEX = 2.0
+ IBBT = 0.0
*** 1/f Noise Model Parameters
+ KF = 1.0E-28
+ AF = 1
*** Short-Distance Matching Statistical Parameters (for MC simulation only)
*+ AVTO = 0 DEV = 10.0E-3 ; ELDO v4.6
*+ AGAMMA = 0 DEV = 10.0E-3 ; ELDO v4.6
*+ AKP = 0 DEV = 25.0E-3 ; ELDO v4.6
*** Series Resistance and Area Calulation Parameters
*+ RLEV = 3
+ HDIF = 0.9E-6
+ RSH = 990
*** Junction Current Parameters
*+ ALEV = 3
+ JS = 4.0E-5
+ JSW = 7.0E-10
+ XTI = 0
+ N = 1.8
*** Junction Capacitances Parameters
+ CJ = 8.0E-4
+ CJSW = 4.0E-10
+ MJ = 0.5
+ MJSW = 0.35
+ PB = 0.9
+ PBSW = 0.8
+ FC = 0.5
*** Gate Overlap Capacitances
+ CGSO = 1.5E-10
+ CGDO = 1.5E-10
+ CGBO = 4.0E-10

41
examples/osdi/EKV2.6/ekv26_inverter.sp
View File

@ -1,41 +0,0 @@
* EKV 2.6
* simple inverter
.param Vcc = 1.8
* model definitions:
*.model .MODEL PCH EKV_VA type=-1
*.model .MODEL NCH EKV_VA type=1
.include Modelcards/ekv26_0u5.par
* the voltage sources:
Vdd vdd gnd DC 'Vcc'
V1 in gnd pulse(0 'Vcc' 0p 200p 100p 1n 2n)
Vmeas vss 0 0
Xnot1 in vdd vss out not1
*Rout out 0 1k
.subckt not1 a vdd vss z
Np1 z a vdd vdd pch W=2u L=0.5u as=0.26235p ad=0.26235p ps=2.51u pd=2.51u
Nn1 z a vss vss nch W=1u L=0.5u as=0.131175p ad=0.131175p ps=1.52u pd=1.52u
c3 a vss 0.384f
c2 z vss 0.576f
.ends
* simulation command:
.tran 10ps 10ns
.dc V1 0 'vcc' 'vcc/100'
.control
pre_osdi osdi_libs/ekv26_mod.osdi
run
*set nolegend
set xbrushwidth=3
plot in out
plot dc1.out
plot dc1.i(Vmeas)
rusage
.endc
.end

27
examples/osdi/EKV2.6/netlist_mod_nmos.sp
View File

@ -1,27 +0,0 @@
OSDI EKV 2.6 NMOS Test
*.options abstol=1e-15
* one voltage source per MOS terminal:
VD dd 0 1
VG gg 0 1
VS ss 0 0
VB bb 0 0
* model definitions:
*.model .MODEL NCH EKV_VA type=1
.include Modelcards/ekv26_0u5.par
*OSDI EKV:
N1 dd gg ss bb nch W=5e-6 L=0.5e-6
.control
pre_osdi osdi_libs/ekv26_mod.osdi
set xbrushwidth=3
* a DC sweep: drain, gate
dc Vd 0 1.6 0.01 VG 0 1.6 0.2
* plot source current
plot i(VS)
.endc
.end

28
examples/osdi/EKV2.6/netlist_mod_pmos.sp
View File

@ -1,28 +0,0 @@
OSDI EKV 2.6 PMOS Test
*.options abstol=1e-15
* one voltage source per MOS terminal:
VD dd 0 -1
VG gg 0 -1
VS ss 0 0
VB bb 0 0
* model definitions:
*.model .MODEL PCH EKV_VA type=-1
.include Modelcards/ekv26_0u5.par
*OSDI EKV:
N1 dd gg ss bb pch W=5e-6 L=5e-7
.control
pre_osdi osdi_libs/ekv26_mod.osdi
set xbrushwidth=3
* a DC sweep: drain, gate
*op
dc Vd 0 -1.8 -0.01 VG 0 -1.8 -0.2
* plot source current
plot i(VS)
.endc
.end

1
examples/osdi/EKV2.6/osdi_libs/README
View File

@ -1 +0,0 @@
Place ekv26_mod.osdi here.

2
examples/osdi/bsimbulk/bsimbulk_inverter.sp
View File

@ -27,7 +27,7 @@ c2 z vss 0.576f
.dc V1 0 'vcc' 'vcc/100' .dc V1 0 'vcc' 'vcc/100'
.control .control
pre_osdi osdi_libs/bsimbulk107.osdi * pre_osdi ../osdi_libs/bsimbulk107.osdi ; ./../lib/ngspice/bsimbulk107.osdi
run run
*set nolegend *set nolegend
set xbrushwidth=3 set xbrushwidth=3

2
examples/osdi/bsimbulk/bsimbulk_ro.sp
View File

@ -31,7 +31,7 @@ c2 z vss 0.576f
.tran 10p 10n uic .tran 10p 10n uic
.control .control
pre_osdi osdi_libs/bsimbulk107.osdi * pre_osdi ../osdi_libs/bsimbulk107.osdi
run run
set xbrushwidth=3 set xbrushwidth=3
plot in plot in

2
examples/osdi/bsimbulk/c7552_ann_bsimbulk.net
View File

@ -89225,7 +89225,7 @@ c2 z vss 0.834f
*.print tran V(g7529_1) V(g7509_0) V(g7484_1) V(g7477_1) V(g7460_0) V(g7503_1) V(g7522_0) V(g7485_1) V(g7453_0) V(g7474_0) V(g7500_0) V(g7514_0) V(g7546_1) V(g7549_0) V(g7467_0) V(g7491_0) V(g7456_0) V(g7495_1) V(g7545_0) V(g7473_0) V(g7541_0) V(g7448_1) V(g7525_1) V(g7550_1) V(g165_1) V(g7510_1) V(g7535_1) V(g7534_1) V(g7469_1) V(g7476_0) V(g7517_1) V(g7537_0) V(g7489_1) V(g7521_1) V(g7486_0) V(g7533_1) V(g7449_0) V(g7447_0) V(g7528_0) V(g7513_1) V(g7548_0) V(g7544_1) V(g7552_0) V(g7540_1) V(g7507_0) V(g7481_0) V(g7455_0) V(g7502_1) V(g7446_1) V(g7478_1) V(g7470_0) V(g7526_0) V(g7494_1) V(g7452_1) V(g7463_0) V(g7532_1) V(g7512_0) V(g7527_0) V(g7451_0) V(g7472_0) V(g7498_1) V(g7475_0) V(g7536_0) V(g7488_1) V(g7493_1) V(g7551_1) V(g7482_0) V(g7487_1) V(g7501_1) V(g7520_1) V(g7516_1) V(g7450_1) V(g7508_0) V(g7458_1) V(g7479_1) V(g7506_1) V(g7499_0) V(g7471_0) V(g7465_1) V(g7464_1) V(g7543_1) V(g7524_0) V(g7539_1) V(g7468_1) V(g7459_0) V(g7504_1) V(g7515_1) V(g7492_1) V(g7511_0) V(g7462_1) V(g7530_0) V(g7497_1) V(g7454_1) V(g7519_1) V(g7531_0) V(g7547_0) V(g7483_1) V(g7466_1) V(g7480_1) V(g7523_1) V(g7496_0) V(g7538_0) V(g7490_1) V(g7518_1) V(g7461_0) V(g7542_0) V(g7457_0) V(g7505_1) *.print tran V(g7529_1) V(g7509_0) V(g7484_1) V(g7477_1) V(g7460_0) V(g7503_1) V(g7522_0) V(g7485_1) V(g7453_0) V(g7474_0) V(g7500_0) V(g7514_0) V(g7546_1) V(g7549_0) V(g7467_0) V(g7491_0) V(g7456_0) V(g7495_1) V(g7545_0) V(g7473_0) V(g7541_0) V(g7448_1) V(g7525_1) V(g7550_1) V(g165_1) V(g7510_1) V(g7535_1) V(g7534_1) V(g7469_1) V(g7476_0) V(g7517_1) V(g7537_0) V(g7489_1) V(g7521_1) V(g7486_0) V(g7533_1) V(g7449_0) V(g7447_0) V(g7528_0) V(g7513_1) V(g7548_0) V(g7544_1) V(g7552_0) V(g7540_1) V(g7507_0) V(g7481_0) V(g7455_0) V(g7502_1) V(g7446_1) V(g7478_1) V(g7470_0) V(g7526_0) V(g7494_1) V(g7452_1) V(g7463_0) V(g7532_1) V(g7512_0) V(g7527_0) V(g7451_0) V(g7472_0) V(g7498_1) V(g7475_0) V(g7536_0) V(g7488_1) V(g7493_1) V(g7551_1) V(g7482_0) V(g7487_1) V(g7501_1) V(g7520_1) V(g7516_1) V(g7450_1) V(g7508_0) V(g7458_1) V(g7479_1) V(g7506_1) V(g7499_0) V(g7471_0) V(g7465_1) V(g7464_1) V(g7543_1) V(g7524_0) V(g7539_1) V(g7468_1) V(g7459_0) V(g7504_1) V(g7515_1) V(g7492_1) V(g7511_0) V(g7462_1) V(g7530_0) V(g7497_1) V(g7454_1) V(g7519_1) V(g7531_0) V(g7547_0) V(g7483_1) V(g7466_1) V(g7480_1) V(g7523_1) V(g7496_0) V(g7538_0) V(g7490_1) V(g7518_1) V(g7461_0) V(g7542_0) V(g7457_0) V(g7505_1)
.control .control
pre_osdi osdi_libs/bsimbulk107.osdi * pre_osdi ../osdi_libs/bsimbulk107.osdi
unset ngdebug unset ngdebug
save V(g7529_1) V(g7509_0) V(g7484_1) V(g7477_1) V(g7460_0) V(g7503_1) V(g7522_0) V(g7485_1) V(g7453_0) V(g7474_0) V(g7500_0) V(g7514_0) V(g7546_1) V(g7549_0) V(g7467_0) V(g7491_0) V(g7456_0) V(g7495_1) V(g7545_0) V(g7473_0) V(g7541_0) V(g7448_1) V(g7525_1) V(g7550_1) V(g165_1) V(g7510_1) V(g7535_1) V(g7534_1) V(g7469_1) V(g7476_0) V(g7517_1) V(g7537_0) V(g7489_1) V(g7521_1) V(g7486_0) V(g7533_1) V(g7449_0) V(g7447_0) V(g7528_0) V(g7513_1) V(g7548_0) V(g7544_1) V(g7552_0) V(g7540_1) V(g7507_0) V(g7481_0) V(g7455_0) V(g7502_1) V(g7446_1) V(g7478_1) V(g7470_0) V(g7526_0) V(g7494_1) V(g7452_1) V(g7463_0) V(g7532_1) V(g7512_0) V(g7527_0) V(g7451_0) V(g7472_0) V(g7498_1) V(g7475_0) V(g7536_0) V(g7488_1) V(g7493_1) V(g7551_1) V(g7482_0) V(g7487_1) V(g7501_1) V(g7520_1) V(g7516_1) V(g7450_1) V(g7508_0) V(g7458_1) V(g7479_1) V(g7506_1) V(g7499_0) V(g7471_0) V(g7465_1) V(g7464_1) V(g7543_1) V(g7524_0) V(g7539_1) V(g7468_1) V(g7459_0) V(g7504_1) V(g7515_1) V(g7492_1) V(g7511_0) V(g7462_1) V(g7530_0) V(g7497_1) V(g7454_1) V(g7519_1) V(g7531_0) V(g7547_0) V(g7483_1) V(g7466_1) V(g7480_1) V(g7523_1) V(g7496_0) V(g7538_0) V(g7490_1) V(g7518_1) V(g7461_0) V(g7542_0) V(g7457_0) V(g7505_1) save V(g7529_1) V(g7509_0) V(g7484_1) V(g7477_1) V(g7460_0) V(g7503_1) V(g7522_0) V(g7485_1) V(g7453_0) V(g7474_0) V(g7500_0) V(g7514_0) V(g7546_1) V(g7549_0) V(g7467_0) V(g7491_0) V(g7456_0) V(g7495_1) V(g7545_0) V(g7473_0) V(g7541_0) V(g7448_1) V(g7525_1) V(g7550_1) V(g165_1) V(g7510_1) V(g7535_1) V(g7534_1) V(g7469_1) V(g7476_0) V(g7517_1) V(g7537_0) V(g7489_1) V(g7521_1) V(g7486_0) V(g7533_1) V(g7449_0) V(g7447_0) V(g7528_0) V(g7513_1) V(g7548_0) V(g7544_1) V(g7552_0) V(g7540_1) V(g7507_0) V(g7481_0) V(g7455_0) V(g7502_1) V(g7446_1) V(g7478_1) V(g7470_0) V(g7526_0) V(g7494_1) V(g7452_1) V(g7463_0) V(g7532_1) V(g7512_0) V(g7527_0) V(g7451_0) V(g7472_0) V(g7498_1) V(g7475_0) V(g7536_0) V(g7488_1) V(g7493_1) V(g7551_1) V(g7482_0) V(g7487_1) V(g7501_1) V(g7520_1) V(g7516_1) V(g7450_1) V(g7508_0) V(g7458_1) V(g7479_1) V(g7506_1) V(g7499_0) V(g7471_0) V(g7465_1) V(g7464_1) V(g7543_1) V(g7524_0) V(g7539_1) V(g7468_1) V(g7459_0) V(g7504_1) V(g7515_1) V(g7492_1) V(g7511_0) V(g7462_1) V(g7530_0) V(g7497_1) V(g7454_1) V(g7519_1) V(g7531_0) V(g7547_0) V(g7483_1) V(g7466_1) V(g7480_1) V(g7523_1) V(g7496_0) V(g7538_0) V(g7490_1) V(g7518_1) V(g7461_0) V(g7542_0) V(g7457_0) V(g7505_1)

2
examples/osdi/bsimbulk/netlist_mod_nmos.sp
View File

@ -15,7 +15,7 @@ VB bb 0 0
N1 dd gg ss bb BSIMBULK_osdi_N W=500n L=90n N1 dd gg ss bb BSIMBULK_osdi_N W=500n L=90n
.control .control
pre_osdi osdi_libs/bsimbulk107.osdi * pre_osdi ../osdi_libs/bsimbulk107.osdi
set xbrushwidth=3 set xbrushwidth=3
* a DC sweep: drain, gate * a DC sweep: drain, gate
dc Vd 0 1.6 0.01 VG 0 1.6 0.2 dc Vd 0 1.6 0.01 VG 0 1.6 0.2

2
examples/osdi/bsimbulk/netlist_mod_pmos.sp
View File

@ -16,7 +16,7 @@ VB bb 0 0
N1 dd gg ss bb BSIMBULK_osdi_P W=500n L=90n N1 dd gg ss bb BSIMBULK_osdi_P W=500n L=90n
.control .control
pre_osdi osdi_libs/bsimbulk107.osdi * pre_osdi ../osdi_libs/bsimbulk107.osdi
set xbrushwidth=3 set xbrushwidth=3
* a DC sweep: drain, gate * a DC sweep: drain, gate
*op *op

2
examples/osdi/bsimbulk/nmos_pmos_BSIMBULK.sp
View File

@ -17,7 +17,7 @@ vbsp 44 0 0
.control .control
* Load the models dynamically * Load the models dynamically
pre_osdi osdi_libs/bsimbulk107.osdi * pre_osdi ../osdi_libs/bsimbulk107.osdi
set xgridwidth=2 set xgridwidth=2
set xbrushwidth=3 set xbrushwidth=3

1
examples/osdi/bsimbulk/osdi_libs/README
View File

@ -1 +0,0 @@
Place bsimbulk107.osdi here.

2
examples/osdi/bsimcmg/inverter_ro.sp
View File

@ -28,7 +28,7 @@ Xinv6 vi vo supply 0 mg_inv
.tran 0.1p 1n .tran 0.1p 1n
.control .control
pre_osdi osdi_libs/bsimcmg.osdi * pre_osdi ../osdi_libs/bsimcmg.osdi
set xbrushwidth=3 set xbrushwidth=3
run run
plot i(vss) plot i(vss)

2
examples/osdi/bsimcmg/inverter_transient.sp
View File

@ -27,7 +27,7 @@ Xinv5 4 vo supply 0 mg_inv
.print tran v(vi) v(vo) .print tran v(vi) v(vo)
.control .control
pre_osdi osdi_libs/bsimcmg.osdi * pre_osdi ../osdi_libs/bsimcmg.osdi
set xbrushwidth=3 set xbrushwidth=3
run run
plot v(vi) v(vo) plot v(vi) v(vo)

2
examples/osdi/bsimcmg/netlist_nmos.sp
View File

@ -16,7 +16,7 @@ VB bb 0 0
N1 dd gg ss bb BSIMCMG_osdi_N ; W=5u L=0.2u N1 dd gg ss bb BSIMCMG_osdi_N ; W=5u L=0.2u
.control .control
pre_osdi osdi_libs/bsimcmg.osdi * pre_osdi ../osdi_libs/bsimcmg.osdi
set xbrushwidth=3 set xbrushwidth=3
* a DC sweep: drain, gate * a DC sweep: drain, gate
dc Vd 0 2.5 0.01 VG 0 2.5 0.5 dc Vd 0 2.5 0.01 VG 0 2.5 0.5

2
examples/osdi/bsimcmg/netlist_pmos.sp
View File

@ -16,7 +16,7 @@ VB bb 0 0
N1 dd gg ss bb BSIMCMG_osdi_P N1 dd gg ss bb BSIMCMG_osdi_P
.control .control
pre_osdi osdi_libs/bsimcmg.osdi * pre_osdi ../osdi_libs/bsimcmg.osdi
set xbrushwidth=3 set xbrushwidth=3
* a DC sweep: drain, gate * a DC sweep: drain, gate
dc Vd 0 -1.8 -0.01 VG 0 -1.8 -0.3 dc Vd 0 -1.8 -0.01 VG 0 -1.8 -0.3

1
examples/osdi/bsimcmg/osdi_libs/README
View File

@ -1 +0,0 @@
Place bsimcmg.osdi here.

18
examples/osdi/bsimcmg/ringosc_17stg.sp
View File

@ -1,6 +1,5 @@
*Sample netlist for BSIM-MG * Sample netlist for BSIM-CMG
* (exec-spice "ngspice %s" t) * 17-stage ring oscillator
*17-stage ring oscillator
.include Modelcards/modelcard.nmos .include Modelcards/modelcard.nmos
.include Modelcards/modelcard.pmos .include Modelcards/modelcard.pmos
@ -36,8 +35,9 @@ Xinv17 17 1 supply 0 mg_inv
* --- Initial Condition --- * --- Initial Condition ---
.ic v(1)=1 .ic v(1)=1
.tran 1p 1n .tran 1p 10n
* measure oscillator frequency by period delta t
.measure tran t1 when v(1)=0.5 cross=1 .measure tran t1 when v(1)=0.5 cross=1
.measure tran t2 when v(1)=0.5 cross=7 .measure tran t2 when v(1)=0.5 cross=7
.measure tran period param='(t2-t1)/3' .measure tran period param='(t2-t1)/3'
@ -45,10 +45,16 @@ Xinv17 17 1 supply 0 mg_inv
.measure tran delay_per_stage param='period/34' .measure tran delay_per_stage param='period/34'
.control .control
pre_osdi osdi_libs/bsimcmg.osdi * pre_osdi ../osdi_libs/bsimcmg.osdi
set xbrushwidth=3 set xbrushwidth=3
run run
plot v(1) rusage time
plot v(1) xlimit 1n 2n
* measure oscillator frequency with fft
fft V(1)
let magv1 = mag(v(1))
plot magv1 xlimit 0 16G
meas sp fmax max magv1 from=10G to=20G
.endc .endc
.end .end

2
examples/osdi/bsimcmg/simple_inverter_dc.sp
View File

@ -18,7 +18,7 @@ NN1 vout vin 0 0 BSIMCMG_osdi_N
.tran 10n 2u .tran 10n 2u
.control .control
pre_osdi osdi_libs/bsimcmg.osdi * pre_osdi ../osdi_libs/bsimcmg.osdi
set xbrushwidth=3 set xbrushwidth=3
run run
plot v(vout) v(vin) plot v(vout) v(vin)

2
examples/osdi/hicuml0/DFF_Y_ECL_HICUM.sp
View File

@ -32,7 +32,7 @@ Rdt dt 0 1G
.include Modelcards/model-card-hicumL0V1p11_mod.lib .include Modelcards/model-card-hicumL0V1p11_mod.lib
.SAVE V(D) V(CLK) V(Q) .SAVE V(D) V(CLK) V(Q)
.control .control
pre_osdi osdi_libs/HICUML0-2.osdi * pre_osdi ../osdi_libs/HICUML0-2.osdi
TRAN 0.25p 5n TRAN 0.25p 5n
rusage rusage
set color0=white set color0=white

2
examples/osdi/hicuml0/ECL-OR.cir
View File

@ -18,7 +18,7 @@ V3 In2 GND dc -1.75 pulse(-1.75 -0.9 0 1n 1n 2.5u 5u)
Rt1 DT GND 1G Rt1 DT GND 1G
.tran 0.3n 100u .tran 0.3n 100u
.control .control
pre_osdi osdi_libs/HICUML0-2.osdi * pre_osdi ../osdi_libs/HICUML0-2.osdi
run run
rusage rusage
set xbrushwidth=2 set xbrushwidth=2

2
examples/osdi/hicuml0/ECL-RO-5.cir
View File

@ -35,7 +35,7 @@ V1 VEE GND -5.2
.tran 0.02n 200n .tran 0.02n 200n
.control .control
pre_osdi osdi_libs/HICUML0-2.osdi * pre_osdi ../osdi_libs/HICUML0-2.osdi
run run
rusage rusage
plot out9 xlimit 100n 110n plot out9 xlimit 100n 110n

2
examples/osdi/hicuml0/hic0_gum.sp
View File

@ -8,7 +8,7 @@ XQ1 C B 0 S DT hicumL0V1p1_c_sbt
Rdt dt 0 1G Rdt dt 0 1G
.control .control
pre_osdi osdi_libs/HICUML0-2.osdi * pre_osdi ../osdi_libs/HICUML0-2.osdi
dc vb 0.2 1.4 0.01 dc vb 0.2 1.4 0.01
set xbrushwidth=2 set xbrushwidth=2
plot abs(i(vc)) abs(i(vb)) abs(i(vs)) ylimit 0.1p 100m ylog plot abs(i(vc)) abs(i(vb)) abs(i(vs)) ylimit 0.1p 100m ylog

2
examples/osdi/hicuml0/hic0_out.sp
View File

@ -8,7 +8,7 @@ X1 C B 0 S DT hicumL0V1p1_c_sbt
Rdt dt 0 1G Rdt dt 0 1G
.control .control
pre_osdi osdi_libs/HICUML0-2.osdi * pre_osdi ../osdi_libs/HICUML0-2.osdi
dc vc 0.0 3.0 0.05 ib 10u 100u 10u dc vc 0.0 3.0 0.05 ib 10u 100u 10u
set xbrushwidth=2 set xbrushwidth=2
plot abs(i(vc)) plot abs(i(vc))

1
examples/osdi/hicuml0/osdi_libs/README
View File

@ -1 +0,0 @@
Place HICUML0-2.osdi here.

2
examples/osdi/mextram/mex_gum.sp
View File

@ -8,7 +8,7 @@ VS S 0 0.0
NQ1 C B 0 S dt BJTRF1 NQ1 C B 0 S dt BJTRF1
.control .control
pre_osdi osdi_libs/bjt504t.osdi * pre_osdi ../osdi_libs/bjt504t.osdi
dc vb 0.2 1.4 0.01 dc vb 0.2 1.4 0.01
set xbrushwidth=2 set xbrushwidth=2
plot abs(i(vc)) abs(i(vb)) abs(i(vs)) ylog xlimit 0.3 1.4 ylimit 1e-12 100e-3 plot abs(i(vc)) abs(i(vb)) abs(i(vs)) ylog xlimit 0.3 1.4 ylimit 1e-12 100e-3

2
examples/osdi/mextram/mex_out.sp
View File

@ -8,7 +8,7 @@ VS S 0 0.0
NQ1 C B 0 S T BJTRF1 NQ1 C B 0 S T BJTRF1
.control .control
pre_osdi osdi_libs/bjt504t.osdi * pre_osdi ../osdi_libs/bjt504t.osdi
dc vc 0 6.0 0.05 ib 0 8u 1u dc vc 0 6.0 0.05 ib 0 8u 1u
set xbrushwidth=2 set xbrushwidth=2
plot abs(i(vc)) xlabel Vce title Output-Characteristic plot abs(i(vc)) xlabel Vce title Output-Characteristic

1
examples/osdi/mextram/osdi_libs/README
View File

@ -1 +0,0 @@
Place bjt505.osdi here.

2
examples/osdi/mixed-models/bb-psp_ro.sp
View File

@ -67,7 +67,7 @@ c2 z vss 0.576f
.control .control
* Load the models dynamically * Load the models dynamically
pre_osdi osdi_libs/bsimbulk107.osdi osdi_libs/psp103.osdi * pre_osdi ../osdi_libs/bsimbulk107.osdi osdi_libs/psp103.osdi
* Run the simulation * Run the simulation
run run
* Plotting * Plotting

2
examples/osdi/mixed-models/bsimbulk_inverter.sp
View File

@ -27,7 +27,7 @@ c2 z vss 0.576f
.dc V1 0 'vcc' 'vcc/100' .dc V1 0 'vcc' 'vcc/100'
.control .control
pre_osdi osdi_libs/bsimbulk107.osdi * pre_osdi ../osdi_libs/bsimbulk107.osdi
run run
*set nolegend *set nolegend
set xbrushwidth=3 set xbrushwidth=3

1
examples/osdi/mixed-models/osdi_libs/README
View File

@ -1 +0,0 @@
Place bsimbulk107.osdi and psp103.osdi here.

2
examples/osdi/mixed-models/psp_inverter.sp
View File

@ -53,7 +53,7 @@ c2 z vss 0.576f
.dc V1 0 'vcc' 'vcc/100' .dc V1 0 'vcc' 'vcc/100'
.control .control
pre_osdi osdi_libs/psp103.osdi * pre_osdi ../osdi_libs/psp103.osdi
run run
*set nolegend *set nolegend
set xbrushwidth=2 set xbrushwidth=2

1
examples/osdi/osdi_libs/readme Normal file
View File

@ -0,0 +1 @@
Put your compiled models *.osdi here, if used locally.

2
examples/osdi/psp103/c7552_ann_psp.net
View File

@ -89225,7 +89225,7 @@ c2 z vss 0.834f
*.print tran V(g7529_1) V(g7509_0) V(g7484_1) V(g7477_1) V(g7460_0) V(g7503_1) V(g7522_0) V(g7485_1) V(g7453_0) V(g7474_0) V(g7500_0) V(g7514_0) V(g7546_1) V(g7549_0) V(g7467_0) V(g7491_0) V(g7456_0) V(g7495_1) V(g7545_0) V(g7473_0) V(g7541_0) V(g7448_1) V(g7525_1) V(g7550_1) V(g165_1) V(g7510_1) V(g7535_1) V(g7534_1) V(g7469_1) V(g7476_0) V(g7517_1) V(g7537_0) V(g7489_1) V(g7521_1) V(g7486_0) V(g7533_1) V(g7449_0) V(g7447_0) V(g7528_0) V(g7513_1) V(g7548_0) V(g7544_1) V(g7552_0) V(g7540_1) V(g7507_0) V(g7481_0) V(g7455_0) V(g7502_1) V(g7446_1) V(g7478_1) V(g7470_0) V(g7526_0) V(g7494_1) V(g7452_1) V(g7463_0) V(g7532_1) V(g7512_0) V(g7527_0) V(g7451_0) V(g7472_0) V(g7498_1) V(g7475_0) V(g7536_0) V(g7488_1) V(g7493_1) V(g7551_1) V(g7482_0) V(g7487_1) V(g7501_1) V(g7520_1) V(g7516_1) V(g7450_1) V(g7508_0) V(g7458_1) V(g7479_1) V(g7506_1) V(g7499_0) V(g7471_0) V(g7465_1) V(g7464_1) V(g7543_1) V(g7524_0) V(g7539_1) V(g7468_1) V(g7459_0) V(g7504_1) V(g7515_1) V(g7492_1) V(g7511_0) V(g7462_1) V(g7530_0) V(g7497_1) V(g7454_1) V(g7519_1) V(g7531_0) V(g7547_0) V(g7483_1) V(g7466_1) V(g7480_1) V(g7523_1) V(g7496_0) V(g7538_0) V(g7490_1) V(g7518_1) V(g7461_0) V(g7542_0) V(g7457_0) V(g7505_1) *.print tran V(g7529_1) V(g7509_0) V(g7484_1) V(g7477_1) V(g7460_0) V(g7503_1) V(g7522_0) V(g7485_1) V(g7453_0) V(g7474_0) V(g7500_0) V(g7514_0) V(g7546_1) V(g7549_0) V(g7467_0) V(g7491_0) V(g7456_0) V(g7495_1) V(g7545_0) V(g7473_0) V(g7541_0) V(g7448_1) V(g7525_1) V(g7550_1) V(g165_1) V(g7510_1) V(g7535_1) V(g7534_1) V(g7469_1) V(g7476_0) V(g7517_1) V(g7537_0) V(g7489_1) V(g7521_1) V(g7486_0) V(g7533_1) V(g7449_0) V(g7447_0) V(g7528_0) V(g7513_1) V(g7548_0) V(g7544_1) V(g7552_0) V(g7540_1) V(g7507_0) V(g7481_0) V(g7455_0) V(g7502_1) V(g7446_1) V(g7478_1) V(g7470_0) V(g7526_0) V(g7494_1) V(g7452_1) V(g7463_0) V(g7532_1) V(g7512_0) V(g7527_0) V(g7451_0) V(g7472_0) V(g7498_1) V(g7475_0) V(g7536_0) V(g7488_1) V(g7493_1) V(g7551_1) V(g7482_0) V(g7487_1) V(g7501_1) V(g7520_1) V(g7516_1) V(g7450_1) V(g7508_0) V(g7458_1) V(g7479_1) V(g7506_1) V(g7499_0) V(g7471_0) V(g7465_1) V(g7464_1) V(g7543_1) V(g7524_0) V(g7539_1) V(g7468_1) V(g7459_0) V(g7504_1) V(g7515_1) V(g7492_1) V(g7511_0) V(g7462_1) V(g7530_0) V(g7497_1) V(g7454_1) V(g7519_1) V(g7531_0) V(g7547_0) V(g7483_1) V(g7466_1) V(g7480_1) V(g7523_1) V(g7496_0) V(g7538_0) V(g7490_1) V(g7518_1) V(g7461_0) V(g7542_0) V(g7457_0) V(g7505_1)
.control .control
pre_osdi osdi_libs/psp103.osdi * pre_osdi ../osdi_libs/psp103.osdi
unset ngdebug unset ngdebug
save V(g7529_1) V(g7509_0) V(g7484_1) V(g7477_1) V(g7460_0) V(g7503_1) V(g7522_0) V(g7485_1) V(g7453_0) V(g7474_0) V(g7500_0) V(g7514_0) V(g7546_1) V(g7549_0) V(g7467_0) V(g7491_0) V(g7456_0) V(g7495_1) V(g7545_0) V(g7473_0) V(g7541_0) V(g7448_1) V(g7525_1) V(g7550_1) V(g165_1) V(g7510_1) V(g7535_1) V(g7534_1) V(g7469_1) V(g7476_0) V(g7517_1) V(g7537_0) V(g7489_1) V(g7521_1) V(g7486_0) V(g7533_1) V(g7449_0) V(g7447_0) V(g7528_0) V(g7513_1) V(g7548_0) V(g7544_1) V(g7552_0) V(g7540_1) V(g7507_0) V(g7481_0) V(g7455_0) V(g7502_1) V(g7446_1) V(g7478_1) V(g7470_0) V(g7526_0) V(g7494_1) V(g7452_1) V(g7463_0) V(g7532_1) V(g7512_0) V(g7527_0) V(g7451_0) V(g7472_0) V(g7498_1) V(g7475_0) V(g7536_0) V(g7488_1) V(g7493_1) V(g7551_1) V(g7482_0) V(g7487_1) V(g7501_1) V(g7520_1) V(g7516_1) V(g7450_1) V(g7508_0) V(g7458_1) V(g7479_1) V(g7506_1) V(g7499_0) V(g7471_0) V(g7465_1) V(g7464_1) V(g7543_1) V(g7524_0) V(g7539_1) V(g7468_1) V(g7459_0) V(g7504_1) V(g7515_1) V(g7492_1) V(g7511_0) V(g7462_1) V(g7530_0) V(g7497_1) V(g7454_1) V(g7519_1) V(g7531_0) V(g7547_0) V(g7483_1) V(g7466_1) V(g7480_1) V(g7523_1) V(g7496_0) V(g7538_0) V(g7490_1) V(g7518_1) V(g7461_0) V(g7542_0) V(g7457_0) V(g7505_1) save V(g7529_1) V(g7509_0) V(g7484_1) V(g7477_1) V(g7460_0) V(g7503_1) V(g7522_0) V(g7485_1) V(g7453_0) V(g7474_0) V(g7500_0) V(g7514_0) V(g7546_1) V(g7549_0) V(g7467_0) V(g7491_0) V(g7456_0) V(g7495_1) V(g7545_0) V(g7473_0) V(g7541_0) V(g7448_1) V(g7525_1) V(g7550_1) V(g165_1) V(g7510_1) V(g7535_1) V(g7534_1) V(g7469_1) V(g7476_0) V(g7517_1) V(g7537_0) V(g7489_1) V(g7521_1) V(g7486_0) V(g7533_1) V(g7449_0) V(g7447_0) V(g7528_0) V(g7513_1) V(g7548_0) V(g7544_1) V(g7552_0) V(g7540_1) V(g7507_0) V(g7481_0) V(g7455_0) V(g7502_1) V(g7446_1) V(g7478_1) V(g7470_0) V(g7526_0) V(g7494_1) V(g7452_1) V(g7463_0) V(g7532_1) V(g7512_0) V(g7527_0) V(g7451_0) V(g7472_0) V(g7498_1) V(g7475_0) V(g7536_0) V(g7488_1) V(g7493_1) V(g7551_1) V(g7482_0) V(g7487_1) V(g7501_1) V(g7520_1) V(g7516_1) V(g7450_1) V(g7508_0) V(g7458_1) V(g7479_1) V(g7506_1) V(g7499_0) V(g7471_0) V(g7465_1) V(g7464_1) V(g7543_1) V(g7524_0) V(g7539_1) V(g7468_1) V(g7459_0) V(g7504_1) V(g7515_1) V(g7492_1) V(g7511_0) V(g7462_1) V(g7530_0) V(g7497_1) V(g7454_1) V(g7519_1) V(g7531_0) V(g7547_0) V(g7483_1) V(g7466_1) V(g7480_1) V(g7523_1) V(g7496_0) V(g7538_0) V(g7490_1) V(g7518_1) V(g7461_0) V(g7542_0) V(g7457_0) V(g7505_1)

22
examples/osdi/psp103/nmos_pmos_PSP.sp
View File

@ -42,29 +42,29 @@ vbsp 44 0 0
.control .control
* Load the models dynamically * Load the models dynamically
pre_osdi osdi_libs/psp103.osdi * pre_osdi ../osdi_libs/psp103.osdi
set xgridwidth=2 set xgridwidth=2
set xbrushwidth=3 set xbrushwidth=3
* NMOS * NMOS
dc vgsn 0 1.5 0.05 vbsn 0 -1.5 -0.3 dc vgsn 0 1.5 0.05 vbsn 0 -1.5 -0.3
plot vssn#branch ylabel 'Id vs. Vgs, Vbs 0 ... -1.5' plot vssn#branch ylabel 'Id over Vgs, Vbs 0 ... -1.5'
plot abs(vssn#branch) ylog ylabel 'Id vs. Vgs, Vbs 0 ... -1.5' plot abs(vssn#branch) ylog ylabel 'Id over Vgs, Vbs 0 ... -1.5'
dc vdsn 0 1.6 0.01 vgsn 0 1.6 0.2 dc vdsn 0 1.6 0.01 vgsn 0 1.6 0.2
plot vssn#branch ylabel 'Id vs. Vds, Vgs 0 ... 1.6' plot vssn#branch ylabel 'Id over Vds, Vgs 0 ... 1.6'
dc vgsn 0 1.5 0.05 temp -40 160 40 dc vgsn 0 1.5 0.05 temp -40 160 40
plot vssn#branch ylabel 'Id vs. Vds, Temp. -40 ... 160' plot vssn#branch ylabel 'Id over Vds, Temp. -40 ... 160'
plot abs(vssn#branch) ylog ylabel 'Id vs. Vds, Temp. -40 ... 160' plot abs(vssn#branch) ylog ylabel 'Id over Vds, Temp. -40 ... 160'
* PMOS * PMOS
dc vgsp 0 -1.5 -0.05 vbsp 0 1.5 0.3 dc vgsp 0 -1.5 -0.05 vbsp 0 1.5 0.3
plot vssp#branch ylabel 'Id vs. Vgs, Vbs 0 ... 1.5' plot vssp#branch ylabel 'Id over Vgs, Vbs 0 ... 1.5'
plot abs(vssp#branch) ylog ylabel 'Id vs. Vgs, Vbs 0 ... 1.5' plot abs(vssp#branch) ylog ylabel 'Id over Vgs, Vbs 0 ... 1.5'
dc vdsp 0 -1.6 -0.01 vgsp 0 -1.6 -0.2 dc vdsp 0 -1.6 -0.01 vgsp 0 -1.6 -0.2
plot vssp#branch ylabel 'Id vs. Vds, Vgs 0 ... -1.6' plot vssp#branch ylabel 'Id over Vds, Vgs 0 ... -1.6'
dc vgsp 0 -1.5 -0.05 temp -40 160 40 dc vgsp 0 -1.5 -0.05 temp -40 160 40
plot vssp#branch ylabel 'Id vs. Vds, Temp. -40 ... 160' plot vssp#branch ylabel 'Id over Vds, Temp. -40 ... 160'
plot abs(vssp#branch) ylog ylabel 'Id vs. Vds, Temp. -40 ... 160' plot abs(vssp#branch) ylog ylabel 'Id over Vds, Temp. -40 ... 160'
.endc .endc
.end .end

1
examples/osdi/psp103/osdi_libs/README
View File

@ -1 +0,0 @@
Place psp103.osdi and juncap200.osdi here.

2
examples/osdi/psp103/psp_inverter.sp
View File

@ -53,7 +53,7 @@ c2 z vss 0.576f
.dc V1 0 'vcc' 'vcc/100' .dc V1 0 'vcc' 'vcc/100'
.control .control
pre_osdi osdi_libs/psp103.osdi * pre_osdi ../osdi_libs/psp103.osdi
run run
*set nolegend *set nolegend
set xbrushwidth=2 set xbrushwidth=2

2
examples/osdi/psp103/psp_out_nmos_nm.sp
View File

@ -23,7 +23,7 @@ nm1 d g s b nch
*.include Modelcards/psp103_nmos.mod *.include Modelcards/psp103_nmos.mod
.control .control
pre_osdi osdi_libs/psp103.osdi * pre_osdi ../osdi_libs/psp103.osdi
dc vd 0 2.0 0.05 vg 0 1.5 0.25 dc vd 0 2.0 0.05 vg 0 1.5 0.25
plot i(vs) plot i(vs)
dc vg 0 1.5 0.05 vb 0 -3.0 -1 dc vg 0 1.5 0.05 vb 0 -3.0 -1

2
examples/osdi/psp103/psp_out_pmos_nm.sp
View File

@ -19,7 +19,7 @@ nm1 d g s b pch
* *
.option temp=21 .option temp=21
.control .control
pre_osdi osdi_libs/psp103.osdi * pre_osdi ../osdi_libs/psp103.osdi
dc vd 0 -2.0 -0.05 vg 0 -1.5 -0.25 ; saturation dc vd 0 -2.0 -0.05 vg 0 -1.5 -0.25 ; saturation
plot i(vs) plot i(vs)
dc vg 0 -1.5 -0.05 vb 0 3.0 1 dc vg 0 -1.5 -0.05 vb 0 3.0 1

2
examples/osdi/psp103/psp_ro.sp
View File

@ -56,7 +56,7 @@ c2 z vss 0.576f
.tran 10p 10n uic .tran 10p 10n uic
.control .control
pre_osdi osdi_libs/psp103.osdi * pre_osdi ../osdi_libs/psp103.osdi
run run
set xbrushwidth=3 set xbrushwidth=3
plot in plot in

2
examples/osdi/psp103/psp_transfer.sp
View File

@ -19,7 +19,7 @@ nm1 d g s b nch
* *
.option temp=21 .option temp=21
.control .control
pre_osdi osdi_libs/psp103.osdi * pre_osdi ../osdi_libs/psp103.osdi
set xbrushwidth=2 set xbrushwidth=2
dc vg 0 1.5 0.02 vb -3 0 0.5 dc vg 0 1.5 0.02 vb -3 0 0.5
plot abs(i(vd)) plot abs(i(vd))

1
examples/osdi/r2_cmc/osdi_libs/README
View File

@ -1 +0,0 @@
Place r2_cmc.osdi here.

2
examples/osdi/r2_cmc/res_r2_cmc.cir
View File

@ -7,7 +7,7 @@ NRr2_cmc 1 0 rmodel w=1u l=20u isnoisy=1
.model rmodel r2_cmc(level=2 rsh=200 xl=0.2u xw=-0.05u p3=0.12 q3=1.6 p2=0.015 q2=3.8 tc1=1.5e-4 tc2=7e-7) .model rmodel r2_cmc(level=2 rsh=200 xl=0.2u xw=-0.05u p3=0.12 q3=1.6 p2=0.015 q2=3.8 tc1=1.5e-4 tc2=7e-7)
.control .control
pre_osdi osdi_libs/r2_cmc.osdi * pre_osdi ../osdi_libs/r2_cmc.osdi
op op
let res = v(1) / -v1#branch let res = v(1) / -v1#branch
print res print res

20
src/spinit.in
View File

@ -13,8 +13,8 @@ set x11lineararcs
** default (if compiled with --enable-openmp) is: 2 ** default (if compiled with --enable-openmp) is: 2
*set num_threads=4 *set num_threads=4
strcmp __flag $program "ngspice" * Load the codemodels
if $__flag = 0 if $?xspice_enabled
@XSPICEINIT@ codemodel @pkglibdir@/spice2poly.cm @XSPICEINIT@ codemodel @pkglibdir@/spice2poly.cm
@XSPICEINIT@ codemodel @pkglibdir@/analog.cm @XSPICEINIT@ codemodel @pkglibdir@/analog.cm
@ -24,4 +24,18 @@ if $__flag = 0
@XSPICEINIT@ codemodel @pkglibdir@/table.cm @XSPICEINIT@ codemodel @pkglibdir@/table.cm
end end
unset __flag
* Load the OpenVAF/OSDI models
if $?osdi_enabled
osdi @pkglibdir@/asmhemt.osdi
osdi @pkglibdir@/bjt504t.osdi
osdi @pkglibdir@/BSIMBULK107.osdi
osdi @pkglibdir@/BSIMCMG.osdi
osdi @pkglibdir@/HICUMl0-2.0.osdi
osdi @pkglibdir@/psp103.osdi
osdi @pkglibdir@/r2_cmc.osdi
osdi @pkglibdir@/vbic_4T_et_cf.osdi
end

19
visualc/spinit_all
View File

@ -14,8 +14,8 @@ set filetype=ascii
set num_threads=4 set num_threads=4
set interactive set interactive
strcmp __flag $program "ngspice" * Load the codemodels
if $__flag = 0 if $?xspice_enabled
* Load the codemodels * Load the codemodels
codemodel ../lib/ngspice/spice2poly.cm codemodel ../lib/ngspice/spice2poly.cm
@ -26,4 +26,17 @@ if $__flag = 0
codemodel ../lib/ngspice/table.cm codemodel ../lib/ngspice/table.cm
end end
unset __flag
* Load the OpenVAF/OSDI models
if $?osdi_enabled
osdi ../lib/ngspice/asmhemt.osdi
osdi ../lib/ngspice/bjt504t.osdi
osdi ../lib/ngspice/BSIMBULK107.osdi
osdi ../lib/ngspice/BSIMCMG.osdi
osdi ../lib/ngspice/HICUMl0-2.0.osdi
osdi ../lib/ngspice/psp103.osdi
osdi ../lib/ngspice/r2_cmc.osdi
osdi ../lib/ngspice/vbic_4T_et_cf.osdi
end

19
visualc/spinitd
View File

@ -14,8 +14,8 @@ set filetype=ascii
set num_threads=8 set num_threads=8
*set interactive *set interactive
strcmp __flag $program "ngspice" * Load the codemodels
if $__flag = 0 if $?xspice_enabled
* Load the codemodels * Load the codemodels
codemodel C:/Spiced/lib/ngspice/spice2poly.cm codemodel C:/Spiced/lib/ngspice/spice2poly.cm
@ -27,4 +27,17 @@ if $__flag = 0
end end
unset __flag
* Load the OpenVAF/OSDI models
if $?osdi_enabled
osdi C:/Spiced/lib/ngspice/asmhemt.osdi
osdi C:/Spiced/lib/ngspice/bjt504t.osdi
osdi C:/Spiced/lib/ngspice/BSIMBULK107.osdi
osdi C:/Spiced/lib/ngspice/BSIMCMG.osdi
osdi C:/Spiced/lib/ngspice/HICUMl0-2.0.osdi
osdi C:/Spiced/lib/ngspice/psp103.osdi
osdi C:/Spiced/lib/ngspice/r2_cmc.osdi
osdi C:/Spiced/lib/ngspice/vbic_4T_et_cf.osdi
end

19
visualc/spinitd64
View File

@ -14,8 +14,8 @@ set filetype=ascii
set num_threads=4 set num_threads=4
set interactive set interactive
strcmp __flag $program "ngspice" * Load the codemodels
if $__flag = 0 if $?xspice_enabled
* Load the codemodels * Load the codemodels
codemodel C:/Spice64d/lib/ngspice/spice2poly.cm codemodel C:/Spice64d/lib/ngspice/spice2poly.cm
@ -27,4 +27,17 @@ if $__flag = 0
end end
unset __flag
* Load the OpenVAF/OSDI models
if $?osdi_enabled
osdi C:/Spice64d/lib/ngspice/asmhemt.osdi
osdi C:/Spice64d/lib/ngspice/bjt504t.osdi
osdi C:/Spice64d/lib/ngspice/BSIMBULK107.osdi
osdi C:/Spice64d/lib/ngspice/BSIMCMG.osdi
osdi C:/Spice64d/lib/ngspice/HICUMl0-2.0.osdi
osdi C:/Spice64d/lib/ngspice/psp103.osdi
osdi C:/Spice64d/lib/ngspice/r2_cmc.osdi
osdi C:/Spice64d/lib/ngspice/vbic_4T_et_cf.osdi
end

20
visualc/spinitr
View File

@ -14,8 +14,8 @@ set filetype=ascii
set num_threads=8 set num_threads=8
*set interactive *set interactive
strcmp __flag $program "ngspice" * Load the codemodels
if $__flag = 0 if $?xspice_enabled
* Load the codemodels * Load the codemodels
codemodel C:/Spice/lib/ngspice/spice2poly.cm codemodel C:/Spice/lib/ngspice/spice2poly.cm
@ -25,6 +25,18 @@ if $__flag = 0
codemodel C:/Spice/lib/ngspice/xtraevt.cm codemodel C:/Spice/lib/ngspice/xtraevt.cm
codemodel C:/Spice/lib/ngspice/table.cm codemodel C:/Spice/lib/ngspice/table.cm
end end
unset __flag
* Load the OpenVAF/OSDI models
if $?osdi_enabled
osdi C:/Spice/lib/ngspice/asmhemt.osdi
osdi C:/Spice/lib/ngspice/bjt504t.osdi
osdi C:/Spice/lib/ngspice/BSIMBULK107.osdi
osdi C:/Spice/lib/ngspice/BSIMCMG.osdi
osdi C:/Spice/lib/ngspice/HICUMl0-2.0.osdi
osdi C:/Spice/lib/ngspice/psp103.osdi
osdi C:/Spice/lib/ngspice/r2_cmc.osdi
osdi C:/Spice/lib/ngspice/vbic_4T_et_cf.osdi
end

19
visualc/spinitr64
View File

@ -14,8 +14,8 @@ set filetype=ascii
set num_threads=8 set num_threads=8
*set interactive *set interactive
strcmp __flag $program "ngspice" * Load the codemodels
if $__flag = 0 if $?xspice_enabled
* Load the codemodels * Load the codemodels
codemodel C:/Spice64/lib/ngspice/spice2poly.cm codemodel C:/Spice64/lib/ngspice/spice2poly.cm
@ -27,4 +27,17 @@ if $__flag = 0
end end
unset __flag
* Load the OpenVAF/OSDI models
if $?osdi_enabled
osdi C:/Spice64/lib/ngspice/asmhemt.osdi
osdi C:/Spice64/lib/ngspice/bjt504t.osdi
osdi C:/Spice64/lib/ngspice/BSIMBULK107.osdi
osdi C:/Spice64/lib/ngspice/BSIMCMG.osdi
osdi C:/Spice64/lib/ngspice/HICUMl0-2.0.osdi
osdi C:/Spice64/lib/ngspice/psp103.osdi
osdi C:/Spice64/lib/ngspice/r2_cmc.osdi
osdi C:/Spice64/lib/ngspice/vbic_4T_et_cf.osdi
end