CUSPICE Integration from scratch
This commit is contained in:
Francesco Lannutti
rlar
parent
260b54a275
commit
b9b1a33cca
59
configure.ac
59
configure.ac
|
|
@ -198,7 +198,64 @@ if test "x$enable_klu" = xyes; then
|
|||
AC_DEFINE(KLU, [], [Define if we want KLU linear systems solver])
|
||||
AC_MSG_WARN([KLU solver enabled])
|
||||
fi
|
||||
AM_CONDITIONAL([KLU_WANTED], [test "x$enable_klu" = xyes])
|
||||
AM_CONDITIONAL([KLU_WANTED], [test "x$enable_klu" = xyes || test "x$enable_cuspice" = xyes])
|
||||
|
||||
# --enable-cuspice: Use CUSPICE (NGSPICE on CUDA Platforms)
|
||||
AC_ARG_ENABLE([cuspice],
|
||||
[AS_HELP_STRING([--enable-cuspice], [Use CUSPICE (NGSPICE on CUDA Platforms)])])
|
||||
|
||||
# Add CUSPICE (NGSPICE on CUDA Platforms) to NGSPICE
|
||||
if test "x$enable_cuspice" = xyes; then
|
||||
AC_DEFINE(USE_CUSPICE, [], [Define if we want CUSPICE (NGSPICE on CUDA Platforms) enabled])
|
||||
AC_MSG_WARN(CUSPICE (NGSPICE on CUDA Platforms) enabled)
|
||||
AC_ARG_WITH([cuda],
|
||||
[AS_HELP_STRING([--with-cuda=PATH], [Define the prefix where cuda is installed (default=/usr/local/cuda)])])
|
||||
ARCH=`uname -m`
|
||||
if test -n "$with_cuda"
|
||||
then
|
||||
CUDA_CPPFLAGS="-I$with_cuda/include"
|
||||
if [[ $ARCH == "x86_64" ]]
|
||||
then
|
||||
CUDA_LIBS="-L$with_cuda/lib64 -lcuda -lcudart"
|
||||
else
|
||||
CUDA_LIBS="-L$with_cuda/lib -lcuda -lcudart"
|
||||
fi
|
||||
NVCC="$with_cuda/bin/nvcc"
|
||||
else
|
||||
CUDA_CPPFLAGS="-I/usr/local/cuda/include"
|
||||
if [[ $ARCH == "x86_64" ]]
|
||||
then
|
||||
CUDA_LIBS="-L/usr/local/cuda/lib64 -lcuda -lcudart"
|
||||
else
|
||||
CUDA_LIBS="-L/usr/local/cuda/lib -lcuda -lcudart"
|
||||
fi
|
||||
AC_PATH_PROG(NVCC, nvcc, "no")
|
||||
AS_IF([test "x$NVCC" = xno],
|
||||
[AC_MSG_ERROR([NVCC compiler not found!])])
|
||||
NVCC="nvcc"
|
||||
fi
|
||||
AC_SUBST(CUDA_CPPFLAGS)
|
||||
AC_SUBST(CUDA_LIBS)
|
||||
AC_SUBST(NVCC)
|
||||
|
||||
# NVCC Compilation Flags
|
||||
CUDA_CFLAGS="-gencode arch=compute_20,\"code=sm_20\""
|
||||
CUDA_CFLAGS+=" -gencode arch=compute_30,\"code=sm_30\""
|
||||
CUDA_CFLAGS+=" -gencode arch=compute_32,\"code=sm_32\""
|
||||
CUDA_CFLAGS+=" -gencode arch=compute_35,\"code=sm_35\""
|
||||
CUDA_CFLAGS+=" -gencode arch=compute_50,\"code=sm_50\""
|
||||
CUDA_CFLAGS+=" -DCOMPILED_BY_NVCC"
|
||||
if test "x$enable_debug" = xno; then
|
||||
CUDA_CFLAGS+=" -O2"
|
||||
else
|
||||
CUDA_CFLAGS+=" -g -O1 -G"
|
||||
fi
|
||||
AC_SUBST(CUDA_CFLAGS)
|
||||
|
||||
AC_DEFINE(KLU, [], [Define if we want KLU linear systems solver])
|
||||
AC_MSG_WARN([KLU solver enabled, because CUSPICE needs it])
|
||||
fi
|
||||
AM_CONDITIONAL([USE_CUSPICE_WANTED], [test "x$enable_cuspice" = xyes])
|
||||
|
||||
|
||||
# Enable maintainer commands only if requested
|
||||
|
|
|
|||
|
|
@ -184,6 +184,10 @@ com_version(wordlist *wl)
|
|||
"** Compiled with Sparse Direct Linear Solver\n"
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
"** Compiled with CUSPICE (NGSPICE on CUDA Platforms)\n"
|
||||
#endif
|
||||
|
||||
"** The U. C. Berkeley CAD Group\n"
|
||||
"** Copyright 1985-1994, Regents of the University of California.\n"
|
||||
"** %s\n",
|
||||
|
|
@ -224,6 +228,10 @@ com_version(wordlist *wl)
|
|||
"** Compiled with Sparse Direct Linear Solver\n"
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
"** Compiled with CUSPICE (NGSPICE on CUDA Platforms)\n"
|
||||
#endif
|
||||
|
||||
"** The U. C. Berkeley CAD Group\n"
|
||||
"** Copyright 1985-1994, Regents of the University of California.\n"
|
||||
"** %s\n",
|
||||
|
|
|
|||
|
|
@ -2,7 +2,9 @@
|
|||
#define ngspice_BOOL_H
|
||||
|
||||
//typedef unsigned char bool;
|
||||
#ifndef COMPILED_BY_NVCC
|
||||
typedef int bool;
|
||||
#endif
|
||||
|
||||
typedef int BOOL ;
|
||||
|
||||
|
|
|
|||
|
|
@ -293,6 +293,45 @@ struct CKTcircuit {
|
|||
unsigned int CKTkluMODE:1 ;
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
double *(d_CKTstates[8]) ;
|
||||
#define d_CKTstate0 d_CKTstates[0]
|
||||
#define d_CKTstate1 d_CKTstates[1]
|
||||
#define d_CKTstate2 d_CKTstates[2]
|
||||
#define d_CKTstate3 d_CKTstates[3]
|
||||
#define d_CKTstate4 d_CKTstates[4]
|
||||
#define d_CKTstate5 d_CKTstates[5]
|
||||
#define d_CKTstate6 d_CKTstates[6]
|
||||
#define d_CKTstate7 d_CKTstates[7]
|
||||
|
||||
double *d_CKTrhsOld ;
|
||||
int *d_CKTnoncon ;
|
||||
int d_MatrixSize ;
|
||||
|
||||
int CKTdiagElements ;
|
||||
int total_n_values ;
|
||||
int total_n_Ptr ;
|
||||
double *d_CKTloadOutput ;
|
||||
int *CKTtopologyMatrixCOOi ;
|
||||
int *CKTtopologyMatrixCOOj ;
|
||||
double *CKTtopologyMatrixCOOx ;
|
||||
int *CKTtopologyMatrixCSRp ;
|
||||
int *d_CKTtopologyMatrixCSRp ;
|
||||
int *d_CKTtopologyMatrixCSRj ;
|
||||
double *d_CKTtopologyMatrixCSRx ;
|
||||
|
||||
int total_n_valuesRHS ;
|
||||
int total_n_PtrRHS ;
|
||||
double *d_CKTloadOutputRHS ;
|
||||
int *CKTtopologyMatrixCOOiRHS ;
|
||||
int *CKTtopologyMatrixCOOjRHS ;
|
||||
double *CKTtopologyMatrixCOOxRHS ;
|
||||
int *CKTtopologyMatrixCSRpRHS ;
|
||||
int *d_CKTtopologyMatrixCSRpRHS ;
|
||||
int *d_CKTtopologyMatrixCSRjRHS ;
|
||||
double *d_CKTtopologyMatrixCSRxRHS ;
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -123,6 +123,13 @@ typedef struct SPICEdev {
|
|||
/* routine to convert Complex CSC array to Real CSC array */
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int (*cuDEVdestroy)(GENmodel *) ;
|
||||
/* routine to Destroy the CUSPICE allocations */
|
||||
int (*DEVtopology)(GENmodel *, CKTcircuit *, int *, int *) ;
|
||||
/* routine to create the Topology Matrix */
|
||||
#endif
|
||||
|
||||
} SPICEdev; /* instance of structure for each possible type of device */
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -49,6 +49,14 @@ typedef struct sSMPmatrix {
|
|||
#define CKTkluOFF 0 /* KLU MODE OFF definition */
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
double *d_CKTkluAx ;
|
||||
double *d_CKTrhs ;
|
||||
|
||||
void *CKTcsrmvHandle ;
|
||||
void *CKTcsrmvDescr ;
|
||||
#endif
|
||||
|
||||
} SMPmatrix ;
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -50,6 +50,13 @@ NIinit(CKTcircuit *ckt)
|
|||
klu_defaults (ckt->CKTmatrix->CKTkluCommon) ;
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
ckt->CKTmatrix->d_CKTkluAx = NULL ;
|
||||
ckt->CKTmatrix->d_CKTrhs = NULL ;
|
||||
ckt->CKTmatrix->CKTcsrmvHandle = NULL ;
|
||||
ckt->CKTmatrix->CKTcsrmvDescr = NULL ;
|
||||
#endif
|
||||
|
||||
ckt->CKTniState = NIUNINITIALIZED;
|
||||
return (SMPnewMatrix (ckt->CKTmatrix));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -109,4 +109,19 @@ endif
|
|||
|
||||
AM_CPPFLAGS = @AM_CPPFLAGS@ -I$(top_srcdir)/src/include -I$(top_srcdir)/src/spicelib/devices
|
||||
AM_CFLAGS = $(STATIC)
|
||||
|
||||
if USE_CUSPICE_WANTED
|
||||
|
||||
libckt_la_SOURCES += \
|
||||
CUSPICE/cucktflush.c \
|
||||
CUSPICE/cucktnonconupdate.c \
|
||||
CUSPICE/cucktrhsoldupdate.c \
|
||||
CUSPICE/cucktsetup.c \
|
||||
CUSPICE/cucktstatesupdate.c \
|
||||
CUSPICE/cucktsystem.c
|
||||
|
||||
AM_CPPFLAGS += $(CUDA_CPPFLAGS)
|
||||
AM_LDFLAGS = $(CUDA_LIBS) -lcusparse
|
||||
endif
|
||||
|
||||
MAINTAINERCLEANFILES = Makefile.in
|
||||
|
|
|
|||
|
|
@ -40,6 +40,12 @@ CKTdestroy(CKTcircuit *ckt)
|
|||
if ( DEVices[i] && DEVices[i]->DEVdestroy && ckt->CKThead[i] ) {
|
||||
DEVices[i]->DEVdestroy (&(ckt->CKThead[i]));
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
if (DEVices [i] && DEVices [i]->cuDEVdestroy && ckt->CKThead [i])
|
||||
DEVices [i]->cuDEVdestroy (ckt->CKThead [i]) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
for(i=0;i<=ckt->CKTmaxOrder+1;i++){
|
||||
FREE(ckt->CKTstates[i]);
|
||||
|
|
|
|||
|
|
@ -18,6 +18,23 @@ Modified: 2000 AlansFixes
|
|||
#include "ngspice/devdefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#include "cuda_runtime.h"
|
||||
#include "cusparse_v2.h"
|
||||
|
||||
/* cudaMemcpy MACRO to check it for errors --> CUDAMEMCPYCHECK(name of pointer, dimension, type, status) */
|
||||
#define CUDAMEMCPYCHECK(a, b, c, d) \
|
||||
if (d != cudaSuccess) \
|
||||
{ \
|
||||
fprintf (stderr, "cuCKTload routine...\n") ; \
|
||||
fprintf (stderr, "Error: cudaMemcpy failed on %s size of %d bytes\n", #a, (int)(b * sizeof(c))) ; \
|
||||
fprintf (stderr, "Error: %s = %d, %s\n", #d, d, cudaGetErrorString (d)) ; \
|
||||
return (E_NOMEM) ; \
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef XSPICE
|
||||
/* gtri - add - wbk - 11/26/90 - add include for MIF global data */
|
||||
#include "ngspice/mif.h"
|
||||
|
|
@ -29,8 +46,17 @@ static int ZeroNoncurRow(SMPmatrix *matrix, CKTnode *nodes, int rownum);
|
|||
int
|
||||
CKTload(CKTcircuit *ckt)
|
||||
{
|
||||
#ifdef USE_CUSPICE
|
||||
cusparseStatus_t cusparseStatus ;
|
||||
double alpha, beta ;
|
||||
int status ;
|
||||
alpha = 1.0 ;
|
||||
beta = 0.0 ;
|
||||
#else
|
||||
int size ;
|
||||
#endif
|
||||
|
||||
int i;
|
||||
int size;
|
||||
double startTime;
|
||||
CKTnode *node;
|
||||
int error;
|
||||
|
|
@ -49,18 +75,43 @@ CKTload(CKTcircuit *ckt)
|
|||
#endif
|
||||
|
||||
startTime = SPfrontEnd->IFseconds();
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTflush (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#else
|
||||
size = SMPmatSize(ckt->CKTmatrix);
|
||||
for (i = 0; i <= size; i++) {
|
||||
ckt->CKTrhs[i] = 0;
|
||||
}
|
||||
SMPclear(ckt->CKTmatrix);
|
||||
#endif
|
||||
|
||||
#ifdef STEPDEBUG
|
||||
noncon = ckt->CKTnoncon;
|
||||
#endif /* STEPDEBUG */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTnonconUpdateHtoD (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
|
||||
status = cuCKTrhsOldUpdateHtoD (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
for (i = 0; i < DEVmaxnum; i++) {
|
||||
if (DEVices[i] && DEVices[i]->DEVload && ckt->CKThead[i]) {
|
||||
error = DEVices[i]->DEVload (ckt->CKThead[i], ckt);
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTnonconUpdateDtoH (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
if (ckt->CKTnoncon)
|
||||
ckt->CKTtroubleNode = 0;
|
||||
#ifdef STEPDEBUG
|
||||
|
|
@ -74,6 +125,48 @@ CKTload(CKTcircuit *ckt)
|
|||
}
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* Copy the CKTdiagGmin value to the GPU */
|
||||
status = cudaMemcpy (ckt->d_CKTloadOutput + ckt->total_n_values, &(ckt->CKTdiagGmin), sizeof(double), cudaMemcpyHostToDevice) ;
|
||||
CUDAMEMCPYCHECK (ckt->d_CKTloadOutput + ckt->total_n_values, 1, double, status)
|
||||
|
||||
/* Performing CSRMV for the Sparse Matrix using CUSPARSE */
|
||||
cusparseStatus = cusparseDcsrmv ((cusparseHandle_t)(ckt->CKTmatrix->CKTcsrmvHandle),
|
||||
CUSPARSE_OPERATION_NON_TRANSPOSE,
|
||||
ckt->CKTmatrix->CKTklunz, ckt->total_n_values + 1,
|
||||
ckt->total_n_Ptr + ckt->CKTdiagElements,
|
||||
&alpha, (cusparseMatDescr_t)(ckt->CKTmatrix->CKTcsrmvDescr),
|
||||
ckt->d_CKTtopologyMatrixCSRx, ckt->d_CKTtopologyMatrixCSRp,
|
||||
ckt->d_CKTtopologyMatrixCSRj, ckt->d_CKTloadOutput, &beta,
|
||||
ckt->CKTmatrix->d_CKTkluAx) ;
|
||||
|
||||
if (cusparseStatus != CUSPARSE_STATUS_SUCCESS)
|
||||
{
|
||||
fprintf (stderr, "CUSPARSE MATRIX Call Error\n") ;
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
|
||||
/* Performing CSRMV for the RHS using CUSPARSE */
|
||||
cusparseStatus = cusparseDcsrmv ((cusparseHandle_t)(ckt->CKTmatrix->CKTcsrmvHandle),
|
||||
CUSPARSE_OPERATION_NON_TRANSPOSE,
|
||||
ckt->CKTmatrix->CKTkluN + 1, ckt->total_n_valuesRHS, ckt->total_n_PtrRHS,
|
||||
&alpha, (cusparseMatDescr_t)(ckt->CKTmatrix->CKTcsrmvDescr),
|
||||
ckt->d_CKTtopologyMatrixCSRxRHS, ckt->d_CKTtopologyMatrixCSRpRHS,
|
||||
ckt->d_CKTtopologyMatrixCSRjRHS, ckt->d_CKTloadOutputRHS, &beta,
|
||||
ckt->CKTmatrix->d_CKTrhs) ;
|
||||
|
||||
if (cusparseStatus != CUSPARSE_STATUS_SUCCESS)
|
||||
{
|
||||
fprintf (stderr, "CUSPARSE RHS Call Error\n") ;
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
|
||||
cudaDeviceSynchronize () ;
|
||||
|
||||
status = cuCKTsystemDtoH (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
#ifdef XSPICE
|
||||
/* gtri - add - wbk - 11/26/90 - reset the MIF init flags */
|
||||
|
|
|
|||
|
|
@ -16,6 +16,9 @@ static int spice3_gmin (CKTcircuit *, long int, long int, int);
|
|||
static int gillespie_src (CKTcircuit *, long int, long int, int);
|
||||
static int spice3_src (CKTcircuit *, long int, long int, int);
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
int
|
||||
CKTop (CKTcircuit * ckt, long int firstmode, long int continuemode,
|
||||
|
|
@ -127,6 +130,10 @@ static int
|
|||
dynamic_gmin (CKTcircuit * ckt, long int firstmode,
|
||||
long int continuemode, int iterlim)
|
||||
{
|
||||
#ifdef USE_CUSPICE
|
||||
int status ;
|
||||
#endif
|
||||
|
||||
double OldGmin, gtarget, factor;
|
||||
int success, failed, converged;
|
||||
|
||||
|
|
@ -152,6 +159,12 @@ dynamic_gmin (CKTcircuit * ckt, long int firstmode,
|
|||
for (i = 0; i < ckt->CKTnumStates; i++)
|
||||
ckt->CKTstate0 [i] = 0;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstatesFlush (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
factor = ckt->CKTgminFactor;
|
||||
OldGmin = 1e-2;
|
||||
ckt->CKTdiagGmin = OldGmin / factor;
|
||||
|
|
@ -180,6 +193,12 @@ dynamic_gmin (CKTcircuit * ckt, long int firstmode,
|
|||
i++;
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstate0UpdateDtoH (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
for (i = 0; i < ckt->CKTnumStates; i++) {
|
||||
OldCKTstate0[i] = ckt->CKTstate0[i];
|
||||
}
|
||||
|
|
@ -222,6 +241,13 @@ dynamic_gmin (CKTcircuit * ckt, long int firstmode,
|
|||
for (i = 0; i < ckt->CKTnumStates; i++) {
|
||||
ckt->CKTstate0[i] = OldCKTstate0[i];
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstate0UpdateHtoD (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -355,6 +381,9 @@ static int
|
|||
gillespie_src (CKTcircuit * ckt, long int firstmode,
|
||||
long int continuemode, int iterlim)
|
||||
{
|
||||
#ifdef USE_CUSPICE
|
||||
int status ;
|
||||
#endif
|
||||
|
||||
int converged, NumNodes, i, iters;
|
||||
double raise, ConvFact;
|
||||
|
|
@ -386,6 +415,12 @@ gillespie_src (CKTcircuit * ckt, long int firstmode,
|
|||
for (i = 0; i < ckt->CKTnumStates; i++)
|
||||
ckt->CKTstate0[i] = 0;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstatesFlush (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
/* First, try a straight solution with all sources at zero */
|
||||
|
||||
fprintf (stderr, "Supplies reduced to %8.4f%% ", ckt->CKTsrcFact * 100);
|
||||
|
|
@ -445,6 +480,12 @@ gillespie_src (CKTcircuit * ckt, long int firstmode,
|
|||
i++;
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstate0UpdateDtoH (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
for (i = 0; i < ckt->CKTnumStates; i++)
|
||||
OldCKTstate0[i] = ckt->CKTstate0[i];
|
||||
|
||||
|
|
@ -482,6 +523,12 @@ gillespie_src (CKTcircuit * ckt, long int firstmode,
|
|||
i++;
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstate0UpdateDtoH (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
for (i = 0; i < ckt->CKTnumStates; i++)
|
||||
OldCKTstate0[i] = ckt->CKTstate0[i];
|
||||
|
||||
|
|
@ -521,6 +568,12 @@ gillespie_src (CKTcircuit * ckt, long int firstmode,
|
|||
for (i = 0; i < ckt->CKTnumStates; i++)
|
||||
ckt->CKTstate0[i] = OldCKTstate0[i];
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstate0UpdateHtoD (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
if ((ckt->CKTsrcFact) > 1)
|
||||
|
|
|
|||
|
|
@ -15,6 +15,11 @@ Author: 1985 Thomas L. Quarles
|
|||
#include "ngspice/devdefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#include "cusparse_v2.h"
|
||||
#endif
|
||||
|
||||
#ifdef USE_OMP
|
||||
#include <omp.h>
|
||||
#include "ngspice/cpextern.h"
|
||||
|
|
@ -41,9 +46,60 @@ BindCompare (const void *a, const void *b)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
typedef struct sElement {
|
||||
int row ;
|
||||
int col ;
|
||||
double val ;
|
||||
} Element ;
|
||||
|
||||
static int
|
||||
Compare (const void *a, const void *b)
|
||||
{
|
||||
Element *A, *B ;
|
||||
A = (Element *)a ;
|
||||
B = (Element *)b ;
|
||||
return (A->row - B->row) ;
|
||||
}
|
||||
|
||||
static int
|
||||
Compress (int *Ai, int *Bp, int num_rows, int n_COO)
|
||||
{
|
||||
int i, j ;
|
||||
|
||||
for (i = 0 ; i <= Ai [0] ; i++)
|
||||
Bp [i] = 0 ;
|
||||
|
||||
j = Ai [0] + 1 ;
|
||||
for (i = 1 ; i < n_COO ; i++)
|
||||
{
|
||||
if (Ai [i] == Ai [i - 1] + 1)
|
||||
{
|
||||
Bp [j] = i ;
|
||||
j++ ;
|
||||
}
|
||||
else if (Ai [i] > Ai [i - 1] + 1)
|
||||
{
|
||||
for ( ; j <= Ai [i] ; j++)
|
||||
Bp [j] = i ;
|
||||
}
|
||||
}
|
||||
|
||||
for ( ; j <= num_rows ; j++)
|
||||
Bp [j] = i ;
|
||||
|
||||
return 0 ;
|
||||
}
|
||||
#endif
|
||||
|
||||
int
|
||||
CKTsetup(CKTcircuit *ckt)
|
||||
{
|
||||
#ifdef USE_CUSPICE
|
||||
int status ;
|
||||
cusparseStatus_t cusparseStatus ;
|
||||
#endif
|
||||
|
||||
int i;
|
||||
int error;
|
||||
#ifdef XSPICE
|
||||
|
|
@ -135,6 +191,124 @@ CKTsetup(CKTcircuit *ckt)
|
|||
DEVices [i]->DEVbindCSC (ckt->CKThead [i], ckt) ;
|
||||
|
||||
ckt->CKTmatrix->CKTkluMatrixIsComplex = CKTkluMatrixReal ;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
fprintf (stderr, "Using CUSPICE (NGSPICE on CUDA Platforms)\n") ;
|
||||
|
||||
/* In the DEVsetup the Position Vectors must be assigned and copied to the GPU */
|
||||
int j, k, u, TopologyNNZ ;
|
||||
int uRHS, TopologyNNZRHS ;
|
||||
int ret ;
|
||||
|
||||
|
||||
/* CKTloadOutput Vector allocation - DIRECTLY in the GPU memory */
|
||||
|
||||
/* CKTloadOutput for the RHS Vector allocation - DIRECTLY in the GPU memory */
|
||||
|
||||
|
||||
/* Diagonal Elements Counting */
|
||||
j = 0 ;
|
||||
for (i = 0 ; i < n ; i++)
|
||||
if (ckt->CKTmatrix->CKTdiag_CSC [i] != NULL)
|
||||
j++ ;
|
||||
|
||||
ckt->CKTdiagElements = j ;
|
||||
|
||||
/* Topology Matrix Pre-Allocation in COO format */
|
||||
TopologyNNZ = ckt->total_n_Ptr + ckt->CKTdiagElements ; // + ckt->CKTdiagElements because of CKTdiagGmin
|
||||
// without the zeroes along the diagonal
|
||||
ckt->CKTtopologyMatrixCOOi = TMALLOC (int, TopologyNNZ) ;
|
||||
ckt->CKTtopologyMatrixCOOj = TMALLOC (int, TopologyNNZ) ;
|
||||
ckt->CKTtopologyMatrixCOOx = TMALLOC (double, TopologyNNZ) ;
|
||||
|
||||
/* Topology Matrix for the RHS Pre-Allocation in COO format */
|
||||
TopologyNNZRHS = ckt->total_n_PtrRHS ;
|
||||
ckt->CKTtopologyMatrixCOOiRHS = TMALLOC (int, TopologyNNZRHS) ;
|
||||
ckt->CKTtopologyMatrixCOOjRHS = TMALLOC (int, TopologyNNZRHS) ;
|
||||
ckt->CKTtopologyMatrixCOOxRHS = TMALLOC (double, TopologyNNZRHS) ;
|
||||
|
||||
|
||||
/* Topology Matrix Pre-Allocation in CSR format */
|
||||
ckt->CKTtopologyMatrixCSRp = TMALLOC (int, nz + 1) ;
|
||||
|
||||
/* Topology Matrix for the RHS Pre-Allocation in CSR format */
|
||||
ckt->CKTtopologyMatrixCSRpRHS = TMALLOC (int, (n + 1) + 1) ;
|
||||
|
||||
|
||||
/* Topology Matrix Construction & Topology Matrix for the RHS Construction */
|
||||
|
||||
u = 0 ;
|
||||
uRHS = 0 ;
|
||||
for (i = 0 ; i < DEVmaxnum ; i++)
|
||||
if (DEVices [i] && DEVices [i]->DEVtopology && ckt->CKThead [i])
|
||||
DEVices [i]->DEVtopology (ckt->CKThead [i], ckt, &u, &uRHS) ;
|
||||
|
||||
|
||||
/* CKTdiagGmin Contribute Addition to the Topology Matrix */
|
||||
k = u ;
|
||||
for (j = 0 ; j < n ; j++)
|
||||
{
|
||||
if (ckt->CKTmatrix->CKTdiag_CSC [j] >= ckt->CKTmatrix->CKTkluAx)
|
||||
{
|
||||
ckt->CKTtopologyMatrixCOOi [k] = (int)(ckt->CKTmatrix->CKTdiag_CSC [j] - ckt->CKTmatrix->CKTkluAx) ;
|
||||
ckt->CKTtopologyMatrixCOOj [k] = ckt->total_n_values ;
|
||||
ckt->CKTtopologyMatrixCOOx [k] = 1 ;
|
||||
k++ ;
|
||||
}
|
||||
}
|
||||
|
||||
/* Copy the Topology Matrix to the GPU in COO format */
|
||||
|
||||
|
||||
/* COO format to CSR format Conversion using Quick Sort */
|
||||
|
||||
Element *TopologyStruct ;
|
||||
TopologyStruct = TMALLOC (Element, TopologyNNZ) ;
|
||||
|
||||
for (i = 0 ; i < TopologyNNZ ; i++)
|
||||
{
|
||||
TopologyStruct [i].row = ckt->CKTtopologyMatrixCOOi [i] ;
|
||||
TopologyStruct [i].col = ckt->CKTtopologyMatrixCOOj [i] ;
|
||||
TopologyStruct [i].val = ckt->CKTtopologyMatrixCOOx [i] ;
|
||||
}
|
||||
|
||||
qsort (TopologyStruct, (size_t)TopologyNNZ, sizeof(Element), Compare) ;
|
||||
|
||||
for (i = 0 ; i < TopologyNNZ ; i++)
|
||||
{
|
||||
ckt->CKTtopologyMatrixCOOi [i] = TopologyStruct [i].row ;
|
||||
ckt->CKTtopologyMatrixCOOj [i] = TopologyStruct [i].col ;
|
||||
ckt->CKTtopologyMatrixCOOx [i] = TopologyStruct [i].val ;
|
||||
}
|
||||
|
||||
ret = Compress (ckt->CKTtopologyMatrixCOOi, ckt->CKTtopologyMatrixCSRp, nz, TopologyNNZ) ;
|
||||
|
||||
/* COO format to CSR format Conversion for the RHS using Quick Sort */
|
||||
|
||||
Element *TopologyStructRHS ;
|
||||
TopologyStructRHS = TMALLOC (Element, TopologyNNZRHS) ;
|
||||
|
||||
for (i = 0 ; i < TopologyNNZRHS ; i++)
|
||||
{
|
||||
TopologyStructRHS [i].row = ckt->CKTtopologyMatrixCOOiRHS [i] ;
|
||||
TopologyStructRHS [i].col = ckt->CKTtopologyMatrixCOOjRHS [i] ;
|
||||
TopologyStructRHS [i].val = ckt->CKTtopologyMatrixCOOxRHS [i] ;
|
||||
}
|
||||
|
||||
qsort (TopologyStructRHS, (size_t)TopologyNNZRHS, sizeof(Element), Compare) ;
|
||||
|
||||
for (i = 0 ; i < TopologyNNZRHS ; i++)
|
||||
{
|
||||
ckt->CKTtopologyMatrixCOOiRHS [i] = TopologyStructRHS [i].row ;
|
||||
ckt->CKTtopologyMatrixCOOjRHS [i] = TopologyStructRHS [i].col ;
|
||||
ckt->CKTtopologyMatrixCOOxRHS [i] = TopologyStructRHS [i].val ;
|
||||
}
|
||||
|
||||
ret = Compress (ckt->CKTtopologyMatrixCOOiRHS, ckt->CKTtopologyMatrixCSRpRHS, n + 1, TopologyNNZRHS) ;
|
||||
|
||||
/* Multiply the Topology Matrix by the M Vector to build the Final CSC Matrix - after the CKTload Call */
|
||||
#endif
|
||||
|
||||
} else {
|
||||
fprintf (stderr, "Using SPARSE 1.3 as Direct Linear Solver\n") ;
|
||||
}
|
||||
|
|
@ -143,6 +317,34 @@ CKTsetup(CKTcircuit *ckt)
|
|||
for(i=0;i<=MAX(2,ckt->CKTmaxOrder)+1;i++) { /* dctran needs 3 states as minimum */
|
||||
CKALLOC(ckt->CKTstates[i],ckt->CKTnumStates,double);
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
ckt->d_MatrixSize = SMPmatSize (ckt->CKTmatrix) ;
|
||||
status = cuCKTsetup (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
|
||||
/* CUSPARSE Handle Creation */
|
||||
cusparseStatus = cusparseCreate ((cusparseHandle_t *)(&(ckt->CKTmatrix->CKTcsrmvHandle))) ;
|
||||
if (cusparseStatus != CUSPARSE_STATUS_SUCCESS)
|
||||
{
|
||||
fprintf (stderr, "CUSPARSE Handle Setup Error\n") ;
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
|
||||
/* CUSPARSE Matrix Descriptor Creation */
|
||||
cusparseStatus = cusparseCreateMatDescr ((cusparseMatDescr_t *)(&(ckt->CKTmatrix->CKTcsrmvDescr))) ;
|
||||
if (cusparseStatus != CUSPARSE_STATUS_SUCCESS)
|
||||
{
|
||||
fprintf (stderr, "CUSPARSE Matrix Descriptor Setup Error\n") ;
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
|
||||
/* CUSPARSE Matrix Properties Definition */
|
||||
cusparseSetMatType ((cusparseMatDescr_t)(ckt->CKTmatrix->CKTcsrmvDescr), CUSPARSE_MATRIX_TYPE_GENERAL) ;
|
||||
cusparseSetMatIndexBase ((cusparseMatDescr_t)(ckt->CKTmatrix->CKTcsrmvDescr), CUSPARSE_INDEX_BASE_ZERO) ;
|
||||
#endif
|
||||
|
||||
#ifdef WANT_SENSE2
|
||||
if(ckt->CKTsenInfo){
|
||||
/* to allocate memory to sensitivity structures if
|
||||
|
|
|
|||
|
|
@ -62,18 +62,26 @@ do { \
|
|||
ckt->CKTstat->STATtranSyncTime += ckt->CKTstat->STATsyncTime - startkTime; \
|
||||
} while(0)
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
int
|
||||
DCtran(CKTcircuit *ckt,
|
||||
int restart) /* forced restart flag */
|
||||
{
|
||||
#ifdef USE_CUSPICE
|
||||
int status ;
|
||||
#else
|
||||
double *temp ;
|
||||
#endif
|
||||
|
||||
TRANan *job = (TRANan *) ckt->CKTcurJob;
|
||||
|
||||
int i;
|
||||
double olddelta;
|
||||
double delta;
|
||||
double newdelta;
|
||||
double *temp;
|
||||
double startdTime;
|
||||
double startsTime;
|
||||
double startlTime;
|
||||
|
|
@ -340,8 +348,15 @@ DCtran(CKTcircuit *ckt,
|
|||
ckt->CKTmode = (ckt->CKTmode&MODEUIC) | MODETRAN | MODEINITTRAN;
|
||||
/* modeinittran set here */
|
||||
ckt->CKTag[0]=ckt->CKTag[1]=0;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstate01copy (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#else
|
||||
bcopy(ckt->CKTstate0, ckt->CKTstate1,
|
||||
(size_t) ckt->CKTnumStates * sizeof(double));
|
||||
#endif
|
||||
|
||||
#ifdef WANT_SENSE2
|
||||
if(ckt->CKTsenInfo && (ckt->CKTsenInfo->SENmode & TRANSEN)){
|
||||
|
|
@ -705,11 +720,17 @@ resume:
|
|||
ckt->CKTdeltaOld[i+1] = ckt->CKTdeltaOld[i];
|
||||
ckt->CKTdeltaOld[0] = ckt->CKTdelta;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstatesCircularBuffer (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#else
|
||||
temp = ckt->CKTstates[ckt->CKTmaxOrder+1];
|
||||
for(i=ckt->CKTmaxOrder;i>=0;i--) {
|
||||
ckt->CKTstates[i+1] = ckt->CKTstates[i];
|
||||
}
|
||||
ckt->CKTstates[0] = temp;
|
||||
#endif
|
||||
|
||||
/* 600 */
|
||||
for (;;) {
|
||||
|
|
@ -780,10 +801,18 @@ resume:
|
|||
ckt->CKTstat->STATtimePts ++;
|
||||
ckt->CKTmode = (ckt->CKTmode&MODEUIC)|MODETRAN | MODEINITPRED;
|
||||
if(firsttime) {
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstate123copy (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#else
|
||||
for(i=0;i<ckt->CKTnumStates;i++) {
|
||||
ckt->CKTstate2[i] = ckt->CKTstate1[i];
|
||||
ckt->CKTstate3[i] = ckt->CKTstate1[i];
|
||||
}
|
||||
#endif
|
||||
|
||||
}
|
||||
/* txl, cpl addition */
|
||||
if (converged == 1111) {
|
||||
|
|
@ -853,6 +882,13 @@ resume:
|
|||
goto chkStep;
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCKTstatesUpdateDtoH (ckt) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
newdelta = ckt->CKTdelta;
|
||||
error = CKTtrunc(ckt,&newdelta);
|
||||
if(error) {
|
||||
|
|
|
|||
|
|
@ -82,6 +82,11 @@ SPICEdev ASRCinfo = {
|
|||
/* DEVbindCSCComplexToReal */ NULL,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev BJTinfo = { /* description from struct IFdevice */
|
|||
/* DEVbindCSCComplexToReal */ BJTbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev B1info = {
|
|||
/* DEVbindCSCComplexToReal */ B1bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev B2info = {
|
|||
/* DEVbindCSCComplexToReal */ B2bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -80,6 +80,11 @@ SPICEdev BSIM3info = {
|
|||
/* DEVbindCSCComplexToReal */ BSIM3bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -78,6 +78,11 @@ SPICEdev B3SOIDDinfo = {
|
|||
/* DEVbindCSCComplexToReal */ B3SOIDDbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
|
|
|
|||
|
|
@ -79,6 +79,11 @@ SPICEdev B3SOIFDinfo = {
|
|||
/* DEVbindCSCComplexToReal */ B3SOIFDbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -80,6 +80,11 @@ SPICEdev B3SOIPDinfo = {
|
|||
/* DEVbindCSCComplexToReal */ B3SOIPDbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
|
|
|
|||
|
|
@ -79,6 +79,11 @@ SPICEdev B3v0info = {
|
|||
/* DEVbindCSCComplexToReal */ BSIM3v0bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -79,6 +79,11 @@ SPICEdev BSIM3v1info = {
|
|||
/* DEVbindCSCComplexToReal */ BSIM3v1bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -80,6 +80,11 @@ SPICEdev BSIM3v32info = {
|
|||
/* DEVbindCSCComplexToReal */ BSIM3v32bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -37,6 +37,21 @@ endif
|
|||
AM_CPPFLAGS = @AM_CPPFLAGS@ -I$(top_srcdir)/src/include
|
||||
AM_CFLAGS = $(STATIC)
|
||||
|
||||
if USE_CUSPICE_WANTED
|
||||
.cu.lo:
|
||||
$(AM_V_GEN)$(top_srcdir)/src/libtool_wrapper_for_cuda.tcl $@ $(AM_CFLAGS) $(NVCC) $(CUDA_CFLAGS) $(AM_CPPFLAGS) -c $<
|
||||
|
||||
libbsim4_la_SOURCES += \
|
||||
CUSPICE/b4topology.c \
|
||||
CUSPICE/cubsim4free.c \
|
||||
CUSPICE/cubsim4getic.c \
|
||||
CUSPICE/cubsim4load.cu \
|
||||
CUSPICE/cubsim4setup.c \
|
||||
CUSPICE/cubsim4temp.c
|
||||
|
||||
AM_CPPFLAGS += $(CUDA_CPPFLAGS)
|
||||
endif
|
||||
|
||||
MAINTAINERCLEANFILES = Makefile.in
|
||||
|
||||
EXTRA_DIST = B4TERMS_OF_USE
|
||||
|
|
|
|||
|
|
@ -16,6 +16,9 @@
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
int
|
||||
BSIM4getic(
|
||||
|
|
@ -25,8 +28,18 @@ CKTcircuit *ckt)
|
|||
BSIM4model *model = (BSIM4model*)inModel;
|
||||
BSIM4instance *here;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, status ;
|
||||
#endif
|
||||
|
||||
for (; model ; model = model->BSIM4nextModel)
|
||||
{ for (here = model->BSIM4instances; here; here = here->BSIM4nextInstance)
|
||||
{
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
i = 0 ;
|
||||
#endif
|
||||
|
||||
for (here = model->BSIM4instances; here; here = here->BSIM4nextInstance)
|
||||
{
|
||||
if (!here->BSIM4icVDSGiven)
|
||||
{ here->BSIM4icVDS = *(ckt->CKTrhs + here->BSIM4dNode)
|
||||
|
|
@ -40,7 +53,23 @@ BSIM4instance *here;
|
|||
{ here->BSIM4icVBS = *(ckt->CKTrhs + here->BSIM4bNode)
|
||||
- *(ckt->CKTrhs + here->BSIM4sNode);
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
model->BSIM4paramCPU.BSIM4icVDSArray [i] = here->BSIM4icVDS ;
|
||||
model->BSIM4paramCPU.BSIM4icVGSArray [i] = here->BSIM4icVGS ;
|
||||
model->BSIM4paramCPU.BSIM4icVBSArray [i] = here->BSIM4icVBS ;
|
||||
|
||||
i++ ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuBSIM4getic ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -35,6 +35,10 @@
|
|||
#include "ngspice/cpextern.h"
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
#define MAX_EXP 5.834617425e14
|
||||
#define MIN_EXP 1.713908431e-15
|
||||
#define EXP_THRESHOLD 34.0
|
||||
|
|
@ -2570,6 +2574,568 @@ do { if((here->ptr = SMPmakeElt(matrix,here->first,here->second))==(double *)NUL
|
|||
}
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, j, jRHS, l, lRHS, status ;
|
||||
|
||||
/* Counting the instances */
|
||||
for (model = (BSIM4model *)inModel ; model != NULL ; model = model->BSIM4nextModel)
|
||||
{
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->BSIM4instances ; here != NULL ; here = here->BSIM4nextInstance)
|
||||
{
|
||||
i++ ;
|
||||
}
|
||||
|
||||
/* How much instances we have */
|
||||
model->n_instances = i ;
|
||||
}
|
||||
|
||||
/* loop through all the BSIM4 models */
|
||||
for (model = (BSIM4model *)inModel ; model != NULL ; model = model->BSIM4nextModel)
|
||||
{
|
||||
/* Position Vector Allocation */
|
||||
model->PositionVector = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
/* Position Vector Allocation for the RHS */
|
||||
model->PositionVectorRHS = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
|
||||
model->offset = ckt->total_n_values ;
|
||||
model->offsetRHS = ckt->total_n_valuesRHS ;
|
||||
|
||||
i = 0 ;
|
||||
j = 0 ;
|
||||
jRHS = 0 ;
|
||||
l = 0 ;
|
||||
lRHS = 0 ;
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->BSIM4instances ; here != NULL ; here = here->BSIM4nextInstance)
|
||||
{
|
||||
/* Position Vector Assignment */
|
||||
model->PositionVector [i] = model->offset + l ;
|
||||
|
||||
/* Position Vector Assignment for the RHS */
|
||||
model->PositionVectorRHS [i] = model->offsetRHS + lRHS ;
|
||||
|
||||
|
||||
/* For the Matrix */
|
||||
if (here->BSIM4rgateMod == 1)
|
||||
{
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodeExt != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodeExt != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcggb + geltd - ggtg + gIgtotg) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgdb - ggtd + gIgtotd) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgsb - ggts + gIgtots) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgbb - ggtb + gIgtotb) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 5 ;
|
||||
}
|
||||
else if (here->BSIM4rgateMod == 2)
|
||||
{
|
||||
/* m * gcrg */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodeExt != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcrgg */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcrgd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcrgs */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcrgb */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcrg */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodeExt != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcggb - gcrgg - ggtg + gIgtotg) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgdb - gcrgd - ggtd + gIgtotd) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgsb - gcrgs - ggts + gIgtots) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgbb - gcrgb - ggtb + gIgtotb) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 9 ;
|
||||
}
|
||||
else if (here->BSIM4rgateMod == 3)
|
||||
{
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodeExt != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeExt != 0) && (here->BSIM4gNodeMid != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * geltd */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4gNodeExt != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (geltd + gcrg + gcgmgmb) */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4gNodeMid != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcrgd + gcgmdb) */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcrgg */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcrgs + gcgmsb) */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcrgb + gcgmbb) */
|
||||
if ((here->BSIM4gNodeMid != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcdgmb */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4gNodeMid != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcrg */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodeMid != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcsgmb */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4gNodeMid != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gcbgmb */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4gNodeMid != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcggb - gcrgg - ggtg + gIgtotg) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgdb - gcrgd - ggtd + gIgtotd) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgsb - gcrgs - ggts + gIgtots) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgbb - gcrgb - ggtb + gIgtotb) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 14 ;
|
||||
} else {
|
||||
/* m * (gcggb - ggtg + gIgtotg) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgdb - ggtd + gIgtotd) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgsb - ggts + gIgtots) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcgbb - ggtb + gIgtotb) */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 4 ;
|
||||
}
|
||||
|
||||
|
||||
if (model->BSIM4rdsMod)
|
||||
{
|
||||
/* m * gdtotg */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gdtots */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gdtotb */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gstotd */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gstotg */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * gstotb */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 4 ;
|
||||
}
|
||||
|
||||
|
||||
/* m * (gdpr + here->BSIM4gds + here->BSIM4gbd + T1 * ddxpart_dVd -
|
||||
gdtotd + RevSum + gcddb + gbdpdp + dxpart * ggtd - gIdtotd) + m * ggidld */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gdpr + gdtot) */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4dNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (Gm + gcdgb - gdtotg + gbdpg - gIdtotg + dxpart * ggtg + T1 * ddxpart_dVg) + m * ggidlg */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (here->BSIM4gds + gdtots - dxpart * ggts + gIdtots -
|
||||
T1 * ddxpart_dVs + FwdSum - gcdsb - gbdpsp) + m * (ggidlg + ggidld + ggidlb) */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gjbd + gdtotb - Gmbs - gcdbb - gbdpb + gIdtotb - T1 * ddxpart_dVb - dxpart * ggtb) - m * ggidlb */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gdpr - gdtotd) */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gdpr + gdtot) */
|
||||
if ((here->BSIM4dNode != 0) && (here->BSIM4dNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (here->BSIM4gds + gstotd + RevSum - gcsdb - gbspdp -
|
||||
T1 * dsxpart_dVd - sxpart * ggtd + gIstotd) + m * (ggisls + ggislg + ggislb) */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcsgb - Gm - gstotg + gbspg + sxpart * ggtg + T1 * dsxpart_dVg - gIstotg) + m * ggislg */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gspr + here->BSIM4gds + here->BSIM4gbs + T1 * dsxpart_dVs -
|
||||
gstots + FwdSum + gcssb + gbspsp + sxpart * ggts - gIstots) + m * ggisls */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gspr + gstot) */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4sNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gjbs + gstotb + Gmbs - gcsbb - gbspb - sxpart * ggtb - T1 * dsxpart_dVb + gIstotb) - m * ggislb */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gspr - gstots) */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gspr + gstot) */
|
||||
if ((here->BSIM4sNode != 0) && (here->BSIM4sNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcbdb - gjbd + gbbdp - gIbtotd) - m * ggidld + m * (ggislg + ggisls + ggislb) */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcbgb - here->BSIM4gbgs - gIbtotg) - m * ggidlg - m * ggislg */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcbsb - gjbs + gbbsp - gIbtots) + m * (ggidlg + ggidld + ggidlb) - m * ggisls */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gjbd + gjbs + gcbbb - here->BSIM4gbbs - gIbtotb) - m * ggidlb - m * ggislb */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 16 ;
|
||||
|
||||
|
||||
if (here->BSIM4rbodyMod)
|
||||
{
|
||||
/* m * (gcdbdb - here->BSIM4gbd) */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4dbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (here->BSIM4gbs - gcsbsb) */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4sbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcdbdb - here->BSIM4gbd) */
|
||||
if ((here->BSIM4dbNode != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (here->BSIM4gbd - gcdbdb + here->BSIM4grbpd + here->BSIM4grbdb) */
|
||||
if ((here->BSIM4dbNode != 0) && (here->BSIM4dbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbpd */
|
||||
if ((here->BSIM4dbNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbdb */
|
||||
if ((here->BSIM4dbNode != 0) && (here->BSIM4bNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbpd */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4dbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbpb */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4bNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbps */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4sbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (here->BSIM4grbpd + here->BSIM4grbps + here->BSIM4grbpb) */
|
||||
if ((here->BSIM4bNodePrime != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (gcsbsb - here->BSIM4gbs) */
|
||||
if ((here->BSIM4sbNode != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbps */
|
||||
if ((here->BSIM4sbNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbsb */
|
||||
if ((here->BSIM4sbNode != 0) && (here->BSIM4bNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (here->BSIM4gbs - gcsbsb + here->BSIM4grbps + here->BSIM4grbsb) */
|
||||
if ((here->BSIM4sbNode != 0) && (here->BSIM4sbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbdb */
|
||||
if ((here->BSIM4bNode != 0) && (here->BSIM4dbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbpb */
|
||||
if ((here->BSIM4bNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4grbsb */
|
||||
if ((here->BSIM4bNode != 0) && (here->BSIM4sbNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (here->BSIM4grbsb + here->BSIM4grbdb + here->BSIM4grbpb) */
|
||||
if ((here->BSIM4bNode != 0) && (here->BSIM4bNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 12 ;
|
||||
}
|
||||
|
||||
|
||||
if (here->BSIM4trnqsMod)
|
||||
{
|
||||
/* m * (gqdef + here->BSIM4gtau) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4qNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (ggtg - gcqgb) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4gNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (ggtd - gcqdb) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4dNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (ggts - gcqsb) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4sNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * (ggtb - gcqbb) */
|
||||
if ((here->BSIM4qNode != 0) && (here->BSIM4bNodePrime != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * dxpart * here->BSIM4gtau */
|
||||
if ((here->BSIM4dNodePrime != 0) && (here->BSIM4qNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * sxpart * here->BSIM4gtau */
|
||||
if ((here->BSIM4sNodePrime != 0) && (here->BSIM4qNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* m * here->BSIM4gtau */
|
||||
if ((here->BSIM4gNodePrime != 0) && (here->BSIM4qNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutput */
|
||||
l += 8 ;
|
||||
}
|
||||
|
||||
|
||||
/* For the RHS */
|
||||
/* m * (ceqjd - ceqbd + ceqgdtot - ceqdrn - ceqqd + Idtoteq) */
|
||||
if (here->BSIM4dNodePrime != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* m * (ceqqg - ceqgcrg + Igtoteq) */
|
||||
if (here->BSIM4gNodePrime != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutputRHS */
|
||||
lRHS += 2 ;
|
||||
|
||||
|
||||
if (here->BSIM4rgateMod == 2)
|
||||
{
|
||||
/* m * ceqgcrg */
|
||||
if (here->BSIM4gNodeExt != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutputRHS */
|
||||
lRHS += 1 ;
|
||||
}
|
||||
else if (here->BSIM4rgateMod == 3)
|
||||
{
|
||||
/* m * (ceqqgmid + ceqgcrg) */
|
||||
if (here->BSIM4gNodeMid != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutputRHS */
|
||||
lRHS += 1 ;
|
||||
}
|
||||
|
||||
|
||||
if (!here->BSIM4rbodyMod)
|
||||
{
|
||||
/* m * (ceqbd + ceqbs - ceqjd - ceqjs - ceqqb + Ibtoteq) */
|
||||
if (here->BSIM4bNodePrime != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* m * (ceqdrn - ceqbs + ceqjs + ceqqg + ceqqb + ceqqd + ceqqgmid - ceqgstot + Istoteq) */
|
||||
if (here->BSIM4sNodePrime != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutputRHS */
|
||||
lRHS += 2 ;
|
||||
} else {
|
||||
/* m * (ceqjd + ceqqjd) */
|
||||
if (here->BSIM4dbNode != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* m * (ceqbd + ceqbs - ceqqb + Ibtoteq) */
|
||||
if (here->BSIM4bNodePrime != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* m * (ceqjs + ceqqjs) */
|
||||
if (here->BSIM4sbNode != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* m * (ceqdrn - ceqbs + ceqjs + ceqqd + ceqqg + ceqqb +
|
||||
ceqqjd + ceqqjs + ceqqgmid - ceqgstot + Istoteq) */
|
||||
if (here->BSIM4sNodePrime != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutputRHS */
|
||||
lRHS += 4 ;
|
||||
}
|
||||
|
||||
|
||||
if (model->BSIM4rdsMod)
|
||||
{
|
||||
/* m * ceqgdtot */
|
||||
if (here->BSIM4dNode != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* m * ceqgstot */
|
||||
if (here->BSIM4sNode != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutputRHS */
|
||||
lRHS += 2 ;
|
||||
}
|
||||
|
||||
|
||||
if (here->BSIM4trnqsMod)
|
||||
{
|
||||
/* m * (cqcheq - cqdef) */
|
||||
if (here->BSIM4qNode != 0)
|
||||
jRHS++ ;
|
||||
|
||||
/* Different Values for the CKTloadOutputRHS */
|
||||
lRHS += 1 ;
|
||||
}
|
||||
|
||||
i++ ;
|
||||
}
|
||||
|
||||
model->n_values = l ;
|
||||
ckt->total_n_values += model->n_values ;
|
||||
|
||||
model->n_Ptr = j ;
|
||||
ckt->total_n_Ptr += model->n_Ptr ;
|
||||
|
||||
model->n_valuesRHS = lRHS ;
|
||||
ckt->total_n_valuesRHS += model->n_valuesRHS ;
|
||||
|
||||
model->n_PtrRHS = jRHS ;
|
||||
ckt->total_n_PtrRHS += model->n_PtrRHS ;
|
||||
}
|
||||
|
||||
/* loop through all the BSIM4 models */
|
||||
for (model = (BSIM4model *)inModel ; model != NULL ; model = model->BSIM4nextModel)
|
||||
{
|
||||
status = cuBSIM4setup ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef USE_OMP
|
||||
InstCount = 0;
|
||||
model = (BSIM4model*)inModel;
|
||||
|
|
|
|||
|
|
@ -30,6 +30,10 @@
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
#define Kb 1.3806226e-23
|
||||
#define KboQ 8.617087e-5
|
||||
#define EPS0 8.85418e-12
|
||||
|
|
@ -91,6 +95,10 @@ double vtfbphi2eot, phieot, TempRatioeot, Vtm0eot, Vtmeot,vbieot;
|
|||
|
||||
int Size_Not_Found, i;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int j, status ;
|
||||
#endif
|
||||
|
||||
/* loop through all the BSIM4 device models */
|
||||
for (; model != NULL; model = model->BSIM4nextModel)
|
||||
{ Temp = ckt->CKTtemp;
|
||||
|
|
@ -404,6 +412,9 @@ int Size_Not_Found, i;
|
|||
fprintf(stderr, "BVS reset to %g.\n", model->BSIM4bvs);
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
j = 0 ;
|
||||
#endif
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->BSIM4instances; here != NULL;
|
||||
|
|
@ -2306,7 +2317,199 @@ int Size_Not_Found, i;
|
|||
SPfrontEnd->IFerrorf (ERR_FATAL, "Fatal error(s) detected during BSIM4.6.0 parameter checking for %s in model %s", model->BSIM4modName, here->BSIM4name);
|
||||
return(E_BADPARM);
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
model->BSIM4paramCPU.BSIM4gbsRWArray [j] = here->BSIM4gbs ;
|
||||
model->BSIM4paramCPU.BSIM4cbsRWArray [j] = here->BSIM4cbs ;
|
||||
model->BSIM4paramCPU.BSIM4gbdRWArray [j] = here->BSIM4gbd ;
|
||||
model->BSIM4paramCPU.BSIM4cbdRWArray [j] = here->BSIM4cbd ;
|
||||
model->BSIM4paramCPU.BSIM4vonRWArray [j] = here->BSIM4von ;
|
||||
model->BSIM4paramCPU.BSIM4vdsatRWArray [j] = here->BSIM4vdsat ;
|
||||
model->BSIM4paramCPU.BSIM4csubRWArray [j] = here->BSIM4csub ;
|
||||
model->BSIM4paramCPU.BSIM4gdsRWArray [j] = here->BSIM4gds ;
|
||||
model->BSIM4paramCPU.BSIM4gmRWArray [j] = here->BSIM4gm ;
|
||||
model->BSIM4paramCPU.BSIM4gmbsRWArray [j] = here->BSIM4gmbs ;
|
||||
model->BSIM4paramCPU.BSIM4gcrgRWArray [j] = here->BSIM4gcrg ;
|
||||
model->BSIM4paramCPU.BSIM4IgidlRWArray [j] = here->BSIM4Igidl ;
|
||||
model->BSIM4paramCPU.BSIM4IgislRWArray [j] = here->BSIM4Igisl ;
|
||||
model->BSIM4paramCPU.BSIM4IgcsRWArray [j] = here->BSIM4Igcs ;
|
||||
model->BSIM4paramCPU.BSIM4IgcdRWArray [j] = here->BSIM4Igcd ;
|
||||
model->BSIM4paramCPU.BSIM4IgsRWArray [j] = here->BSIM4Igs ;
|
||||
model->BSIM4paramCPU.BSIM4IgdRWArray [j] = here->BSIM4Igd ;
|
||||
model->BSIM4paramCPU.BSIM4IgbRWArray [j] = here->BSIM4Igb ;
|
||||
model->BSIM4paramCPU.BSIM4cdRWArray [j] = here->BSIM4cd ;
|
||||
model->BSIM4paramCPU.BSIM4qinvRWArray [j] = here->BSIM4qinv ;
|
||||
model->BSIM4paramCPU.BSIM4cggbRWArray [j] = here->BSIM4cggb ;
|
||||
model->BSIM4paramCPU.BSIM4cgsbRWArray [j] = here->BSIM4cgsb ;
|
||||
model->BSIM4paramCPU.BSIM4cgdbRWArray [j] = here->BSIM4cgdb ;
|
||||
model->BSIM4paramCPU.BSIM4cdgbRWArray [j] = here->BSIM4cdgb ;
|
||||
model->BSIM4paramCPU.BSIM4cdsbRWArray [j] = here->BSIM4cdsb ;
|
||||
model->BSIM4paramCPU.BSIM4cddbRWArray [j] = here->BSIM4cddb ;
|
||||
model->BSIM4paramCPU.BSIM4cbgbRWArray [j] = here->BSIM4cbgb ;
|
||||
model->BSIM4paramCPU.BSIM4cbsbRWArray [j] = here->BSIM4cbsb ;
|
||||
model->BSIM4paramCPU.BSIM4cbdbRWArray [j] = here->BSIM4cbdb ;
|
||||
model->BSIM4paramCPU.BSIM4csgbRWArray [j] = here->BSIM4csgb ;
|
||||
model->BSIM4paramCPU.BSIM4cssbRWArray [j] = here->BSIM4cssb ;
|
||||
model->BSIM4paramCPU.BSIM4csdbRWArray [j] = here->BSIM4csdb ;
|
||||
model->BSIM4paramCPU.BSIM4cgbbRWArray [j] = here->BSIM4cgbb ;
|
||||
model->BSIM4paramCPU.BSIM4csbbRWArray [j] = here->BSIM4csbb ;
|
||||
model->BSIM4paramCPU.BSIM4cdbbRWArray [j] = here->BSIM4cdbb ;
|
||||
model->BSIM4paramCPU.BSIM4cbbbRWArray [j] = here->BSIM4cbbb ;
|
||||
model->BSIM4paramCPU.BSIM4gtauRWArray [j] = here->BSIM4gtau ;
|
||||
model->BSIM4paramCPU.BSIM4qgateRWArray [j] = here->BSIM4qgate ;
|
||||
model->BSIM4paramCPU.BSIM4qbulkRWArray [j] = here->BSIM4qbulk ;
|
||||
model->BSIM4paramCPU.BSIM4qdrnRWArray [j] = here->BSIM4qdrn ;
|
||||
model->BSIM4paramCPU.BSIM4qsrcRWArray [j] = here->BSIM4qsrc ;
|
||||
model->BSIM4paramCPU.BSIM4capbsRWArray [j] = here->BSIM4capbs ;
|
||||
model->BSIM4paramCPU.BSIM4capbdRWArray [j] = here->BSIM4capbd ;
|
||||
model->BSIM4paramCPU.BSIM4icVDSArray [j] = here->BSIM4icVDS ;
|
||||
model->BSIM4paramCPU.BSIM4icVGSArray [j] = here->BSIM4icVGS ;
|
||||
model->BSIM4paramCPU.BSIM4icVBSArray [j] = here->BSIM4icVBS ;
|
||||
model->BSIM4paramCPU.BSIM4vth0Array [j] = here->BSIM4vth0 ;
|
||||
model->BSIM4paramCPU.BSIM4gbbsArray [j] = here->BSIM4gbbs ;
|
||||
model->BSIM4paramCPU.BSIM4ggidlbArray [j] = here->BSIM4ggidlb ;
|
||||
model->BSIM4paramCPU.BSIM4gbgsArray [j] = here->BSIM4gbgs ;
|
||||
model->BSIM4paramCPU.BSIM4ggidlgArray [j] = here->BSIM4ggidlg ;
|
||||
model->BSIM4paramCPU.BSIM4gbdsArray [j] = here->BSIM4gbds ;
|
||||
model->BSIM4paramCPU.BSIM4ggidldArray [j] = here->BSIM4ggidld ;
|
||||
model->BSIM4paramCPU.BSIM4ggislsArray [j] = here->BSIM4ggisls ;
|
||||
model->BSIM4paramCPU.BSIM4ggislgArray [j] = here->BSIM4ggislg ;
|
||||
model->BSIM4paramCPU.BSIM4ggislbArray [j] = here->BSIM4ggislb ;
|
||||
model->BSIM4paramCPU.BSIM4gIgsgArray [j] = here->BSIM4gIgsg ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcsgArray [j] = here->BSIM4gIgcsg ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcsdArray [j] = here->BSIM4gIgcsd ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcsbArray [j] = here->BSIM4gIgcsb ;
|
||||
model->BSIM4paramCPU.BSIM4gIgdgArray [j] = here->BSIM4gIgdg ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcdgArray [j] = here->BSIM4gIgcdg ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcddArray [j] = here->BSIM4gIgcdd ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcdbArray [j] = here->BSIM4gIgcdb ;
|
||||
model->BSIM4paramCPU.BSIM4gIgbgArray [j] = here->BSIM4gIgbg ;
|
||||
model->BSIM4paramCPU.BSIM4gIgbdArray [j] = here->BSIM4gIgbd ;
|
||||
model->BSIM4paramCPU.BSIM4gIgbbArray [j] = here->BSIM4gIgbb ;
|
||||
model->BSIM4paramCPU.BSIM4ggidlsArray [j] = here->BSIM4ggidls ;
|
||||
model->BSIM4paramCPU.BSIM4ggisldArray [j] = here->BSIM4ggisld ;
|
||||
model->BSIM4paramCPU.BSIM4gstotArray [j] = here->BSIM4gstot ;
|
||||
model->BSIM4paramCPU.BSIM4gstotdArray [j] = here->BSIM4gstotd ;
|
||||
model->BSIM4paramCPU.BSIM4gstotgArray [j] = here->BSIM4gstotg ;
|
||||
model->BSIM4paramCPU.BSIM4gstotbArray [j] = here->BSIM4gstotb ;
|
||||
model->BSIM4paramCPU.BSIM4gdtotArray [j] = here->BSIM4gdtot ;
|
||||
model->BSIM4paramCPU.BSIM4gdtotdArray [j] = here->BSIM4gdtotd ;
|
||||
model->BSIM4paramCPU.BSIM4gdtotgArray [j] = here->BSIM4gdtotg ;
|
||||
model->BSIM4paramCPU.BSIM4gdtotbArray [j] = here->BSIM4gdtotb ;
|
||||
model->BSIM4paramCPU.BSIM4cgdoArray [j] = here->BSIM4cgdo ;
|
||||
model->BSIM4paramCPU.BSIM4qgdoArray [j] = here->BSIM4qgdo ;
|
||||
model->BSIM4paramCPU.BSIM4cgsoArray [j] = here->BSIM4cgso ;
|
||||
model->BSIM4paramCPU.BSIM4qgsoArray [j] = here->BSIM4qgso ;
|
||||
model->BSIM4paramCPU.BSIM4AseffArray [j] = here->BSIM4Aseff ;
|
||||
model->BSIM4paramCPU.BSIM4PseffArray [j] = here->BSIM4Pseff ;
|
||||
model->BSIM4paramCPU.BSIM4nfArray [j] = here->BSIM4nf ;
|
||||
model->BSIM4paramCPU.BSIM4XExpBVSArray [j] = here->BSIM4XExpBVS ;
|
||||
model->BSIM4paramCPU.BSIM4vjsmFwdArray [j] = here->BSIM4vjsmFwd ;
|
||||
model->BSIM4paramCPU.BSIM4IVjsmFwdArray [j] = here->BSIM4IVjsmFwd ;
|
||||
model->BSIM4paramCPU.BSIM4vjsmRevArray [j] = here->BSIM4vjsmRev ;
|
||||
model->BSIM4paramCPU.BSIM4IVjsmRevArray [j] = here->BSIM4IVjsmRev ;
|
||||
model->BSIM4paramCPU.BSIM4SslpRevArray [j] = here->BSIM4SslpRev ;
|
||||
model->BSIM4paramCPU.BSIM4SslpFwdArray [j] = here->BSIM4SslpFwd ;
|
||||
model->BSIM4paramCPU.BSIM4AdeffArray [j] = here->BSIM4Adeff ;
|
||||
model->BSIM4paramCPU.BSIM4PdeffArray [j] = here->BSIM4Pdeff ;
|
||||
model->BSIM4paramCPU.BSIM4XExpBVDArray [j] = here->BSIM4XExpBVD ;
|
||||
model->BSIM4paramCPU.BSIM4vjdmFwdArray [j] = here->BSIM4vjdmFwd ;
|
||||
model->BSIM4paramCPU.BSIM4IVjdmFwdArray [j] = here->BSIM4IVjdmFwd ;
|
||||
model->BSIM4paramCPU.BSIM4vjdmRevArray [j] = here->BSIM4vjdmRev ;
|
||||
model->BSIM4paramCPU.BSIM4IVjdmRevArray [j] = here->BSIM4IVjdmRev ;
|
||||
model->BSIM4paramCPU.BSIM4DslpRevArray [j] = here->BSIM4DslpRev ;
|
||||
model->BSIM4paramCPU.BSIM4DslpFwdArray [j] = here->BSIM4DslpFwd ;
|
||||
model->BSIM4paramCPU.BSIM4SjctTempRevSatCurArray [j] = here->BSIM4SjctTempRevSatCur ;
|
||||
model->BSIM4paramCPU.BSIM4SswTempRevSatCurArray [j] = here->BSIM4SswTempRevSatCur ;
|
||||
model->BSIM4paramCPU.BSIM4SswgTempRevSatCurArray [j] = here->BSIM4SswgTempRevSatCur ;
|
||||
model->BSIM4paramCPU.BSIM4DjctTempRevSatCurArray [j] = here->BSIM4DjctTempRevSatCur ;
|
||||
model->BSIM4paramCPU.BSIM4DswTempRevSatCurArray [j] = here->BSIM4DswTempRevSatCur ;
|
||||
model->BSIM4paramCPU.BSIM4DswgTempRevSatCurArray [j] = here->BSIM4DswgTempRevSatCur ;
|
||||
model->BSIM4paramCPU.BSIM4vbscArray [j] = here->BSIM4vbsc ;
|
||||
model->BSIM4paramCPU.BSIM4thetavthArray [j] = here->BSIM4thetavth ;
|
||||
model->BSIM4paramCPU.BSIM4eta0Array [j] = here->BSIM4eta0 ;
|
||||
model->BSIM4paramCPU.BSIM4k2oxArray [j] = here->BSIM4k2ox ;
|
||||
model->BSIM4paramCPU.BSIM4nstarArray [j] = here->BSIM4nstar ;
|
||||
model->BSIM4paramCPU.BSIM4vfbArray [j] = here->BSIM4vfb ;
|
||||
model->BSIM4paramCPU.BSIM4vgs_effArray [j] = here->BSIM4vgs_eff ;
|
||||
model->BSIM4paramCPU.BSIM4vgd_effArray [j] = here->BSIM4vgd_eff ;
|
||||
model->BSIM4paramCPU.BSIM4dvgs_eff_dvgArray [j] = here->BSIM4dvgs_eff_dvg ;
|
||||
model->BSIM4paramCPU.BSIM4dvgd_eff_dvgArray [j] = here->BSIM4dvgd_eff_dvg ;
|
||||
model->BSIM4paramCPU.BSIM4VgsteffArray [j] = here->BSIM4Vgsteff ;
|
||||
model->BSIM4paramCPU.BSIM4grdswArray [j] = here->BSIM4grdsw ;
|
||||
model->BSIM4paramCPU.BSIM4AbulkArray [j] = here->BSIM4Abulk ;
|
||||
model->BSIM4paramCPU.BSIM4vtfbphi1Array [j] = here->BSIM4vtfbphi1 ;
|
||||
model->BSIM4paramCPU.BSIM4ueffArray [j] = here->BSIM4ueff ;
|
||||
model->BSIM4paramCPU.BSIM4u0tempArray [j] = here->BSIM4u0temp ;
|
||||
model->BSIM4paramCPU.BSIM4vsattempArray [j] = here->BSIM4vsattemp ;
|
||||
model->BSIM4paramCPU.BSIM4EsatLArray [j] = here->BSIM4EsatL ;
|
||||
model->BSIM4paramCPU.BSIM4VdseffArray [j] = here->BSIM4Vdseff ;
|
||||
model->BSIM4paramCPU.BSIM4vtfbphi2Array [j] = here->BSIM4vtfbphi2 ;
|
||||
model->BSIM4paramCPU.BSIM4CoxeffArray [j] = here->BSIM4Coxeff ;
|
||||
model->BSIM4paramCPU.BSIM4AbovVgst2VtmArray [j] = here->BSIM4AbovVgst2Vtm ;
|
||||
model->BSIM4paramCPU.BSIM4IdovVdsArray [j] = here->BSIM4IdovVds ;
|
||||
model->BSIM4paramCPU.BSIM4gcrgdArray [j] = here->BSIM4gcrgd ;
|
||||
model->BSIM4paramCPU.BSIM4gcrgbArray [j] = here->BSIM4gcrgb ;
|
||||
model->BSIM4paramCPU.BSIM4gcrggArray [j] = here->BSIM4gcrgg ;
|
||||
model->BSIM4paramCPU.BSIM4grgeltdArray [j] = here->BSIM4grgeltd ;
|
||||
model->BSIM4paramCPU.BSIM4gcrgsArray [j] = here->BSIM4gcrgs ;
|
||||
model->BSIM4paramCPU.BSIM4sourceConductanceArray [j] = here->BSIM4sourceConductance ;
|
||||
model->BSIM4paramCPU.BSIM4drainConductanceArray [j] = here->BSIM4drainConductance ;
|
||||
model->BSIM4paramCPU.BSIM4gstotsArray [j] = here->BSIM4gstots ;
|
||||
model->BSIM4paramCPU.BSIM4gdtotsArray [j] = here->BSIM4gdtots ;
|
||||
model->BSIM4paramCPU.BSIM4vfbzbArray [j] = here->BSIM4vfbzb ;
|
||||
model->BSIM4paramCPU.BSIM4gIgssArray [j] = here->BSIM4gIgss ;
|
||||
model->BSIM4paramCPU.BSIM4gIgddArray [j] = here->BSIM4gIgdd ;
|
||||
model->BSIM4paramCPU.BSIM4gIgbsArray [j] = here->BSIM4gIgbs ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcssArray [j] = here->BSIM4gIgcss ;
|
||||
model->BSIM4paramCPU.BSIM4gIgcdsArray [j] = here->BSIM4gIgcds ;
|
||||
model->BSIM4paramCPU.BSIM4noiGd0Array [j] = here->BSIM4noiGd0 ;
|
||||
model->BSIM4paramCPU.BSIM4cqdbArray [j] = here->BSIM4cqdb ;
|
||||
model->BSIM4paramCPU.BSIM4cqsbArray [j] = here->BSIM4cqsb ;
|
||||
model->BSIM4paramCPU.BSIM4cqgbArray [j] = here->BSIM4cqgb ;
|
||||
model->BSIM4paramCPU.BSIM4qchqsArray [j] = here->BSIM4qchqs ;
|
||||
model->BSIM4paramCPU.BSIM4cqbbArray [j] = here->BSIM4cqbb ;
|
||||
model->BSIM4paramCPU.BSIM4taunetArray [j] = here->BSIM4taunet ;
|
||||
model->BSIM4paramCPU.BSIM4gtgArray [j] = here->BSIM4gtg ;
|
||||
model->BSIM4paramCPU.BSIM4gtdArray [j] = here->BSIM4gtd ;
|
||||
model->BSIM4paramCPU.BSIM4gtsArray [j] = here->BSIM4gts ;
|
||||
model->BSIM4paramCPU.BSIM4gtbArray [j] = here->BSIM4gtb ;
|
||||
model->BSIM4paramCPU.BSIM4mArray [j] = here->BSIM4m ;
|
||||
model->BSIM4paramCPU.BSIM4grbpdArray [j] = here->BSIM4grbpd ;
|
||||
model->BSIM4paramCPU.BSIM4grbdbArray [j] = here->BSIM4grbdb ;
|
||||
model->BSIM4paramCPU.BSIM4grbpbArray [j] = here->BSIM4grbpb ;
|
||||
model->BSIM4paramCPU.BSIM4grbpsArray [j] = here->BSIM4grbps ;
|
||||
model->BSIM4paramCPU.BSIM4grbsbArray [j] = here->BSIM4grbsb ;
|
||||
model->BSIM4paramCPU.BSIM4offArray [j] = here->BSIM4off ;
|
||||
model->BSIM4paramCPU.BSIM4dNodePrimeArray [j] = here->BSIM4dNodePrime ;
|
||||
model->BSIM4paramCPU.BSIM4sNodePrimeArray [j] = here->BSIM4sNodePrime ;
|
||||
model->BSIM4paramCPU.BSIM4gNodePrimeArray [j] = here->BSIM4gNodePrime ;
|
||||
model->BSIM4paramCPU.BSIM4bNodePrimeArray [j] = here->BSIM4bNodePrime ;
|
||||
model->BSIM4paramCPU.BSIM4gNodeExtArray [j] = here->BSIM4gNodeExt ;
|
||||
model->BSIM4paramCPU.BSIM4gNodeMidArray [j] = here->BSIM4gNodeMid ;
|
||||
model->BSIM4paramCPU.BSIM4dbNodeArray [j] = here->BSIM4dbNode ;
|
||||
model->BSIM4paramCPU.BSIM4sbNodeArray [j] = here->BSIM4sbNode ;
|
||||
model->BSIM4paramCPU.BSIM4sNodeArray [j] = here->BSIM4sNode ;
|
||||
model->BSIM4paramCPU.BSIM4dNodeArray [j] = here->BSIM4dNode ;
|
||||
model->BSIM4paramCPU.BSIM4qNodeArray [j] = here->BSIM4qNode ;
|
||||
model->BSIM4paramCPU.BSIM4rbodyModArray [j] = here->BSIM4rbodyMod ;
|
||||
model->BSIM4paramCPU.BSIM4modeArray [j] = here->BSIM4mode ;
|
||||
model->BSIM4paramCPU.BSIM4rgateModArray [j] = here->BSIM4rgateMod ;
|
||||
model->BSIM4paramCPU.BSIM4trnqsModArray [j] = here->BSIM4trnqsMod ;
|
||||
model->BSIM4paramCPU.BSIM4acnqsModArray [j] = here->BSIM4acnqsMod ;
|
||||
model->BSIM4paramCPU.BSIM4statesArray [j] = here->BSIM4states ;
|
||||
|
||||
j++ ;
|
||||
#endif
|
||||
|
||||
} /* End instance */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuBSIM4temp ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -881,6 +881,543 @@ struct bsim4SizeDependParam
|
|||
struct bsim4SizeDependParam *pNext;
|
||||
};
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
typedef struct sBSIM4paramCPUstruct {
|
||||
|
||||
double *BSIM4cpuPointersD [243] ;
|
||||
#define BSIM4gbsRWArray BSIM4cpuPointersD[0]
|
||||
#define BSIM4cbsRWArray BSIM4cpuPointersD[1]
|
||||
#define BSIM4gbdRWArray BSIM4cpuPointersD[2]
|
||||
#define BSIM4cbdRWArray BSIM4cpuPointersD[3]
|
||||
#define BSIM4vonRWArray BSIM4cpuPointersD[4]
|
||||
#define BSIM4vdsatRWArray BSIM4cpuPointersD[5]
|
||||
#define BSIM4csubRWArray BSIM4cpuPointersD[6]
|
||||
#define BSIM4gdsRWArray BSIM4cpuPointersD[7]
|
||||
#define BSIM4gmRWArray BSIM4cpuPointersD[8]
|
||||
#define BSIM4gmbsRWArray BSIM4cpuPointersD[9]
|
||||
#define BSIM4gcrgRWArray BSIM4cpuPointersD[10]
|
||||
#define BSIM4IgidlRWArray BSIM4cpuPointersD[11]
|
||||
#define BSIM4IgislRWArray BSIM4cpuPointersD[12]
|
||||
#define BSIM4IgcsRWArray BSIM4cpuPointersD[13]
|
||||
#define BSIM4IgcdRWArray BSIM4cpuPointersD[14]
|
||||
#define BSIM4IgsRWArray BSIM4cpuPointersD[15]
|
||||
#define BSIM4IgdRWArray BSIM4cpuPointersD[16]
|
||||
#define BSIM4IgbRWArray BSIM4cpuPointersD[17]
|
||||
#define BSIM4cdRWArray BSIM4cpuPointersD[18]
|
||||
#define BSIM4qinvRWArray BSIM4cpuPointersD[19]
|
||||
#define BSIM4cggbRWArray BSIM4cpuPointersD[20]
|
||||
#define BSIM4cgsbRWArray BSIM4cpuPointersD[21]
|
||||
#define BSIM4cgdbRWArray BSIM4cpuPointersD[22]
|
||||
#define BSIM4cdgbRWArray BSIM4cpuPointersD[23]
|
||||
#define BSIM4cdsbRWArray BSIM4cpuPointersD[24]
|
||||
#define BSIM4cddbRWArray BSIM4cpuPointersD[25]
|
||||
#define BSIM4cbgbRWArray BSIM4cpuPointersD[26]
|
||||
#define BSIM4cbsbRWArray BSIM4cpuPointersD[27]
|
||||
#define BSIM4cbdbRWArray BSIM4cpuPointersD[28]
|
||||
#define BSIM4csgbRWArray BSIM4cpuPointersD[29]
|
||||
#define BSIM4cssbRWArray BSIM4cpuPointersD[30]
|
||||
#define BSIM4csdbRWArray BSIM4cpuPointersD[31]
|
||||
#define BSIM4cgbbRWArray BSIM4cpuPointersD[32]
|
||||
#define BSIM4csbbRWArray BSIM4cpuPointersD[33]
|
||||
#define BSIM4cdbbRWArray BSIM4cpuPointersD[34]
|
||||
#define BSIM4cbbbRWArray BSIM4cpuPointersD[35]
|
||||
#define BSIM4gtauRWArray BSIM4cpuPointersD[36]
|
||||
#define BSIM4qgateRWArray BSIM4cpuPointersD[37]
|
||||
#define BSIM4qbulkRWArray BSIM4cpuPointersD[38]
|
||||
#define BSIM4qdrnRWArray BSIM4cpuPointersD[39]
|
||||
#define BSIM4qsrcRWArray BSIM4cpuPointersD[40]
|
||||
#define BSIM4capbsRWArray BSIM4cpuPointersD[41]
|
||||
#define BSIM4capbdRWArray BSIM4cpuPointersD[42]
|
||||
#define BSIM4icVDSArray BSIM4cpuPointersD[43]
|
||||
#define BSIM4icVGSArray BSIM4cpuPointersD[44]
|
||||
#define BSIM4icVBSArray BSIM4cpuPointersD[45]
|
||||
#define BSIM4vth0Array BSIM4cpuPointersD[46]
|
||||
#define BSIM4gbbsArray BSIM4cpuPointersD[47]
|
||||
#define BSIM4ggidlbArray BSIM4cpuPointersD[48]
|
||||
#define BSIM4gbgsArray BSIM4cpuPointersD[49]
|
||||
#define BSIM4ggidlgArray BSIM4cpuPointersD[50]
|
||||
#define BSIM4gbdsArray BSIM4cpuPointersD[51]
|
||||
#define BSIM4ggidldArray BSIM4cpuPointersD[52]
|
||||
#define BSIM4ggislsArray BSIM4cpuPointersD[53]
|
||||
#define BSIM4ggislgArray BSIM4cpuPointersD[54]
|
||||
#define BSIM4ggislbArray BSIM4cpuPointersD[55]
|
||||
#define BSIM4gIgsgArray BSIM4cpuPointersD[56]
|
||||
#define BSIM4gIgcsgArray BSIM4cpuPointersD[57]
|
||||
#define BSIM4gIgcsdArray BSIM4cpuPointersD[58]
|
||||
#define BSIM4gIgcsbArray BSIM4cpuPointersD[59]
|
||||
#define BSIM4gIgdgArray BSIM4cpuPointersD[60]
|
||||
#define BSIM4gIgcdgArray BSIM4cpuPointersD[61]
|
||||
#define BSIM4gIgcddArray BSIM4cpuPointersD[62]
|
||||
#define BSIM4gIgcdbArray BSIM4cpuPointersD[63]
|
||||
#define BSIM4gIgbgArray BSIM4cpuPointersD[64]
|
||||
#define BSIM4gIgbdArray BSIM4cpuPointersD[65]
|
||||
#define BSIM4gIgbbArray BSIM4cpuPointersD[66]
|
||||
#define BSIM4ggidlsArray BSIM4cpuPointersD[67]
|
||||
#define BSIM4ggisldArray BSIM4cpuPointersD[68]
|
||||
#define BSIM4gstotArray BSIM4cpuPointersD[69]
|
||||
#define BSIM4gstotdArray BSIM4cpuPointersD[70]
|
||||
#define BSIM4gstotgArray BSIM4cpuPointersD[71]
|
||||
#define BSIM4gstotbArray BSIM4cpuPointersD[72]
|
||||
#define BSIM4gdtotArray BSIM4cpuPointersD[73]
|
||||
#define BSIM4gdtotdArray BSIM4cpuPointersD[74]
|
||||
#define BSIM4gdtotgArray BSIM4cpuPointersD[75]
|
||||
#define BSIM4gdtotbArray BSIM4cpuPointersD[76]
|
||||
#define BSIM4cgdoArray BSIM4cpuPointersD[77]
|
||||
#define BSIM4qgdoArray BSIM4cpuPointersD[78]
|
||||
#define BSIM4cgsoArray BSIM4cpuPointersD[79]
|
||||
#define BSIM4qgsoArray BSIM4cpuPointersD[80]
|
||||
#define BSIM4AseffArray BSIM4cpuPointersD[81]
|
||||
#define BSIM4PseffArray BSIM4cpuPointersD[82]
|
||||
#define BSIM4nfArray BSIM4cpuPointersD[83]
|
||||
#define BSIM4XExpBVSArray BSIM4cpuPointersD[84]
|
||||
#define BSIM4vjsmFwdArray BSIM4cpuPointersD[85]
|
||||
#define BSIM4IVjsmFwdArray BSIM4cpuPointersD[86]
|
||||
#define BSIM4vjsmRevArray BSIM4cpuPointersD[87]
|
||||
#define BSIM4IVjsmRevArray BSIM4cpuPointersD[88]
|
||||
#define BSIM4SslpRevArray BSIM4cpuPointersD[89]
|
||||
#define BSIM4SslpFwdArray BSIM4cpuPointersD[90]
|
||||
#define BSIM4AdeffArray BSIM4cpuPointersD[91]
|
||||
#define BSIM4PdeffArray BSIM4cpuPointersD[92]
|
||||
#define BSIM4XExpBVDArray BSIM4cpuPointersD[93]
|
||||
#define BSIM4vjdmFwdArray BSIM4cpuPointersD[94]
|
||||
#define BSIM4IVjdmFwdArray BSIM4cpuPointersD[95]
|
||||
#define BSIM4vjdmRevArray BSIM4cpuPointersD[96]
|
||||
#define BSIM4IVjdmRevArray BSIM4cpuPointersD[97]
|
||||
#define BSIM4DslpRevArray BSIM4cpuPointersD[98]
|
||||
#define BSIM4DslpFwdArray BSIM4cpuPointersD[99]
|
||||
#define BSIM4SjctTempRevSatCurArray BSIM4cpuPointersD[100]
|
||||
#define BSIM4SswTempRevSatCurArray BSIM4cpuPointersD[101]
|
||||
#define BSIM4SswgTempRevSatCurArray BSIM4cpuPointersD[102]
|
||||
#define BSIM4DjctTempRevSatCurArray BSIM4cpuPointersD[103]
|
||||
#define BSIM4DswTempRevSatCurArray BSIM4cpuPointersD[104]
|
||||
#define BSIM4DswgTempRevSatCurArray BSIM4cpuPointersD[105]
|
||||
#define BSIM4vbscArray BSIM4cpuPointersD[106]
|
||||
#define BSIM4thetavthArray BSIM4cpuPointersD[107]
|
||||
#define BSIM4eta0Array BSIM4cpuPointersD[108]
|
||||
#define BSIM4k2oxArray BSIM4cpuPointersD[109]
|
||||
#define BSIM4nstarArray BSIM4cpuPointersD[110]
|
||||
#define BSIM4vfbArray BSIM4cpuPointersD[111]
|
||||
#define BSIM4vgs_effArray BSIM4cpuPointersD[112]
|
||||
#define BSIM4vgd_effArray BSIM4cpuPointersD[113]
|
||||
#define BSIM4dvgs_eff_dvgArray BSIM4cpuPointersD[114]
|
||||
#define BSIM4dvgd_eff_dvgArray BSIM4cpuPointersD[115]
|
||||
#define BSIM4VgsteffArray BSIM4cpuPointersD[116]
|
||||
#define BSIM4grdswArray BSIM4cpuPointersD[117]
|
||||
#define BSIM4AbulkArray BSIM4cpuPointersD[118]
|
||||
#define BSIM4vtfbphi1Array BSIM4cpuPointersD[119]
|
||||
#define BSIM4ueffArray BSIM4cpuPointersD[120]
|
||||
#define BSIM4u0tempArray BSIM4cpuPointersD[121]
|
||||
#define BSIM4vsattempArray BSIM4cpuPointersD[122]
|
||||
#define BSIM4EsatLArray BSIM4cpuPointersD[123]
|
||||
#define BSIM4VdseffArray BSIM4cpuPointersD[124]
|
||||
#define BSIM4vtfbphi2Array BSIM4cpuPointersD[125]
|
||||
#define BSIM4CoxeffArray BSIM4cpuPointersD[126]
|
||||
#define BSIM4AbovVgst2VtmArray BSIM4cpuPointersD[127]
|
||||
#define BSIM4IdovVdsArray BSIM4cpuPointersD[128]
|
||||
#define BSIM4gcrgdArray BSIM4cpuPointersD[129]
|
||||
#define BSIM4gcrgbArray BSIM4cpuPointersD[130]
|
||||
#define BSIM4gcrggArray BSIM4cpuPointersD[131]
|
||||
#define BSIM4grgeltdArray BSIM4cpuPointersD[132]
|
||||
#define BSIM4gcrgsArray BSIM4cpuPointersD[133]
|
||||
#define BSIM4sourceConductanceArray BSIM4cpuPointersD[134]
|
||||
#define BSIM4drainConductanceArray BSIM4cpuPointersD[135]
|
||||
#define BSIM4gstotsArray BSIM4cpuPointersD[136]
|
||||
#define BSIM4gdtotsArray BSIM4cpuPointersD[137]
|
||||
#define BSIM4vfbzbArray BSIM4cpuPointersD[138]
|
||||
#define BSIM4gIgssArray BSIM4cpuPointersD[139]
|
||||
#define BSIM4gIgddArray BSIM4cpuPointersD[140]
|
||||
#define BSIM4gIgbsArray BSIM4cpuPointersD[141]
|
||||
#define BSIM4gIgcssArray BSIM4cpuPointersD[142]
|
||||
#define BSIM4gIgcdsArray BSIM4cpuPointersD[143]
|
||||
#define BSIM4noiGd0Array BSIM4cpuPointersD[144]
|
||||
#define BSIM4cqdbArray BSIM4cpuPointersD[145]
|
||||
#define BSIM4cqsbArray BSIM4cpuPointersD[146]
|
||||
#define BSIM4cqgbArray BSIM4cpuPointersD[147]
|
||||
#define BSIM4qchqsArray BSIM4cpuPointersD[148]
|
||||
#define BSIM4cqbbArray BSIM4cpuPointersD[149]
|
||||
#define BSIM4taunetArray BSIM4cpuPointersD[150]
|
||||
#define BSIM4gtgArray BSIM4cpuPointersD[151]
|
||||
#define BSIM4gtdArray BSIM4cpuPointersD[152]
|
||||
#define BSIM4gtsArray BSIM4cpuPointersD[153]
|
||||
#define BSIM4gtbArray BSIM4cpuPointersD[154]
|
||||
#define BSIM4mArray BSIM4cpuPointersD[155]
|
||||
#define BSIM4grbpdArray BSIM4cpuPointersD[156]
|
||||
#define BSIM4grbdbArray BSIM4cpuPointersD[157]
|
||||
#define BSIM4grbpbArray BSIM4cpuPointersD[158]
|
||||
#define BSIM4grbpsArray BSIM4cpuPointersD[159]
|
||||
#define BSIM4grbsbArray BSIM4cpuPointersD[160]
|
||||
#define BSIM4dNodePrimeRHSValueArray BSIM4cpuPointersD[161]
|
||||
#define BSIM4gNodePrimeRHSValueArray BSIM4cpuPointersD[162]
|
||||
#define BSIM4gNodeExtRHSValueArray BSIM4cpuPointersD[163]
|
||||
#define BSIM4gNodeMidRHSValueArray BSIM4cpuPointersD[164]
|
||||
#define BSIM4bNodePrimeRHSValueArray BSIM4cpuPointersD[165]
|
||||
#define BSIM4sNodePrimeRHSValueArray BSIM4cpuPointersD[166]
|
||||
#define BSIM4dbNodeRHSValueArray BSIM4cpuPointersD[167]
|
||||
#define BSIM4sbNodeRHSValueArray BSIM4cpuPointersD[168]
|
||||
#define BSIM4dNodeRHSValueArray BSIM4cpuPointersD[169]
|
||||
#define BSIM4sNodeRHSValueArray BSIM4cpuPointersD[170]
|
||||
#define BSIM4qNodeRHSValueArray BSIM4cpuPointersD[171]
|
||||
#define BSIM4GEgeValueArray BSIM4cpuPointersD[172]
|
||||
#define BSIM4GPgeValueArray BSIM4cpuPointersD[173]
|
||||
#define BSIM4GEgpValueArray BSIM4cpuPointersD[174]
|
||||
#define BSIM4GPgpValueArray BSIM4cpuPointersD[175]
|
||||
#define BSIM4GPdpValueArray BSIM4cpuPointersD[176]
|
||||
#define BSIM4GPspValueArray BSIM4cpuPointersD[177]
|
||||
#define BSIM4GPbpValueArray BSIM4cpuPointersD[178]
|
||||
#define BSIM4GEdpValueArray BSIM4cpuPointersD[179]
|
||||
#define BSIM4GEspValueArray BSIM4cpuPointersD[180]
|
||||
#define BSIM4GEbpValueArray BSIM4cpuPointersD[181]
|
||||
#define BSIM4GEgmValueArray BSIM4cpuPointersD[182]
|
||||
#define BSIM4GMgeValueArray BSIM4cpuPointersD[183]
|
||||
#define BSIM4GMgmValueArray BSIM4cpuPointersD[184]
|
||||
#define BSIM4GMdpValueArray BSIM4cpuPointersD[185]
|
||||
#define BSIM4GMgpValueArray BSIM4cpuPointersD[186]
|
||||
#define BSIM4GMspValueArray BSIM4cpuPointersD[187]
|
||||
#define BSIM4GMbpValueArray BSIM4cpuPointersD[188]
|
||||
#define BSIM4DPgmValueArray BSIM4cpuPointersD[189]
|
||||
#define BSIM4GPgmValueArray BSIM4cpuPointersD[190]
|
||||
#define BSIM4SPgmValueArray BSIM4cpuPointersD[191]
|
||||
#define BSIM4BPgmValueArray BSIM4cpuPointersD[192]
|
||||
#define BSIM4DgpValueArray BSIM4cpuPointersD[193]
|
||||
#define BSIM4DspValueArray BSIM4cpuPointersD[194]
|
||||
#define BSIM4DbpValueArray BSIM4cpuPointersD[195]
|
||||
#define BSIM4SdpValueArray BSIM4cpuPointersD[196]
|
||||
#define BSIM4SgpValueArray BSIM4cpuPointersD[197]
|
||||
#define BSIM4SbpValueArray BSIM4cpuPointersD[198]
|
||||
#define BSIM4DPdpValueArray BSIM4cpuPointersD[199]
|
||||
#define BSIM4DPdValueArray BSIM4cpuPointersD[200]
|
||||
#define BSIM4DPgpValueArray BSIM4cpuPointersD[201]
|
||||
#define BSIM4DPspValueArray BSIM4cpuPointersD[202]
|
||||
#define BSIM4DPbpValueArray BSIM4cpuPointersD[203]
|
||||
#define BSIM4DdpValueArray BSIM4cpuPointersD[204]
|
||||
#define BSIM4DdValueArray BSIM4cpuPointersD[205]
|
||||
#define BSIM4SPdpValueArray BSIM4cpuPointersD[206]
|
||||
#define BSIM4SPgpValueArray BSIM4cpuPointersD[207]
|
||||
#define BSIM4SPspValueArray BSIM4cpuPointersD[208]
|
||||
#define BSIM4SPsValueArray BSIM4cpuPointersD[209]
|
||||
#define BSIM4SPbpValueArray BSIM4cpuPointersD[210]
|
||||
#define BSIM4SspValueArray BSIM4cpuPointersD[211]
|
||||
#define BSIM4SsValueArray BSIM4cpuPointersD[212]
|
||||
#define BSIM4BPdpValueArray BSIM4cpuPointersD[213]
|
||||
#define BSIM4BPgpValueArray BSIM4cpuPointersD[214]
|
||||
#define BSIM4BPspValueArray BSIM4cpuPointersD[215]
|
||||
#define BSIM4BPbpValueArray BSIM4cpuPointersD[216]
|
||||
#define BSIM4DPdbValueArray BSIM4cpuPointersD[217]
|
||||
#define BSIM4SPsbValueArray BSIM4cpuPointersD[218]
|
||||
#define BSIM4DBdpValueArray BSIM4cpuPointersD[219]
|
||||
#define BSIM4DBdbValueArray BSIM4cpuPointersD[220]
|
||||
#define BSIM4DBbpValueArray BSIM4cpuPointersD[221]
|
||||
#define BSIM4DBbValueArray BSIM4cpuPointersD[222]
|
||||
#define BSIM4BPdbValueArray BSIM4cpuPointersD[223]
|
||||
#define BSIM4BPbValueArray BSIM4cpuPointersD[224]
|
||||
#define BSIM4BPsbValueArray BSIM4cpuPointersD[225]
|
||||
#define BSIM4BPbpIFValueArray BSIM4cpuPointersD[226]
|
||||
#define BSIM4SBspValueArray BSIM4cpuPointersD[227]
|
||||
#define BSIM4SBbpValueArray BSIM4cpuPointersD[228]
|
||||
#define BSIM4SBbValueArray BSIM4cpuPointersD[229]
|
||||
#define BSIM4SBsbValueArray BSIM4cpuPointersD[230]
|
||||
#define BSIM4BdbValueArray BSIM4cpuPointersD[231]
|
||||
#define BSIM4BbpValueArray BSIM4cpuPointersD[232]
|
||||
#define BSIM4BsbValueArray BSIM4cpuPointersD[233]
|
||||
#define BSIM4BbValueArray BSIM4cpuPointersD[234]
|
||||
#define BSIM4QqValueArray BSIM4cpuPointersD[235]
|
||||
#define BSIM4QgpValueArray BSIM4cpuPointersD[236]
|
||||
#define BSIM4QdpValueArray BSIM4cpuPointersD[237]
|
||||
#define BSIM4QspValueArray BSIM4cpuPointersD[238]
|
||||
#define BSIM4QbpValueArray BSIM4cpuPointersD[239]
|
||||
#define BSIM4DPqValueArray BSIM4cpuPointersD[240]
|
||||
#define BSIM4SPqValueArray BSIM4cpuPointersD[241]
|
||||
#define BSIM4GPqValueArray BSIM4cpuPointersD[242]
|
||||
|
||||
int *BSIM4cpuPointersI [18] ;
|
||||
#define BSIM4offArray BSIM4cpuPointersI[0]
|
||||
#define BSIM4dNodePrimeArray BSIM4cpuPointersI[1]
|
||||
#define BSIM4sNodePrimeArray BSIM4cpuPointersI[2]
|
||||
#define BSIM4gNodePrimeArray BSIM4cpuPointersI[3]
|
||||
#define BSIM4bNodePrimeArray BSIM4cpuPointersI[4]
|
||||
#define BSIM4gNodeExtArray BSIM4cpuPointersI[5]
|
||||
#define BSIM4gNodeMidArray BSIM4cpuPointersI[6]
|
||||
#define BSIM4dbNodeArray BSIM4cpuPointersI[7]
|
||||
#define BSIM4sbNodeArray BSIM4cpuPointersI[8]
|
||||
#define BSIM4sNodeArray BSIM4cpuPointersI[9]
|
||||
#define BSIM4dNodeArray BSIM4cpuPointersI[10]
|
||||
#define BSIM4qNodeArray BSIM4cpuPointersI[11]
|
||||
#define BSIM4rbodyModArray BSIM4cpuPointersI[12]
|
||||
#define BSIM4modeArray BSIM4cpuPointersI[13]
|
||||
#define BSIM4rgateModArray BSIM4cpuPointersI[14]
|
||||
#define BSIM4trnqsModArray BSIM4cpuPointersI[15]
|
||||
#define BSIM4acnqsModArray BSIM4cpuPointersI[16]
|
||||
#define BSIM4statesArray BSIM4cpuPointersI[17]
|
||||
} BSIM4paramCPUstruct ;
|
||||
|
||||
typedef struct sBSIM4paramGPUstruct {
|
||||
|
||||
double *BSIM4cudaPointersD [243] ;
|
||||
#define d_BSIM4gbsRWArray BSIM4cudaPointersD[0]
|
||||
#define d_BSIM4cbsRWArray BSIM4cudaPointersD[1]
|
||||
#define d_BSIM4gbdRWArray BSIM4cudaPointersD[2]
|
||||
#define d_BSIM4cbdRWArray BSIM4cudaPointersD[3]
|
||||
#define d_BSIM4vonRWArray BSIM4cudaPointersD[4]
|
||||
#define d_BSIM4vdsatRWArray BSIM4cudaPointersD[5]
|
||||
#define d_BSIM4csubRWArray BSIM4cudaPointersD[6]
|
||||
#define d_BSIM4gdsRWArray BSIM4cudaPointersD[7]
|
||||
#define d_BSIM4gmRWArray BSIM4cudaPointersD[8]
|
||||
#define d_BSIM4gmbsRWArray BSIM4cudaPointersD[9]
|
||||
#define d_BSIM4gcrgRWArray BSIM4cudaPointersD[10]
|
||||
#define d_BSIM4IgidlRWArray BSIM4cudaPointersD[11]
|
||||
#define d_BSIM4IgislRWArray BSIM4cudaPointersD[12]
|
||||
#define d_BSIM4IgcsRWArray BSIM4cudaPointersD[13]
|
||||
#define d_BSIM4IgcdRWArray BSIM4cudaPointersD[14]
|
||||
#define d_BSIM4IgsRWArray BSIM4cudaPointersD[15]
|
||||
#define d_BSIM4IgdRWArray BSIM4cudaPointersD[16]
|
||||
#define d_BSIM4IgbRWArray BSIM4cudaPointersD[17]
|
||||
#define d_BSIM4cdRWArray BSIM4cudaPointersD[18]
|
||||
#define d_BSIM4qinvRWArray BSIM4cudaPointersD[19]
|
||||
#define d_BSIM4cggbRWArray BSIM4cudaPointersD[20]
|
||||
#define d_BSIM4cgsbRWArray BSIM4cudaPointersD[21]
|
||||
#define d_BSIM4cgdbRWArray BSIM4cudaPointersD[22]
|
||||
#define d_BSIM4cdgbRWArray BSIM4cudaPointersD[23]
|
||||
#define d_BSIM4cdsbRWArray BSIM4cudaPointersD[24]
|
||||
#define d_BSIM4cddbRWArray BSIM4cudaPointersD[25]
|
||||
#define d_BSIM4cbgbRWArray BSIM4cudaPointersD[26]
|
||||
#define d_BSIM4cbsbRWArray BSIM4cudaPointersD[27]
|
||||
#define d_BSIM4cbdbRWArray BSIM4cudaPointersD[28]
|
||||
#define d_BSIM4csgbRWArray BSIM4cudaPointersD[29]
|
||||
#define d_BSIM4cssbRWArray BSIM4cudaPointersD[30]
|
||||
#define d_BSIM4csdbRWArray BSIM4cudaPointersD[31]
|
||||
#define d_BSIM4cgbbRWArray BSIM4cudaPointersD[32]
|
||||
#define d_BSIM4csbbRWArray BSIM4cudaPointersD[33]
|
||||
#define d_BSIM4cdbbRWArray BSIM4cudaPointersD[34]
|
||||
#define d_BSIM4cbbbRWArray BSIM4cudaPointersD[35]
|
||||
#define d_BSIM4gtauRWArray BSIM4cudaPointersD[36]
|
||||
#define d_BSIM4qgateRWArray BSIM4cudaPointersD[37]
|
||||
#define d_BSIM4qbulkRWArray BSIM4cudaPointersD[38]
|
||||
#define d_BSIM4qdrnRWArray BSIM4cudaPointersD[39]
|
||||
#define d_BSIM4qsrcRWArray BSIM4cudaPointersD[40]
|
||||
#define d_BSIM4capbsRWArray BSIM4cudaPointersD[41]
|
||||
#define d_BSIM4capbdRWArray BSIM4cudaPointersD[42]
|
||||
#define d_BSIM4icVDSArray BSIM4cudaPointersD[43]
|
||||
#define d_BSIM4icVGSArray BSIM4cudaPointersD[44]
|
||||
#define d_BSIM4icVBSArray BSIM4cudaPointersD[45]
|
||||
#define d_BSIM4vth0Array BSIM4cudaPointersD[46]
|
||||
#define d_BSIM4gbbsArray BSIM4cudaPointersD[47]
|
||||
#define d_BSIM4ggidlbArray BSIM4cudaPointersD[48]
|
||||
#define d_BSIM4gbgsArray BSIM4cudaPointersD[49]
|
||||
#define d_BSIM4ggidlgArray BSIM4cudaPointersD[50]
|
||||
#define d_BSIM4gbdsArray BSIM4cudaPointersD[51]
|
||||
#define d_BSIM4ggidldArray BSIM4cudaPointersD[52]
|
||||
#define d_BSIM4ggislsArray BSIM4cudaPointersD[53]
|
||||
#define d_BSIM4ggislgArray BSIM4cudaPointersD[54]
|
||||
#define d_BSIM4ggislbArray BSIM4cudaPointersD[55]
|
||||
#define d_BSIM4gIgsgArray BSIM4cudaPointersD[56]
|
||||
#define d_BSIM4gIgcsgArray BSIM4cudaPointersD[57]
|
||||
#define d_BSIM4gIgcsdArray BSIM4cudaPointersD[58]
|
||||
#define d_BSIM4gIgcsbArray BSIM4cudaPointersD[59]
|
||||
#define d_BSIM4gIgdgArray BSIM4cudaPointersD[60]
|
||||
#define d_BSIM4gIgcdgArray BSIM4cudaPointersD[61]
|
||||
#define d_BSIM4gIgcddArray BSIM4cudaPointersD[62]
|
||||
#define d_BSIM4gIgcdbArray BSIM4cudaPointersD[63]
|
||||
#define d_BSIM4gIgbgArray BSIM4cudaPointersD[64]
|
||||
#define d_BSIM4gIgbdArray BSIM4cudaPointersD[65]
|
||||
#define d_BSIM4gIgbbArray BSIM4cudaPointersD[66]
|
||||
#define d_BSIM4ggidlsArray BSIM4cudaPointersD[67]
|
||||
#define d_BSIM4ggisldArray BSIM4cudaPointersD[68]
|
||||
#define d_BSIM4gstotArray BSIM4cudaPointersD[69]
|
||||
#define d_BSIM4gstotdArray BSIM4cudaPointersD[70]
|
||||
#define d_BSIM4gstotgArray BSIM4cudaPointersD[71]
|
||||
#define d_BSIM4gstotbArray BSIM4cudaPointersD[72]
|
||||
#define d_BSIM4gdtotArray BSIM4cudaPointersD[73]
|
||||
#define d_BSIM4gdtotdArray BSIM4cudaPointersD[74]
|
||||
#define d_BSIM4gdtotgArray BSIM4cudaPointersD[75]
|
||||
#define d_BSIM4gdtotbArray BSIM4cudaPointersD[76]
|
||||
#define d_BSIM4cgdoArray BSIM4cudaPointersD[77]
|
||||
#define d_BSIM4qgdoArray BSIM4cudaPointersD[78]
|
||||
#define d_BSIM4cgsoArray BSIM4cudaPointersD[79]
|
||||
#define d_BSIM4qgsoArray BSIM4cudaPointersD[80]
|
||||
#define d_BSIM4AseffArray BSIM4cudaPointersD[81]
|
||||
#define d_BSIM4PseffArray BSIM4cudaPointersD[82]
|
||||
#define d_BSIM4nfArray BSIM4cudaPointersD[83]
|
||||
#define d_BSIM4XExpBVSArray BSIM4cudaPointersD[84]
|
||||
#define d_BSIM4vjsmFwdArray BSIM4cudaPointersD[85]
|
||||
#define d_BSIM4IVjsmFwdArray BSIM4cudaPointersD[86]
|
||||
#define d_BSIM4vjsmRevArray BSIM4cudaPointersD[87]
|
||||
#define d_BSIM4IVjsmRevArray BSIM4cudaPointersD[88]
|
||||
#define d_BSIM4SslpRevArray BSIM4cudaPointersD[89]
|
||||
#define d_BSIM4SslpFwdArray BSIM4cudaPointersD[90]
|
||||
#define d_BSIM4AdeffArray BSIM4cudaPointersD[91]
|
||||
#define d_BSIM4PdeffArray BSIM4cudaPointersD[92]
|
||||
#define d_BSIM4XExpBVDArray BSIM4cudaPointersD[93]
|
||||
#define d_BSIM4vjdmFwdArray BSIM4cudaPointersD[94]
|
||||
#define d_BSIM4IVjdmFwdArray BSIM4cudaPointersD[95]
|
||||
#define d_BSIM4vjdmRevArray BSIM4cudaPointersD[96]
|
||||
#define d_BSIM4IVjdmRevArray BSIM4cudaPointersD[97]
|
||||
#define d_BSIM4DslpRevArray BSIM4cudaPointersD[98]
|
||||
#define d_BSIM4DslpFwdArray BSIM4cudaPointersD[99]
|
||||
#define d_BSIM4SjctTempRevSatCurArray BSIM4cudaPointersD[100]
|
||||
#define d_BSIM4SswTempRevSatCurArray BSIM4cudaPointersD[101]
|
||||
#define d_BSIM4SswgTempRevSatCurArray BSIM4cudaPointersD[102]
|
||||
#define d_BSIM4DjctTempRevSatCurArray BSIM4cudaPointersD[103]
|
||||
#define d_BSIM4DswTempRevSatCurArray BSIM4cudaPointersD[104]
|
||||
#define d_BSIM4DswgTempRevSatCurArray BSIM4cudaPointersD[105]
|
||||
#define d_BSIM4vbscArray BSIM4cudaPointersD[106]
|
||||
#define d_BSIM4thetavthArray BSIM4cudaPointersD[107]
|
||||
#define d_BSIM4eta0Array BSIM4cudaPointersD[108]
|
||||
#define d_BSIM4k2oxArray BSIM4cudaPointersD[109]
|
||||
#define d_BSIM4nstarArray BSIM4cudaPointersD[110]
|
||||
#define d_BSIM4vfbArray BSIM4cudaPointersD[111]
|
||||
#define d_BSIM4vgs_effArray BSIM4cudaPointersD[112]
|
||||
#define d_BSIM4vgd_effArray BSIM4cudaPointersD[113]
|
||||
#define d_BSIM4dvgs_eff_dvgArray BSIM4cudaPointersD[114]
|
||||
#define d_BSIM4dvgd_eff_dvgArray BSIM4cudaPointersD[115]
|
||||
#define d_BSIM4VgsteffArray BSIM4cudaPointersD[116]
|
||||
#define d_BSIM4grdswArray BSIM4cudaPointersD[117]
|
||||
#define d_BSIM4AbulkArray BSIM4cudaPointersD[118]
|
||||
#define d_BSIM4vtfbphi1Array BSIM4cudaPointersD[119]
|
||||
#define d_BSIM4ueffArray BSIM4cudaPointersD[120]
|
||||
#define d_BSIM4u0tempArray BSIM4cudaPointersD[121]
|
||||
#define d_BSIM4vsattempArray BSIM4cudaPointersD[122]
|
||||
#define d_BSIM4EsatLArray BSIM4cudaPointersD[123]
|
||||
#define d_BSIM4VdseffArray BSIM4cudaPointersD[124]
|
||||
#define d_BSIM4vtfbphi2Array BSIM4cudaPointersD[125]
|
||||
#define d_BSIM4CoxeffArray BSIM4cudaPointersD[126]
|
||||
#define d_BSIM4AbovVgst2VtmArray BSIM4cudaPointersD[127]
|
||||
#define d_BSIM4IdovVdsArray BSIM4cudaPointersD[128]
|
||||
#define d_BSIM4gcrgdArray BSIM4cudaPointersD[129]
|
||||
#define d_BSIM4gcrgbArray BSIM4cudaPointersD[130]
|
||||
#define d_BSIM4gcrggArray BSIM4cudaPointersD[131]
|
||||
#define d_BSIM4grgeltdArray BSIM4cudaPointersD[132]
|
||||
#define d_BSIM4gcrgsArray BSIM4cudaPointersD[133]
|
||||
#define d_BSIM4sourceConductanceArray BSIM4cudaPointersD[134]
|
||||
#define d_BSIM4drainConductanceArray BSIM4cudaPointersD[135]
|
||||
#define d_BSIM4gstotsArray BSIM4cudaPointersD[136]
|
||||
#define d_BSIM4gdtotsArray BSIM4cudaPointersD[137]
|
||||
#define d_BSIM4vfbzbArray BSIM4cudaPointersD[138]
|
||||
#define d_BSIM4gIgssArray BSIM4cudaPointersD[139]
|
||||
#define d_BSIM4gIgddArray BSIM4cudaPointersD[140]
|
||||
#define d_BSIM4gIgbsArray BSIM4cudaPointersD[141]
|
||||
#define d_BSIM4gIgcssArray BSIM4cudaPointersD[142]
|
||||
#define d_BSIM4gIgcdsArray BSIM4cudaPointersD[143]
|
||||
#define d_BSIM4noiGd0Array BSIM4cudaPointersD[144]
|
||||
#define d_BSIM4cqdbArray BSIM4cudaPointersD[145]
|
||||
#define d_BSIM4cqsbArray BSIM4cudaPointersD[146]
|
||||
#define d_BSIM4cqgbArray BSIM4cudaPointersD[147]
|
||||
#define d_BSIM4qchqsArray BSIM4cudaPointersD[148]
|
||||
#define d_BSIM4cqbbArray BSIM4cudaPointersD[149]
|
||||
#define d_BSIM4taunetArray BSIM4cudaPointersD[150]
|
||||
#define d_BSIM4gtgArray BSIM4cudaPointersD[151]
|
||||
#define d_BSIM4gtdArray BSIM4cudaPointersD[152]
|
||||
#define d_BSIM4gtsArray BSIM4cudaPointersD[153]
|
||||
#define d_BSIM4gtbArray BSIM4cudaPointersD[154]
|
||||
#define d_BSIM4mArray BSIM4cudaPointersD[155]
|
||||
#define d_BSIM4grbpdArray BSIM4cudaPointersD[156]
|
||||
#define d_BSIM4grbdbArray BSIM4cudaPointersD[157]
|
||||
#define d_BSIM4grbpbArray BSIM4cudaPointersD[158]
|
||||
#define d_BSIM4grbpsArray BSIM4cudaPointersD[159]
|
||||
#define d_BSIM4grbsbArray BSIM4cudaPointersD[160]
|
||||
#define d_BSIM4dNodePrimeRHSValueArray BSIM4cudaPointersD[161]
|
||||
#define d_BSIM4gNodePrimeRHSValueArray BSIM4cudaPointersD[162]
|
||||
#define d_BSIM4gNodeExtRHSValueArray BSIM4cudaPointersD[163]
|
||||
#define d_BSIM4gNodeMidRHSValueArray BSIM4cudaPointersD[164]
|
||||
#define d_BSIM4bNodePrimeRHSValueArray BSIM4cudaPointersD[165]
|
||||
#define d_BSIM4sNodePrimeRHSValueArray BSIM4cudaPointersD[166]
|
||||
#define d_BSIM4dbNodeRHSValueArray BSIM4cudaPointersD[167]
|
||||
#define d_BSIM4sbNodeRHSValueArray BSIM4cudaPointersD[168]
|
||||
#define d_BSIM4dNodeRHSValueArray BSIM4cudaPointersD[169]
|
||||
#define d_BSIM4sNodeRHSValueArray BSIM4cudaPointersD[170]
|
||||
#define d_BSIM4qNodeRHSValueArray BSIM4cudaPointersD[171]
|
||||
#define d_BSIM4GEgeValueArray BSIM4cudaPointersD[172]
|
||||
#define d_BSIM4GPgeValueArray BSIM4cudaPointersD[173]
|
||||
#define d_BSIM4GEgpValueArray BSIM4cudaPointersD[174]
|
||||
#define d_BSIM4GPgpValueArray BSIM4cudaPointersD[175]
|
||||
#define d_BSIM4GPdpValueArray BSIM4cudaPointersD[176]
|
||||
#define d_BSIM4GPspValueArray BSIM4cudaPointersD[177]
|
||||
#define d_BSIM4GPbpValueArray BSIM4cudaPointersD[178]
|
||||
#define d_BSIM4GEdpValueArray BSIM4cudaPointersD[179]
|
||||
#define d_BSIM4GEspValueArray BSIM4cudaPointersD[180]
|
||||
#define d_BSIM4GEbpValueArray BSIM4cudaPointersD[181]
|
||||
#define d_BSIM4GEgmValueArray BSIM4cudaPointersD[182]
|
||||
#define d_BSIM4GMgeValueArray BSIM4cudaPointersD[183]
|
||||
#define d_BSIM4GMgmValueArray BSIM4cudaPointersD[184]
|
||||
#define d_BSIM4GMdpValueArray BSIM4cudaPointersD[185]
|
||||
#define d_BSIM4GMgpValueArray BSIM4cudaPointersD[186]
|
||||
#define d_BSIM4GMspValueArray BSIM4cudaPointersD[187]
|
||||
#define d_BSIM4GMbpValueArray BSIM4cudaPointersD[188]
|
||||
#define d_BSIM4DPgmValueArray BSIM4cudaPointersD[189]
|
||||
#define d_BSIM4GPgmValueArray BSIM4cudaPointersD[190]
|
||||
#define d_BSIM4SPgmValueArray BSIM4cudaPointersD[191]
|
||||
#define d_BSIM4BPgmValueArray BSIM4cudaPointersD[192]
|
||||
#define d_BSIM4DgpValueArray BSIM4cudaPointersD[193]
|
||||
#define d_BSIM4DspValueArray BSIM4cudaPointersD[194]
|
||||
#define d_BSIM4DbpValueArray BSIM4cudaPointersD[195]
|
||||
#define d_BSIM4SdpValueArray BSIM4cudaPointersD[196]
|
||||
#define d_BSIM4SgpValueArray BSIM4cudaPointersD[197]
|
||||
#define d_BSIM4SbpValueArray BSIM4cudaPointersD[198]
|
||||
#define d_BSIM4DPdpValueArray BSIM4cudaPointersD[199]
|
||||
#define d_BSIM4DPdValueArray BSIM4cudaPointersD[200]
|
||||
#define d_BSIM4DPgpValueArray BSIM4cudaPointersD[201]
|
||||
#define d_BSIM4DPspValueArray BSIM4cudaPointersD[202]
|
||||
#define d_BSIM4DPbpValueArray BSIM4cudaPointersD[203]
|
||||
#define d_BSIM4DdpValueArray BSIM4cudaPointersD[204]
|
||||
#define d_BSIM4DdValueArray BSIM4cudaPointersD[205]
|
||||
#define d_BSIM4SPdpValueArray BSIM4cudaPointersD[206]
|
||||
#define d_BSIM4SPgpValueArray BSIM4cudaPointersD[207]
|
||||
#define d_BSIM4SPspValueArray BSIM4cudaPointersD[208]
|
||||
#define d_BSIM4SPsValueArray BSIM4cudaPointersD[209]
|
||||
#define d_BSIM4SPbpValueArray BSIM4cudaPointersD[210]
|
||||
#define d_BSIM4SspValueArray BSIM4cudaPointersD[211]
|
||||
#define d_BSIM4SsValueArray BSIM4cudaPointersD[212]
|
||||
#define d_BSIM4BPdpValueArray BSIM4cudaPointersD[213]
|
||||
#define d_BSIM4BPgpValueArray BSIM4cudaPointersD[214]
|
||||
#define d_BSIM4BPspValueArray BSIM4cudaPointersD[215]
|
||||
#define d_BSIM4BPbpValueArray BSIM4cudaPointersD[216]
|
||||
#define d_BSIM4DPdbValueArray BSIM4cudaPointersD[217]
|
||||
#define d_BSIM4SPsbValueArray BSIM4cudaPointersD[218]
|
||||
#define d_BSIM4DBdpValueArray BSIM4cudaPointersD[219]
|
||||
#define d_BSIM4DBdbValueArray BSIM4cudaPointersD[220]
|
||||
#define d_BSIM4DBbpValueArray BSIM4cudaPointersD[221]
|
||||
#define d_BSIM4DBbValueArray BSIM4cudaPointersD[222]
|
||||
#define d_BSIM4BPdbValueArray BSIM4cudaPointersD[223]
|
||||
#define d_BSIM4BPbValueArray BSIM4cudaPointersD[224]
|
||||
#define d_BSIM4BPsbValueArray BSIM4cudaPointersD[225]
|
||||
#define d_BSIM4BPbpIFValueArray BSIM4cudaPointersD[226]
|
||||
#define d_BSIM4SBspValueArray BSIM4cudaPointersD[227]
|
||||
#define d_BSIM4SBbpValueArray BSIM4cudaPointersD[228]
|
||||
#define d_BSIM4SBbValueArray BSIM4cudaPointersD[229]
|
||||
#define d_BSIM4SBsbValueArray BSIM4cudaPointersD[230]
|
||||
#define d_BSIM4BdbValueArray BSIM4cudaPointersD[231]
|
||||
#define d_BSIM4BbpValueArray BSIM4cudaPointersD[232]
|
||||
#define d_BSIM4BsbValueArray BSIM4cudaPointersD[233]
|
||||
#define d_BSIM4BbValueArray BSIM4cudaPointersD[234]
|
||||
#define d_BSIM4QqValueArray BSIM4cudaPointersD[235]
|
||||
#define d_BSIM4QgpValueArray BSIM4cudaPointersD[236]
|
||||
#define d_BSIM4QdpValueArray BSIM4cudaPointersD[237]
|
||||
#define d_BSIM4QspValueArray BSIM4cudaPointersD[238]
|
||||
#define d_BSIM4QbpValueArray BSIM4cudaPointersD[239]
|
||||
#define d_BSIM4DPqValueArray BSIM4cudaPointersD[240]
|
||||
#define d_BSIM4SPqValueArray BSIM4cudaPointersD[241]
|
||||
#define d_BSIM4GPqValueArray BSIM4cudaPointersD[242]
|
||||
|
||||
int *BSIM4cudaPointersI [18] ;
|
||||
#define d_BSIM4offArray BSIM4cudaPointersI[0]
|
||||
#define d_BSIM4dNodePrimeArray BSIM4cudaPointersI[1]
|
||||
#define d_BSIM4sNodePrimeArray BSIM4cudaPointersI[2]
|
||||
#define d_BSIM4gNodePrimeArray BSIM4cudaPointersI[3]
|
||||
#define d_BSIM4bNodePrimeArray BSIM4cudaPointersI[4]
|
||||
#define d_BSIM4gNodeExtArray BSIM4cudaPointersI[5]
|
||||
#define d_BSIM4gNodeMidArray BSIM4cudaPointersI[6]
|
||||
#define d_BSIM4dbNodeArray BSIM4cudaPointersI[7]
|
||||
#define d_BSIM4sbNodeArray BSIM4cudaPointersI[8]
|
||||
#define d_BSIM4sNodeArray BSIM4cudaPointersI[9]
|
||||
#define d_BSIM4dNodeArray BSIM4cudaPointersI[10]
|
||||
#define d_BSIM4qNodeArray BSIM4cudaPointersI[11]
|
||||
#define d_BSIM4rbodyModArray BSIM4cudaPointersI[12]
|
||||
#define d_BSIM4modeArray BSIM4cudaPointersI[13]
|
||||
#define d_BSIM4rgateModArray BSIM4cudaPointersI[14]
|
||||
#define d_BSIM4trnqsModArray BSIM4cudaPointersI[15]
|
||||
#define d_BSIM4acnqsModArray BSIM4cudaPointersI[16]
|
||||
#define d_BSIM4statesArray BSIM4cudaPointersI[17]
|
||||
} BSIM4paramGPUstruct ;
|
||||
#endif
|
||||
|
||||
typedef struct sBSIM4model
|
||||
{
|
||||
|
|
@ -2774,6 +3311,27 @@ typedef struct sBSIM4model
|
|||
unsigned BSIM4pk2weGiven :1;
|
||||
unsigned BSIM4pku0weGiven :1;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
struct bsim4SizeDependParam **d_pParam ;
|
||||
struct bsim4SizeDependParam **pParamHost ;
|
||||
|
||||
BSIM4paramCPUstruct BSIM4paramCPU ;
|
||||
BSIM4paramGPUstruct BSIM4paramGPU ;
|
||||
|
||||
int offset ;
|
||||
int n_values ;
|
||||
int n_Ptr ;
|
||||
int *PositionVector ;
|
||||
int *d_PositionVector ;
|
||||
|
||||
int offsetRHS ;
|
||||
int n_valuesRHS ;
|
||||
int n_PtrRHS ;
|
||||
int *PositionVectorRHS ;
|
||||
int *d_PositionVectorRHS ;
|
||||
|
||||
int n_instances ;
|
||||
#endif
|
||||
|
||||
} BSIM4model;
|
||||
|
||||
|
|
|
|||
|
|
@ -35,3 +35,7 @@ extern int BSIM4bindCSC (GENmodel*, CKTcircuit*) ;
|
|||
extern int BSIM4bindCSCComplex (GENmodel*, CKTcircuit*) ;
|
||||
extern int BSIM4bindCSCComplexToReal (GENmodel*, CKTcircuit*) ;
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
extern int BSIM4topology (GENmodel *, CKTcircuit *, int *, int *) ;
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -6,6 +6,9 @@
|
|||
#include "bsim4ext.h"
|
||||
#include "bsim4init.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
SPICEdev BSIM4info = {
|
||||
{
|
||||
|
|
@ -42,7 +45,11 @@ SPICEdev BSIM4info = {
|
|||
|
||||
BSIM4param, /* DEVparam */
|
||||
BSIM4mParam, /* DEVmodParam */
|
||||
#ifdef USE_CUSPICE
|
||||
cuBSIM4load, /* DEVload */
|
||||
#else
|
||||
BSIM4load, /* DEVload */
|
||||
#endif
|
||||
BSIM4setup, /* DEVsetup */
|
||||
BSIM4unsetup, /* DEVunsetup */
|
||||
BSIM4setup, /* DEVpzSetup */
|
||||
|
|
@ -81,6 +88,11 @@ SPICEdev BSIM4info = {
|
|||
BSIM4bindCSCComplexToReal, /* DEVbindCSCComplexToReal */
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
cuBSIM4destroy, /* cuDEVdestroy */
|
||||
BSIM4topology, /* DEVtopology */
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev BSIM4v4info = {
|
|||
BSIM4v4bindCSCComplexToReal, /* DEVbindCSCComplexToReal */
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev BSIM4v5info = {
|
|||
BSIM4v5bindCSCComplexToReal, /* DEVbindCSCComplexToReal */
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev BSIM4v6info = {
|
|||
BSIM4v6bindCSCComplexToReal, /* DEVbindCSCComplexToReal */
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -79,6 +79,11 @@ SPICEdev B4SOIinfo = {
|
|||
/* DEVbindCSCComplexToReal */ B4SOIbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
|
|
|
|||
|
|
@ -38,4 +38,19 @@ endif
|
|||
AM_CPPFLAGS = @AM_CPPFLAGS@ -I$(top_srcdir)/src/include
|
||||
AM_CFLAGS = $(STATIC)
|
||||
|
||||
if USE_CUSPICE_WANTED
|
||||
.cu.lo:
|
||||
$(AM_V_GEN)$(top_srcdir)/src/libtool_wrapper_for_cuda.tcl $@ $(AM_CFLAGS) $(NVCC) $(CUDA_CFLAGS) $(AM_CPPFLAGS) -c $<
|
||||
|
||||
libcap_la_SOURCES += \
|
||||
CUSPICE/captopology.c \
|
||||
CUSPICE/cucapfree.c \
|
||||
CUSPICE/cucapgetic.c \
|
||||
CUSPICE/cucapload.cu \
|
||||
CUSPICE/cucapsetup.c \
|
||||
CUSPICE/cucaptemp.c
|
||||
|
||||
AM_CPPFLAGS += $(CUDA_CPPFLAGS)
|
||||
endif
|
||||
|
||||
MAINTAINERCLEANFILES = Makefile.in
|
||||
|
|
|
|||
|
|
@ -76,6 +76,35 @@ typedef struct sCAPinstance {
|
|||
+3 for the derivatives - pointer to the
|
||||
beginning of the array */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
typedef struct sCAPparamCPUstruct {
|
||||
double *CAPcpuPointersD [5] ;
|
||||
#define CAPinitCondArray CAPcpuPointersD[0]
|
||||
#define CAPcapacArray CAPcpuPointersD[1]
|
||||
#define CAPmArray CAPcpuPointersD[2]
|
||||
#define CAPgeqValueArray CAPcpuPointersD[3]
|
||||
#define CAPceqValueArray CAPcpuPointersD[4]
|
||||
|
||||
int *CAPcpuPointersI [3] ;
|
||||
#define CAPposNodeArray CAPcpuPointersI[0]
|
||||
#define CAPnegNodeArray CAPcpuPointersI[1]
|
||||
#define CAPstateArray CAPcpuPointersI[2]
|
||||
} CAPparamCPUstruct ;
|
||||
|
||||
typedef struct sCAPparamGPUstruct {
|
||||
double *CAPcudaPointersD [5] ;
|
||||
#define d_CAPinitCondArray CAPcudaPointersD[0]
|
||||
#define d_CAPcapacArray CAPcudaPointersD[1]
|
||||
#define d_CAPmArray CAPcudaPointersD[2]
|
||||
#define d_CAPgeqValueArray CAPcudaPointersD[3]
|
||||
#define d_CAPceqValueArray CAPcudaPointersD[4]
|
||||
|
||||
int *CAPcudaPointersI [3] ;
|
||||
#define d_CAPposNodeArray CAPcudaPointersI[0]
|
||||
#define d_CAPnegNodeArray CAPcudaPointersI[1]
|
||||
#define d_CAPstateArray CAPcudaPointersI[2]
|
||||
} CAPparamGPUstruct ;
|
||||
#endif
|
||||
|
||||
/* data per model */
|
||||
|
||||
|
|
@ -118,6 +147,25 @@ typedef struct sCAPmodel { /* model structure for a capacitor */
|
|||
unsigned CAPthickGiven : 1; /* flags indicates insulator thickness given */
|
||||
unsigned CAPbv_maxGiven : 1; /* flags indicates maximum voltage is given */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
CAPparamCPUstruct CAPparamCPU ;
|
||||
CAPparamGPUstruct CAPparamGPU ;
|
||||
|
||||
int offset ;
|
||||
int n_values ;
|
||||
int n_Ptr ;
|
||||
int *PositionVector ;
|
||||
int *d_PositionVector ;
|
||||
|
||||
int offsetRHS ;
|
||||
int n_valuesRHS ;
|
||||
int n_PtrRHS ;
|
||||
int *PositionVectorRHS ;
|
||||
int *d_PositionVectorRHS ;
|
||||
|
||||
int n_instances ;
|
||||
#endif
|
||||
|
||||
} CAPmodel;
|
||||
|
||||
/* device parameters */
|
||||
|
|
|
|||
|
|
@ -29,3 +29,7 @@ extern int CAPbindCSC (GENmodel*, CKTcircuit*) ;
|
|||
extern int CAPbindCSCComplex (GENmodel*, CKTcircuit*) ;
|
||||
extern int CAPbindCSCComplexToReal (GENmodel*, CKTcircuit*) ;
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
extern int CAPtopology (GENmodel *, CKTcircuit *, int *, int *) ;
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -6,6 +6,9 @@
|
|||
#include "capext.h"
|
||||
#include "capinit.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
SPICEdev CAPinfo = {
|
||||
{ "Capacitor",
|
||||
|
|
@ -41,7 +44,11 @@ SPICEdev CAPinfo = {
|
|||
|
||||
/* DEVparam */ CAPparam,
|
||||
/* DEVmodParam */ CAPmParam,
|
||||
#ifdef USE_CUSPICE
|
||||
/* DEVload */ cuCAPload,
|
||||
#else
|
||||
/* DEVload */ CAPload,
|
||||
#endif
|
||||
/* DEVsetup */ CAPsetup,
|
||||
/* DEVunsetup */ NULL,
|
||||
/* DEVpzSetup */ CAPsetup,
|
||||
|
|
@ -80,6 +87,11 @@ SPICEdev CAPinfo = {
|
|||
/* DEVbindCSCComplexToReal */ CAPbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ cuCAPdestroy,
|
||||
/* DEVtopology */ CAPtopology,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -12,6 +12,9 @@ Modified: September 2003 Paolo Nenzi
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
|
|
@ -117,6 +120,92 @@ do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\
|
|||
TSTALLOC(CAPnegPosptr,CAPnegNode,CAPposNode);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, j, k, status ;
|
||||
|
||||
/* Counting the instances */
|
||||
for (model = (CAPmodel *)inModel ; model != NULL ; model = model->CAPnextModel)
|
||||
{
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->CAPinstances ; here != NULL ; here = here->CAPnextInstance)
|
||||
{
|
||||
i++ ;
|
||||
}
|
||||
|
||||
/* How much instances we have */
|
||||
model->n_instances = i ;
|
||||
}
|
||||
|
||||
/* loop through all the capacitor models */
|
||||
for (model = (CAPmodel *)inModel ; model != NULL ; model = model->CAPnextModel)
|
||||
{
|
||||
model->offset = ckt->total_n_values ;
|
||||
model->offsetRHS = ckt->total_n_valuesRHS ;
|
||||
|
||||
j = 0 ;
|
||||
k = 0 ;
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->CAPinstances ; here != NULL ; here = here->CAPnextInstance)
|
||||
{
|
||||
/* For the Matrix */
|
||||
if ((here->CAPposNode != 0) && (here->CAPposNode != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->CAPnegNode != 0) && (here->CAPnegNode != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->CAPposNode != 0) && (here->CAPnegNode != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->CAPnegNode != 0) && (here->CAPposNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* For the RHS */
|
||||
if (here->CAPposNode != 0)
|
||||
k++ ;
|
||||
|
||||
if (here->CAPnegNode != 0)
|
||||
k++ ;
|
||||
}
|
||||
|
||||
model->n_values = model->n_instances ;
|
||||
ckt->total_n_values += model->n_values ;
|
||||
|
||||
model->n_Ptr = j ;
|
||||
ckt->total_n_Ptr += model->n_Ptr ;
|
||||
|
||||
model->n_valuesRHS = model->n_instances ;
|
||||
ckt->total_n_valuesRHS += model->n_valuesRHS ;
|
||||
|
||||
model->n_PtrRHS = k ;
|
||||
ckt->total_n_PtrRHS += model->n_PtrRHS ;
|
||||
|
||||
|
||||
/* Position Vector assignment */
|
||||
model->PositionVector = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instances ; j++)
|
||||
model->PositionVector [j] = model->offset + j ;
|
||||
|
||||
/* Position Vector assignment for the RHS */
|
||||
model->PositionVectorRHS = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instances ; j++)
|
||||
model->PositionVectorRHS [j] = model->offsetRHS + j ;
|
||||
}
|
||||
|
||||
/* loop through all the capacitor models */
|
||||
for (model = (CAPmodel *)inModel ; model != NULL ; model = model->CAPnextModel)
|
||||
{
|
||||
status = cuCAPsetup ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
#endif
|
||||
|
||||
return(OK);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -16,6 +16,9 @@ Modified: September 2003 Paolo Nenzi
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
|
|
@ -28,9 +31,17 @@ CAPtemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
double factor;
|
||||
double tc1, tc2;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, status ;
|
||||
#endif
|
||||
|
||||
/* loop through all the capacitor models */
|
||||
for( ; model != NULL; model = model->CAPnextModel ) {
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
i = 0 ;
|
||||
#endif
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->CAPinstances; here != NULL ;
|
||||
here=here->CAPnextInstance) {
|
||||
|
|
@ -85,7 +96,24 @@ CAPtemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
|
||||
here->CAPcapac = here->CAPcapac * factor * here->CAPscale;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
model->CAPparamCPU.CAPcapacArray[i] = here->CAPcapac ;
|
||||
model->CAPparamCPU.CAPmArray[i] = here->CAPm ;
|
||||
model->CAPparamCPU.CAPposNodeArray[i] = here->CAPposNode ;
|
||||
model->CAPparamCPU.CAPnegNodeArray[i] = here->CAPnegNode ;
|
||||
model->CAPparamCPU.CAPstateArray[i] = here->CAPstate ;
|
||||
|
||||
i++ ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuCAPtemp ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -80,6 +80,11 @@ SPICEdev CCCSinfo = {
|
|||
/* DEVbindCSCComplexToReal */ CCCSbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev CCVSinfo = {
|
|||
/* DEVbindCSCComplexToReal */ CCVSbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev CPLinfo = {
|
|||
/* DEVbindCSCComplexToReal */ NULL,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
|
|
|
|||
|
|
@ -83,6 +83,11 @@ SPICEdev CSWinfo = {
|
|||
/* DEVbindCSCComplexToReal */ CSWbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -82,6 +82,11 @@ SPICEdev DIOinfo = {
|
|||
/* DEVbindCSCComplexToReal */ DIObindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev HFETAinfo = {
|
|||
/* DEVbindCSCComplexToReal */ HFETAbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev HFET2info = {
|
|||
/* DEVbindCSCComplexToReal */ HFET2bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -79,6 +79,11 @@ SPICEdev HSM2info = {
|
|||
/* DEVbindCSCComplexToReal */ HSM2bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -79,6 +79,11 @@ SPICEdev HSMHVinfo = {
|
|||
/* DEVbindCSCComplexToReal */ HSMHVbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -48,4 +48,25 @@ endif
|
|||
AM_CPPFLAGS = @AM_CPPFLAGS@ -I$(top_srcdir)/src/include
|
||||
AM_CFLAGS = $(STATIC)
|
||||
|
||||
if USE_CUSPICE_WANTED
|
||||
.cu.lo:
|
||||
$(AM_V_GEN)$(top_srcdir)/src/libtool_wrapper_for_cuda.tcl $@ $(AM_CFLAGS) $(NVCC) $(CUDA_CFLAGS) $(AM_CPPFLAGS) -c $<
|
||||
|
||||
libind_la_SOURCES += \
|
||||
CUSPICE/indtopology.c \
|
||||
CUSPICE/cuindfree.c \
|
||||
CUSPICE/cuindload.cu \
|
||||
CUSPICE/cuindsetup.c \
|
||||
CUSPICE/cuindtemp.c
|
||||
|
||||
libind_la_SOURCES += \
|
||||
CUSPICE/muttopology.c \
|
||||
CUSPICE/cumutfree.c \
|
||||
CUSPICE/cumutload.cu \
|
||||
CUSPICE/cumutsetup.c \
|
||||
CUSPICE/cumuttemp.c
|
||||
|
||||
AM_CPPFLAGS += $(CUDA_CPPFLAGS)
|
||||
endif
|
||||
|
||||
MAINTAINERCLEANFILES = Makefile.in
|
||||
|
|
|
|||
|
|
@ -67,6 +67,11 @@ typedef struct sINDinstance {
|
|||
BindElement *INDibrIbrptrStructPtr ;
|
||||
#endif
|
||||
|
||||
/* PARTICULAR SITUATION */
|
||||
#ifdef USE_CUSPICE
|
||||
int instanceID ;
|
||||
#endif
|
||||
|
||||
} INDinstance ;
|
||||
|
||||
#define INDflux INDstate /* flux in the inductor */
|
||||
|
|
@ -75,6 +80,31 @@ typedef struct sINDinstance {
|
|||
+3 for the derivatives - pointer to the
|
||||
beginning of the array */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
typedef struct sINDparamCPUstruct {
|
||||
double *INDcpuPointersD [4] ;
|
||||
#define INDinitCondArray INDcpuPointersD[0]
|
||||
#define INDinductArray INDcpuPointersD[1]
|
||||
#define INDreqValueArray INDcpuPointersD[2]
|
||||
#define INDveqValueArray INDcpuPointersD[3]
|
||||
|
||||
int *INDcpuPointersI [2] ;
|
||||
#define INDbrEqArray INDcpuPointersI[0]
|
||||
#define INDstateArray INDcpuPointersI[1]
|
||||
} INDparamCPUstruct ;
|
||||
|
||||
typedef struct sINDparamGPUstruct {
|
||||
double *INDcudaPointersD [4] ;
|
||||
#define d_INDinitCondArray INDcudaPointersD[0]
|
||||
#define d_INDinductArray INDcudaPointersD[1]
|
||||
#define d_INDreqValueArray INDcudaPointersD[2]
|
||||
#define d_INDveqValueArray INDcudaPointersD[3]
|
||||
|
||||
int *INDcudaPointersI [2] ;
|
||||
#define d_INDbrEqArray INDcudaPointersI[0]
|
||||
#define d_INDstateArray INDcudaPointersI[1]
|
||||
} INDparamGPUstruct ;
|
||||
#endif
|
||||
|
||||
/* per model data */
|
||||
|
||||
|
|
@ -107,6 +137,26 @@ typedef struct sINDmodel { /* model structure for an inductor */
|
|||
unsigned INDmIndGiven : 1; /* flag to indicate model inductance given */
|
||||
|
||||
double INDspecInd; /* Specific (one turn) inductance */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
INDparamCPUstruct INDparamCPU ;
|
||||
INDparamGPUstruct INDparamGPU ;
|
||||
|
||||
int offset ;
|
||||
int n_values ;
|
||||
int n_Ptr ;
|
||||
int *PositionVector ;
|
||||
int *d_PositionVector ;
|
||||
|
||||
int offsetRHS ;
|
||||
int n_valuesRHS ;
|
||||
int n_PtrRHS ;
|
||||
int *PositionVectorRHS ;
|
||||
int *d_PositionVectorRHS ;
|
||||
|
||||
int n_instances ;
|
||||
#endif
|
||||
|
||||
} INDmodel;
|
||||
|
||||
|
||||
|
|
@ -141,6 +191,33 @@ int MUTsenParmNo; /* parameter # for sensitivity use;
|
|||
|
||||
} MUTinstance ;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
typedef struct sMUTparamCPUstruct {
|
||||
double *MUTcpuPointersD [1] ;
|
||||
#define MUTfactorArray MUTcpuPointersD[0]
|
||||
|
||||
int *MUTcpuPointersI [6] ;
|
||||
#define MUTflux1Array MUTcpuPointersI[0]
|
||||
#define MUTflux2Array MUTcpuPointersI[1]
|
||||
#define MUTbrEq1Array MUTcpuPointersI[2]
|
||||
#define MUTbrEq2Array MUTcpuPointersI[3]
|
||||
#define MUTinstanceIND1Array MUTcpuPointersI[4]
|
||||
#define MUTinstanceIND2Array MUTcpuPointersI[5]
|
||||
} MUTparamCPUstruct ;
|
||||
|
||||
typedef struct sMUTparamGPUstruct {
|
||||
double *MUTcudaPointersD [1] ;
|
||||
#define d_MUTfactorArray MUTcudaPointersD[0]
|
||||
|
||||
int *MUTcudaPointersI [6] ;
|
||||
#define d_MUTflux1Array MUTcudaPointersI[0]
|
||||
#define d_MUTflux2Array MUTcudaPointersI[1]
|
||||
#define d_MUTbrEq1Array MUTcudaPointersI[2]
|
||||
#define d_MUTbrEq2Array MUTcudaPointersI[3]
|
||||
#define d_MUTinstanceIND1Array MUTcudaPointersI[4]
|
||||
#define d_MUTinstanceIND2Array MUTcudaPointersI[5]
|
||||
} MUTparamGPUstruct ;
|
||||
#endif
|
||||
|
||||
/* per model data */
|
||||
|
||||
|
|
@ -154,6 +231,25 @@ IFuid MUTmodName; /* pointer to character string naming this model */
|
|||
|
||||
/* --- end of generic struct GENmodel --- */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
MUTparamCPUstruct MUTparamCPU ;
|
||||
MUTparamGPUstruct MUTparamGPU ;
|
||||
|
||||
int offset ;
|
||||
int n_values ;
|
||||
int n_Ptr ;
|
||||
int *PositionVector ;
|
||||
int *d_PositionVector ;
|
||||
|
||||
int *PositionVectorRHS ;
|
||||
int *d_PositionVectorRHS ;
|
||||
|
||||
int n_instances ;
|
||||
|
||||
/* PARTICULAR SITUATION */
|
||||
int n_instancesRHS ;
|
||||
#endif
|
||||
|
||||
} MUTmodel;
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -46,4 +46,9 @@ extern int MUTbindCSCComplex (GENmodel*, CKTcircuit*) ;
|
|||
extern int MUTbindCSCComplexToReal (GENmodel*, CKTcircuit*) ;
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
extern int INDtopology (GENmodel *, CKTcircuit *, int *, int *) ;
|
||||
extern int MUTtopology (GENmodel *, CKTcircuit *, int *, int *) ;
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -6,6 +6,9 @@
|
|||
#include "indext.h"
|
||||
#include "indinit.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
SPICEdev INDinfo = {
|
||||
{
|
||||
|
|
@ -41,7 +44,11 @@ SPICEdev INDinfo = {
|
|||
|
||||
/* DEVparam */ INDparam,
|
||||
/* DEVmodParam */ INDmParam,
|
||||
#ifdef USE_CUSPICE
|
||||
/* DEVload */ cuINDload,
|
||||
#else
|
||||
/* DEVload */ INDload,
|
||||
#endif
|
||||
/* DEVsetup */ INDsetup,
|
||||
/* DEVunsetup */ INDunsetup,
|
||||
/* DEVpzSetup */ INDsetup,
|
||||
|
|
@ -80,6 +87,11 @@ SPICEdev INDinfo = {
|
|||
/* DEVbindCSCComplexToReal */ INDbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ cuINDdestroy,
|
||||
/* DEVtopology */ INDtopology,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -117,7 +129,11 @@ SPICEdev MUTinfo = {
|
|||
|
||||
/* DEVparam */ MUTparam,
|
||||
/* DEVmodParam */ NULL,
|
||||
#ifdef USE_CUSPICE
|
||||
/* DEVload */ cuMUTload,
|
||||
#else
|
||||
/* DEVload */ NULL,/* load handled by INDload */
|
||||
#endif
|
||||
/* DEVsetup */ MUTsetup,
|
||||
/* DEVunsetup */ NULL,
|
||||
/* DEVpzSetup */ MUTsetup,
|
||||
|
|
@ -156,6 +172,11 @@ SPICEdev MUTinfo = {
|
|||
/* DEVbindCSCComplexToReal */ MUTbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ cuMUTdestroy,
|
||||
/* DEVtopology */ MUTtopology,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -10,6 +10,10 @@ Author: 1985 Thomas L. Quarles
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
int
|
||||
INDsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *states)
|
||||
/* load the inductor structure with those pointers needed later
|
||||
|
|
@ -100,6 +104,96 @@ do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\
|
|||
TSTALLOC(INDibrIbrptr,INDbrEq,INDbrEq);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, j, k, status ;
|
||||
|
||||
/* Counting the instances */
|
||||
for (model = (INDmodel *)inModel ; model != NULL ; model = model->INDnextModel)
|
||||
{
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->INDinstances ; here != NULL ; here = here->INDnextInstance)
|
||||
{
|
||||
i++ ;
|
||||
}
|
||||
|
||||
/* How much instances we have */
|
||||
model->n_instances = i ;
|
||||
}
|
||||
|
||||
/* loop through all the inductor models */
|
||||
for (model = (INDmodel *)inModel ; model != NULL ; model = model->INDnextModel)
|
||||
{
|
||||
model->offset = ckt->total_n_values ;
|
||||
model->offsetRHS = ckt->total_n_valuesRHS ;
|
||||
|
||||
j = 0 ;
|
||||
k = 0 ;
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->INDinstances ; here != NULL ; here = here->INDnextInstance)
|
||||
{
|
||||
/* For the Matrix */
|
||||
if ((here->INDposNode != 0) && (here->INDbrEq != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->INDnegNode != 0) && (here->INDbrEq != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->INDbrEq != 0) && (here->INDnegNode != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->INDbrEq != 0) && (here->INDposNode != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->INDbrEq != 0) && (here->INDbrEq != 0))
|
||||
j++ ;
|
||||
|
||||
/* For the RHS */
|
||||
if (here->INDbrEq != 0)
|
||||
k++ ;
|
||||
}
|
||||
|
||||
/* 2 Different Values for Every Instance */
|
||||
model->n_values = 2 * model->n_instances ;
|
||||
ckt->total_n_values += model->n_values ;
|
||||
|
||||
model->n_Ptr = j ;
|
||||
ckt->total_n_Ptr += model->n_Ptr ;
|
||||
|
||||
model->n_valuesRHS = model->n_instances ;
|
||||
ckt->total_n_valuesRHS += model->n_valuesRHS ;
|
||||
|
||||
model->n_PtrRHS = k ;
|
||||
ckt->total_n_PtrRHS += model->n_PtrRHS ;
|
||||
|
||||
|
||||
/* Position Vector assignment */
|
||||
model->PositionVector = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instances ; j++)
|
||||
{
|
||||
/* 2 Different Values for Every Instance */
|
||||
model->PositionVector [j] = model->offset + 2 * j ;
|
||||
}
|
||||
|
||||
/* Position Vector assignment for the RHS */
|
||||
model->PositionVectorRHS = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instances ; j++)
|
||||
model->PositionVectorRHS [j] = model->offsetRHS + j ;
|
||||
}
|
||||
|
||||
/* loop through all the inductor models */
|
||||
for (model = (INDmodel *)inModel ; model != NULL ; model = model->INDnextModel)
|
||||
{
|
||||
status = cuINDsetup ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
#endif
|
||||
|
||||
return(OK);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -13,6 +13,10 @@ Author: 2003 Paolo Nenzi
|
|||
#include "ngspice/suffix.h"
|
||||
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
INDtemp(GENmodel *inModel, CKTcircuit *ckt)
|
||||
|
|
@ -23,9 +27,17 @@ INDtemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
double factor;
|
||||
double tc1, tc2;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, status ;
|
||||
#endif
|
||||
|
||||
/* loop through all the inductor models */
|
||||
for( ; model != NULL; model = model->INDnextModel ) {
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
i = 0 ;
|
||||
#endif
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->INDinstances; here != NULL ;
|
||||
here=here->INDnextInstance) {
|
||||
|
|
@ -71,7 +83,23 @@ INDtemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
here->INDinduct = here->INDinduct * factor * here->INDscale;
|
||||
here->INDinduct = here->INDinduct / here->INDm;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
model->INDparamCPU.INDinitCondArray[i] = here->INDinitCond ;
|
||||
model->INDparamCPU.INDinductArray[i] = here->INDinduct ;
|
||||
model->INDparamCPU.INDbrEqArray[i] = here->INDbrEq ;
|
||||
model->INDparamCPU.INDstateArray[i] = here->INDstate ;
|
||||
|
||||
i++ ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuINDtemp ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -15,6 +15,9 @@ Author: 1985 Thomas L. Quarles
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
|
|
@ -66,5 +69,100 @@ do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\
|
|||
TSTALLOC(MUTbr2br1,MUTind2->INDbrEq,MUTind1->INDbrEq);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, j, status ;
|
||||
INDmodel *indmodel ;
|
||||
INDinstance *indhere ;
|
||||
|
||||
/* Counting the instances */
|
||||
for (model = (MUTmodel *)inModel ; model != NULL ; model = model->MUTnextModel)
|
||||
{
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->MUTinstances ; here != NULL ; here = here->MUTnextInstance)
|
||||
{
|
||||
i++ ;
|
||||
}
|
||||
|
||||
/* How much instances we have */
|
||||
model->n_instances = i ;
|
||||
}
|
||||
|
||||
/* loop through all the mutual inductor models */
|
||||
for (model = (MUTmodel *)inModel ; model != NULL ; model = model->MUTnextModel)
|
||||
{
|
||||
model->offset = ckt->total_n_values ;
|
||||
|
||||
j = 0 ;
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->MUTinstances ; here != NULL ; here = here->MUTnextInstance)
|
||||
{
|
||||
/* For the Matrix */
|
||||
if ((here->MUTind1->INDbrEq != 0) && (here->MUTind2->INDbrEq != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->MUTind2->INDbrEq != 0) && (here->MUTind1->INDbrEq != 0))
|
||||
j++ ;
|
||||
}
|
||||
|
||||
model->n_values = model->n_instances ;
|
||||
ckt->total_n_values += model->n_values ;
|
||||
|
||||
model->n_Ptr = j ;
|
||||
ckt->total_n_Ptr += model->n_Ptr ;
|
||||
|
||||
|
||||
/* Position Vector assignment */
|
||||
model->PositionVector = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instances ; j++)
|
||||
model->PositionVector [j] = model->offset + j ;
|
||||
|
||||
|
||||
|
||||
/* PARTICULAR SITUATION */
|
||||
/* Pick up the IND model from one of the two IND instances */
|
||||
indmodel = model->MUTinstances->MUTind1->INDmodPtr ;
|
||||
model->n_instancesRHS = indmodel->n_instances ;
|
||||
|
||||
/* Position Vector assignment for the RHS */
|
||||
model->PositionVectorRHS = TMALLOC (int, model->n_instancesRHS) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instancesRHS ; j++)
|
||||
model->PositionVectorRHS [j] = indmodel->PositionVectorRHS [j] ;
|
||||
|
||||
/* InstanceID assignment for every IND instance */
|
||||
j = 0 ;
|
||||
for (indhere = indmodel->INDinstances ; indhere != NULL ; indhere = indhere->INDnextInstance)
|
||||
{
|
||||
indhere->instanceID = j ;
|
||||
|
||||
j++ ;
|
||||
}
|
||||
|
||||
/* InstanceID storing for every MUT instance */
|
||||
model->MUTparamCPU.MUTinstanceIND1Array = TMALLOC (int, model->n_instances) ;
|
||||
model->MUTparamCPU.MUTinstanceIND2Array = TMALLOC (int, model->n_instances) ;
|
||||
j = 0 ;
|
||||
for (here = model->MUTinstances ; here != NULL ; here = here->MUTnextInstance)
|
||||
{
|
||||
model->MUTparamCPU.MUTinstanceIND1Array [j] = here->MUTind1->instanceID ;
|
||||
model->MUTparamCPU.MUTinstanceIND2Array [j] = here->MUTind2->instanceID ;
|
||||
|
||||
j++ ;
|
||||
}
|
||||
}
|
||||
|
||||
/* loop through all the mutual inductor models */
|
||||
for (model = (MUTmodel *)inModel ; model != NULL ; model = model->MUTnextModel)
|
||||
{
|
||||
status = cuMUTsetup ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
#endif
|
||||
|
||||
return(OK);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -12,6 +12,9 @@ Author: 2003 Paolo Nenzi
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
|
|
@ -23,9 +26,17 @@ MUTtemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
|
||||
NG_IGNORE(ckt);
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, status ;
|
||||
#endif
|
||||
|
||||
/* loop through all the mutual inductor models */
|
||||
for( ; model != NULL; model = model->MUTnextModel ) {
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
i = 0 ;
|
||||
#endif
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->MUTinstances; here != NULL ;
|
||||
here=here->MUTnextInstance) {
|
||||
|
|
@ -40,7 +51,24 @@ MUTtemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
*/
|
||||
here->MUTfactor = here->MUTcoupling * sqrt(ind1 * ind2);
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
model->MUTparamCPU.MUTfactorArray[i] = here->MUTfactor ;
|
||||
model->MUTparamCPU.MUTflux1Array[i] = here->MUTind1->INDflux ;
|
||||
model->MUTparamCPU.MUTflux2Array[i] = here->MUTind2->INDflux ;
|
||||
model->MUTparamCPU.MUTbrEq1Array[i] = here->MUTind1->INDbrEq ;
|
||||
model->MUTparamCPU.MUTbrEq2Array[i] = here->MUTind2->INDbrEq ;
|
||||
|
||||
i++ ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuMUTtemp ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -23,4 +23,20 @@ libisrc_la_SOURCES = \
|
|||
|
||||
AM_CPPFLAGS = @AM_CPPFLAGS@ -I$(top_srcdir)/src/include
|
||||
AM_CFLAGS = $(STATIC)
|
||||
|
||||
if USE_CUSPICE_WANTED
|
||||
.cu.lo:
|
||||
$(AM_V_GEN)$(top_srcdir)/src/libtool_wrapper_for_cuda.tcl $@ $(AM_CFLAGS) $(NVCC) $(CUDA_CFLAGS) $(AM_CPPFLAGS) -c $<
|
||||
|
||||
libisrc_la_SOURCES += \
|
||||
isrcsetup.c \
|
||||
CUSPICE/isrctopology.c \
|
||||
CUSPICE/cuisrcfree.c \
|
||||
CUSPICE/cuisrcload.cu \
|
||||
CUSPICE/cuisrcsetup.c \
|
||||
CUSPICE/cuisrctemp.c
|
||||
|
||||
AM_CPPFLAGS += $(CUDA_CPPFLAGS)
|
||||
endif
|
||||
|
||||
MAINTAINERCLEANFILES = Makefile.in
|
||||
|
|
|
|||
|
|
@ -66,8 +66,46 @@ typedef struct sISRCinstance {
|
|||
unsigned ISRCdGiven :1 ; /* flag to indicate source is a distortion input */
|
||||
unsigned ISRCdF1given :1 ; /* flag to indicate source is an f1 distortion input */
|
||||
unsigned ISRCdF2given :1 ; /* flag to indicate source is an f2 distortion input */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
double *d_ISRCcoeffs ;
|
||||
|
||||
int n_coeffs ;
|
||||
#endif
|
||||
|
||||
} ISRCinstance ;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
typedef struct sISRCparamCPUstruct {
|
||||
/* pointer to array of coefficients in GPU */
|
||||
double **ISRCcoeffsArrayHost ;
|
||||
double **ISRCcoeffsArray ;
|
||||
|
||||
double *ISRCcpuPointersD [2] ;
|
||||
#define ISRCdcvalueArray ISRCcpuPointersD[0]
|
||||
#define ISRCValueArray ISRCcpuPointersD[1]
|
||||
|
||||
int *ISRCcpuPointersI [3] ;
|
||||
#define ISRCdcGivenArray ISRCcpuPointersI[0]
|
||||
#define ISRCfunctionTypeArray ISRCcpuPointersI[1]
|
||||
#define ISRCfunctionOrderArray ISRCcpuPointersI[2]
|
||||
} ISRCparamCPUstruct ;
|
||||
|
||||
typedef struct sISRCparamGPUstruct {
|
||||
/* pointer to array of coefficients in GPU */
|
||||
double **d_ISRCcoeffsArray ;
|
||||
|
||||
double *ISRCcudaPointersD [2] ;
|
||||
#define d_ISRCdcvalueArray ISRCcudaPointersD[0]
|
||||
#define d_ISRCValueArray ISRCcudaPointersD[1]
|
||||
|
||||
int *ISRCcudaPointersI [3] ;
|
||||
#define d_ISRCdcGivenArray ISRCcudaPointersI[0]
|
||||
#define d_ISRCfunctionTypeArray ISRCcudaPointersI[1]
|
||||
#define d_ISRCfunctionOrderArray ISRCcudaPointersI[2]
|
||||
|
||||
} ISRCparamGPUstruct ;
|
||||
#endif
|
||||
|
||||
/* per model data */
|
||||
|
||||
|
|
@ -81,6 +119,19 @@ typedef struct sISRCmodel {
|
|||
|
||||
/* --- end of generic struct GENmodel --- */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
ISRCparamCPUstruct ISRCparamCPU ;
|
||||
ISRCparamGPUstruct ISRCparamGPU ;
|
||||
|
||||
int offsetRHS ;
|
||||
int n_valuesRHS ;
|
||||
int n_PtrRHS ;
|
||||
int *PositionVectorRHS ;
|
||||
int *d_PositionVectorRHS ;
|
||||
|
||||
int n_instances ;
|
||||
#endif
|
||||
|
||||
} ISRCmodel;
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -13,3 +13,8 @@ extern int ISRCmDelete(GENmodel**,IFuid,GENmodel*);
|
|||
extern int ISRCparam(int,IFvalue*,GENinstance*,IFvalue*);
|
||||
extern int ISRCpzLoad(GENmodel*,CKTcircuit*,SPcomplex*);
|
||||
extern int ISRCtemp(GENmodel*,CKTcircuit*);
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
extern int ISRCsetup (SMPmatrix *, GENmodel *, CKTcircuit *, int *) ;
|
||||
extern int ISRCtopology (GENmodel *, CKTcircuit *, int *, int *) ;
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -6,6 +6,9 @@
|
|||
#include "isrcext.h"
|
||||
#include "isrcinit.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
SPICEdev ISRCinfo = {
|
||||
{
|
||||
|
|
@ -42,8 +45,16 @@ SPICEdev ISRCinfo = {
|
|||
|
||||
/* DEVparam */ ISRCparam,
|
||||
/* DEVmodParam */ NULL,
|
||||
#ifdef USE_CUSPICE
|
||||
/* DEVload */ cuISRCload,
|
||||
#else
|
||||
/* DEVload */ ISRCload,
|
||||
#endif
|
||||
#ifdef USE_CUSPICE
|
||||
/* DEVsetup */ ISRCsetup,
|
||||
#else
|
||||
/* DEVsetup */ NULL,
|
||||
#endif
|
||||
/* DEVunsetup */ NULL,
|
||||
/* DEVpzSetup */ NULL,
|
||||
/* DEVtemperature*/ ISRCtemp,
|
||||
|
|
@ -81,6 +92,11 @@ SPICEdev ISRCinfo = {
|
|||
/* DEVbindCSCComplexToReal */ NULL,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ cuISRCdestroy,
|
||||
/* DEVtopology */ ISRCtopology,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -26,6 +26,11 @@ static void copy_coeffs(ISRCinstance *here, IFvalue *value)
|
|||
here->ISRCcoeffsGiven = TRUE;
|
||||
|
||||
memcpy(here->ISRCcoeffs, value->v.vec.rVec, (size_t) n * sizeof(double));
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
here->n_coeffs = n ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -10,6 +10,10 @@ Author: 1985 Thomas L. Quarles
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
/*ARGSUSED*/
|
||||
int
|
||||
ISRCtemp(GENmodel *inModel, CKTcircuit *ckt)
|
||||
|
|
@ -22,9 +26,17 @@ ISRCtemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
|
||||
NG_IGNORE(ckt);
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, j, status ;
|
||||
#endif
|
||||
|
||||
/* loop through all the voltage source models */
|
||||
for( ; model != NULL; model = model->ISRCnextModel ) {
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
i = 0 ;
|
||||
#endif
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->ISRCinstances; here != NULL ;
|
||||
here=here->ISRCnextInstance) {
|
||||
|
|
@ -52,7 +64,29 @@ ISRCtemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
radians = here->ISRCacPhase * M_PI / 180.0;
|
||||
here->ISRCacReal = here->ISRCacMag * cos(radians);
|
||||
here->ISRCacImag = here->ISRCacMag * sin(radians);
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
for (j = 0 ; j < here->n_coeffs ; j++)
|
||||
{
|
||||
model->ISRCparamCPU.ISRCcoeffsArrayHost [i] [j] = here->ISRCcoeffs [j] ;
|
||||
}
|
||||
|
||||
model->ISRCparamCPU.ISRCdcvalueArray[i] = here->ISRCdcValue ;
|
||||
model->ISRCparamCPU.ISRCdcGivenArray[i] = here->ISRCdcGiven ;
|
||||
model->ISRCparamCPU.ISRCfunctionTypeArray[i] = here->ISRCfunctionType ;
|
||||
model->ISRCparamCPU.ISRCfunctionOrderArray[i] = here->ISRCfunctionOrder ;
|
||||
|
||||
i++ ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuISRCtemp ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
return(OK);
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev JFETinfo = {
|
|||
/* DEVbindCSCComplexToReal */ JFETbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev JFET2info = {
|
|||
/* DEVbindCSCComplexToReal */ JFET2bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev LTRAinfo = {
|
|||
/* DEVbindCSCComplexToReal */ LTRAbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev MESinfo = {
|
|||
/* DEVbindCSCComplexToReal */ MESbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev MESAinfo = {
|
|||
/* DEVbindCSCComplexToReal */ MESAbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev MOS1info = {
|
|||
/* DEVbindCSCComplexToReal */ MOS1bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev MOS2info = {
|
|||
/* DEVbindCSCComplexToReal */ MOS2bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev MOS3info = {
|
|||
/* DEVbindCSCComplexToReal */ MOS3bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev MOS6info = {
|
|||
/* DEVbindCSCComplexToReal */ MOS6bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev MOS9info = {
|
|||
/* DEVbindCSCComplexToReal */ MOS9bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -82,6 +82,11 @@ SPICEdev NBJTinfo = {
|
|||
/* DEVbindCSCComplexToReal */ NBJTbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -82,6 +82,11 @@ SPICEdev NBJT2info = {
|
|||
/* DEVbindCSCComplexToReal */ NBJT2bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -82,6 +82,11 @@ SPICEdev NDEVinfo = {
|
|||
/* DEVbindCSCComplexToReal */ NULL,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -82,6 +82,11 @@ SPICEdev NUMDinfo = {
|
|||
/* DEVbindCSCComplexToReal */ NUMDbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -82,6 +82,11 @@ SPICEdev NUMD2info = {
|
|||
/* DEVbindCSCComplexToReal */ NUMD2bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -82,6 +82,11 @@ SPICEdev NUMOSinfo = {
|
|||
/* DEVbindCSCComplexToReal */ NUMOSbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -35,4 +35,18 @@ endif
|
|||
AM_CPPFLAGS = @AM_CPPFLAGS@ -I$(top_srcdir)/src/include
|
||||
AM_CFLAGS = $(STATIC)
|
||||
|
||||
if USE_CUSPICE_WANTED
|
||||
.cu.lo:
|
||||
$(AM_V_GEN)$(top_srcdir)/src/libtool_wrapper_for_cuda.tcl $@ $(AM_CFLAGS) $(NVCC) $(CUDA_CFLAGS) $(AM_CPPFLAGS) -c $<
|
||||
|
||||
libres_la_SOURCES += \
|
||||
CUSPICE/restopology.c \
|
||||
CUSPICE/curesfree.c \
|
||||
CUSPICE/curesload.cu \
|
||||
CUSPICE/curessetup.c \
|
||||
CUSPICE/curestemp.c
|
||||
|
||||
AM_CPPFLAGS += $(CUDA_CPPFLAGS)
|
||||
endif
|
||||
|
||||
MAINTAINERCLEANFILES = Makefile.in
|
||||
|
|
|
|||
|
|
@ -92,6 +92,45 @@ typedef struct sRESinstance {
|
|||
|
||||
} RESinstance ;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
typedef struct sRESparamCPUstruct {
|
||||
double *REScpuPointersD [8] ;
|
||||
#define REStc1Array REScpuPointersD[0]
|
||||
#define REStc2Array REScpuPointersD[1]
|
||||
#define RESmArray REScpuPointersD[2]
|
||||
#define RESconductArray REScpuPointersD[3]
|
||||
#define REStempArray REScpuPointersD[4]
|
||||
#define RESdtempArray REScpuPointersD[5]
|
||||
#define REScurrentArray REScpuPointersD[6]
|
||||
#define RESgValueArray REScpuPointersD[7]
|
||||
|
||||
int *REScpuPointersI [5] ;
|
||||
#define REStc1GivenArray REScpuPointersI[0]
|
||||
#define REStc2GivenArray REScpuPointersI[1]
|
||||
#define RESmGivenArray REScpuPointersI[2]
|
||||
#define RESposNodeArray REScpuPointersI[3]
|
||||
#define RESnegNodeArray REScpuPointersI[4]
|
||||
} RESparamCPUstruct ;
|
||||
|
||||
typedef struct sRESparamGPUstruct {
|
||||
double *REScudaPointersD [8] ;
|
||||
#define d_REStc1Array REScudaPointersD[0]
|
||||
#define d_REStc2Array REScudaPointersD[1]
|
||||
#define d_RESmArray REScudaPointersD[2]
|
||||
#define d_RESconductArray REScudaPointersD[3]
|
||||
#define d_REStempArray REScudaPointersD[4]
|
||||
#define d_RESdtempArray REScudaPointersD[5]
|
||||
#define d_REScurrentArray REScudaPointersD[6]
|
||||
#define d_RESgValueArray REScudaPointersD[7]
|
||||
|
||||
int *REScudaPointersI [5] ;
|
||||
#define d_REStc1GivenArray REScudaPointersI[0]
|
||||
#define d_REStc2GivenArray REScudaPointersI[1]
|
||||
#define d_RESmGivenArray REScudaPointersI[2]
|
||||
#define d_RESposNodeArray REScudaPointersI[3]
|
||||
#define d_RESnegNodeArray REScudaPointersI[4]
|
||||
} RESparamGPUstruct ;
|
||||
#endif
|
||||
|
||||
/* per model data */
|
||||
|
||||
|
|
@ -129,6 +168,20 @@ typedef struct sRESmodel { /* model structure for a resistor */
|
|||
unsigned RESfNexpGiven :1; /* flag to indicate af given */
|
||||
unsigned RESresGiven :1; /* flag to indicate model resistance given */
|
||||
unsigned RESbv_maxGiven :1; /* flags indicates maximum voltage is given */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
RESparamCPUstruct RESparamCPU ;
|
||||
RESparamGPUstruct RESparamGPU ;
|
||||
|
||||
int offset ;
|
||||
int n_values ;
|
||||
int n_Ptr ;
|
||||
int *PositionVector ;
|
||||
int *d_PositionVector ;
|
||||
|
||||
int n_instances ;
|
||||
#endif
|
||||
|
||||
} RESmodel;
|
||||
|
||||
/* device parameters */
|
||||
|
|
|
|||
|
|
@ -27,3 +27,7 @@ extern int RESbindCSC (GENmodel*, CKTcircuit*) ;
|
|||
extern int RESbindCSCComplex (GENmodel*, CKTcircuit*) ;
|
||||
extern int RESbindCSCComplexToReal (GENmodel*, CKTcircuit*) ;
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
extern int REStopology (GENmodel *, CKTcircuit *, int *, int *) ;
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -6,6 +6,9 @@
|
|||
#include "resext.h"
|
||||
#include "resinit.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
SPICEdev RESinfo = {
|
||||
{
|
||||
|
|
@ -42,7 +45,11 @@ SPICEdev RESinfo = {
|
|||
|
||||
/* DEVparam */ RESparam,
|
||||
/* DEVmodParam */ RESmParam,
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVload */ cuRESload,
|
||||
#else
|
||||
/* DEVload */ RESload,
|
||||
#endif
|
||||
/* DEVsetup */ RESsetup,
|
||||
/* DEVunsetup */ NULL,
|
||||
/* DEVpzSetup */ RESsetup,
|
||||
|
|
@ -81,6 +88,11 @@ SPICEdev RESinfo = {
|
|||
/* DEVbindCSCComplexToReal */ RESbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ cuRESdestroy,
|
||||
/* DEVtopology */ REStopology,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -9,6 +9,9 @@ Modified: Apr 2000 Paolo Nenzi
|
|||
#include "resdefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
int
|
||||
RESsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit*ckt, int *state)
|
||||
|
|
@ -49,5 +52,69 @@ do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\
|
|||
TSTALLOC(RESnegPosptr, RESnegNode, RESposNode);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, j, status ;
|
||||
|
||||
/* Counting the instances */
|
||||
for (model = (RESmodel *)inModel ; model != NULL ; model = model->RESnextModel)
|
||||
{
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->RESinstances ; here != NULL ; here = here->RESnextInstance)
|
||||
{
|
||||
i++ ;
|
||||
}
|
||||
|
||||
/* How much instances we have */
|
||||
model->n_instances = i ;
|
||||
}
|
||||
|
||||
/* loop through all the resistor models */
|
||||
for (model = (RESmodel *)inModel ; model != NULL ; model = model->RESnextModel)
|
||||
{
|
||||
model->offset = ckt->total_n_values ;
|
||||
|
||||
j = 0 ;
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->RESinstances ; here != NULL ; here = here->RESnextInstance)
|
||||
{
|
||||
if ((here->RESposNode != 0) && (here->RESposNode != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->RESnegNode != 0) && (here->RESnegNode != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->RESposNode != 0) && (here->RESnegNode != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->RESnegNode != 0) && (here->RESposNode != 0))
|
||||
j++ ;
|
||||
}
|
||||
|
||||
model->n_values = model->n_instances ;
|
||||
ckt->total_n_values += model->n_values ;
|
||||
|
||||
model->n_Ptr = j ;
|
||||
ckt->total_n_Ptr += model->n_Ptr ;
|
||||
|
||||
|
||||
/* Position Vector assignment */
|
||||
model->PositionVector = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instances ; j++)
|
||||
model->PositionVector [j] = model->offset + j ;
|
||||
}
|
||||
|
||||
/* loop through all the resistor models */
|
||||
for (model = (RESmodel *)inModel ; model != NULL ; model = model->RESnextModel)
|
||||
{
|
||||
status = cuRESsetup ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
#endif
|
||||
|
||||
return(OK);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -10,6 +10,10 @@ Modified: 2000 AlanSfixes
|
|||
#include "resdefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
int
|
||||
REStemp(GENmodel *inModel, CKTcircuit *ckt)
|
||||
/* perform the temperature update to the resistors
|
||||
|
|
@ -25,6 +29,9 @@ REStemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
double difference;
|
||||
double tc1, tc2;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, status ;
|
||||
#endif
|
||||
|
||||
/* loop through all the resistor models */
|
||||
for( ; model != NULL; model = model->RESnextModel ) {
|
||||
|
|
@ -41,6 +48,10 @@ REStemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
if(!model->RESfNcoefGiven) model->RESfNcoef = 0.0;
|
||||
if(!model->RESfNexpGiven) model->RESfNexp = 1.0;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
i = 0 ;
|
||||
#endif
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->RESinstances; here != NULL ;
|
||||
here=here->RESnextInstance) {
|
||||
|
|
@ -102,7 +113,31 @@ REStemp(GENmodel *inModel, CKTcircuit *ckt)
|
|||
here -> RESacConduct = here -> RESconduct;
|
||||
here -> RESacResist = here -> RESresist;
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
model->RESparamCPU.REStc1GivenArray[i] = here->REStc1Given ;
|
||||
model->RESparamCPU.REStc2GivenArray[i] = here->REStc2Given ;
|
||||
model->RESparamCPU.RESmGivenArray[i] = here->RESmGiven ;
|
||||
model->RESparamCPU.REStc1Array[i] = here->REStc1 ;
|
||||
model->RESparamCPU.REStc2Array[i] = here->REStc2 ;
|
||||
model->RESparamCPU.RESmArray[i] = here->RESm ;
|
||||
model->RESparamCPU.RESposNodeArray[i] = here->RESposNode ;
|
||||
model->RESparamCPU.RESnegNodeArray[i] = here->RESnegNode ;
|
||||
model->RESparamCPU.RESconductArray[i] = here->RESconduct ;
|
||||
model->RESparamCPU.REStempArray[i] = here->REStemp ;
|
||||
model->RESparamCPU.RESdtempArray[i] = here->RESdtemp ;
|
||||
|
||||
i++ ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
status = cuREStemp ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
#endif
|
||||
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev SOI3info = {
|
|||
/* DEVbindCSCComplexToReal */ SOI3bindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -82,6 +82,11 @@ SPICEdev SWinfo = {
|
|||
/* DEVbindCSCComplexToReal */ SWbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev TRAinfo = {
|
|||
/* DEVbindCSCComplexToReal */ TRAbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -86,6 +86,11 @@ SPICEdev TXLinfo = {
|
|||
/* DEVbindCSCComplexToReal */ TXLbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
SPICEdev *
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev URCinfo = {
|
|||
/* DEVbindCSCComplexToReal */ NULL,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -86,6 +86,11 @@ SPICEdev VBICinfo = {
|
|||
VBICbindCSCComplexToReal, /* DEVbindCSCComplexToReal */
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
NULL, /* cuDEVdestroy */
|
||||
NULL, /* DEVtopology */
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev VCCSinfo = {
|
|||
/* DEVbindCSCComplexToReal */ VCCSbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,6 +81,11 @@ SPICEdev VCVSinfo = {
|
|||
/* DEVbindCSCComplexToReal */ VCVSbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ NULL,
|
||||
/* DEVtopology */ NULL,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -31,4 +31,18 @@ endif
|
|||
AM_CPPFLAGS = @AM_CPPFLAGS@ -I$(top_srcdir)/src/include
|
||||
AM_CFLAGS = $(STATIC)
|
||||
|
||||
if USE_CUSPICE_WANTED
|
||||
.cu.lo:
|
||||
$(AM_V_GEN)$(top_srcdir)/src/libtool_wrapper_for_cuda.tcl $@ $(AM_CFLAGS) $(NVCC) $(CUDA_CFLAGS) $(AM_CPPFLAGS) -c $<
|
||||
|
||||
libvsrc_la_SOURCES += \
|
||||
CUSPICE/vsrctopology.c \
|
||||
CUSPICE/cuvsrcfree.c \
|
||||
CUSPICE/cuvsrcload.cu \
|
||||
CUSPICE/cuvsrcsetup.c \
|
||||
CUSPICE/cuvsrctemp.c
|
||||
|
||||
AM_CPPFLAGS += $(CUDA_CPPFLAGS)
|
||||
endif
|
||||
|
||||
MAINTAINERCLEANFILES = Makefile.in
|
||||
|
|
|
|||
|
|
@ -83,8 +83,50 @@ typedef struct sVSRCinstance {
|
|||
BindElement *VSRCibrPosptrStructPtr ;
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
double *d_VSRCcoeffs ;
|
||||
|
||||
int n_coeffs ;
|
||||
#endif
|
||||
|
||||
} VSRCinstance ;
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
typedef struct sVSRCparamCPUstruct {
|
||||
/* pointer to array of coefficients in GPU */
|
||||
double **VSRCcoeffsArrayHost ;
|
||||
double **VSRCcoeffsArray ;
|
||||
|
||||
double *VSRCcpuPointersD [3] ;
|
||||
#define VSRCdcvalueArray VSRCcpuPointersD[0]
|
||||
#define VSRCrdelayArray VSRCcpuPointersD[1]
|
||||
#define VSRCValueArray VSRCcpuPointersD[2]
|
||||
|
||||
int *VSRCcpuPointersI [5] ;
|
||||
#define VSRCdcGivenArray VSRCcpuPointersI[0]
|
||||
#define VSRCfunctionTypeArray VSRCcpuPointersI[1]
|
||||
#define VSRCfunctionOrderArray VSRCcpuPointersI[2]
|
||||
#define VSRCrGivenArray VSRCcpuPointersI[3]
|
||||
#define VSRCrBreakptArray VSRCcpuPointersI[4]
|
||||
} VSRCparamCPUstruct ;
|
||||
|
||||
typedef struct sVSRCparamGPUstruct {
|
||||
/* pointer to array of coefficients in GPU */
|
||||
double **d_VSRCcoeffsArray ;
|
||||
|
||||
double *VSRCcudaPointersD [3] ;
|
||||
#define d_VSRCdcvalueArray VSRCcudaPointersD[0]
|
||||
#define d_VSRCrdelayArray VSRCcudaPointersD[1]
|
||||
#define d_VSRCValueArray VSRCcudaPointersD[2]
|
||||
|
||||
int *VSRCcudaPointersI [5] ;
|
||||
#define d_VSRCdcGivenArray VSRCcudaPointersI[0]
|
||||
#define d_VSRCfunctionTypeArray VSRCcudaPointersI[1]
|
||||
#define d_VSRCfunctionOrderArray VSRCcudaPointersI[2]
|
||||
#define d_VSRCrGivenArray VSRCcudaPointersI[3]
|
||||
#define d_VSRCrBreakptArray VSRCcudaPointersI[4]
|
||||
} VSRCparamGPUstruct ;
|
||||
#endif
|
||||
|
||||
/* per model data */
|
||||
|
||||
|
|
@ -98,6 +140,25 @@ typedef struct sVSRCmodel {
|
|||
|
||||
/* --- end of generic struct GENmodel --- */
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
VSRCparamCPUstruct VSRCparamCPU ;
|
||||
VSRCparamGPUstruct VSRCparamGPU ;
|
||||
|
||||
int offset ;
|
||||
int n_values ;
|
||||
int n_Ptr ;
|
||||
int *PositionVector ;
|
||||
int *d_PositionVector ;
|
||||
|
||||
int offsetRHS ;
|
||||
int n_valuesRHS ;
|
||||
int n_PtrRHS ;
|
||||
int *PositionVectorRHS ;
|
||||
int *d_PositionVectorRHS ;
|
||||
|
||||
int n_instances ;
|
||||
#endif
|
||||
|
||||
} VSRCmodel;
|
||||
|
||||
/* source function types (shared with current sources) */
|
||||
|
|
|
|||
|
|
@ -24,3 +24,7 @@ extern int VSRCbindCSC (GENmodel*, CKTcircuit*) ;
|
|||
extern int VSRCbindCSCComplex (GENmodel*, CKTcircuit*) ;
|
||||
extern int VSRCbindCSCComplexToReal (GENmodel*, CKTcircuit*) ;
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
extern int VSRCtopology (GENmodel *, CKTcircuit *, int *, int *) ;
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -6,6 +6,9 @@
|
|||
#include "vsrcext.h"
|
||||
#include "vsrcinit.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
SPICEdev VSRCinfo = {
|
||||
{
|
||||
|
|
@ -42,7 +45,11 @@ SPICEdev VSRCinfo = {
|
|||
|
||||
/* DEVparam */ VSRCparam,
|
||||
/* DEVmodParam */ NULL,
|
||||
#ifdef USE_CUSPICE
|
||||
/* DEVload */ cuVSRCload,
|
||||
#else
|
||||
/* DEVload */ VSRCload,
|
||||
#endif
|
||||
/* DEVsetup */ VSRCsetup,
|
||||
/* DEVunsetup */ VSRCunsetup,
|
||||
/* DEVpzSetup */ VSRCpzSetup,
|
||||
|
|
@ -81,6 +88,11 @@ SPICEdev VSRCinfo = {
|
|||
/* DEVbindCSCComplexToReal */ VSRCbindCSCComplexToReal,
|
||||
#endif
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
/* cuDEVdestroy */ cuVSRCdestroy,
|
||||
/* DEVtopology */ VSRCtopology,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -26,6 +26,11 @@ static void copy_coeffs(VSRCinstance *here, IFvalue *value)
|
|||
here->VSRCcoeffsGiven = TRUE;
|
||||
|
||||
memcpy(here->VSRCcoeffs, value->v.vec.rVec, (size_t) n * sizeof(double));
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
here->n_coeffs = n ;
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -10,6 +10,10 @@ Author: 1985 Thomas L. Quarles
|
|||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
#include "ngspice/CUSPICE/CUSPICE.h"
|
||||
#endif
|
||||
|
||||
/* ARGSUSED */
|
||||
int
|
||||
VSRCsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt, int *state)
|
||||
|
|
@ -55,6 +59,89 @@ do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\
|
|||
TSTALLOC(VSRCibrPosptr, VSRCbranch, VSRCposNode);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef USE_CUSPICE
|
||||
int i, j, k, status ;
|
||||
|
||||
/* Counting the instances */
|
||||
for (model = (VSRCmodel *)inModel ; model != NULL ; model = model->VSRCnextModel)
|
||||
{
|
||||
i = 0 ;
|
||||
|
||||
for (here = model->VSRCinstances ; here != NULL ; here = here->VSRCnextInstance)
|
||||
{
|
||||
i++ ;
|
||||
}
|
||||
|
||||
/* How much instances we have */
|
||||
model->n_instances = i ;
|
||||
}
|
||||
|
||||
/* loop through all the voltage source models */
|
||||
for (model = (VSRCmodel *)inModel ; model != NULL ; model = model->VSRCnextModel)
|
||||
{
|
||||
model->offset = ckt->total_n_values ;
|
||||
model->offsetRHS = ckt->total_n_valuesRHS ;
|
||||
|
||||
j = 0 ;
|
||||
k = 0 ;
|
||||
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->VSRCinstances ; here != NULL ; here = here->VSRCnextInstance)
|
||||
{
|
||||
/* For the Matrix */
|
||||
if ((here->VSRCposNode != 0) && (here->VSRCbranch != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->VSRCnegNode != 0) && (here->VSRCbranch != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->VSRCbranch != 0) && (here->VSRCposNode != 0))
|
||||
j++ ;
|
||||
|
||||
if ((here->VSRCbranch != 0) && (here->VSRCnegNode != 0))
|
||||
j++ ;
|
||||
|
||||
/* For the RHS */
|
||||
if (here->VSRCbranch != 0)
|
||||
k++ ;
|
||||
}
|
||||
|
||||
model->n_values = model->n_instances ;
|
||||
ckt->total_n_values += model->n_values ;
|
||||
|
||||
model->n_Ptr = j ;
|
||||
ckt->total_n_Ptr += model->n_Ptr ;
|
||||
|
||||
model->n_valuesRHS = model->n_instances ;
|
||||
ckt->total_n_valuesRHS += model->n_valuesRHS ;
|
||||
|
||||
model->n_PtrRHS = k ;
|
||||
ckt->total_n_PtrRHS += model->n_PtrRHS ;
|
||||
|
||||
|
||||
/* Position Vector assignment */
|
||||
model->PositionVector = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instances ; j++)
|
||||
model->PositionVector [j] = model->offset + j ;
|
||||
|
||||
/* Position Vector assignment for the RHS */
|
||||
model->PositionVectorRHS = TMALLOC (int, model->n_instances) ;
|
||||
|
||||
for (j = 0 ; j < model->n_instances ; j++)
|
||||
model->PositionVectorRHS [j] = model->offsetRHS + j ;
|
||||
}
|
||||
|
||||
/* loop through all the voltage source models */
|
||||
for (model = (VSRCmodel *)inModel ; model != NULL ; model = model->VSRCnextModel)
|
||||
{
|
||||
status = cuVSRCsetup ((GENmodel *)model) ;
|
||||
if (status != 0)
|
||||
return (E_NOMEM) ;
|
||||
}
|
||||
#endif
|
||||
|
||||
return(OK);
|
||||
}
|
||||
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue