example netlist: 3 inverters in series
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test of integrated degradation monitor
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*Inverter sequence
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.lib "$PDK_ROOT/$PDK/libs.tech/ngspice/models/cornerMOSlv.lib" mos_tt
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.include "aging_par_ng.scs"
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* the voltage sources:
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Vdd vdd gnd DC 1.8
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V1 in gnd pulse(0 1.8 0p 100p 100p 0.5n 2n)
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Xnot1 in vdd gnd out1 not1
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Xnot2 out1 vdd gnd out2 not1
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Xnot3 out2 vdd gnd out not1
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.subckt not1 a vdd vss z
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xm01 z a vdd vdd sg13_lv_pmos l=0.15u w=0.99u as=0.26235p ad=0.26235p ps=2.51u pd=2.51u
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xm02 z a vss vss sg13_lv_nmos l=0.15u w=0.495u as=0.131175p ad=0.131175p ps=1.52u pd=1.52u
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*adegmon1 %v([z a vss vss]) mon degmon1
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*.model degmon1 degmon (tfuture=315336e4 l=0.15e-6 devmod="sg13_lv_nmos")
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c3 a vss 0.384f
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c2 z vss 0.576f
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.ends
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* simulation command:
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.tran 1ps 20ns 0 10p
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.control
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pre_osdi ../lib/ngspice/psp103_nqs.osdi
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run
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rusage
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*set nolegend
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set xbrushwidth=3
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plot xnot1.mon1 xnot2.mon1 xnot3.mon1
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plot in out+2
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.endc
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.end
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