use common simdop.h for b3v32simd
This commit is contained in:
Florian Ballenegger
parent
3ab1a1f452
commit
b7e5d82ef0
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@ -41,10 +41,8 @@
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#include "ngspice/suffix.h"
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#include "ngspice/SIMD/simdvector.h"
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#if USEX86INTRINSICS==1
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#include <x86intrin.h>
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#endif
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#include "ngspice/SIMD/simdop.h"
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#include "ngspice/SIMD/simdniinteg.h"
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#define MAX_EXP 5.834617425e14
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#define MIN_EXP 1.713908431e-15
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@ -61,16 +59,121 @@
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#define SIMDIFYCMD(cmd) /* empty */
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#define SIMDifySaveScope(sc) /* empty */
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static inline VecNd vecN_SIMDLOADDATA(int idx, double data[7][NSIMD])
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{
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VecNd r;
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for(int i=0;i<NSIMD;i++)
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r[i] = data[idx][i];
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return r;
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}
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static inline int vecN_BSIM3v32_ACM_saturationCurrents
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(
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BSIM3v32model *model,
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BSIM3v32instance **heres,
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VecNd *DrainSatCurrent,
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VecNd *SourceSatCurrent
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)
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{
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int error;
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double dsat,ssat;
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for(int idx=0;idx<NSIMD;idx++)
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{
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error = BSIM3v32_ACM_saturationCurrents(
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model, heres[idx],
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&dsat,
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&ssat
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);
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(*DrainSatCurrent)[idx] = dsat;
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(*SourceSatCurrent)[idx] = ssat;
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if(error) return error;
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}
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return error;
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}
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static inline int vecN_BSIM3v32_ACM_junctionCapacitances(
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BSIM3v32model *model,
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BSIM3v32instance **heres,
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VecNd *areaDrainBulkCapacitance,
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VecNd *periDrainBulkCapacitance,
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VecNd *gateDrainBulkCapacitance,
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VecNd *areaSourceBulkCapacitance,
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VecNd *periSourceBulkCapacitance,
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VecNd *gateSourceBulkCapacitance
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)
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{
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int error;
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double areaDB,periDB,gateDB,areaSB,periSB,gateSB;
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for(int idx=0;idx<NSIMD;idx++)
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{
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error = BSIM3v32_ACM_junctionCapacitances(
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model, heres[idx],
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&areaDB,
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&periDB,
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&gateDB,
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&areaSB,
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&periSB,
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&gateSB
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);
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(*areaDrainBulkCapacitance)[idx]=areaDB;
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(*periDrainBulkCapacitance)[idx]=periDB;
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(*gateDrainBulkCapacitance)[idx]=gateDB;
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(*areaSourceBulkCapacitance)[idx]=areaSB;
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(*periSourceBulkCapacitance)[idx]=periSB;
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(*gateSourceBulkCapacitance)[idx]=gateSB;
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if(error) return error;
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}
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return error;
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}
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#define vecNu_pow(x,p) vecN_exp(vecN_log(x)*p)
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#if NSIMD==4
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#include "b3v32ldsimd4d.c"
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#define vec4_SIMDLOADDATA vecN_SIMDLOADDATA
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#define vec4_BSIM3v32_ACM_saturationCurrents vecN_BSIM3v32_ACM_saturationCurrents
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#define vec4_BSIM3v32_ACM_junctionCapacitances vecN_BSIM3v32_ACM_junctionCapacitances
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#define vec4_NIintegrate vecN_NIintegrate
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#define vec4_pow0p7(x,p) vecNu_pow(x,p)
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#define vec4_powMJ(x,p) vecNu_pow(x,p)
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#define vec4_powMJSW(x,p) vecNu_pow(x,p)
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#define vec4_powMJSWG(x,p) vecNu_pow(x,p)
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#define vec4_BSIM3v32_StateAccess vecN_StateAccess
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#define vec4_BSIM3v32_StateStore vecN_StateStore
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#define vec4_BSIM3v32_StateAdd vecN_StateAdd
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#define vec4_BSIM3v32_StateSub vecN_StateSub
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#endif
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#if NSIMD==8
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#include "b3v32ldsimd8d.c"
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#define vec8_SIMDLOADDATA vecN_SIMDLOADDATA
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#define vec8_BSIM3v32_ACM_saturationCurrents vecN_BSIM3v32_ACM_saturationCurrents
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#define vec8_BSIM3v32_ACM_junctionCapacitances vecN_BSIM3v32_ACM_junctionCapacitances
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#define vec8_NIintegrate vecNu_NIintegrate
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#define vec8_pow0p7(x,p) vecNu_pow(x,p)
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#define vec8_powMJ(x,p) vecNu_pow(x,p)
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#define vec8_powMJSW(x,p) vecNu_pow(x,p)
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#define vec8_powMJSWG(x,p) vecNu_pow(x,p)
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#define vec8_BSIM3v32_StateAccess vecN_StateAccess
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#define vec8_BSIM3v32_StateStore vecN_StateStore
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#define vec8_BSIM3v32_StateAdd vecN_StateAdd
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#define vec8_BSIM3v32_StateSub vecN_StateSub
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#endif
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#if NSIMD==2
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#include "b3v32ldsimd2d.c"
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#define vec2_SIMDLOADDATA vecN_SIMDLOADDATA
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#define vec2_BSIM3v32_ACM_saturationCurrents vecN_BSIM3v32_ACM_saturationCurrents
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#define vec2_BSIM3v32_ACM_junctionCapacitances vecN_BSIM3v32_ACM_junctionCapacitances
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#define vec2_NIintegrate vecN_NIintegrate
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#define vec2_pow0p7(x,p) vecNu_pow(x,p)
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#define vec2_powMJ(x,p) vecNu_pow(x,p)
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#define vec2_powMJSW(x,p) vecNu_pow(x,p)
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#define vec2_powMJSWG(x,p) vecNu_pow(x,p)
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#define vec2_BSIM3v32_StateAccess vecN_StateAccess
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#define vec2_BSIM3v32_StateStore vecN_StateStore
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#define vec2_BSIM3v32_StateAdd vecN_StateAdd
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#define vec2_BSIM3v32_StateSub vecN_StateSub
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#endif
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int BSIM3v32LoadSIMD(BSIM3v32instance **heres, CKTcircuit *ckt
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@ -1,249 +0,0 @@
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/*******************************************************************************
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* Copyright 2020 Florian Ballenegger, Anamosic Ballenegger Design
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*******************************************************************************
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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******************************************************************************/
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/* disable omp simd for GCC, as it slow down a bit */
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#if !defined(__GNUC__) || defined(__clang__) || defined(__INTEL_COMPILER)
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#define USE_OMPSIMD
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#endif
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static inline Vec2d vec2_blend(Vec2d fa, Vec2d tr, Vec2m mask)
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{
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Vec2d r;
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#ifdef USE_OMPSIMD
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#pragma omp simd simdlen(4)
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#endif
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for(int i=0;i<2;i++)
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r[i] = (mask[i]==0 ? fa[i] : tr[i]);
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return r;
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}
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static inline Vec2d vec2_exp(Vec2d x)
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{
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Vec2d r;
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#ifdef USE_OMPSIMD
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#pragma omp simd simdlen(4)
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#endif
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for(int i=0;i<2;i++)
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r[i] = exp(x[i]);
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return r;
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}
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static inline Vec2d vec2_log(Vec2d x)
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{
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Vec2d r;
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#ifdef USE_OMPSIMD
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#pragma omp simd simdlen(4)
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#endif
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for(int i=0;i<2;i++)
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r[i] = log(x[i]);
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return r;
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}
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static inline Vec2d vec2_max(Vec2d x, Vec2d y)
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{
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Vec2d r;
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#ifdef USE_OMPSIMD
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#pragma omp simd simdlen(4)
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#endif
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for(int i=0;i<2;i++)
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r[i] = MAX(x[i],y[i]);
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return r;
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}
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static inline Vec2d vec2_sqrt(Vec2d x)
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{
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Vec2d r;
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#ifdef USE_OMPSIMD
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#pragma omp simd simdlen(4)
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#endif
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for(int i=0;i<2;i++)
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r[i] = sqrt(x[i]);
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return r;
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}
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static inline Vec2d vec2_fabs(Vec2d x)
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{
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Vec2d r;
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#ifdef USE_OMPSIMD
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#pragma omp simd simdlen(4)
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#endif
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for(int i=0;i<2;i++)
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r[i] = fabs(x[i]);
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return r;
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}
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#define vec2_pow0p7(x,p) vec2_pow(x,p)
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#define vec2_powMJ(x,p) vec2_pow(x,p)
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#define vec2_powMJSW(x,p) vec2_pow(x,p)
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#define vec2_powMJSWG(x,p) vec2_pow(x,p)
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static inline Vec2d vec2_pow(Vec2d x, double p)
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{
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return vec2_exp(vec2_log(x)*p);
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}
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/* useful vectorized functions */
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static inline Vec2d vec2_SIMDTOVECTOR(double val)
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{
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return (Vec2d) {val,val};
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}
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static inline Vec2m vec2_SIMDTOVECTORMASK(int32_t val)
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{
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return (Vec2m) {val,val};
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}
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static inline Vec2d vec2_SIMDLOADDATA(int idx, double data[7][2])
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{
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return (Vec2d) {data[idx][0],data[idx][1]};
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}
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static inline Vec2d vec2_BSIM3v32_StateAccess(double* cktstate, Vec2m stateindexes)
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{
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Vec2d r;
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#ifdef USE_OMPSIMD
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#pragma omp simd simdlen(4)
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#endif
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for(int i=0;i<2;i++)
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r[i] = cktstate[stateindexes[i]];
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return r;
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}
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static inline void vec2_BSIM3v32_StateStore(double* cktstate, Vec2m stateindexes, Vec2d values)
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{
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#ifdef USE_OMPSIMD
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#pragma omp simd simdlen(4)
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#endif
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for(int idx=0;idx<2;idx++)
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{
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cktstate[stateindexes[idx]] = values[idx];
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}
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}
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static inline void vec2_BSIM3v32_StateAdd(double* cktstate, Vec2m stateindexes, Vec2d values)
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{
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#ifdef USE_OMPSIMD
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#pragma omp simd simdlen(4)
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#endif
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for(int idx=0;idx<2;idx++)
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{
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cktstate[stateindexes[idx]] += values[idx];
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}
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}
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static inline void vec2_BSIM3v32_StateSub(double* cktstate, Vec2m stateindexes, Vec2d values)
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{
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#ifdef USE_OMPSIMD
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#pragma omp simd simdlen(4)
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#endif
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for(int idx=0;idx<2;idx++)
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{
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cktstate[stateindexes[idx]] -= values[idx];
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}
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}
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static inline int vec2_BSIM3v32_ACM_saturationCurrents
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(
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BSIM3v32model *model,
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BSIM3v32instance **heres,
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Vec2d *DrainSatCurrent,
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Vec2d *SourceSatCurrent
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)
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{
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int error;
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double dsat,ssat;
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for(int idx=0;idx<2;idx++)
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{
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error = BSIM3v32_ACM_saturationCurrents(
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model, heres[idx],
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&dsat,
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&ssat
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);
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(*DrainSatCurrent)[idx] = dsat;
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(*SourceSatCurrent)[idx] = ssat;
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if(error) return error;
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}
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return error;
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}
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static inline int vec2_BSIM3v32_ACM_junctionCapacitances(
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BSIM3v32model *model,
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BSIM3v32instance **heres,
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Vec2d *areaDrainBulkCapacitance,
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Vec2d *periDrainBulkCapacitance,
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Vec2d *gateDrainBulkCapacitance,
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Vec2d *areaSourceBulkCapacitance,
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Vec2d *periSourceBulkCapacitance,
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Vec2d *gateSourceBulkCapacitance
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)
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{
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int error;
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double areaDB,periDB,gateDB,areaSB,periSB,gateSB;
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for(int idx=0;idx<2;idx++)
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{
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error = BSIM3v32_ACM_junctionCapacitances(
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model, heres[idx],
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&areaDB,
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&periDB,
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&gateDB,
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&areaSB,
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&periSB,
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&gateSB
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);
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(*areaDrainBulkCapacitance)[idx]=areaDB;
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(*periDrainBulkCapacitance)[idx]=periDB;
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(*gateDrainBulkCapacitance)[idx]=gateDB;
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(*areaSourceBulkCapacitance)[idx]=areaSB;
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(*periSourceBulkCapacitance)[idx]=periSB;
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(*gateSourceBulkCapacitance)[idx]=gateSB;
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if(error) return error;
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}
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return error;
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}
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/* geq, ceq, and zero are not translated to vectors because there are unused */
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static inline int vec2_NIintegrate(CKTcircuit* ckt, double* geq, double *ceq, double zero, Vec2m chargestate)
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{
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int error;
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for(int idx=0;idx<2;idx++)
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{
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error = NIintegrate(ckt,geq,ceq,zero,chargestate[idx]);
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if(error) return error;
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}
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return error;
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}
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static inline int vec2_SIMDCOUNT(Vec2m mask) {
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return (mask[0] ? 1 : 0) + (mask[1] ? 1 : 0);
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}
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@ -1,370 +0,0 @@
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/*******************************************************************************
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* Copyright 2020 Florian Ballenegger, Anamosic Ballenegger Design
|
||||
*******************************************************************************
|
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
******************************************************************************/
|
||||
|
||||
/* disable omp simd for GCC, as it slow down a bit */
|
||||
#if !defined(__GNUC__) || defined(__clang__) || defined(__INTEL_COMPILER)
|
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#define USE_OMPSIMD
|
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#endif
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#define vec4_pow0p7(x,p) vec4_pow(x,p)
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#define vec4_powMJ(x,p) vec4_pow(x,p)
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#define vec4_powMJSW(x,p) vec4_pow(x,p)
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#define vec4_powMJSWG(x,p) vec4_pow(x,p)
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#ifdef USE_LIBSLEEF
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#include <sleef.h>
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#define vec4_exp(a) Sleef_expd4_u10(a)
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#define vec4_log(a) Sleef_logd4_u35(a)
|
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#define vec4_MAX(a,b) Sleef_fmaxd4(a,b)
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#define vec4_sqrt(a) Sleef_sqrtd4_u35(a)
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#define vec4_fabs(a) Sleef_fabsd4(a)
|
||||
#define vec4_pow(a,b) Sleef_powd4_u10(a,vec4_SIMDTOVECTOR(b))
|
||||
#endif
|
||||
|
||||
|
||||
/* HAS_LIBMVEC and/or USE_LIBSLEEF defined from configure.ac */
|
||||
|
||||
/* USE_SERIAL_FORM can be defined but has no performance influence */
|
||||
|
||||
/******* vec4_blend *******/
|
||||
#if USEX86INTRINSICS==1
|
||||
static inline Vec4d vec4_blend(Vec4d fa, Vec4d tr, Vec4m mask)
|
||||
{
|
||||
return _mm256_blendv_pd(fa,tr, (Vec4d) mask);
|
||||
}
|
||||
#else
|
||||
static inline Vec4d vec4_blend(Vec4d fa, Vec4d tr, Vec4m mask)
|
||||
{
|
||||
Vec4d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<4;i++)
|
||||
r[i] = (mask[i]==0 ? fa[i] : tr[i]);
|
||||
return r;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef USE_LIBSLEEF
|
||||
/******* vec4_exp, vec4_log *******/
|
||||
#ifdef HAS_LIBMVEC
|
||||
Vec4d _ZGVdN4v_exp(Vec4d x);
|
||||
Vec4d _ZGVdN4v_log(Vec4d x);
|
||||
/*Vec4d _ZGVdN4vv_pow(Vec4d x, Vec4d y);*/
|
||||
|
||||
#define vec4_exp(a) _ZGVdN4v_exp(a)
|
||||
#define vec4_log(a) _ZGVdN4v_log(a)
|
||||
#endif
|
||||
|
||||
#ifndef HAS_LIBMVEC
|
||||
static inline Vec4d vec4_exp(Vec4d x)
|
||||
{
|
||||
Vec4d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<4;i++)
|
||||
r[i] = exp(x[i]);
|
||||
return r;
|
||||
}
|
||||
|
||||
static inline Vec4d vec4_log(Vec4d x)
|
||||
{
|
||||
Vec4d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<4;i++)
|
||||
r[i] = log(x[i]);
|
||||
return r;
|
||||
}
|
||||
#endif
|
||||
|
||||
/******* vec4_MAX, vec4_sqrt *******/
|
||||
#ifdef USEX86INTRINSICS
|
||||
#define vec4_MAX(a,b) _mm256_max_pd(a,b)
|
||||
#define vec4_sqrt(a) _mm256_sqrt_pd(a)
|
||||
#else
|
||||
static inline Vec4d vec4_MAX(Vec4d x, Vec4d y)
|
||||
{
|
||||
Vec4d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<4;i++)
|
||||
r[i] = MAX(x[i],y[i]);
|
||||
return r;
|
||||
}
|
||||
|
||||
static inline Vec4d vec4_sqrt(Vec4d x)
|
||||
{
|
||||
Vec4d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<4;i++)
|
||||
r[i] = sqrt(x[i]);
|
||||
return r;
|
||||
}
|
||||
#endif
|
||||
|
||||
/******* vec4_fabs *******/
|
||||
#ifdef USE_SERIAL_FORM
|
||||
static inline Vec4d vec4_fabs(Vec4d x)
|
||||
{
|
||||
return vec4_blend(x,-x,x<0);
|
||||
}
|
||||
#else
|
||||
static inline Vec4d vec4_fabs(Vec4d x)
|
||||
{
|
||||
Vec4d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<4;i++)
|
||||
r[i] = fabs(x[i]);
|
||||
return r;
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline Vec4d vec4_pow(Vec4d x, double p)
|
||||
{
|
||||
/*return _ZGVdN4vv_pow(x,(Vec4d) {p,p,p,p});*/
|
||||
return vec4_exp(vec4_log(x)*p);
|
||||
}
|
||||
|
||||
#endif /* USE_LIBSLEEF */
|
||||
|
||||
/******* vec4_SIMDTOVECTOR, vec4_SIMDTOVECTORMASK *******/
|
||||
#ifdef USE_SERIAL_FORM
|
||||
static inline Vec4d vec4_SIMDTOVECTOR(double val)
|
||||
{
|
||||
return (Vec4d) {val,val,val,val};
|
||||
}
|
||||
|
||||
static inline Vec4m vec4_SIMDTOVECTORMASK(int val)
|
||||
{
|
||||
return (Vec4m) {val,val,val,val};
|
||||
}
|
||||
|
||||
#else
|
||||
static inline Vec4d vec4_SIMDTOVECTOR(double val)
|
||||
{
|
||||
Vec4d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<4;i++)
|
||||
r[i] = val;
|
||||
return r;
|
||||
}
|
||||
|
||||
static inline Vec4m vec4_SIMDTOVECTORMASK(int val)
|
||||
{
|
||||
Vec4m r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<4;i++)
|
||||
r[i] = val;
|
||||
return r;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
static inline Vec4d vec4_SIMDLOADDATA(int idx, double data[7][4])
|
||||
{
|
||||
return (Vec4d) {data[idx][0],data[idx][1],data[idx][2],data[idx][3]};
|
||||
}
|
||||
|
||||
/******* vec4_BSIM3v32_StateAccess *******/
|
||||
#ifdef USE_SERIAL_FORM
|
||||
static inline Vec4d vec4_BSIM3v32_StateAccess(double* cktstate, Vec4m stateindexes)
|
||||
{
|
||||
return (Vec4d) {
|
||||
cktstate[stateindexes[0]],
|
||||
cktstate[stateindexes[1]],
|
||||
cktstate[stateindexes[2]],
|
||||
cktstate[stateindexes[3]]
|
||||
};
|
||||
}
|
||||
#else
|
||||
static inline Vec4d vec4_BSIM3v32_StateAccess(double* cktstate, Vec4m stateindexes)
|
||||
{
|
||||
Vec4d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<4;i++)
|
||||
r[i] = cktstate[stateindexes[i]];
|
||||
return r;
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline void vec4_BSIM3v32_StateStore(double* cktstate, Vec4m stateindexes, Vec4d values)
|
||||
{
|
||||
/*if(0) vec4_CheckCollisions(stateindexes,"SateStore");*/
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int idx=0;idx<4;idx++)
|
||||
{
|
||||
cktstate[stateindexes[idx]] = values[idx];
|
||||
}
|
||||
}
|
||||
|
||||
static inline void vec4_BSIM3v32_StateAdd(double* cktstate, Vec4m stateindexes, Vec4d values)
|
||||
{
|
||||
/*if(0) vec4_CheckCollisions(stateindexes,"StateAdd");*/
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int idx=0;idx<4;idx++)
|
||||
{
|
||||
cktstate[stateindexes[idx]] += values[idx];
|
||||
}
|
||||
}
|
||||
|
||||
static inline void vec4_BSIM3v32_StateSub(double* cktstate, Vec4m stateindexes, Vec4d values)
|
||||
{
|
||||
/*if(0) vec4_CheckCollisions(stateindexes,"StateSub");*/
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int idx=0;idx<4;idx++)
|
||||
{
|
||||
cktstate[stateindexes[idx]] -= values[idx];
|
||||
}
|
||||
}
|
||||
|
||||
static inline int vec4_BSIM3v32_ACM_saturationCurrents
|
||||
(
|
||||
BSIM3v32model *model,
|
||||
BSIM3v32instance **heres,
|
||||
Vec4d *DrainSatCurrent,
|
||||
Vec4d *SourceSatCurrent
|
||||
)
|
||||
{
|
||||
int error;
|
||||
double dsat,ssat;
|
||||
for(int idx=0;idx<4;idx++)
|
||||
{
|
||||
error = BSIM3v32_ACM_saturationCurrents(
|
||||
model, heres[idx],
|
||||
&dsat,
|
||||
&ssat
|
||||
);
|
||||
(*DrainSatCurrent)[idx] = dsat;
|
||||
(*SourceSatCurrent)[idx] = ssat;
|
||||
if(error) return error;
|
||||
}
|
||||
return error;
|
||||
}
|
||||
|
||||
static inline int vec4_BSIM3v32_ACM_junctionCapacitances(
|
||||
BSIM3v32model *model,
|
||||
BSIM3v32instance **heres,
|
||||
Vec4d *areaDrainBulkCapacitance,
|
||||
Vec4d *periDrainBulkCapacitance,
|
||||
Vec4d *gateDrainBulkCapacitance,
|
||||
Vec4d *areaSourceBulkCapacitance,
|
||||
Vec4d *periSourceBulkCapacitance,
|
||||
Vec4d *gateSourceBulkCapacitance
|
||||
|
||||
)
|
||||
{
|
||||
int error;
|
||||
double areaDB,periDB,gateDB,areaSB,periSB,gateSB;
|
||||
|
||||
for(int idx=0;idx<4;idx++)
|
||||
{
|
||||
error = BSIM3v32_ACM_junctionCapacitances(
|
||||
model, heres[idx],
|
||||
&areaDB,
|
||||
&periDB,
|
||||
&gateDB,
|
||||
&areaSB,
|
||||
&periSB,
|
||||
&gateSB
|
||||
);
|
||||
(*areaDrainBulkCapacitance)[idx]=areaDB;
|
||||
(*periDrainBulkCapacitance)[idx]=periDB;
|
||||
(*gateDrainBulkCapacitance)[idx]=gateDB;
|
||||
(*areaSourceBulkCapacitance)[idx]=areaSB;
|
||||
(*periSourceBulkCapacitance)[idx]=periSB;
|
||||
(*gateSourceBulkCapacitance)[idx]=gateSB;
|
||||
if(error) return error;
|
||||
}
|
||||
return error;
|
||||
}
|
||||
|
||||
/* geq, ceq, and zero are not translated to vectors because there are unused */
|
||||
static inline int vec4_NIintegrate(CKTcircuit* ckt, double* geq, double *ceq, double zero, Vec4m chargestate)
|
||||
{
|
||||
int error;
|
||||
/*if (0) vec4_CheckCollisions(chargestate, "NIIntegrate");*/
|
||||
for(int idx=0;idx<4;idx++)
|
||||
{
|
||||
error = NIintegrate(ckt,geq,ceq,zero,chargestate[idx]);
|
||||
if(error) return error;
|
||||
}
|
||||
return error;
|
||||
}
|
||||
|
||||
static inline int vec4_SIMDCOUNT(Vec4m mask) {
|
||||
return (mask[0] ? 1 : 0) + (mask[1] ? 1 : 0) + (mask[2] ? 1 : 0) + (mask[3] ? 1 : 0);
|
||||
}
|
||||
|
||||
|
||||
#if 0
|
||||
/* some debug utils functions */
|
||||
void vec4_printd(const char* msg, const char* name, Vec4d vecd)
|
||||
{
|
||||
printf("%s %s %g %g %g %g\n",msg,name,vecd[0],vecd[1],vecd[2],vecd[3]);
|
||||
}
|
||||
|
||||
void vec4_printm(const char* msg, const char* name, Vec4m vecm)
|
||||
{
|
||||
printf("%s %s %ld %ld %ld %ld\n",msg,name,vecm[0],vecm[1],vecm[2],vecm[3]);
|
||||
}
|
||||
|
||||
void vec4_CheckCollisions(Vec4m stateindexes, const char* msg)
|
||||
{
|
||||
for(int i=0;i<4;i++)
|
||||
for(int j=0;j<4;j++)
|
||||
if(i!=j)
|
||||
if(stateindexes[i]==stateindexes[j])
|
||||
{
|
||||
printf("%s, collisions %ld %ld %ld %ld!\n",msg,stateindexes[0],stateindexes[1],stateindexes[2],stateindexes[3]);
|
||||
raise(SIGINT);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
@ -1,276 +0,0 @@
|
|||
/*******************************************************************************
|
||||
* Copyright 2020 Florian Ballenegger, Anamosic Ballenegger Design
|
||||
*******************************************************************************
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software without
|
||||
* specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
******************************************************************************/
|
||||
|
||||
/* disable omp simd for GCC, as it slow down a bit */
|
||||
#if !defined(__GNUC__) || defined(__clang__) || defined(__INTEL_COMPILER)
|
||||
#define USE_OMPSIMD
|
||||
#endif
|
||||
|
||||
|
||||
static inline Vec8d vec8_blend(Vec8d fa, Vec8d tr, Vec8m mask)
|
||||
{
|
||||
Vec8d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<8;i++)
|
||||
r[i] = (mask[i]==0 ? fa[i] : tr[i]);
|
||||
return r;
|
||||
}
|
||||
|
||||
static inline Vec8d vec8_exp(Vec8d x)
|
||||
{
|
||||
Vec8d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<8;i++)
|
||||
r[i] = exp(x[i]);
|
||||
return r;
|
||||
}
|
||||
|
||||
static inline Vec8d vec8_log(Vec8d x)
|
||||
{
|
||||
Vec8d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<8;i++)
|
||||
r[i] = log(x[i]);
|
||||
return r;
|
||||
}
|
||||
|
||||
static inline Vec8d vec8_max(Vec8d x, Vec8d y)
|
||||
{
|
||||
Vec8d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<8;i++)
|
||||
r[i] = MAX(x[i],y[i]);
|
||||
return r;
|
||||
}
|
||||
|
||||
static inline Vec8d vec8_sqrt(Vec8d x)
|
||||
{
|
||||
Vec8d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<8;i++)
|
||||
r[i] = sqrt(x[i]);
|
||||
return r;
|
||||
}
|
||||
|
||||
static inline Vec8d vec8_fabs(Vec8d x)
|
||||
{
|
||||
Vec8d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<8;i++)
|
||||
r[i] = fabs(x[i]);
|
||||
return r;
|
||||
}
|
||||
|
||||
#define vec8_pow0p7(x,p) vec8_pow(x,p)
|
||||
#define vec8_powMJ(x,p) vec8_pow(x,p)
|
||||
#define vec8_powMJSW(x,p) vec8_pow(x,p)
|
||||
#define vec8_powMJSWG(x,p) vec8_pow(x,p)
|
||||
|
||||
static inline Vec8d vec8_pow(Vec8d x, double p)
|
||||
{
|
||||
return vec8_exp(vec8_log(x)*p);
|
||||
}
|
||||
|
||||
/* useful vectorized functions */
|
||||
static inline Vec8d vec8_SIMDTOVECTOR(double val)
|
||||
{
|
||||
return (Vec8d) {val,val,val,val,val,val,val,val};
|
||||
}
|
||||
|
||||
static inline Vec8m vec8_SIMDTOVECTORMASK(int32_t val)
|
||||
{
|
||||
return (Vec8m) {val,val,val,val,val,val,val,val};
|
||||
}
|
||||
|
||||
static inline Vec8d vec8_SIMDLOADDATA(int idx, double data[7][8])
|
||||
{
|
||||
return (Vec8d) {data[idx][0],data[idx][1],data[idx][2],data[idx][3],data[idx][4],data[idx][5],data[idx][6],data[idx][7]};
|
||||
}
|
||||
|
||||
static inline Vec8d vec8_BSIM3v32_StateAccess(double* cktstate, Vec8m stateindexes)
|
||||
{
|
||||
Vec8d r;
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int i=0;i<8;i++)
|
||||
r[i] = cktstate[stateindexes[i]];
|
||||
return r;
|
||||
}
|
||||
|
||||
|
||||
static inline void vec8_BSIM3v32_StateStore(double* cktstate, Vec8m stateindexes, Vec8d values)
|
||||
{
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int idx=0;idx<8;idx++)
|
||||
{
|
||||
cktstate[stateindexes[idx]] = values[idx];
|
||||
}
|
||||
}
|
||||
|
||||
static inline void vec8_BSIM3v32_StateAdd(double* cktstate, Vec8m stateindexes, Vec8d values)
|
||||
{
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int idx=0;idx<8;idx++)
|
||||
{
|
||||
cktstate[stateindexes[idx]] += values[idx];
|
||||
}
|
||||
}
|
||||
|
||||
static inline void vec8_BSIM3v32_StateSub(double* cktstate, Vec8m stateindexes, Vec8d values)
|
||||
{
|
||||
#ifdef USE_OMPSIMD
|
||||
#pragma omp simd simdlen(4)
|
||||
#endif
|
||||
for(int idx=0;idx<8;idx++)
|
||||
{
|
||||
cktstate[stateindexes[idx]] -= values[idx];
|
||||
}
|
||||
}
|
||||
|
||||
static inline int vec8_BSIM3v32_ACM_saturationCurrents
|
||||
(
|
||||
BSIM3v32model *model,
|
||||
BSIM3v32instance **heres,
|
||||
Vec8d *DrainSatCurrent,
|
||||
Vec8d *SourceSatCurrent
|
||||
)
|
||||
{
|
||||
int error;
|
||||
double dsat,ssat;
|
||||
for(int idx=0;idx<8;idx++)
|
||||
{
|
||||
error = BSIM3v32_ACM_saturationCurrents(
|
||||
model, heres[idx],
|
||||
&dsat,
|
||||
&ssat
|
||||
);
|
||||
(*DrainSatCurrent)[idx] = dsat;
|
||||
(*SourceSatCurrent)[idx] = ssat;
|
||||
if(error) return error;
|
||||
}
|
||||
return error;
|
||||
}
|
||||
|
||||
static inline int vec8_BSIM3v32_ACM_junctionCapacitances(
|
||||
BSIM3v32model *model,
|
||||
BSIM3v32instance **heres,
|
||||
Vec8d *areaDrainBulkCapacitance,
|
||||
Vec8d *periDrainBulkCapacitance,
|
||||
Vec8d *gateDrainBulkCapacitance,
|
||||
Vec8d *areaSourceBulkCapacitance,
|
||||
Vec8d *periSourceBulkCapacitance,
|
||||
Vec8d *gateSourceBulkCapacitance
|
||||
|
||||
)
|
||||
{
|
||||
int error;
|
||||
double areaDB,periDB,gateDB,areaSB,periSB,gateSB;
|
||||
|
||||
for(int idx=0;idx<8;idx++)
|
||||
{
|
||||
error = BSIM3v32_ACM_junctionCapacitances(
|
||||
model, heres[idx],
|
||||
&areaDB,
|
||||
&periDB,
|
||||
&gateDB,
|
||||
&areaSB,
|
||||
&periSB,
|
||||
&gateSB
|
||||
);
|
||||
(*areaDrainBulkCapacitance)[idx]=areaDB;
|
||||
(*periDrainBulkCapacitance)[idx]=periDB;
|
||||
(*gateDrainBulkCapacitance)[idx]=gateDB;
|
||||
(*areaSourceBulkCapacitance)[idx]=areaSB;
|
||||
(*periSourceBulkCapacitance)[idx]=periSB;
|
||||
(*gateSourceBulkCapacitance)[idx]=gateSB;
|
||||
if(error) return error;
|
||||
}
|
||||
return error;
|
||||
}
|
||||
|
||||
/* geq, ceq, and zero are not translated to vectors because there are unused */
|
||||
static inline int vec8_NIintegrate(CKTcircuit* ckt, double* geq, double *ceq, double zero, Vec8m chargestate)
|
||||
{
|
||||
int error;
|
||||
for(int idx=0;idx<8;idx++)
|
||||
{
|
||||
error = NIintegrate(ckt,geq,ceq,zero,chargestate[idx]);
|
||||
if(error) return error;
|
||||
}
|
||||
return error;
|
||||
}
|
||||
|
||||
static inline int vec8_SIMDCOUNT(Vec8m mask) {
|
||||
return (mask[0] ? 1 : 0) + (mask[1] ? 1 : 0) + (mask[2] ? 1 : 0) + (mask[3] ? 1 : 0)
|
||||
+ (mask[4] ? 1 : 0) + (mask[5] ? 1 : 0) + (mask[6] ? 1 : 0) + (mask[7] ? 1 : 0);
|
||||
}
|
||||
|
||||
|
||||
#if 0
|
||||
/* some debug utils functions */
|
||||
void vec8_printd(const char* msg, const char* name, Vec8d vecd)
|
||||
{
|
||||
printf("%s %s %g %g %g %g\n",msg,name,vecd[0],vecd[1],vecd[2],vecd[3]);
|
||||
}
|
||||
|
||||
void vec8_printm(const char* msg, const char* name, Vec8m vecm)
|
||||
{
|
||||
printf("%s %s %ld %ld %ld %ld\n",msg,name,vecm[0],vecm[1],vecm[2],vecm[3]);
|
||||
}
|
||||
|
||||
void vec8_CheckCollisions(Vec8m stateindexes, const char* msg)
|
||||
{
|
||||
for(int i=0;i<8;i++)
|
||||
for(int j=0;j<8;j++)
|
||||
if(i!=j)
|
||||
if(stateindexes[i]==stateindexes[j])
|
||||
{
|
||||
printf("%s, collisions %ld %ld %ld %ld!\n",msg,stateindexes[0],stateindexes[1],stateindexes[2],stateindexes[3]);
|
||||
raise(SIGINT);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
Loading…
Reference in New Issue