repair DEVICES file
This commit is contained in:
gdiso
parent
85a73411e6
commit
a5e3ffcf7e
974
DEVICES
974
DEVICES
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@ -1,198 +1,776 @@
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src/frontend/device.c: ft_sim->devices[dg->dev_type_no]->name,
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DEVICES
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src/frontend/device.c: ft_sim->devices[dg->dev_type_no]->description);
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---------------------------------------------------------------------------
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src/frontend/device.c: if (ft_sim->devices[dg->dev_type_no]->numModelParms) {
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src/frontend/device.c: } else if (ft_sim->devices[dg->dev_type_no]->numModelParms) {
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This file contains the status of devices available in ngspice. This file
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src/frontend/device.c: ft_sim->devices[dg->dev_type_no]->name,
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will be updated every time the device specific code is altered or changed.
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src/frontend/device.c: ft_sim->devices[dg->dev_type_no]->description);
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This file is useful in writing ngspice documentation.
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src/frontend/device.c: xcount = *ft_sim->devices[dg->dev_type_no]->numInstanceParms;
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src/frontend/device.c: plist = ft_sim->devices[dg->dev_type_no]->instanceParms;
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src/frontend/device.c: xcount = *ft_sim->devices[dg->dev_type_no]->numModelParms;
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***************************************************************************
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src/frontend/device.c: plist = ft_sim->devices[dg->dev_type_no]->modelParms;
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************************* Linear devices ********************************
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src/frontend/device.c: xcount = *ft_sim->devices[dg->dev_type_no]->numInstanceParms;
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***************************************************************************
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src/frontend/device.c: plist = ft_sim->devices[dg->dev_type_no]->instanceParms;
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src/frontend/device.c: xcount = *ft_sim->devices[dg->dev_type_no]->numModelParms;
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CAP - Capacitor
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src/frontend/device.c: plist = ft_sim->devices[dg->dev_type_no]->modelParms;
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Initial Release.
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src/frontend/device.c: (*ft_sim->askInstanceQuest)(ft_curckt->ci_ckt, dg->instance,
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Ver: N/A
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src/frontend/device.c: (*ft_sim->askModelQuest)(ft_curckt->ci_ckt, dg->model,
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Class: C
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src/frontend/gens.c: && (ft_sim->devices[dg->dev_type_no]->flags
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Level: 1 (and only)
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src/frontend/misccoms.c: (void) sprintf(buf, SYSTEM_MAIL, ft_sim->simulator,
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Dir: devices/cap
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src/frontend/misccoms.c: ft_sim->version, Bug_Addr);
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Status:
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src/frontend/misccoms.c: fprintf(cp_out, "** %s-%s : %s\n", ft_sim->simulator,
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src/frontend/misccoms.c: ft_sim->version, ft_sim->description);
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Enhancements over the original model:
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src/frontend/misccoms.c: fprintf(cp_out, "** %s-%s\n", ft_sim->simulator,
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src/frontend/misccoms.c: ft_sim->version);
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- Parallel Multiplier
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src/frontend/misccoms.c: fprintf(cp_out, "** %s-%s : %s\n", ft_sim->simulator,
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- Temperature difference from circuit temperature
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src/frontend/misccoms.c: ft_sim->version, ft_sim->description);
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- Preliminary technology scaling support
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src/frontend/misccoms.c: } else if (!eq(ft_sim->version, s)) {
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- Model capacitance
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src/frontend/misccoms.c: wl->wl_word, ft_sim->version);
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- Cj calculation based on relative dielectric constant
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src/frontend/misccoms.c: printf("%s-%s done\n", ft_sim->simulator, ft_sim->version);
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and insulator thickness
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src/frontend/outitf.c: fprintf(run->fp, "Command: version %s\n", ft_sim->version);
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src/frontend/shyu.c: err=(*(ft_sim->deleteTask))(ft_curckt->ci_ckt,
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IND - Inductor
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src/frontend/shyu.c: err = (*(ft_sim->newTask))(ft_curckt->ci_ckt,
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Initial Release.
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src/frontend/shyu.c: for(j=0;j<ft_sim->numAnalyses;j++) {
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Ver: N/A
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src/frontend/shyu.c: if(strcmp(ft_sim->analyses[j]->name,"options")==0) {
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Class: L
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src/frontend/shyu.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,"options",
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Level: 1 (and only)
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src/frontend/shyu.c: for(j=0;j<ft_sim->numAnalyses;j++) {
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Dir: devices/ind
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src/frontend/shyu.c: if(strcmp(ft_sim->analyses[j]->name,"SEN")==0) {
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Status:
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src/frontend/shyu.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,"sense",
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src/frontend/shyu.c: for(j=0;j<ft_sim->numAnalyses;j++) {
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Enhancements over the original model:
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src/frontend/shyu.c: if(strcmp(ft_sim->analyses[j]->name,"AC")==0) {
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src/frontend/shyu.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,"acan",
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- Parallel Multiplier
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src/frontend/shyu.c: for(i=0;i<ft_sim->numAnalyses;i++) {
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- Temperature difference from circuit temperature
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src/frontend/shyu.c: if(strcmp(ft_sim->analyses[i]->name,"DCOP")==0) {
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- Preliminary technology scaling support
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src/frontend/shyu.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,"dcop",
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- Model inductance
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src/frontend/shyu.c: for(i=0;i<ft_sim->numAnalyses;i++) {
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- Inductance calculation for toroids or solenoids
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src/frontend/shyu.c: if(strcmp(ft_sim->analyses[i]->name,"DCTransfer")==0) {
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on the model line.
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src/frontend/shyu.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,"DCtransfer",
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src/frontend/shyu.c: for(j=0;j<ft_sim->numAnalyses;j++) {
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RES - Simple linear resistor
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src/frontend/shyu.c: if(strcmp(ft_sim->analyses[j]->name,"TRAN")==0) {
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Initial Release.
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src/frontend/shyu.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,"tranan",
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Ver: N/A
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src/frontend/shyu.c: for(i=0;i<ft_sim->analyses[save]->numParms;i++) {
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Class: R
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src/frontend/shyu.c: ft_sim->analyses[save]->analysisParms[i].
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Level: 1 (and only)
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src/frontend/shyu.c: if(ft_sim->analyses[save]->analysisParms[i].
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Dir: devices/res
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src/frontend/shyu.c: error = (*(ft_sim->setAnalysisParm))(ckt,
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Status:
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src/frontend/shyu.c: senseJob, ft_sim->analyses[save]->
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src/frontend/shyu.c: parm = INPgetValue(ckt,&line,ft_sim->
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Enhancements over the original model:
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src/frontend/shyu.c: error = (*(ft_sim->setAnalysisParm))(ckt,
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src/frontend/shyu.c: senseJob, ft_sim->analyses[save]->
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- Parallel Multiplier
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src/frontend/shyu.c: if(i==ft_sim->analyses[save]->numParms) {
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- Different value for ac analysis
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src/frontend/shyu.c: if((err = (*(ft_sim->doAnalyses))(ckt, 1, ft_curckt->ci_curTask))!=OK){
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- Temperature difference from circuit temperature
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src/frontend/spiceif.c: err = (*(ft_sim->newCircuit))(&ckt);
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- Noiseless resistor
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src/frontend/spiceif.c: (*(ft_sim->newTask))(ckt,(void**)&(ft_curckt->ci_defTask),taskUid);
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- Flicker noise
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src/frontend/spiceif.c: (*(ft_sim->newTask))(ckt,(void**)&(ft_curckt->ci_defTask),taskUid,
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- Preliminary technology scaling support
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src/frontend/spiceif.c: for(j=0;j<ft_sim->numAnalyses;j++) {
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src/frontend/spiceif.c: if(strcmp(ft_sim->analyses[j]->name,"options")==0) {
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src/frontend/spiceif.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,optUid,
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***************************************************************************
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src/frontend/spiceif.c: (INPtables *) *tab,ft_curckt->ci_defTask, ft_sim->nodeParms,
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********************* Distributed elements ********************************
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src/frontend/spiceif.c: ft_sim->numNodeParms);
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***************************************************************************
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src/frontend/spiceif.c: err=(*(ft_sim->deleteTask))(ft_curckt->ci_ckt,
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src/frontend/spiceif.c: err = (*(ft_sim->newTask))(ft_curckt->ci_ckt,
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CPL - Simple Coupled Multiconductor Lines (Kspice)
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src/frontend/spiceif.c: err = (*(ft_sim->newTask))(ft_curckt->ci_ckt,
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Initial Release.
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src/frontend/spiceif.c: for(j=0;j<ft_sim->numAnalyses;j++) {
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Ver: N/A
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src/frontend/spiceif.c: if(strcmp(ft_sim->analyses[j]->name,"options")==0) {
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Class: P
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src/frontend/spiceif.c: err = (*(ft_sim->newAnalysis))(ft_curckt->ci_ckt,which,optUid,
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Level: 1 (and only)
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src/frontend/spiceif.c: if ((err = (*(ft_sim->doAnalyses))(ckt, 1, ft_curckt->ci_curTask))!=OK){
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Dir: devices/cpl
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src/frontend/spiceif.c: if ((err = (*(ft_sim->doAnalyses))(ckt, 0, ft_curckt->ci_curTask))!=OK){
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Status:
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src/frontend/spiceif.c: for(i=0;i<ft_sim->numAnalyses;i++) {
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src/frontend/spiceif.c: if(strcmp(ft_sim->analyses[i]->name,"options")==0) {
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This model comes from swec and kspice. It is not documented, if
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src/frontend/spiceif.c: for (i = 0; i < ft_sim->analyses[which]->numParms; i++)
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you have kspice docs, can you write a short description
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src/frontend/spiceif.c: if (eq(ft_sim->analyses[which]->analysisParms[i].keyword, name) &&
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of its use ?
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src/frontend/spiceif.c: (ft_sim->analyses[which]->analysisParms[i].dataType & IF_SET))
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src/frontend/spiceif.c: if (i == ft_sim->analyses[which]->numParms) {
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- Does not implement parallel code switches
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src/frontend/spiceif.c: switch (ft_sim->analyses[which]->analysisParms[i].dataType & IF_VARTYPES) {
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- Probably a lot of memory leaks
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src/frontend/spiceif.c: ft_sim->analyses[which]->analysisParms[i].dataType);
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src/frontend/spiceif.c: if ((err = (*(ft_sim->setAnalysisParm))(cc, (void *)ft_curckt->ci_curOpt,
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Enhancements over the original model:
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src/frontend/spiceif.c: ft_sim->analyses[which]->analysisParms[i].id, &pval,
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src/frontend/spiceif.c: if ((err = (*(ft_sim->setAnalysisParm))(cc, (void *)ft_curckt->ci_defOpt,
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- Better integrated into ngspice adding CPLask, CPLmAsk and
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src/frontend/spiceif.c: ft_sim->analyses[which]->analysisParms[i].id, &pval,
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CPLunsetup functions
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src/frontend/spiceif.c: switch(ft_sim->analyses[which]->analysisParms[i].dataType & IF_VARTYPES) {
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src/frontend/spiceif.c: (*(ft_sim->deleteCircuit))(cc);
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src/frontend/spiceif.c: device = ft_sim->devices[typecode];
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LTRA - Lossy Transmission line
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src/frontend/spiceif.c: device = ft_sim->devices[typecode];
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Initial Release.
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src/frontend/spiceif.c: device = ft_sim->devices[typecode];
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Ver: N/A
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src/frontend/spiceif.c: err = (*(ft_sim->askInstanceQuest))((void *)ckt, (void *)dev,
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Class: O
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src/frontend/spiceif.c: err = (*(ft_sim->askModelQuest))((void*)ckt, (void *) mod,
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Level: 1 (and only)
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src/frontend/spiceif.c: err = (*(ft_sim->setInstanceParm))((void *)ckt, (void *)dev,
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Dir: devices/ltra
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src/frontend/spiceif.c: err = (*(ft_sim->setModelParm))((void*)ckt, (void *) mod,
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Status:
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src/frontend/spiceif.c: err = (*(ft_sim->findInstance))((void *)ck,&type,devptr,name,NULL,NULL);
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src/frontend/spiceif.c: err = (*(ft_sim->findModel))((void *)ck,&type,modptr,name);
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Original spice model.
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src/frontend/spiceif.c: for(i=0;i<ft_sim->analyses[which]->numParms;i++) {
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src/frontend/spiceif.c: if(strcmp(ft_sim->analyses[which]->analysisParms[i].keyword,name)==0) {
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- Does not implement parallel code switches
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src/frontend/spiceif.c: return( (*(ft_sim->askAnalysisQuest))(ckt,anal,
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src/frontend/spiceif.c: ft_sim->analyses[which]->analysisParms[i].id,parm,
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TRA - Transmission line
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src/frontend/spiceif.c: for(i=0;i<ft_sim->numAnalyses;i++) {
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Initial Release.
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src/frontend/spiceif.c: if(strcmp(ft_sim->analyses[i]->name,"TRAN")==0){
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Ver: N/A
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src/frontend/spiceif.c: err =(*(ft_sim->findAnalysis))(ci->ci_ckt,&which, &anal,tranUid,
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Class: T
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src/frontend/spiceif.c: for(i=0;i<ft_sim->numAnalyses;i++) {
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Level: 1 (and only)
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src/frontend/spiceif.c: if(strcmp(ft_sim->analyses[i]->name,"options")==0) {
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Dir: devices/tra
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src/frontend/spiceif.c: for (i = 0; i < ft_sim->analyses[which]->numParms; i++)
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Status:
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src/frontend/spiceif.c: if (eq(ft_sim->analyses[which]->analysisParms[i].keyword, name))
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src/frontend/spiceif.c: if (i == ft_sim->analyses[which]->numParms)
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Original spice model.
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src/frontend/spiceif.c: if ((*(ft_sim->askAnalysisQuest))(ckt, ft_curckt->ci_curTask,
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src/frontend/spiceif.c: ft_sim->analyses[which]->analysisParms[i].id, &parm,
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- Does not implement parallel code switches
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src/frontend/spiceif.c: return (parmtovar(&parm, &(ft_sim->analyses[which]->analysisParms[i])));
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src/frontend/spiceif.c: for (i = 0, vars = v = NULL; i<ft_sim->analyses[which]->numParms; i++) {
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TXL - Simple Lossy Transmission Line (Kspice)
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src/frontend/spiceif.c: if(!(ft_sim->analyses[which]->analysisParms[i].dataType&IF_ASK)) {
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Initial Release.
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src/frontend/spiceif.c: if ((*(ft_sim->askAnalysisQuest))(ckt, ft_curckt->ci_curTask,
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Ver: N/A
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src/frontend/spiceif.c: ft_sim->analyses[which]->analysisParms[i].id,
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Class: Y
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src/frontend/spiceif.c: &(ft_sim->analyses[which]->analysisParms[i]));
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Level: 1 (and only)
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src/frontend/spiceif.c: &(ft_sim->analyses[which]->analysisParms[i]));
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Dir: devices/txl
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src/frontend/where.c: msg = (*ft_sim->nonconvErr)((void *) (ft_curckt->ci_ckt), 0);
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Status:
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src/frontend/where.c: msg = (*ft_sim->nonconvErr)((void *) (ft_curckt->ci_ckt), 0);
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src/include/inpmacs.h:error=(*(ft_sim->func))args;\
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This model comes from kspice. It is not documented, if
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src/main.c: cp_program = ft_sim->simulator;
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you have kspice docs, can you write a short description
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src/spicelib/devices/dev.c: * ft_sim->numDevices = num_devices();
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of its use ?
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src/spicelib/devices/dev.c: ft_sim->numDevices = DEVNUM;
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src/spicelib/devices/dev.c: ft_sim->devices = devices_ptr();
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There is some code left out from compilation:
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src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) {
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TXLaccept and TXLfindBr. Any ideas ?
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src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "NOISE") == 0) {
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src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) {
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- Does not implement parallel code switches
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src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "OP") == 0) {
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src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) {
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src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "DISTO") == 0) {
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URC - Uniform distributed RC line
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src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) {
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Initial Release.
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src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "AC") == 0) {
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Ver: N/A
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src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) {
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Class: U
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src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "PZ") == 0) {
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Level: 1 (and only)
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src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) {
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Dir: devices/urc
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src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "DC") == 0) {
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Status:
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src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) {
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src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "TF") == 0) {
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Original spice model.
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src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) {
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src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "TRAN") == 0) {
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- Does not implement parallel code switches
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src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) {
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src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "SENS") == 0) {
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src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->numAnalyses; i++) {
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***************************************************************************
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src/spicelib/parser/inp2dot.c: if (strcmp(ft_sim->analyses[i]->name, "SENS2") == 0) {
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**************************** V/I Sources *****************************
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src/spicelib/parser/inp2dot.c: for (i = 0; i < ft_sim->analyses[which]->numParms; i++) {
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***************************************************************************
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src/spicelib/parser/inp2dot.c: ft_sim->analyses[which]->analysisParms[i].keyword)) {
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src/spicelib/parser/inp2dot.c: if (ft_sim->analyses[which]->analysisParms[i].dataType & IF_FLAG) {
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ASRC - Arbitrary Source
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src/spicelib/parser/inp2dot.c: (*(ft_sim->setAnalysisParm)) (ckt, foo,
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Initial Release.
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src/spicelib/parser/inp2dot.c: ft_sim->analyses[which]->analysisParms[i].id,
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Ver: N/A
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src/spicelib/parser/inp2dot.c: ft_sim->analyses[which]->analysisParms[i].dataType, tab);
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Class: B
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src/spicelib/parser/inp2dot.c: (*(ft_sim->setAnalysisParm)) (ckt, foo,
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Level: 1 (and only)
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src/spicelib/parser/inp2dot.c: ft_sim->
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Dir: devices/asrc
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src/spicelib/parser/inp2dot.c: if (i == ft_sim->analyses[which]->numParms) {
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Status:
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src/spicelib/parser/inpapnam.c: if (parmname && ft_sim->analyses[type]) {
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src/spicelib/parser/inpapnam.c: for (i = 0; i < ft_sim->analyses[type]->numParms; i++)
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The arbitrary source code has been corrected with the patch
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src/spicelib/parser/inpapnam.c: ft_sim->analyses[type]->analysisParms[i].keyword) ==
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available on the Internet. There is still an issue to fix, the
|
||||||
src/spicelib/parser/inpapnam.c: return (*(ft_sim->setAnalysisParm)) (ckt, analPtr,
|
current of current-controlled generators.
|
||||||
src/spicelib/parser/inpapnam.c: ft_sim->
|
|
||||||
src/spicelib/parser/inpdoopt.c: for(i=0;i<ft_sim->numAnalyses;i++) {
|
CCCS - Current Controlled Current Source
|
||||||
src/spicelib/parser/inpdoopt.c: prm = ft_sim->analyses[i];
|
Initial Release.
|
||||||
src/spicelib/parser/inpdoopt.c: error = (*(ft_sim->setAnalysisParm))(ckt,anal,
|
Ver: N/A
|
||||||
src/spicelib/parser/inpdpar.c: for (i = 0; i < (*(*(ft_sim->devices)[dev]).numInstanceParms); i++) {
|
Class: F
|
||||||
src/spicelib/parser/inpdpar.c: ((*(ft_sim->devices)[dev]).instanceParms[i].
|
Level: 1 (and only)
|
||||||
src/spicelib/parser/inpdpar.c: ((*(ft_sim->devices)[dev]).
|
Dir: devices/cccs
|
||||||
src/spicelib/parser/inpdpar.c: error = (*(ft_sim->setInstanceParm)) (ckt, fast,
|
Status:
|
||||||
src/spicelib/parser/inpdpar.c: (*(ft_sim->devices)
|
|
||||||
src/spicelib/parser/inpdpar.c: if (i == (*(*(ft_sim->devices)[dev]).numInstanceParms)) {
|
Original spice model.
|
||||||
src/spicelib/parser/inpgmod.c: error = (*(ft_sim->newModel)) (ckt, (modtmp)->INPmodType,
|
|
||||||
src/spicelib/parser/inpgmod.c: for (j = 0; j < (* (*(ft_sim->devices)[(modtmp)->INPmodType]).numModelParms); j++) {
|
CCVS - Current Controlled Voltage Source
|
||||||
src/spicelib/parser/inpgmod.c: if (strcmp("cpl", ((*(ft_sim->devices) [ (modtmp)->INPmodType ]).modelParms[j].keyword)) == 0) {
|
Initial Release.
|
||||||
src/spicelib/parser/inpgmod.c: if (strcmp(parm,((*(ft_sim->devices)[(modtmp)->INPmodType]).modelParms[j].keyword)) == 0) {
|
Ver: N/A
|
||||||
src/spicelib/parser/inpgmod.c: val = INPgetValue(ckt, &line, ((* (ft_sim->devices)[(modtmp)->INPmodType]).modelParms[j].dataType), tab);
|
Class: H
|
||||||
src/spicelib/parser/inpgmod.c: error = (*(ft_sim->setModelParm)) (ckt, ((modtmp)->INPmodfast),
|
Level: 1 (and only)
|
||||||
src/spicelib/parser/inpgmod.c: (* (ft_sim->devices)[(modtmp)->INPmodType]).modelParms[j].id,
|
Dir: devices/ccvs
|
||||||
src/spicelib/parser/inpgmod.c: (*(ft_sim->devices)
|
Status:
|
||||||
src/spicelib/parser/inpgtitl.c: error = (*(ft_sim->newCircuit)) (ckt);
|
|
||||||
src/spicelib/parser/inppname.c: for (i = 0; i < (*(*(ft_sim->devices)[dev]).numInstanceParms); i++) {
|
Original spice model.
|
||||||
src/spicelib/parser/inppname.c: ((*(ft_sim->devices)[dev]).instanceParms[i].keyword)) ==
|
|
||||||
src/spicelib/parser/inppname.c: (*(ft_sim->setInstanceParm)) (ckt, fast,
|
ISRC - Independent Current Source
|
||||||
src/spicelib/parser/inppname.c: (*(ft_sim->devices)[dev]).
|
Initial Release.
|
||||||
src/spicelib/parser/inppname.c: if (i == (*(*(ft_sim->devices)[dev]).numInstanceParms)) {
|
Ver: N/A
|
||||||
src/spicelib/parser/inpptree.c: for (i = 0; i < ft_sim->numSpecSigs; i++)
|
Class: I
|
||||||
src/spicelib/parser/inpptree.c: if (!strcmp(ft_sim->specSigs[i], buf))
|
Level: 1 (and only)
|
||||||
src/spicelib/parser/inpptree.c: if (i < ft_sim->numSpecSigs) {
|
Dir: devices/isrc
|
||||||
src/spicelib/parser/inpsymt.c: error = (*(ft_sim->newNode)) (ckt, &t->t_node, *token);
|
Status:
|
||||||
src/spicelib/parser/inpsymt.c: error = (*(ft_sim->groundNode)) (ckt, &t->t_node, *token);
|
|
||||||
src/spicelib/parser/inptyplk.c: for (i = 0; i < ft_sim->numDevices; i++) {
|
This is the original spice device improved by Alan Gillespie
|
||||||
src/spicelib/parser/inptyplk.c: printf("In INPtypelook, checking model type = %s against existing model = %s, . . .\n", type, (*(ft_sim->devices)[i]).name );
|
with the following features:
|
||||||
src/spicelib/parser/inptyplk.c: if ((ft_sim->devices)[i] && strcmp(type, (*(ft_sim->devices)[i]).name) == 0) {
|
|
||||||
src/xspice/mif/mifgetmod.c: error = (*(ft_sim->newModel))( ckt,(modtmp)->INPmodType,
|
- Source ramping
|
||||||
src/xspice/mif/mifgetmod.c: for(j=0;j<*((*(ft_sim->devices)[(modtmp)->INPmodType]).numModelParms); j++) {
|
- Check for non-monotonic series in PWL
|
||||||
src/xspice/mif/mifgetmod.c: if (strcmp(parm,((*(ft_sim->devices) [ (modtmp)->
|
|
||||||
src/xspice/mif/mifgetmod.c: ((*(ft_sim->devices)[(modtmp)->
|
|
||||||
src/xspice/mif/mifgetmod.c: error = (*(ft_sim->setModelParm))(ckt,
|
VCCS - Voltage Controlled Current Source
|
||||||
src/xspice/mif/mifgetmod.c: (*(ft_sim->devices)[(modtmp)->INPmodType ]).
|
Initial Release.
|
||||||
src/xspice/mif/mifgetmod.c: if(j >= *((*(ft_sim->devices)[(modtmp)->INPmodType]).numModelParms))
|
Ver: N/A
|
||||||
|
Class: G
|
||||||
|
Level: 1 (and only)
|
||||||
|
Dir: devices/vccs
|
||||||
|
Status:
|
||||||
|
|
||||||
|
Original spice model.
|
||||||
|
|
||||||
|
VCVS - Voltage Controlled Voltage Source
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: E
|
||||||
|
Level: 1 (and only)
|
||||||
|
Dir: devices/vcvs
|
||||||
|
Status:
|
||||||
|
|
||||||
|
Original spice model.
|
||||||
|
|
||||||
|
VSRC - Independent Voltage Source
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: V
|
||||||
|
Level: 1 (and only)
|
||||||
|
Dir: devices/vsrc
|
||||||
|
Status:
|
||||||
|
|
||||||
|
This is the original spice device improved by Alan Gillespie
|
||||||
|
with the following features:
|
||||||
|
|
||||||
|
- Source ramping
|
||||||
|
- Check for non-monotonic series in PWL
|
||||||
|
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
**************************** Switches ****************************
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
CSW - Current controlled switch
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: W
|
||||||
|
Level: 1 (and only)
|
||||||
|
Dir: devices/csw
|
||||||
|
Status:
|
||||||
|
|
||||||
|
This model comes from Jon Engelbert
|
||||||
|
|
||||||
|
|
||||||
|
SW - Voltage controlled switch
|
||||||
|
Initial release
|
||||||
|
Ver: N/A
|
||||||
|
Class: S
|
||||||
|
Level: 1 (and only)
|
||||||
|
Dir: devices/sw
|
||||||
|
Status:
|
||||||
|
|
||||||
|
This model comes from Jon Engelbert
|
||||||
|
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
**************************** Diodes ****************************
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
DIO - Junction Diode
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: D
|
||||||
|
Level: 1 (and only)
|
||||||
|
Dir: devices/dio
|
||||||
|
Status:
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel Multiplier
|
||||||
|
- Temperature difference from circuit temperature
|
||||||
|
- Forward and reverse knee currents
|
||||||
|
- Periphery (sidewall) effects
|
||||||
|
- Temperature correction of some parameters
|
||||||
|
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
************************* Bipolar Devices *************************
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
BJT - Bipolar Junction Transistor
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: Q
|
||||||
|
Level: 1
|
||||||
|
Dir: devices/bjt
|
||||||
|
Status:
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel Multiplier
|
||||||
|
- Temperature difference from circuit temperature
|
||||||
|
- Different area parameters for collector, base and emitter
|
||||||
|
|
||||||
|
BJT2 - Bipolar Junction Transistor
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: Q
|
||||||
|
Level: 2
|
||||||
|
Dir: devices/bjt2
|
||||||
|
Status:
|
||||||
|
|
||||||
|
This is the BJT model written by Alan Gillespie to support lateral
|
||||||
|
devices. The model has been hacked by Dietmar Warning fixing some bugs
|
||||||
|
and adding some features (temp. correction on resistors).
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Temperature correction on rc,rb,re
|
||||||
|
- Parallel Multiplier
|
||||||
|
- Temperature difference from circuit temperature
|
||||||
|
- Different area parameters for collector, base and emitter
|
||||||
|
|
||||||
|
VBIC - Bipolar Junction Transistor
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: Q
|
||||||
|
Level: 4
|
||||||
|
Dir: devices/vbic
|
||||||
|
Status:
|
||||||
|
|
||||||
|
This is the Vertical Bipolar InterCompany model.
|
||||||
|
The author of VBIC is Colin McAndrew mcandrew@ieee.org
|
||||||
|
Spice3 Implementation: Dietmar Warning DAnalyse GmbH
|
||||||
|
warning@danalyse.de
|
||||||
|
Web Site:
|
||||||
|
http://www.designers-guide.com/VBIC/index.html
|
||||||
|
|
||||||
|
Notes: This is the 4 terminals model, without excess phase
|
||||||
|
and thermal network.
|
||||||
|
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
***************************** FET Devices ***************************
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
JFET - Junction Field Effect transistor
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: J
|
||||||
|
Level: 1
|
||||||
|
Dir: devices/jfet
|
||||||
|
Status:
|
||||||
|
|
||||||
|
This is the original spice JFET model.
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Alan Gillespie's modified diode model
|
||||||
|
- Parallel multiplier
|
||||||
|
- Instance temperature as difference for circuit temperature
|
||||||
|
|
||||||
|
JFET2 - Junction Field Effect Transistor (PS model)
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: J
|
||||||
|
Level: 2
|
||||||
|
Dir: devices/jfet2
|
||||||
|
Status:
|
||||||
|
|
||||||
|
This is the Parker Skellern model for MESFETs.
|
||||||
|
|
||||||
|
Web Site:
|
||||||
|
http://www.elec.mq.edu.au/cnerf/models/psmodel/
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel multiplier
|
||||||
|
- Instance temperature as difference for circuit temperature
|
||||||
|
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
*************************** HFET devices ***************************
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
Added code from macspice3f4 HFET1&2 and MESA model
|
||||||
|
Original note:
|
||||||
|
Added device calls for Mesfet models and HFET models
|
||||||
|
provided by Trond Ytterdal as of Nov 98
|
||||||
|
|
||||||
|
HFET1 - Heterostructure Field Effect Transistor Level 1
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: Z
|
||||||
|
Level: 5
|
||||||
|
Dir: devices/hfet1
|
||||||
|
Status:
|
||||||
|
|
||||||
|
This is the Heterostructure Field Effect Transistor model from:
|
||||||
|
K. Lee, M. Shur, T. A. Fjeldly and T. Ytterdal
|
||||||
|
"Semiconductor Device Modeling in VLSI",
|
||||||
|
1993, Prentice Hall, New Jersey
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel multiplier
|
||||||
|
- Instance temperature as difference for circuit temperature
|
||||||
|
- Added pole-zero analysis
|
||||||
|
|
||||||
|
|
||||||
|
HFET2 - Heterostructure Field Effect Transistor Level 2
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: Z
|
||||||
|
Level: 6
|
||||||
|
Dir: devices/hfet2
|
||||||
|
Status:
|
||||||
|
|
||||||
|
Simplified version of hfet1
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel multiplier
|
||||||
|
- Instance temperature as difference for circuit temperature
|
||||||
|
- Added pole-zero analysis
|
||||||
|
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
*************************** MES devices ***************************
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
MES - MESFET model
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: Z
|
||||||
|
Level: 1
|
||||||
|
Dir: devices/mes
|
||||||
|
Status:
|
||||||
|
|
||||||
|
This is the original spice3 MESFET model (Statz).
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel multiplier
|
||||||
|
- Alan Gillespie junction diodes implementation
|
||||||
|
|
||||||
|
|
||||||
|
Added code from macspice3f4 HFET1&2 and MESA model
|
||||||
|
Original note:
|
||||||
|
Added device calls for Mesfet models and HFET models
|
||||||
|
provided by Trond Ytterdal as of Nov 98
|
||||||
|
|
||||||
|
MESA - MESFET model (MacSpice3f4)
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: Z
|
||||||
|
Level: 2,3,4
|
||||||
|
Dir: devices/mesa
|
||||||
|
Status:
|
||||||
|
|
||||||
|
This is a multilevel model. It contains code for mesa levels
|
||||||
|
2,3 and 4
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel multiplier
|
||||||
|
- Instance temperature as difference from circuit temperature
|
||||||
|
- Added pole-zero analysis
|
||||||
|
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
**************************** MOS devices ****************************
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
MOS1 - Level 1 MOS model
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: M
|
||||||
|
Level: 1
|
||||||
|
Dir: devices/mos1
|
||||||
|
Status:
|
||||||
|
|
||||||
|
This is the so-called Schichman-Hodges model.
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel multiplier
|
||||||
|
- Temperature difference from circuit temperature
|
||||||
|
|
||||||
|
|
||||||
|
MOS2 - Level 2 MOS model
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: M
|
||||||
|
Level: 2
|
||||||
|
Dir: devices/mos2
|
||||||
|
Status:
|
||||||
|
|
||||||
|
This is the so-called Grove-Frohman model.
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel multiplier
|
||||||
|
- Temperature difference from circuit temperature
|
||||||
|
|
||||||
|
|
||||||
|
MOS3 - Level 3 MOS model
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: M
|
||||||
|
Level: 3
|
||||||
|
Dir: devices/mos3
|
||||||
|
Status:
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel multiplier
|
||||||
|
- Temperature difference from circuit temperature
|
||||||
|
|
||||||
|
|
||||||
|
MOS6 - Level 6 MOS model
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: M
|
||||||
|
Level: 6
|
||||||
|
Dir: devices/mos6
|
||||||
|
Status:
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel multiplier
|
||||||
|
- Temperature difference from circuit temperature
|
||||||
|
|
||||||
|
|
||||||
|
MOS9 - Level 9 MOS model
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: M
|
||||||
|
Level: 9
|
||||||
|
Dir: devices/mos9
|
||||||
|
Status:
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Temperature difference from circuit temperature
|
||||||
|
|
||||||
|
|
||||||
|
BSIM1 - BSIM model level 1
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: M
|
||||||
|
Level: 4
|
||||||
|
Dir: devices/bsim1
|
||||||
|
Status:
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel multiplier
|
||||||
|
- Noise analysis
|
||||||
|
|
||||||
|
BUGS:
|
||||||
|
Distortion analysis probably does not
|
||||||
|
work with "parallel" devices. Equations
|
||||||
|
are too intricate to deal with. Any one
|
||||||
|
has ideas on the subject ?
|
||||||
|
|
||||||
|
|
||||||
|
BSIM2 - BSIM model level 2
|
||||||
|
Initial Release.
|
||||||
|
Ver: N/A
|
||||||
|
Class: M
|
||||||
|
Level: 5
|
||||||
|
Dir: devices/bsim2
|
||||||
|
Status:
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel multiplier
|
||||||
|
- Noise analysis
|
||||||
|
|
||||||
|
|
||||||
|
BSIM3v0 - BSIM model level 3
|
||||||
|
Initial Release.
|
||||||
|
Ver: 3.0
|
||||||
|
Class: M
|
||||||
|
Level: 52
|
||||||
|
Dir: devices/bsim3v0
|
||||||
|
Status: TO BE TESTED AND IMPROVED
|
||||||
|
|
||||||
|
|
||||||
|
BSIM3v0 - BSIM model level 3
|
||||||
|
Initial Release.
|
||||||
|
Ver: 3.0
|
||||||
|
Class: M
|
||||||
|
Level: 51
|
||||||
|
Dir: devices/bsim3v1a
|
||||||
|
Status: TO BE TESTED AND IMPROVED
|
||||||
|
|
||||||
|
This is the BSIM3v3.0 model modified by Alan Gillespie.
|
||||||
|
|
||||||
|
|
||||||
|
BSIM3v1 - BSIM model level 3
|
||||||
|
Initial Release.
|
||||||
|
Ver: 3.1
|
||||||
|
Class: M
|
||||||
|
Level: 50
|
||||||
|
Dir: devices/bsim3v1
|
||||||
|
Status: TO BE TESTED
|
||||||
|
|
||||||
|
|
||||||
|
BSIM3v1 - BSIM model level 3
|
||||||
|
Initial Release.
|
||||||
|
Ver: 3.1
|
||||||
|
Class: M
|
||||||
|
Level: 49
|
||||||
|
Dir: devices/bsim3v1s
|
||||||
|
Status: TO BE TESTED AND IMPROVED
|
||||||
|
|
||||||
|
This is the BSIM3v3.1 model modified by Serban Popescu.
|
||||||
|
This is level 49 model. It is an implementation that supports
|
||||||
|
"HDIF" and "M" parameters.
|
||||||
|
|
||||||
|
|
||||||
|
BSIM3 - BSIM model level 3
|
||||||
|
Initial Release.
|
||||||
|
Ver: 3.2.4
|
||||||
|
Class: M
|
||||||
|
Level: 8
|
||||||
|
Dir: devices/bsim3
|
||||||
|
Status: TO BE TESTED
|
||||||
|
|
||||||
|
This is the BSIM3v3.2.4 model from Berkeley device group.
|
||||||
|
You can find some test netlists with results for this model
|
||||||
|
on its web site.
|
||||||
|
|
||||||
|
Web site:
|
||||||
|
http://www-device.eecs.berkeley.edu/~bsim3
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel Multiplier
|
||||||
|
- ACM Area Calculation Method
|
||||||
|
- Multirevision code (supports all 3v3.2 minor revisions)
|
||||||
|
- NodesetFix
|
||||||
|
|
||||||
|
|
||||||
|
BSIM4 - BSIM model level 4 (0.18 um)
|
||||||
|
Initial Release.
|
||||||
|
Ver: 4.5.0
|
||||||
|
Class: M
|
||||||
|
Level: 14
|
||||||
|
Dir: devices/bsim4
|
||||||
|
Status: TO BE TESTED
|
||||||
|
|
||||||
|
This is the BSIM4 device model from Berkeley Device Group.
|
||||||
|
Test are available on its web site.
|
||||||
|
|
||||||
|
Web site:
|
||||||
|
http://www-device.eecs.berkeley.edu/~bsim3/bsim4.html
|
||||||
|
|
||||||
|
Updated to 4.5.0 YET UNTESTED.
|
||||||
|
|
||||||
|
|
||||||
|
HiSIM - Hiroshima-university STARC IGFET Model
|
||||||
|
Initial Release.
|
||||||
|
Ver: 1.2.0
|
||||||
|
Class: M
|
||||||
|
Level: 64
|
||||||
|
Dir: devices/hisim
|
||||||
|
Status:
|
||||||
|
|
||||||
|
This is the HiSIM model available from Hiroshima University
|
||||||
|
(Ultra-Small Device Engineering Laboratory)
|
||||||
|
|
||||||
|
Web site:
|
||||||
|
http://home.hiroshima-u.ac.jp/usdl/HiSIM.shtml
|
||||||
|
http://www.starc.or.jp/kaihatu/pdgr/hisim/index.html
|
||||||
|
|
||||||
|
Enhancements over the original model:
|
||||||
|
|
||||||
|
- Parallel Multiplier
|
||||||
|
- NodesetFix
|
||||||
|
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
***************************** SOI Devices ****************************
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
BSIM3SOI_FD - SOI model (fully depleted devices)
|
||||||
|
Initial Release.
|
||||||
|
Ver: 2.1
|
||||||
|
Class: M
|
||||||
|
Level: 55
|
||||||
|
Dir: devices/bsim3soi_fd
|
||||||
|
Status: TO BE TESTED.
|
||||||
|
|
||||||
|
FD model has been integrated.
|
||||||
|
There is a bsim3soifd directory under the test
|
||||||
|
hierarchy. Test circuits come from the bsim3soi
|
||||||
|
|
||||||
|
Web site at:
|
||||||
|
http://www-device.eecs.berkeley.edu/~bsimsoi
|
||||||
|
|
||||||
|
*) rework-14: removed #ifndef NEWCONV code.
|
||||||
|
|
||||||
|
|
||||||
|
BSIM3SOI_DD - SOI Model (dynamic depletion model)
|
||||||
|
Initial Release.
|
||||||
|
Ver: 2.1
|
||||||
|
Class: M
|
||||||
|
Level: 56
|
||||||
|
Dir: devices/bsim3soi_dd
|
||||||
|
Status: TO BE TESTED.
|
||||||
|
|
||||||
|
There is a bsim3soidd directory under the
|
||||||
|
test hierarchy. Test circuits come from bsim3soi
|
||||||
|
|
||||||
|
Web site at:
|
||||||
|
http://www-device.eecs.berkeley.edu/~bsimsoi
|
||||||
|
|
||||||
|
*) rework-14: removed #ifndef NEWCONV code.
|
||||||
|
|
||||||
|
|
||||||
|
BSIM3SOI_PD - SOI model (partially depleted devices)
|
||||||
|
Initial Release.
|
||||||
|
Ver: 2.2.1
|
||||||
|
Class: M
|
||||||
|
Level: 57
|
||||||
|
Dir: devices/bsim3soi_pd
|
||||||
|
Status: TO BE TESTED.
|
||||||
|
|
||||||
|
PD model has been integrated.
|
||||||
|
There is a bsim3soipd directory under the test
|
||||||
|
hierarchy. Test circuits come from the bsim3soi
|
||||||
|
|
||||||
|
Web site at:
|
||||||
|
http://www-device.eecs.berkeley.edu/~bsimsoi
|
||||||
|
|
||||||
|
*) rework-14: removed #ifndef NEWCONV code.
|
||||||
|
|
||||||
|
|
||||||
|
BSIMSOI - SOI model (partially/full depleted devices)
|
||||||
|
Initial Release.
|
||||||
|
Ver: 3.0
|
||||||
|
Class: M
|
||||||
|
Level: 58
|
||||||
|
Dir: devices/bsim3soi
|
||||||
|
Status: TO BE TESTED.
|
||||||
|
|
||||||
|
This is the newer version from Berkeley.
|
||||||
|
Usable for partially/full depleted devices.
|
||||||
|
|
||||||
|
Web site at:
|
||||||
|
http://www-device.eecs.berkeley.edu/~bsimsoi
|
||||||
|
|
||||||
|
|
||||||
|
SOI3 - STAG SOI3 Model
|
||||||
|
Initial Release.
|
||||||
|
Ver: 2.6
|
||||||
|
Class: M
|
||||||
|
Level: 62
|
||||||
|
Dir: devices/soi3
|
||||||
|
Status: TO BE TESTED
|
||||||
|
|
||||||
|
Web site at:
|
||||||
|
http://www.micro.ecs.soton.ac.uk/stag/
|
||||||
|
|
||||||
|
|
||||||
|
***************************************************************************
|
||||||
|
**************** Other devices not released as source code ****************
|
||||||
|
***************************************************************************
|
||||||
|
|
||||||
|
EKV - EKV model
|
||||||
|
Initial Release.
|
||||||
|
Ver: 2.6
|
||||||
|
Class: M
|
||||||
|
Level: 44
|
||||||
|
Dir: devices/ekv
|
||||||
|
Status: TO BE TESTED
|
||||||
|
|
||||||
|
Note: This model is not released in source code.
|
||||||
|
You have to obtain the source code from the address below.
|
||||||
|
|
||||||
|
Web site at:
|
||||||
|
http://legwww.epfl.ch/ekv/
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue