* Removed unnecessary 'register' keywords.
This commit is contained in:
parent
c166320d43
commit
9819983733
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@ -25,8 +25,8 @@ ASRCacLoad(GENmodel *inModel, CKTcircuit *ckt)
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* been precomputed and stored with the instance model.
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* been precomputed and stored with the instance model.
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*/
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*/
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register ASRCmodel *model = (ASRCmodel*)inModel;
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ASRCmodel *model = (ASRCmodel*)inModel;
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register ASRCinstance *here;
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ASRCinstance *here;
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int i, v_first, j;
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int i, v_first, j;
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double *derivs;
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double *derivs;
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double rhs;
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double rhs;
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@ -30,7 +30,7 @@ ASRCask(ckt,instPtr,which,value,select)
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IFvalue *value;
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IFvalue *value;
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IFvalue *select;
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IFvalue *select;
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{
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{
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register ASRCinstance *here = (ASRCinstance*)instPtr;
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ASRCinstance *here = (ASRCinstance*)instPtr;
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switch(which) {
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switch(which) {
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case ASRC_CURRENT:
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case ASRC_CURRENT:
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@ -15,8 +15,8 @@ ASRCconvTest( inModel, ckt)
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GENmodel *inModel;
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GENmodel *inModel;
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CKTcircuit *ckt;
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CKTcircuit *ckt;
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{
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{
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register ASRCmodel *model = (ASRCmodel *)inModel;
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ASRCmodel *model = (ASRCmodel *)inModel;
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register ASRCinstance *here;
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ASRCinstance *here;
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int i, node_num, branch;
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int i, node_num, branch;
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double diff;
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double diff;
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double prev;
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double prev;
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@ -20,7 +20,7 @@ ASRCdelete(model,name,fast)
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GENinstance **fast;
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GENinstance **fast;
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{
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{
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register ASRCinstance **instPtr = (ASRCinstance**)fast;
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ASRCinstance **instPtr = (ASRCinstance**)fast;
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ASRCmodel *modPtr = (ASRCmodel*)model;
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ASRCmodel *modPtr = (ASRCmodel*)model;
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ASRCinstance **prev = NULL;
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ASRCinstance **prev = NULL;
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@ -17,12 +17,12 @@ Author: 1987 Kanwar Jit Singh
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int
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int
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ASRCfindBr(ckt,inputModel,name)
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ASRCfindBr(ckt,inputModel,name)
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register CKTcircuit *ckt;
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CKTcircuit *ckt;
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GENmodel *inputModel;
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GENmodel *inputModel;
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register IFuid name;
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IFuid name;
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{
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{
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register ASRCinstance *here;
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ASRCinstance *here;
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register ASRCmodel *model = (ASRCmodel*)inputModel;
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ASRCmodel *model = (ASRCmodel*)inputModel;
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int error;
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int error;
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CKTnode *tmp;
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CKTnode *tmp;
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@ -27,8 +27,8 @@ CKTcircuit *ckt;
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* sparse matrix previously provided
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* sparse matrix previously provided
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*/
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*/
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register ASRCmodel *model = (ASRCmodel*)inModel;
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ASRCmodel *model = (ASRCmodel*)inModel;
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register ASRCinstance *here;
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ASRCinstance *here;
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int i, v_first, j, branch;
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int i, v_first, j, branch;
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int node_num;
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int node_num;
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int size;
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int size;
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@ -39,7 +39,7 @@ CKTcircuit *ckt;
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/* loop through all the instances of the model */
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/* loop through all the instances of the model */
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for (here = model->ASRCinstances; here != NULL ;
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for (here = model->ASRCinstances; here != NULL ;
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here=here->ASRCnextInstance)
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here=here->ASRCnextInstance)
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{
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{
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if (here->ASRCowner != ARCHme) continue;
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if (here->ASRCowner != ARCHme) continue;
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@ -49,13 +49,13 @@ CKTcircuit *ckt;
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v_first = 1;
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v_first = 1;
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i = here->ASRCtree->numVars;
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i = here->ASRCtree->numVars;
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if (asrc_nvals < i) {
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if (asrc_nvals < i) {
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if (asrc_nvals) {
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if (asrc_nvals) {
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FREE(asrc_vals);
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FREE(asrc_vals);
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FREE(asrc_derivs);
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FREE(asrc_derivs);
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}
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}
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asrc_nvals = i;
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asrc_nvals = i;
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asrc_vals = NEWN(double, i);
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asrc_vals = NEWN(double, i);
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asrc_derivs = NEWN(double, i);
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asrc_derivs = NEWN(double, i);
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}
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}
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j=0;
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j=0;
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@ -65,42 +65,21 @@ CKTcircuit *ckt;
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*/
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*/
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for( i=0; i < here->ASRCtree->numVars; i++){
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for( i=0; i < here->ASRCtree->numVars; i++){
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if( here->ASRCtree->varTypes[i] == IF_INSTANCE){
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if( here->ASRCtree->varTypes[i] == IF_INSTANCE){
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branch = CKTfndBranch(ckt,
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branch = CKTfndBranch(ckt,
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here->ASRCtree->vars[i].uValue);
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here->ASRCtree->vars[i].uValue);
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asrc_vals[i] = *(ckt->CKTrhsOld+branch);
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asrc_vals[i] = *(ckt->CKTrhsOld+branch);
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} else {
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} else {
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node_num = ((CKTnode *)(here->ASRCtree->vars[i].
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node_num = ((CKTnode *)(here->ASRCtree->vars[i].
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nValue))->number;
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nValue))->number;
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asrc_vals[i] = *(ckt->CKTrhsOld+node_num);
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asrc_vals[i] = *(ckt->CKTrhsOld+node_num);
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}
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}
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}
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}
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if ((*(here->ASRCtree->IFeval))(here->ASRCtree,ckt->CKTgmin, &rhs,
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if ((*(here->ASRCtree->IFeval))(here->ASRCtree,ckt->CKTgmin, &rhs,
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asrc_vals,asrc_derivs) == OK)
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asrc_vals,asrc_derivs) == OK)
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{
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{
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/* The convergence test */
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/* The convergence test */
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if ( (ckt->CKTmode & MODEINITFIX) ||
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(ckt->CKTmode & MODEINITFLOAT) )
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{
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#ifndef NEWCONV
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prev = here->ASRCprev_value;
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diff = fabs( prev - rhs);
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if ( here->ASRCtype == ASRC_VOLTAGE) {
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tol = ckt->CKTreltol *
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MAX(fabs(rhs),fabs(prev)) + ckt->CKTvoltTol;
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} else {
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tol = ckt->CKTreltol *
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MAX(fabs(rhs),fabs(prev)) + ckt->CKTabstol;
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}
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if ( diff > tol) {
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ckt->CKTnoncon++;
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ckt->CKTtroubleElt = (GENinstance *) here;
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}
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#endif /* NEWCONV */
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}
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here->ASRCprev_value = rhs;
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here->ASRCprev_value = rhs;
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/* The ac load precomputation and storage */
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/* The ac load precomputation and storage */
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@ -109,7 +88,7 @@ CKTcircuit *ckt;
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size = (here->ASRCtree->numVars)+1 ;
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size = (here->ASRCtree->numVars)+1 ;
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here->ASRCacValues = NEWN(double, size);
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here->ASRCacValues = NEWN(double, size);
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for ( i = 0; i < here->ASRCtree->numVars; i++){
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for ( i = 0; i < here->ASRCtree->numVars; i++){
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here->ASRCacValues[i] = asrc_derivs[i];
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here->ASRCacValues[i] = asrc_derivs[i];
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}
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}
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}
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}
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@ -21,11 +21,11 @@ ASRCmDelete(modList,modname,killModel)
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{
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{
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register ASRCmodel **model = (ASRCmodel**)modList;
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ASRCmodel **model = (ASRCmodel**)modList;
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register ASRCmodel *modfast = (ASRCmodel*)killModel;
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ASRCmodel *modfast = (ASRCmodel*)killModel;
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register ASRCinstance *here;
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ASRCinstance *here;
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register ASRCinstance *prev = NULL;
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ASRCinstance *prev = NULL;
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register ASRCmodel **oldmod;
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ASRCmodel **oldmod;
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oldmod = model;
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oldmod = model;
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for( ; *model ; model = &((*model)->ASRCnextModel)) {
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for( ; *model ; model = &((*model)->ASRCnextModel)) {
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if( (*model)->ASRCmodName == modname ||
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if( (*model)->ASRCmodName == modname ||
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@ -22,7 +22,7 @@ ASRCparam(param,value,fast,select)
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GENinstance *fast;
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GENinstance *fast;
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IFvalue *select;
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IFvalue *select;
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{
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{
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register ASRCinstance *here = (ASRCinstance*)fast;
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ASRCinstance *here = (ASRCinstance*)fast;
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switch(param) {
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switch(param) {
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case ASRC_VOLTAGE:
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case ASRC_VOLTAGE:
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here->ASRCtype = ASRC_VOLTAGE;
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here->ASRCtype = ASRC_VOLTAGE;
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@ -23,8 +23,8 @@ ASRCpzLoad(inModel,ckt,s)
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* sparse matrix previously provided
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* sparse matrix previously provided
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*/
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*/
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{
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{
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register ASRCmodel *model = (ASRCmodel*)inModel;
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ASRCmodel *model = (ASRCmodel*)inModel;
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register ASRCinstance *here;
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ASRCinstance *here;
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double value;
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double value;
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int i, v_first, j, branch;
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int i, v_first, j, branch;
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int node_num;
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int node_num;
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@ -17,17 +17,17 @@ Author: 1987 Kanwar Jit Singh
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/*ARGSUSED*/
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/*ARGSUSED*/
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int
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int
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ASRCsetup(matrix,inModel,ckt,states)
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ASRCsetup(matrix,inModel,ckt,states)
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register SMPmatrix *matrix;
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SMPmatrix *matrix;
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GENmodel *inModel;
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GENmodel *inModel;
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register CKTcircuit *ckt;
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CKTcircuit *ckt;
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int *states;
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int *states;
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/* load the voltage source structure with those
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/* load the voltage source structure with those
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* pointers needed later for fast matrix loading
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* pointers needed later for fast matrix loading
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*/
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*/
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{
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{
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register ASRCinstance *here;
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ASRCinstance *here;
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register ASRCmodel *model = (ASRCmodel*)inModel;
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ASRCmodel *model = (ASRCmodel*)inModel;
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int error, i, j;
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int error, i, j;
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int v_first;
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int v_first;
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CKTnode *tmp;
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CKTnode *tmp;
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@ -18,12 +18,12 @@ Author: 1985 Thomas L. Quarles
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int
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int
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BJTacLoad(inModel,ckt)
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BJTacLoad(inModel,ckt)
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register GENmodel *inModel;
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GENmodel *inModel;
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CKTcircuit *ckt;
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CKTcircuit *ckt;
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{
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{
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register BJTinstance *here;
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BJTinstance *here;
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register BJTmodel *model = (BJTmodel*)inModel;
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BJTmodel *model = (BJTmodel*)inModel;
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double gcpr;
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double gcpr;
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double gepr;
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double gepr;
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double gpi;
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double gpi;
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@ -18,11 +18,11 @@ Author: 1985 Thomas L. Quarles
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int
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int
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BJTconvTest(inModel,ckt)
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BJTconvTest(inModel,ckt)
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GENmodel *inModel;
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GENmodel *inModel;
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register CKTcircuit *ckt;
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CKTcircuit *ckt;
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{
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{
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register BJTinstance *here;
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BJTinstance *here;
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register BJTmodel *model = (BJTmodel *) inModel;
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BJTmodel *model = (BJTmodel *) inModel;
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double tol;
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double tol;
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double cc;
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double cc;
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double cchat;
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double cchat;
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@ -17,7 +17,7 @@ Author: 1988 Jaijeet S Roychowdhury
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* the correct value
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* the correct value
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*/
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*/
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int
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int
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BJTdisto(int mode, GENmodel *genmodel, register CKTcircuit *ckt)
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BJTdisto(int mode, GENmodel *genmodel, CKTcircuit *ckt)
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{
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{
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BJTmodel *model = (BJTmodel *) genmodel;
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BJTmodel *model = (BJTmodel *) genmodel;
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DISTOAN* job = (DISTOAN*) ckt->CKTcurJob;
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DISTOAN* job = (DISTOAN*) ckt->CKTcurJob;
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@ -39,7 +39,7 @@ BJTdisto(int mode, GENmodel *genmodel, register CKTcircuit *ckt)
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double r2h1m2y,i2h1m2y;
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double r2h1m2y,i2h1m2y;
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double r2h1m2z, i2h1m2z;
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double r2h1m2z, i2h1m2z;
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double temp, itemp;
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double temp, itemp;
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register BJTinstance *here;
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BJTinstance *here;
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#ifdef DISTODEBUG
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#ifdef DISTODEBUG
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double time;
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double time;
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#endif
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#endif
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@ -23,8 +23,8 @@ Author: 1988 Jaijeet S Roychowdhury
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int
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int
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BJTdSetup(GENmodel *inModel, CKTcircuit *ckt)
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BJTdSetup(GENmodel *inModel, CKTcircuit *ckt)
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{
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{
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register BJTmodel *model = (BJTmodel*)inModel;
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BJTmodel *model = (BJTmodel*)inModel;
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register BJTinstance *here;
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BJTinstance *here;
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double arg;
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double arg;
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double c2;
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double c2;
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double c4;
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double c4;
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@ -21,12 +21,12 @@ Author: 1985 Thomas L. Quarles
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int
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int
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BJTgetic(inModel,ckt)
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BJTgetic(inModel,ckt)
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GENmodel *inModel;
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GENmodel *inModel;
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register CKTcircuit *ckt;
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CKTcircuit *ckt;
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{
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{
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BJTmodel *model = (BJTmodel*)inModel;
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BJTmodel *model = (BJTmodel*)inModel;
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register BJTinstance *here;
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BJTinstance *here;
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/*
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/*
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* grab initial conditions out of rhs array. User specified, so use
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* grab initial conditions out of rhs array. User specified, so use
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* external nodes to get values
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* external nodes to get values
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@ -22,13 +22,13 @@ int
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BJTload(inModel,ckt)
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BJTload(inModel,ckt)
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GENmodel *inModel;
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GENmodel *inModel;
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register CKTcircuit *ckt;
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CKTcircuit *ckt;
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/* actually load the current resistance value into the
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/* actually load the current resistance value into the
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* sparse matrix previously provided
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* sparse matrix previously provided
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*/
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*/
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{
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{
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register BJTmodel *model = (BJTmodel*)inModel;
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BJTmodel *model = (BJTmodel*)inModel;
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register BJTinstance *here;
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BJTinstance *here;
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double arg1;
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double arg1;
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double arg2;
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double arg2;
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double arg3;
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double arg3;
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@ -313,7 +313,7 @@ BJTload(inModel,ckt)
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cbhat= *(ckt->CKTstate0 + here->BJTcb)+ *(ckt->CKTstate0 +
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cbhat= *(ckt->CKTstate0 + here->BJTcb)+ *(ckt->CKTstate0 +
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here->BJTgpi)*delvbe+ *(ckt->CKTstate0 + here->BJTgmu)*
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here->BJTgpi)*delvbe+ *(ckt->CKTstate0 + here->BJTgmu)*
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delvbc;
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delvbc;
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#ifndef NOBYPASS
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/*
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/*
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* bypass if solution has not changed
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* bypass if solution has not changed
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*/
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*/
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@ -354,7 +354,7 @@ BJTload(inModel,ckt)
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geqbx = *(ckt->CKTstate0 + here->BJTgeqbx);
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geqbx = *(ckt->CKTstate0 + here->BJTgeqbx);
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goto load;
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goto load;
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}
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}
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#endif /*NOBYPASS*/
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/*
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/*
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* limit nonlinear branch voltages
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* limit nonlinear branch voltages
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*/
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*/
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@ -652,21 +652,6 @@ next1: vtn=vt*model->BJTemissionCoeffF;
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if (icheck == 1) {
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if (icheck == 1) {
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ckt->CKTnoncon++;
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ckt->CKTnoncon++;
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ckt->CKTtroubleElt = (GENinstance *) here;
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ckt->CKTtroubleElt = (GENinstance *) here;
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#ifndef NEWCONV
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} else {
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tol=ckt->CKTreltol*MAX(fabs(cchat),fabs(cc))+ckt->CKTabstol;
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|
||||||
if (fabs(cchat-cc) > tol) {
|
|
||||||
ckt->CKTnoncon++;
|
|
||||||
ckt->CKTtroubleElt = (GENinstance *) here;
|
|
||||||
} else {
|
|
||||||
tol=ckt->CKTreltol*MAX(fabs(cbhat),fabs(cb))+
|
|
||||||
ckt->CKTabstol;
|
|
||||||
if (fabs(cbhat-cb) > tol) {
|
|
||||||
ckt->CKTnoncon++;
|
|
||||||
ckt->CKTtroubleElt = (GENinstance *) here;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif /* NEWCONV */
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -30,12 +30,12 @@ BJTnoise (mode, operation, genmodel, ckt, data, OnDens)
|
||||||
int mode;
|
int mode;
|
||||||
int operation;
|
int operation;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register Ndata *data;
|
Ndata *data;
|
||||||
double *OnDens;
|
double *OnDens;
|
||||||
{
|
{
|
||||||
BJTmodel *firstModel = (BJTmodel *) genmodel;
|
BJTmodel *firstModel = (BJTmodel *) genmodel;
|
||||||
register BJTmodel *model;
|
BJTmodel *model;
|
||||||
register BJTinstance *inst;
|
BJTinstance *inst;
|
||||||
char name[N_MXVLNTH];
|
char name[N_MXVLNTH];
|
||||||
double tempOnoise;
|
double tempOnoise;
|
||||||
double tempInoise;
|
double tempInoise;
|
||||||
|
|
|
||||||
|
|
@ -27,7 +27,7 @@ BJTparam(param,value,instPtr,select)
|
||||||
GENinstance *instPtr;
|
GENinstance *instPtr;
|
||||||
IFvalue *select;
|
IFvalue *select;
|
||||||
{
|
{
|
||||||
register BJTinstance *here = (BJTinstance*)instPtr;
|
BJTinstance *here = (BJTinstance*)instPtr;
|
||||||
|
|
||||||
switch(param) {
|
switch(param) {
|
||||||
case BJT_AREA:
|
case BJT_AREA:
|
||||||
|
|
|
||||||
|
|
@ -17,12 +17,12 @@ Author: 1985 Thomas L. Quarles
|
||||||
int
|
int
|
||||||
BJTpzLoad(inModel,ckt,s)
|
BJTpzLoad(inModel,ckt,s)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register SPcomplex *s;
|
SPcomplex *s;
|
||||||
|
|
||||||
{
|
{
|
||||||
register BJTmodel *model = (BJTmodel*)inModel;
|
BJTmodel *model = (BJTmodel*)inModel;
|
||||||
register BJTinstance *here;
|
BJTinstance *here;
|
||||||
double gcpr;
|
double gcpr;
|
||||||
double gepr;
|
double gepr;
|
||||||
double gpi;
|
double gpi;
|
||||||
|
|
|
||||||
|
|
@ -25,8 +25,8 @@ CKTcircuit *ckt;
|
||||||
|
|
||||||
{
|
{
|
||||||
|
|
||||||
register BJTmodel *model = (BJTmodel*)inModel;
|
BJTmodel *model = (BJTmodel*)inModel;
|
||||||
register BJTinstance *here;
|
BJTinstance *here;
|
||||||
double SaveState[25];
|
double SaveState[25];
|
||||||
int error;
|
int error;
|
||||||
int flag;
|
int flag;
|
||||||
|
|
|
||||||
|
|
@ -22,7 +22,7 @@ Author: 1985 Thomas L. Quarles
|
||||||
|
|
||||||
int
|
int
|
||||||
BJTsetup(matrix,inModel,ckt,states)
|
BJTsetup(matrix,inModel,ckt,states)
|
||||||
register SMPmatrix *matrix;
|
SMPmatrix *matrix;
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
int *states;
|
int *states;
|
||||||
|
|
@ -31,8 +31,8 @@ BJTsetup(matrix,inModel,ckt,states)
|
||||||
*/
|
*/
|
||||||
|
|
||||||
{
|
{
|
||||||
register BJTmodel *model = (BJTmodel*)inModel;
|
BJTmodel *model = (BJTmodel*)inModel;
|
||||||
register BJTinstance *here;
|
BJTinstance *here;
|
||||||
int error;
|
int error;
|
||||||
CKTnode *tmp;
|
CKTnode *tmp;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -23,8 +23,8 @@ BJTsLoad(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BJTmodel *model = (BJTmodel*)inModel;
|
BJTmodel *model = (BJTmodel*)inModel;
|
||||||
register BJTinstance *here;
|
BJTinstance *here;
|
||||||
double SaveState0[27];
|
double SaveState0[27];
|
||||||
int i;
|
int i;
|
||||||
int iparmno;
|
int iparmno;
|
||||||
|
|
|
||||||
|
|
@ -21,11 +21,11 @@ Author: 1985 Thomas L. Quarles
|
||||||
void
|
void
|
||||||
BJTsPrint(inModel,ckt)
|
BJTsPrint(inModel,ckt)
|
||||||
|
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
{
|
{
|
||||||
register BJTmodel *model = (BJTmodel*)inModel;
|
BJTmodel *model = (BJTmodel*)inModel;
|
||||||
register BJTinstance *here;
|
BJTinstance *here;
|
||||||
|
|
||||||
printf("BJTS-----------------\n");
|
printf("BJTS-----------------\n");
|
||||||
/* loop through all the BJT models */
|
/* loop through all the BJT models */
|
||||||
|
|
|
||||||
|
|
@ -20,11 +20,11 @@ Author: 1985 Thomas L. Quarles
|
||||||
|
|
||||||
int
|
int
|
||||||
BJTsSetup(info,inModel)
|
BJTsSetup(info,inModel)
|
||||||
register SENstruct *info;
|
SENstruct *info;
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
{
|
{
|
||||||
register BJTmodel *model = (BJTmodel*)inModel;
|
BJTmodel *model = (BJTmodel*)inModel;
|
||||||
register BJTinstance *here;
|
BJTinstance *here;
|
||||||
|
|
||||||
#ifdef STEPDEBUG
|
#ifdef STEPDEBUG
|
||||||
printf(" BJTsensetup \n");
|
printf(" BJTsensetup \n");
|
||||||
|
|
|
||||||
|
|
@ -19,10 +19,10 @@ Author: 1985 Thomas L. Quarles
|
||||||
int
|
int
|
||||||
BJTsUpdate(inModel,ckt)
|
BJTsUpdate(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BJTmodel *model = (BJTmodel*)inModel;
|
BJTmodel *model = (BJTmodel*)inModel;
|
||||||
register BJTinstance *here;
|
BJTinstance *here;
|
||||||
int iparmno;
|
int iparmno;
|
||||||
double sb;
|
double sb;
|
||||||
double sbprm;
|
double sbprm;
|
||||||
|
|
|
||||||
|
|
@ -23,8 +23,8 @@ BJTtemp(inModel,ckt)
|
||||||
*/
|
*/
|
||||||
|
|
||||||
{
|
{
|
||||||
register BJTmodel *model = (BJTmodel *)inModel;
|
BJTmodel *model = (BJTmodel *)inModel;
|
||||||
register BJTinstance *here;
|
BJTinstance *here;
|
||||||
double xfc;
|
double xfc;
|
||||||
double vt;
|
double vt;
|
||||||
double ratlog;
|
double ratlog;
|
||||||
|
|
|
||||||
|
|
@ -21,12 +21,12 @@ Author: 1985 Thomas L. Quarles
|
||||||
int
|
int
|
||||||
BJTtrunc(inModel,ckt,timeStep)
|
BJTtrunc(inModel,ckt,timeStep)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
double *timeStep;
|
double *timeStep;
|
||||||
|
|
||||||
{
|
{
|
||||||
register BJTmodel *model = (BJTmodel*)inModel;
|
BJTmodel *model = (BJTmodel*)inModel;
|
||||||
register BJTinstance *here;
|
BJTinstance *here;
|
||||||
|
|
||||||
for( ; model != NULL; model = model->BJTnextModel) {
|
for( ; model != NULL; model = model->BJTnextModel) {
|
||||||
for(here=model->BJTinstances;here!=NULL;here = here->BJTnextInstance){
|
for(here=model->BJTinstances;here!=NULL;here = here->BJTnextInstance){
|
||||||
|
|
|
||||||
|
|
@ -16,10 +16,10 @@ Author: 1985 Hong J. Park, Thomas L. Quarles
|
||||||
int
|
int
|
||||||
B1acLoad(inModel,ckt)
|
B1acLoad(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register B1model *model = (B1model*)inModel;
|
B1model *model = (B1model*)inModel;
|
||||||
register B1instance *here;
|
B1instance *here;
|
||||||
int xnrm;
|
int xnrm;
|
||||||
int xrev;
|
int xrev;
|
||||||
double gdpr;
|
double gdpr;
|
||||||
|
|
|
||||||
|
|
@ -17,14 +17,14 @@ int
|
||||||
B1convTest(inModel,ckt)
|
B1convTest(inModel,ckt)
|
||||||
|
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
|
|
||||||
/* actually load the current value into the
|
/* actually load the current value into the
|
||||||
* sparse matrix previously provided
|
* sparse matrix previously provided
|
||||||
*/
|
*/
|
||||||
{
|
{
|
||||||
register B1model *model = (B1model*)inModel;
|
B1model *model = (B1model*)inModel;
|
||||||
register B1instance *here;
|
B1instance *here;
|
||||||
double cbd;
|
double cbd;
|
||||||
double cbhat;
|
double cbhat;
|
||||||
double cbs;
|
double cbs;
|
||||||
|
|
|
||||||
|
|
@ -14,7 +14,7 @@ Author: 1988 Jaijeet S Roychowdhury
|
||||||
int
|
int
|
||||||
B1disto(mode,genmodel,ckt)
|
B1disto(mode,genmodel,ckt)
|
||||||
GENmodel *genmodel;
|
GENmodel *genmodel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
int mode;
|
int mode;
|
||||||
|
|
||||||
/* assuming here that ckt->CKTomega has been initialised to
|
/* assuming here that ckt->CKTomega has been initialised to
|
||||||
|
|
@ -40,7 +40,7 @@ B1disto(mode,genmodel,ckt)
|
||||||
double r2h1m2y,i2h1m2y;
|
double r2h1m2y,i2h1m2y;
|
||||||
double r2h1m2z, i2h1m2z;
|
double r2h1m2z, i2h1m2z;
|
||||||
double temp, itemp;
|
double temp, itemp;
|
||||||
register B1instance *here;
|
B1instance *here;
|
||||||
|
|
||||||
if (mode == D_SETUP)
|
if (mode == D_SETUP)
|
||||||
return(B1dSetup(model,ckt));
|
return(B1dSetup(model,ckt));
|
||||||
|
|
|
||||||
|
|
@ -18,11 +18,11 @@ int
|
||||||
B1dSetup(inModel,ckt)
|
B1dSetup(inModel,ckt)
|
||||||
|
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
|
|
||||||
{
|
{
|
||||||
register B1model* model = (B1model*)inModel;
|
B1model* model = (B1model*)inModel;
|
||||||
register B1instance *here;
|
B1instance *here;
|
||||||
double DrainSatCurrent;
|
double DrainSatCurrent;
|
||||||
double EffectiveLength;
|
double EffectiveLength;
|
||||||
double GateBulkOverlapCap;
|
double GateBulkOverlapCap;
|
||||||
|
|
|
||||||
|
|
@ -21,9 +21,9 @@ B1evaluate(vds,vbs,vgs,here,model,gmPointer,gdsPointer,gmbsPointer,
|
||||||
cbgbPointer,cbdbPointer,cbsbPointer,cdgbPointer,cddbPointer,
|
cbgbPointer,cbdbPointer,cbsbPointer,cdgbPointer,cddbPointer,
|
||||||
cdsbPointer,cdrainPointer,vonPointer,vdsatPointer,ckt)
|
cdsbPointer,cdrainPointer,vonPointer,vdsatPointer,ckt)
|
||||||
|
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register B1model *model;
|
B1model *model;
|
||||||
register B1instance *here;
|
B1instance *here;
|
||||||
double vds;
|
double vds;
|
||||||
double vbs;
|
double vbs;
|
||||||
double vgs;
|
double vgs;
|
||||||
|
|
|
||||||
|
|
@ -17,14 +17,14 @@ int
|
||||||
B1load(inModel,ckt)
|
B1load(inModel,ckt)
|
||||||
|
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
|
|
||||||
/* actually load the current value into the
|
/* actually load the current value into the
|
||||||
* sparse matrix previously provided
|
* sparse matrix previously provided
|
||||||
*/
|
*/
|
||||||
{
|
{
|
||||||
register B1model *model = (B1model*)inModel;
|
B1model *model = (B1model*)inModel;
|
||||||
register B1instance *here;
|
B1instance *here;
|
||||||
double DrainSatCurrent = 0.0;
|
double DrainSatCurrent = 0.0;
|
||||||
double EffectiveLength = 0.0;
|
double EffectiveLength = 0.0;
|
||||||
double GateBulkOverlapCap = 0.0;
|
double GateBulkOverlapCap = 0.0;
|
||||||
|
|
@ -123,9 +123,7 @@ B1load(inModel,ckt)
|
||||||
double vt0 = 0.0;
|
double vt0 = 0.0;
|
||||||
double args[8];
|
double args[8];
|
||||||
int ByPass = 0;
|
int ByPass = 0;
|
||||||
#ifndef NOBYPASS
|
|
||||||
double tempv = 0.0;
|
double tempv = 0.0;
|
||||||
#endif /*NOBYPASS*/
|
|
||||||
int error = 0;
|
int error = 0;
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -280,7 +278,6 @@ B1load(inModel,ckt)
|
||||||
*(ckt->CKTstate0 + here->B1gbd) * delvbd +
|
*(ckt->CKTstate0 + here->B1gbd) * delvbd +
|
||||||
*(ckt->CKTstate0 + here->B1gbs) * delvbs ;
|
*(ckt->CKTstate0 + here->B1gbs) * delvbs ;
|
||||||
|
|
||||||
#ifndef NOBYPASS
|
|
||||||
/* now lets see if we can bypass (ugh) */
|
/* now lets see if we can bypass (ugh) */
|
||||||
|
|
||||||
/* following should be one big if connected by && all over
|
/* following should be one big if connected by && all over
|
||||||
|
|
@ -344,7 +341,6 @@ B1load(inModel,ckt)
|
||||||
goto line850;
|
goto line850;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#endif /*NOBYPASS*/
|
|
||||||
|
|
||||||
von = model->B1type * here->B1von;
|
von = model->B1type * here->B1von;
|
||||||
if(*(ckt->CKTstate0 + here->B1vds) >=0) {
|
if(*(ckt->CKTstate0 + here->B1vds) >=0) {
|
||||||
|
|
@ -495,21 +491,6 @@ B1load(inModel,ckt)
|
||||||
if (Check == 1) {
|
if (Check == 1) {
|
||||||
ckt->CKTnoncon++;
|
ckt->CKTnoncon++;
|
||||||
ckt->CKTtroubleElt = (GENinstance *) here;
|
ckt->CKTtroubleElt = (GENinstance *) here;
|
||||||
#ifndef NEWCONV
|
|
||||||
} else {
|
|
||||||
tol=ckt->CKTreltol*MAX(fabs(cdhat),fabs(cd))+ckt->CKTabstol;
|
|
||||||
if (fabs(cdhat-cd) >= tol) {
|
|
||||||
ckt->CKTnoncon++;
|
|
||||||
ckt->CKTtroubleElt = (GENinstance *) here;
|
|
||||||
} else {
|
|
||||||
tol=ckt->CKTreltol*MAX(fabs(cbhat),fabs(cbs+cbd))+
|
|
||||||
ckt->CKTabstol;
|
|
||||||
if (fabs(cbhat-(cbs+cbd)) > tol) {
|
|
||||||
ckt->CKTnoncon++;
|
|
||||||
ckt->CKTtroubleElt = (GENinstance *) here;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif /* NEWCONV */
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
*(ckt->CKTstate0 + here->B1vbs) = vbs;
|
*(ckt->CKTstate0 + here->B1vbs) = vbs;
|
||||||
|
|
|
||||||
|
|
@ -26,7 +26,7 @@ B1mosCap(ckt,vgd,vgs,vgb,
|
||||||
gcbsbPointer,gcdgbPointer,gcddbPointer,gcdsbPointer,
|
gcbsbPointer,gcdgbPointer,gcddbPointer,gcdsbPointer,
|
||||||
gcsgbPointer,gcsdbPointer,gcssbPointer,qGatePointer,qBulkPointer,
|
gcsgbPointer,gcsdbPointer,gcssbPointer,qGatePointer,qBulkPointer,
|
||||||
qDrainPointer,qSourcePointer)
|
qDrainPointer,qSourcePointer)
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
double vgd;
|
double vgd;
|
||||||
double vgs;
|
double vgs;
|
||||||
double vgb;
|
double vgb;
|
||||||
|
|
|
||||||
|
|
@ -17,11 +17,11 @@ Author: 1985 Thomas L. Quarles
|
||||||
int
|
int
|
||||||
B1pzLoad(inModel,ckt,s)
|
B1pzLoad(inModel,ckt,s)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register SPcomplex *s;
|
SPcomplex *s;
|
||||||
{
|
{
|
||||||
register B1model *model = (B1model*)inModel;
|
B1model *model = (B1model*)inModel;
|
||||||
register B1instance *here;
|
B1instance *here;
|
||||||
int xnrm;
|
int xnrm;
|
||||||
int xrev;
|
int xrev;
|
||||||
double gdpr;
|
double gdpr;
|
||||||
|
|
|
||||||
|
|
@ -14,17 +14,17 @@ Author: 1985 Hong J. Park, Thomas L. Quarles
|
||||||
|
|
||||||
int
|
int
|
||||||
B1setup(matrix,inModel,ckt,states)
|
B1setup(matrix,inModel,ckt,states)
|
||||||
register SMPmatrix *matrix;
|
SMPmatrix *matrix;
|
||||||
register GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
int *states;
|
int *states;
|
||||||
/* load the B1 device structure with those pointers needed later
|
/* load the B1 device structure with those pointers needed later
|
||||||
* for fast matrix loading
|
* for fast matrix loading
|
||||||
*/
|
*/
|
||||||
|
|
||||||
{
|
{
|
||||||
register B1model *model = (B1model*)inModel;
|
B1model *model = (B1model*)inModel;
|
||||||
register B1instance *here;
|
B1instance *here;
|
||||||
int error;
|
int error;
|
||||||
CKTnode *tmp;
|
CKTnode *tmp;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -22,8 +22,8 @@ B1temp(inModel,ckt)
|
||||||
*/
|
*/
|
||||||
|
|
||||||
{
|
{
|
||||||
register B1model *model = (B1model*) inModel;
|
B1model *model = (B1model*) inModel;
|
||||||
register B1instance *here;
|
B1instance *here;
|
||||||
double EffChanLength;
|
double EffChanLength;
|
||||||
double EffChanWidth;
|
double EffChanWidth;
|
||||||
double Cox;
|
double Cox;
|
||||||
|
|
|
||||||
|
|
@ -13,12 +13,12 @@ Author: 1985 Hong J. Park, Thomas L. Quarles
|
||||||
int
|
int
|
||||||
B1trunc(inModel,ckt,timeStep)
|
B1trunc(inModel,ckt,timeStep)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
double *timeStep;
|
double *timeStep;
|
||||||
|
|
||||||
{
|
{
|
||||||
register B1model *model = (B1model*)inModel;
|
B1model *model = (B1model*)inModel;
|
||||||
register B1instance *here;
|
B1instance *here;
|
||||||
#ifdef STEPDEBUG
|
#ifdef STEPDEBUG
|
||||||
double debugtemp;
|
double debugtemp;
|
||||||
#endif /* STEPDEBUG */
|
#endif /* STEPDEBUG */
|
||||||
|
|
|
||||||
|
|
@ -16,10 +16,10 @@ Author: 1985 Hong J. Park, Thomas L. Quarles
|
||||||
int
|
int
|
||||||
B2acLoad(inModel,ckt)
|
B2acLoad(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register B2model *model = (B2model*)inModel;
|
B2model *model = (B2model*)inModel;
|
||||||
register B2instance *here;
|
B2instance *here;
|
||||||
int xnrm;
|
int xnrm;
|
||||||
int xrev;
|
int xrev;
|
||||||
double gdpr;
|
double gdpr;
|
||||||
|
|
|
||||||
|
|
@ -17,14 +17,14 @@ int
|
||||||
B2convTest(inModel,ckt)
|
B2convTest(inModel,ckt)
|
||||||
|
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
|
|
||||||
/* actually load the current value into the
|
/* actually load the current value into the
|
||||||
* sparse matrix previously provided
|
* sparse matrix previously provided
|
||||||
*/
|
*/
|
||||||
{
|
{
|
||||||
register B2model *model = (B2model*)inModel;
|
B2model *model = (B2model*)inModel;
|
||||||
register B2instance *here;
|
B2instance *here;
|
||||||
double cbd;
|
double cbd;
|
||||||
double cbhat;
|
double cbhat;
|
||||||
double cbs;
|
double cbs;
|
||||||
|
|
|
||||||
|
|
@ -19,9 +19,9 @@ void
|
||||||
B2evaluate(Vds,Vbs,Vgs,here,model,gm,gds,gmb,qg,qb,qd,cgg,cgd,cgs,
|
B2evaluate(Vds,Vbs,Vgs,here,model,gm,gds,gmb,qg,qb,qd,cgg,cgd,cgs,
|
||||||
cbg,cbd,cbs,cdg,cdd,cds,Ids,von,vdsat,ckt)
|
cbg,cbd,cbs,cdg,cdd,cds,Ids,von,vdsat,ckt)
|
||||||
|
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register B2model *model;
|
B2model *model;
|
||||||
register B2instance *here;
|
B2instance *here;
|
||||||
double Vds,Vbs,Vgs;
|
double Vds,Vbs,Vgs;
|
||||||
double *gm,*gds,*gmb,*qg,*qb,*qd,*cgg,*cgd,*cgs,*cbg;
|
double *gm,*gds,*gmb,*qg,*qb,*qd,*cgg,*cgd,*cgs,*cbg;
|
||||||
double *cbd,*cbs,*cdg,*cdd,*cds,*Ids,*von,*vdsat;
|
double *cbd,*cbs,*cdg,*cdd,*cds,*Ids,*von,*vdsat;
|
||||||
|
|
|
||||||
|
|
@ -17,14 +17,14 @@ int
|
||||||
B2load(inModel,ckt)
|
B2load(inModel,ckt)
|
||||||
|
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
|
|
||||||
/* actually load the current value into the
|
/* actually load the current value into the
|
||||||
* sparse matrix previously provided
|
* sparse matrix previously provided
|
||||||
*/
|
*/
|
||||||
{
|
{
|
||||||
register B2model *model = (B2model*)inModel;
|
B2model *model = (B2model*)inModel;
|
||||||
register B2instance *here;
|
B2instance *here;
|
||||||
double DrainSatCurrent;
|
double DrainSatCurrent;
|
||||||
double EffectiveLength;
|
double EffectiveLength;
|
||||||
double GateBulkOverlapCap;
|
double GateBulkOverlapCap;
|
||||||
|
|
@ -123,9 +123,7 @@ B2load(inModel,ckt)
|
||||||
double vt0;
|
double vt0;
|
||||||
double args[7];
|
double args[7];
|
||||||
int ByPass;
|
int ByPass;
|
||||||
#ifndef NOBYPASS
|
|
||||||
double tempv;
|
double tempv;
|
||||||
#endif /*NOBYPASS*/
|
|
||||||
int error;
|
int error;
|
||||||
|
|
||||||
|
|
||||||
|
|
@ -280,7 +278,6 @@ B2load(inModel,ckt)
|
||||||
*(ckt->CKTstate0 + here->B2gbd) * delvbd +
|
*(ckt->CKTstate0 + here->B2gbd) * delvbd +
|
||||||
*(ckt->CKTstate0 + here->B2gbs) * delvbs ;
|
*(ckt->CKTstate0 + here->B2gbs) * delvbs ;
|
||||||
|
|
||||||
#ifndef NOBYPASS
|
|
||||||
/* now lets see if we can bypass (ugh) */
|
/* now lets see if we can bypass (ugh) */
|
||||||
|
|
||||||
/* following should be one big if connected by && all over
|
/* following should be one big if connected by && all over
|
||||||
|
|
@ -344,7 +341,6 @@ B2load(inModel,ckt)
|
||||||
goto line850;
|
goto line850;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#endif /*NOBYPASS*/
|
|
||||||
|
|
||||||
von = model->B2type * here->B2von;
|
von = model->B2type * here->B2von;
|
||||||
if(*(ckt->CKTstate0 + here->B2vds) >=0) {
|
if(*(ckt->CKTstate0 + here->B2vds) >=0) {
|
||||||
|
|
@ -496,21 +492,6 @@ B2load(inModel,ckt)
|
||||||
if (Check == 1) {
|
if (Check == 1) {
|
||||||
ckt->CKTnoncon++;
|
ckt->CKTnoncon++;
|
||||||
ckt->CKTtroubleElt = (GENinstance *) here;
|
ckt->CKTtroubleElt = (GENinstance *) here;
|
||||||
#ifndef NEWCONV
|
|
||||||
} else {
|
|
||||||
tol=ckt->CKTreltol*MAX(fabs(cdhat),fabs(cd))+ckt->CKTabstol;
|
|
||||||
if (fabs(cdhat-cd) >= tol) {
|
|
||||||
ckt->CKTnoncon++;
|
|
||||||
ckt->CKTtroubleElt = (GENinstance *) here;
|
|
||||||
} else {
|
|
||||||
tol=ckt->CKTreltol*MAX(fabs(cbhat),fabs(cbs+cbd))+
|
|
||||||
ckt->CKTabstol;
|
|
||||||
if (fabs(cbhat-(cbs+cbd)) > tol) {
|
|
||||||
ckt->CKTnoncon++;
|
|
||||||
ckt->CKTtroubleElt = (GENinstance *) here;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif /* NEWCONV */
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
*(ckt->CKTstate0 + here->B2vbs) = vbs;
|
*(ckt->CKTstate0 + here->B2vbs) = vbs;
|
||||||
|
|
|
||||||
|
|
@ -26,7 +26,7 @@ B2mosCap(ckt,vgd,vgs,vgb,
|
||||||
gcbsbPointer,gcdgbPointer,gcddbPointer,gcdsbPointer,
|
gcbsbPointer,gcdgbPointer,gcddbPointer,gcdsbPointer,
|
||||||
gcsgbPointer,gcsdbPointer,gcssbPointer,qGatePointer,qBulkPointer,
|
gcsgbPointer,gcsdbPointer,gcssbPointer,qGatePointer,qBulkPointer,
|
||||||
qDrainPointer,qSourcePointer)
|
qDrainPointer,qSourcePointer)
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
double vgd;
|
double vgd;
|
||||||
double vgs;
|
double vgs;
|
||||||
double vgb;
|
double vgb;
|
||||||
|
|
|
||||||
|
|
@ -17,11 +17,11 @@ Author: 1985 Thomas L. Quarles
|
||||||
int
|
int
|
||||||
B2pzLoad(inModel,ckt,s)
|
B2pzLoad(inModel,ckt,s)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register SPcomplex *s;
|
SPcomplex *s;
|
||||||
{
|
{
|
||||||
register B2model *model = (B2model*)inModel;
|
B2model *model = (B2model*)inModel;
|
||||||
register B2instance *here;
|
B2instance *here;
|
||||||
int xnrm;
|
int xnrm;
|
||||||
int xrev;
|
int xrev;
|
||||||
double gdpr;
|
double gdpr;
|
||||||
|
|
|
||||||
|
|
@ -14,17 +14,17 @@ Author: 1988 Min-Chie Jeng, Hong J. Park, Thomas L. Quarles
|
||||||
|
|
||||||
int
|
int
|
||||||
B2setup(matrix,inModel,ckt,states)
|
B2setup(matrix,inModel,ckt,states)
|
||||||
register SMPmatrix *matrix;
|
SMPmatrix *matrix;
|
||||||
register GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
int *states;
|
int *states;
|
||||||
/* load the B2 device structure with those pointers needed later
|
/* load the B2 device structure with those pointers needed later
|
||||||
* for fast matrix loading
|
* for fast matrix loading
|
||||||
*/
|
*/
|
||||||
|
|
||||||
{
|
{
|
||||||
register B2model *model = (B2model*)inModel;
|
B2model *model = (B2model*)inModel;
|
||||||
register B2instance *here;
|
B2instance *here;
|
||||||
int error;
|
int error;
|
||||||
CKTnode *tmp;
|
CKTnode *tmp;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -22,9 +22,9 @@ B2temp(inModel,ckt)
|
||||||
*/
|
*/
|
||||||
|
|
||||||
{
|
{
|
||||||
register B2model *model = (B2model*) inModel;
|
B2model *model = (B2model*) inModel;
|
||||||
register B2instance *here;
|
B2instance *here;
|
||||||
register struct bsim2SizeDependParam *pSizeDependParamKnot, *pLastKnot;
|
struct bsim2SizeDependParam *pSizeDependParamKnot, *pLastKnot;
|
||||||
double EffectiveLength;
|
double EffectiveLength;
|
||||||
double EffectiveWidth;
|
double EffectiveWidth;
|
||||||
double CoxWoverL, Inv_L, Inv_W, tmp;
|
double CoxWoverL, Inv_L, Inv_W, tmp;
|
||||||
|
|
|
||||||
|
|
@ -13,12 +13,12 @@ Author: 1985 Hong J. Park, Thomas L. Quarles
|
||||||
int
|
int
|
||||||
B2trunc(inModel,ckt,timeStep)
|
B2trunc(inModel,ckt,timeStep)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
double *timeStep;
|
double *timeStep;
|
||||||
|
|
||||||
{
|
{
|
||||||
register B2model *model = (B2model*)inModel;
|
B2model *model = (B2model*)inModel;
|
||||||
register B2instance *here;
|
B2instance *here;
|
||||||
#ifdef STEPDEBUG
|
#ifdef STEPDEBUG
|
||||||
double debugtemp;
|
double debugtemp;
|
||||||
#endif /* STEPDEBUG */
|
#endif /* STEPDEBUG */
|
||||||
|
|
|
||||||
|
|
@ -16,10 +16,10 @@ File: b3acld.c
|
||||||
int
|
int
|
||||||
BSIM3acLoad(inModel,ckt)
|
BSIM3acLoad(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM3model *model = (BSIM3model*)inModel;
|
BSIM3model *model = (BSIM3model*)inModel;
|
||||||
register BSIM3instance *here;
|
BSIM3instance *here;
|
||||||
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
|
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
|
||||||
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
|
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
|
||||||
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega;
|
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega;
|
||||||
|
|
|
||||||
|
|
@ -18,8 +18,8 @@ File: b3check.c
|
||||||
|
|
||||||
int
|
int
|
||||||
BSIM3checkModel(model, here, ckt)
|
BSIM3checkModel(model, here, ckt)
|
||||||
register BSIM3model *model;
|
BSIM3model *model;
|
||||||
register BSIM3instance *here;
|
BSIM3instance *here;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
struct bsim3SizeDependParam *pParam;
|
struct bsim3SizeDependParam *pParam;
|
||||||
|
|
|
||||||
|
|
@ -20,10 +20,10 @@ File: b3cvtest.c
|
||||||
int
|
int
|
||||||
BSIM3convTest(inModel,ckt)
|
BSIM3convTest(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM3model *model = (BSIM3model*)inModel;
|
BSIM3model *model = (BSIM3model*)inModel;
|
||||||
register BSIM3instance *here;
|
BSIM3instance *here;
|
||||||
double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds;
|
double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds;
|
||||||
double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;
|
double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -32,10 +32,10 @@ File: b3ld.c
|
||||||
int
|
int
|
||||||
BSIM3load(inModel,ckt)
|
BSIM3load(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM3model *model = (BSIM3model*)inModel;
|
BSIM3model *model = (BSIM3model*)inModel;
|
||||||
register BSIM3instance *here;
|
BSIM3instance *here;
|
||||||
double SourceSatCurrent, DrainSatCurrent;
|
double SourceSatCurrent, DrainSatCurrent;
|
||||||
double ag0, qgd, qgs, qgb, von, cbhat, VgstNVt, ExpVgst;
|
double ag0, qgd, qgs, qgb, von, cbhat, VgstNVt, ExpVgst;
|
||||||
double cdrain, cdhat, cdreq, ceqbd, ceqbs, ceqqb, ceqqd, ceqqg, ceq, geq;
|
double cdrain, cdhat, cdreq, ceqbd, ceqbs, ceqqb, ceqqd, ceqqg, ceq, geq;
|
||||||
|
|
@ -242,7 +242,6 @@ for (; model != NULL; model = model->BSIM3nextModel)
|
||||||
+ here->BSIM3gbds * delvds;
|
+ here->BSIM3gbds * delvds;
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifndef NOBYPASS
|
|
||||||
/* following should be one big if connected by && all over
|
/* following should be one big if connected by && all over
|
||||||
* the place, but some C compilers can't handle that, so
|
* the place, but some C compilers can't handle that, so
|
||||||
* we split it up here to let them digest it in stages
|
* we split it up here to let them digest it in stages
|
||||||
|
|
@ -287,7 +286,6 @@ for (; model != NULL; model = model->BSIM3nextModel)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /*NOBYPASS*/
|
|
||||||
von = here->BSIM3von;
|
von = here->BSIM3von;
|
||||||
if (*(ckt->CKTstate0 + here->BSIM3vds) >= 0.0)
|
if (*(ckt->CKTstate0 + here->BSIM3vds) >= 0.0)
|
||||||
{ vgs = DEVfetlim(vgs, *(ckt->CKTstate0+here->BSIM3vgs), von);
|
{ vgs = DEVfetlim(vgs, *(ckt->CKTstate0+here->BSIM3vgs), von);
|
||||||
|
|
@ -2296,29 +2294,6 @@ finished:
|
||||||
if ((here->BSIM3off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
if ((here->BSIM3off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
||||||
{ if (Check == 1)
|
{ if (Check == 1)
|
||||||
{ ckt->CKTnoncon++;
|
{ ckt->CKTnoncon++;
|
||||||
#ifndef NEWCONV
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{ if (here->BSIM3mode >= 0)
|
|
||||||
{ Idtot = here->BSIM3cd + here->BSIM3csub - here->BSIM3cbd;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{ Idtot = here->BSIM3cd - here->BSIM3cbd;
|
|
||||||
}
|
|
||||||
tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot))
|
|
||||||
+ ckt->CKTabstol;
|
|
||||||
if (fabs(cdhat - Idtot) >= tol)
|
|
||||||
{ ckt->CKTnoncon++;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{ Ibtot = here->BSIM3cbs + here->BSIM3cbd - here->BSIM3csub;
|
|
||||||
tol = ckt->CKTreltol * MAX(fabs(cbhat), fabs(Ibtot))
|
|
||||||
+ ckt->CKTabstol;
|
|
||||||
if (fabs(cbhat - Ibtot)) > tol)
|
|
||||||
{ ckt->CKTnoncon++;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif /* NEWCONV */
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
*(ckt->CKTstate0 + here->BSIM3vbs) = vbs;
|
*(ckt->CKTstate0 + here->BSIM3vbs) = vbs;
|
||||||
|
|
|
||||||
|
|
@ -97,11 +97,11 @@ BSIM3noise (mode, operation, inModel, ckt, data, OnDens)
|
||||||
int mode, operation;
|
int mode, operation;
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register Ndata *data;
|
Ndata *data;
|
||||||
double *OnDens;
|
double *OnDens;
|
||||||
{
|
{
|
||||||
register BSIM3model *model = (BSIM3model *)inModel;
|
BSIM3model *model = (BSIM3model *)inModel;
|
||||||
register BSIM3instance *here;
|
BSIM3instance *here;
|
||||||
struct bsim3SizeDependParam *pParam;
|
struct bsim3SizeDependParam *pParam;
|
||||||
char name[N_MXVLNTH];
|
char name[N_MXVLNTH];
|
||||||
double tempOnoise;
|
double tempOnoise;
|
||||||
|
|
|
||||||
|
|
@ -16,11 +16,11 @@ File: b3pzld.c
|
||||||
int
|
int
|
||||||
BSIM3pzLoad(inModel,ckt,s)
|
BSIM3pzLoad(inModel,ckt,s)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register SPcomplex *s;
|
SPcomplex *s;
|
||||||
{
|
{
|
||||||
register BSIM3model *model = (BSIM3model*)inModel;
|
BSIM3model *model = (BSIM3model*)inModel;
|
||||||
register BSIM3instance *here;
|
BSIM3instance *here;
|
||||||
double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb;
|
double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb;
|
||||||
double xcdgb, xcddb, xcdsb, xcdbb, xcsgb, xcsdb, xcssb, xcsbb;
|
double xcdgb, xcddb, xcdsb, xcdbb, xcsgb, xcsdb, xcssb, xcsbb;
|
||||||
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, FwdSum, RevSum, Gm, Gmbs;
|
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, FwdSum, RevSum, Gm, Gmbs;
|
||||||
|
|
|
||||||
|
|
@ -26,13 +26,13 @@ File: b3set.c
|
||||||
|
|
||||||
int
|
int
|
||||||
BSIM3setup(matrix,inModel,ckt,states)
|
BSIM3setup(matrix,inModel,ckt,states)
|
||||||
register SMPmatrix *matrix;
|
SMPmatrix *matrix;
|
||||||
register GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
int *states;
|
int *states;
|
||||||
{
|
{
|
||||||
register BSIM3model *model = (BSIM3model*)inModel;
|
BSIM3model *model = (BSIM3model*)inModel;
|
||||||
register BSIM3instance *here;
|
BSIM3instance *here;
|
||||||
int error;
|
int error;
|
||||||
CKTnode *tmp;
|
CKTnode *tmp;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -33,8 +33,8 @@ BSIM3temp(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM3model *model = (BSIM3model*) inModel;
|
BSIM3model *model = (BSIM3model*) inModel;
|
||||||
register BSIM3instance *here;
|
BSIM3instance *here;
|
||||||
struct bsim3SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam;
|
struct bsim3SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam;
|
||||||
double tmp, tmp1, tmp2, tmp3, Eg, Eg0, ni, T0, T1, T2, T3, T4, T5, Ldrn, Wdrn;
|
double tmp, tmp1, tmp2, tmp3, Eg, Eg0, ni, T0, T1, T2, T3, T4, T5, Ldrn, Wdrn;
|
||||||
double delTemp, Temp, TRatio, Inv_L, Inv_W, Inv_LW, Vtm0, Tnom;
|
double delTemp, Temp, TRatio, Inv_L, Inv_W, Inv_LW, Vtm0, Tnom;
|
||||||
|
|
|
||||||
|
|
@ -17,11 +17,11 @@ File: b3trunc.c
|
||||||
int
|
int
|
||||||
BSIM3trunc(inModel,ckt,timeStep)
|
BSIM3trunc(inModel,ckt,timeStep)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
double *timeStep;
|
double *timeStep;
|
||||||
{
|
{
|
||||||
register BSIM3model *model = (BSIM3model*)inModel;
|
BSIM3model *model = (BSIM3model*)inModel;
|
||||||
register BSIM3instance *here;
|
BSIM3instance *here;
|
||||||
|
|
||||||
#ifdef STEPDEBUG
|
#ifdef STEPDEBUG
|
||||||
double debugtemp;
|
double debugtemp;
|
||||||
|
|
|
||||||
|
|
@ -15,10 +15,10 @@ File: b3v1acld.c
|
||||||
int
|
int
|
||||||
BSIM3V1acLoad(inModel,ckt)
|
BSIM3V1acLoad(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM3V1model *model = (BSIM3V1model*)inModel;
|
BSIM3V1model *model = (BSIM3V1model*)inModel;
|
||||||
register BSIM3V1instance *here;
|
BSIM3V1instance *here;
|
||||||
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
|
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
|
||||||
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
|
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
|
||||||
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega;
|
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega;
|
||||||
|
|
|
||||||
|
|
@ -17,8 +17,8 @@ File: b3v1check.c
|
||||||
|
|
||||||
int
|
int
|
||||||
BSIM3V1checkModel(model, here, ckt)
|
BSIM3V1checkModel(model, here, ckt)
|
||||||
register BSIM3V1model *model;
|
BSIM3V1model *model;
|
||||||
register BSIM3V1instance *here;
|
BSIM3V1instance *here;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
struct bsim3v1SizeDependParam *pParam;
|
struct bsim3v1SizeDependParam *pParam;
|
||||||
|
|
|
||||||
|
|
@ -19,10 +19,10 @@ File: b3v1cvtest.c
|
||||||
int
|
int
|
||||||
BSIM3V1convTest(inModel,ckt)
|
BSIM3V1convTest(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM3V1model *model = (BSIM3V1model*)inModel;
|
BSIM3V1model *model = (BSIM3V1model*)inModel;
|
||||||
register BSIM3V1instance *here;
|
BSIM3V1instance *here;
|
||||||
double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds;
|
double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds;
|
||||||
double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;
|
double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -31,10 +31,10 @@ Modified by Mansun Chan (1995)
|
||||||
int
|
int
|
||||||
BSIM3V1load(inModel,ckt)
|
BSIM3V1load(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM3V1model *model = (BSIM3V1model*)inModel;
|
BSIM3V1model *model = (BSIM3V1model*)inModel;
|
||||||
register BSIM3V1instance *here;
|
BSIM3V1instance *here;
|
||||||
double SourceSatCurrent, DrainSatCurrent;
|
double SourceSatCurrent, DrainSatCurrent;
|
||||||
double ag0, qgd, qgs, qgb, von, cbhat, VgstNVt, ExpVgst;
|
double ag0, qgd, qgs, qgb, von, cbhat, VgstNVt, ExpVgst;
|
||||||
double cdrain, cdhat, cdreq, ceqbd, ceqbs, ceqqb, ceqqd, ceqqg, ceq, geq;
|
double cdrain, cdhat, cdreq, ceqbd, ceqbs, ceqqb, ceqqd, ceqqg, ceq, geq;
|
||||||
|
|
@ -225,7 +225,6 @@ for (; model != NULL; model = model->BSIM3V1nextModel)
|
||||||
cbhat = here->BSIM3V1cbs + here->BSIM3V1cbd + here->BSIM3V1gbd
|
cbhat = here->BSIM3V1cbs + here->BSIM3V1cbd + here->BSIM3V1gbd
|
||||||
* delvbd + here->BSIM3V1gbs * delvbs;
|
* delvbd + here->BSIM3V1gbs * delvbs;
|
||||||
|
|
||||||
#ifndef NOBYPASS
|
|
||||||
/* following should be one big if connected by && all over
|
/* following should be one big if connected by && all over
|
||||||
* the place, but some C compilers can't handle that, so
|
* the place, but some C compilers can't handle that, so
|
||||||
* we split it up here to let them digest it in stages
|
* we split it up here to let them digest it in stages
|
||||||
|
|
@ -270,7 +269,6 @@ for (; model != NULL; model = model->BSIM3V1nextModel)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /*NOBYPASS*/
|
|
||||||
von = here->BSIM3V1von;
|
von = here->BSIM3V1von;
|
||||||
if (*(ckt->CKTstate0 + here->BSIM3V1vds) >= 0.0)
|
if (*(ckt->CKTstate0 + here->BSIM3V1vds) >= 0.0)
|
||||||
{ vgs = DEVfetlim(vgs, *(ckt->CKTstate0+here->BSIM3V1vgs), von);
|
{ vgs = DEVfetlim(vgs, *(ckt->CKTstate0+here->BSIM3V1vgs), von);
|
||||||
|
|
@ -2028,24 +2026,6 @@ finished: /* returning Values to Calling Routine */
|
||||||
if ((here->BSIM3V1off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
if ((here->BSIM3V1off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
||||||
{ if (Check == 1)
|
{ if (Check == 1)
|
||||||
{ ckt->CKTnoncon++;
|
{ ckt->CKTnoncon++;
|
||||||
#ifndef NEWCONV
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{ tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(here->BSIM3V1cd))
|
|
||||||
+ ckt->CKTabstol;
|
|
||||||
if (fabs(cdhat - here->BSIM3V1cd) >= tol)
|
|
||||||
{ ckt->CKTnoncon++;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{ tol = ckt->CKTreltol * MAX(fabs(cbhat),
|
|
||||||
fabs(here->BSIM3V1cbs + here->BSIM3V1cbd))
|
|
||||||
+ ckt->CKTabstol;
|
|
||||||
if (fabs(cbhat - (here->BSIM3V1cbs + here->BSIM3V1cbd))
|
|
||||||
> tol)
|
|
||||||
{ ckt->CKTnoncon++;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif /* NEWCONV */
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
*(ckt->CKTstate0 + here->BSIM3V1vbs) = vbs;
|
*(ckt->CKTstate0 + here->BSIM3V1vbs) = vbs;
|
||||||
|
|
|
||||||
|
|
@ -97,11 +97,11 @@ BSIM3V1noise (mode, operation, inModel, ckt, data, OnDens)
|
||||||
int mode, operation;
|
int mode, operation;
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register Ndata *data;
|
Ndata *data;
|
||||||
double *OnDens;
|
double *OnDens;
|
||||||
{
|
{
|
||||||
register BSIM3V1model *model = (BSIM3V1model *)inModel;
|
BSIM3V1model *model = (BSIM3V1model *)inModel;
|
||||||
register BSIM3V1instance *here;
|
BSIM3V1instance *here;
|
||||||
struct bsim3v1SizeDependParam *pParam;
|
struct bsim3v1SizeDependParam *pParam;
|
||||||
char name[N_MXVLNTH];
|
char name[N_MXVLNTH];
|
||||||
double tempOnoise;
|
double tempOnoise;
|
||||||
|
|
|
||||||
|
|
@ -15,11 +15,11 @@ File: b3v1pzld.c
|
||||||
int
|
int
|
||||||
BSIM3V1pzLoad(inModel,ckt,s)
|
BSIM3V1pzLoad(inModel,ckt,s)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register SPcomplex *s;
|
SPcomplex *s;
|
||||||
{
|
{
|
||||||
register BSIM3V1model *model = (BSIM3V1model*)inModel;
|
BSIM3V1model *model = (BSIM3V1model*)inModel;
|
||||||
register BSIM3V1instance *here;
|
BSIM3V1instance *here;
|
||||||
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
|
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
|
||||||
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
|
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
|
||||||
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb;
|
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb;
|
||||||
|
|
|
||||||
|
|
@ -26,13 +26,13 @@ File: b3v1set.c
|
||||||
|
|
||||||
int
|
int
|
||||||
BSIM3V1setup(matrix,inModel,ckt,states)
|
BSIM3V1setup(matrix,inModel,ckt,states)
|
||||||
register SMPmatrix *matrix;
|
SMPmatrix *matrix;
|
||||||
register GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
int *states;
|
int *states;
|
||||||
{
|
{
|
||||||
register BSIM3V1model *model = (BSIM3V1model*)inModel;
|
BSIM3V1model *model = (BSIM3V1model*)inModel;
|
||||||
register BSIM3V1instance *here;
|
BSIM3V1instance *here;
|
||||||
int error;
|
int error;
|
||||||
CKTnode *tmp;
|
CKTnode *tmp;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -32,8 +32,8 @@ BSIM3V1temp(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM3V1model *model = (BSIM3V1model*) inModel;
|
BSIM3V1model *model = (BSIM3V1model*) inModel;
|
||||||
register BSIM3V1instance *here;
|
BSIM3V1instance *here;
|
||||||
struct bsim3v1SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam;
|
struct bsim3v1SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam;
|
||||||
double tmp1, tmp2, Eg, Eg0, ni, T0, T1, T2, T3, Ldrn, Wdrn;
|
double tmp1, tmp2, Eg, Eg0, ni, T0, T1, T2, T3, Ldrn, Wdrn;
|
||||||
double Temp, TRatio, Inv_L, Inv_W, Inv_LW, Vtm0, Tnom;
|
double Temp, TRatio, Inv_L, Inv_W, Inv_LW, Vtm0, Tnom;
|
||||||
|
|
|
||||||
|
|
@ -16,11 +16,11 @@ File: b3v1trunc.c
|
||||||
int
|
int
|
||||||
BSIM3V1trunc(inModel,ckt,timeStep)
|
BSIM3V1trunc(inModel,ckt,timeStep)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
double *timeStep;
|
double *timeStep;
|
||||||
{
|
{
|
||||||
register BSIM3V1model *model = (BSIM3V1model*)inModel;
|
BSIM3V1model *model = (BSIM3V1model*)inModel;
|
||||||
register BSIM3V1instance *here;
|
BSIM3V1instance *here;
|
||||||
|
|
||||||
#ifdef STEPDEBUG
|
#ifdef STEPDEBUG
|
||||||
double debugtemp;
|
double debugtemp;
|
||||||
|
|
|
||||||
|
|
@ -16,10 +16,10 @@ File: b3acld.c
|
||||||
int
|
int
|
||||||
BSIM3V2acLoad(inModel,ckt)
|
BSIM3V2acLoad(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM3V2model *model = (BSIM3V2model*)inModel;
|
BSIM3V2model *model = (BSIM3V2model*)inModel;
|
||||||
register BSIM3V2instance *here;
|
BSIM3V2instance *here;
|
||||||
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
|
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
|
||||||
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
|
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
|
||||||
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega;
|
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega;
|
||||||
|
|
|
||||||
|
|
@ -18,8 +18,8 @@ File: b3v2check.c
|
||||||
|
|
||||||
int
|
int
|
||||||
BSIM3V2checkModel(model, here, ckt)
|
BSIM3V2checkModel(model, here, ckt)
|
||||||
register BSIM3V2model *model;
|
BSIM3V2model *model;
|
||||||
register BSIM3V2instance *here;
|
BSIM3V2instance *here;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
struct BSIM3V2SizeDependParam *pParam;
|
struct BSIM3V2SizeDependParam *pParam;
|
||||||
|
|
|
||||||
|
|
@ -19,10 +19,10 @@ File: b3v2cvtest.c
|
||||||
int
|
int
|
||||||
BSIM3V2convTest(inModel,ckt)
|
BSIM3V2convTest(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM3V2model *model = (BSIM3V2model*)inModel;
|
BSIM3V2model *model = (BSIM3V2model*)inModel;
|
||||||
register BSIM3V2instance *here;
|
BSIM3V2instance *here;
|
||||||
double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds;
|
double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds;
|
||||||
double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;
|
double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -32,10 +32,10 @@ File: b3ld.c 1/3/92
|
||||||
int
|
int
|
||||||
BSIM3V2load(inModel,ckt)
|
BSIM3V2load(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM3V2model *model = (BSIM3V2model*)inModel;
|
BSIM3V2model *model = (BSIM3V2model*)inModel;
|
||||||
register BSIM3V2instance *here;
|
BSIM3V2instance *here;
|
||||||
double SourceSatCurrent, DrainSatCurrent;
|
double SourceSatCurrent, DrainSatCurrent;
|
||||||
double ag0, qgd, qgs, qgb, von, cbhat, VgstNVt, ExpVgst;
|
double ag0, qgd, qgs, qgb, von, cbhat, VgstNVt, ExpVgst;
|
||||||
double cdrain, cdhat, cdreq, ceqbd, ceqbs, ceqqb, ceqqd, ceqqg, ceq, geq;
|
double cdrain, cdhat, cdreq, ceqbd, ceqbs, ceqqb, ceqqd, ceqqg, ceq, geq;
|
||||||
|
|
@ -247,7 +247,6 @@ for (; model != NULL; model = model->BSIM3V2nextModel)
|
||||||
+ here->BSIM3V2gbds * delvds;
|
+ here->BSIM3V2gbds * delvds;
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifndef NOBYPASS
|
|
||||||
/* following should be one big if connected by && all over
|
/* following should be one big if connected by && all over
|
||||||
* the place, but some C compilers can't handle that, so
|
* the place, but some C compilers can't handle that, so
|
||||||
* we split it up here to let them digest it in stages
|
* we split it up here to let them digest it in stages
|
||||||
|
|
@ -292,7 +291,6 @@ for (; model != NULL; model = model->BSIM3V2nextModel)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /*NOBYPASS*/
|
|
||||||
von = here->BSIM3V2von;
|
von = here->BSIM3V2von;
|
||||||
if (*(ckt->CKTstate0 + here->BSIM3V2vds) >= 0.0)
|
if (*(ckt->CKTstate0 + here->BSIM3V2vds) >= 0.0)
|
||||||
{ vgs = DEVfetlim(vgs, *(ckt->CKTstate0+here->BSIM3V2vgs), von);
|
{ vgs = DEVfetlim(vgs, *(ckt->CKTstate0+here->BSIM3V2vgs), von);
|
||||||
|
|
@ -2291,32 +2289,9 @@ finished:
|
||||||
/*
|
/*
|
||||||
* check convergence
|
* check convergence
|
||||||
*/
|
*/
|
||||||
if ((here->BSIM3V2off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
if ((here->BSIM3V2off == 0) || (!(ckt->CKTmode & MODEINITFIX))) {
|
||||||
{ if (Check == 1)
|
if (Check == 1) {
|
||||||
{ ckt->CKTnoncon++;
|
ckt->CKTnoncon++;
|
||||||
#ifndef NEWCONV
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{ if (here->BSIM3V2mode >= 0)
|
|
||||||
{ Idtot = here->BSIM3V2cd + here->BSIM3V2csub - here->BSIM3V2cbd;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{ Idtot = here->BSIM3V2cd - here->BSIM3V2cbd;
|
|
||||||
}
|
|
||||||
tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot))
|
|
||||||
+ ckt->CKTabstol;
|
|
||||||
if (fabs(cdhat - Idtot) >= tol)
|
|
||||||
{ ckt->CKTnoncon++;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{ Ibtot = here->BSIM3V2cbs + here->BSIM3V2cbd - here->BSIM3V2csub;
|
|
||||||
tol = ckt->CKTreltol * MAX(fabs(cbhat), fabs(Ibtot))
|
|
||||||
+ ckt->CKTabstol;
|
|
||||||
if (fabs(cbhat - Ibtot)) > tol)
|
|
||||||
{ ckt->CKTnoncon++;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif /* NEWCONV */
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
*(ckt->CKTstate0 + here->BSIM3V2vbs) = vbs;
|
*(ckt->CKTstate0 + here->BSIM3V2vbs) = vbs;
|
||||||
|
|
|
||||||
|
|
@ -96,11 +96,11 @@ BSIM3V2noise (mode, operation, inModel, ckt, data, OnDens)
|
||||||
int mode, operation;
|
int mode, operation;
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register Ndata *data;
|
Ndata *data;
|
||||||
double *OnDens;
|
double *OnDens;
|
||||||
{
|
{
|
||||||
register BSIM3V2model *model = (BSIM3V2model *)inModel;
|
BSIM3V2model *model = (BSIM3V2model *)inModel;
|
||||||
register BSIM3V2instance *here;
|
BSIM3V2instance *here;
|
||||||
struct BSIM3V2SizeDependParam *pParam;
|
struct BSIM3V2SizeDependParam *pParam;
|
||||||
char name[N_MXVLNTH];
|
char name[N_MXVLNTH];
|
||||||
double tempOnoise;
|
double tempOnoise;
|
||||||
|
|
|
||||||
|
|
@ -16,11 +16,11 @@ File: b3v2pzld.c
|
||||||
int
|
int
|
||||||
BSIM3V2pzLoad(inModel,ckt,s)
|
BSIM3V2pzLoad(inModel,ckt,s)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register SPcomplex *s;
|
SPcomplex *s;
|
||||||
{
|
{
|
||||||
register BSIM3V2model *model = (BSIM3V2model*)inModel;
|
BSIM3V2model *model = (BSIM3V2model*)inModel;
|
||||||
register BSIM3V2instance *here;
|
BSIM3V2instance *here;
|
||||||
double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb;
|
double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb;
|
||||||
double xcdgb, xcddb, xcdsb, xcdbb, xcsgb, xcsdb, xcssb, xcsbb;
|
double xcdgb, xcddb, xcdsb, xcdbb, xcsgb, xcsdb, xcssb, xcsbb;
|
||||||
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, FwdSum, RevSum, Gm, Gmbs;
|
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, FwdSum, RevSum, Gm, Gmbs;
|
||||||
|
|
|
||||||
|
|
@ -27,13 +27,13 @@ File: b3v2set.c
|
||||||
|
|
||||||
int
|
int
|
||||||
BSIM3V2setup(matrix,inModel,ckt,states)
|
BSIM3V2setup(matrix,inModel,ckt,states)
|
||||||
register SMPmatrix *matrix;
|
SMPmatrix *matrix;
|
||||||
register GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
int *states;
|
int *states;
|
||||||
{
|
{
|
||||||
register BSIM3V2model *model = (BSIM3V2model*)inModel;
|
BSIM3V2model *model = (BSIM3V2model*)inModel;
|
||||||
register BSIM3V2instance *here;
|
BSIM3V2instance *here;
|
||||||
int error;
|
int error;
|
||||||
CKTnode *tmp;
|
CKTnode *tmp;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -33,8 +33,8 @@ BSIM3V2temp(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM3V2model *model = (BSIM3V2model*) inModel;
|
BSIM3V2model *model = (BSIM3V2model*) inModel;
|
||||||
register BSIM3V2instance *here;
|
BSIM3V2instance *here;
|
||||||
struct BSIM3V2SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam;
|
struct BSIM3V2SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam;
|
||||||
double tmp, tmp1, tmp2, tmp3, Eg, Eg0, ni, T0, T1, T2, T3, T4, T5, Ldrn, Wdrn;
|
double tmp, tmp1, tmp2, tmp3, Eg, Eg0, ni, T0, T1, T2, T3, T4, T5, Ldrn, Wdrn;
|
||||||
double delTemp, Temp, TRatio, Inv_L, Inv_W, Inv_LW, Dw, Dl, Vtm0, Tnom;
|
double delTemp, Temp, TRatio, Inv_L, Inv_W, Inv_LW, Dw, Dl, Vtm0, Tnom;
|
||||||
|
|
|
||||||
|
|
@ -16,11 +16,11 @@ File: b3v2trunc.c
|
||||||
int
|
int
|
||||||
BSIM3V2trunc(inModel,ckt,timeStep)
|
BSIM3V2trunc(inModel,ckt,timeStep)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
double *timeStep;
|
double *timeStep;
|
||||||
{
|
{
|
||||||
register BSIM3V2model *model = (BSIM3V2model*)inModel;
|
BSIM3V2model *model = (BSIM3V2model*)inModel;
|
||||||
register BSIM3V2instance *here;
|
BSIM3V2instance *here;
|
||||||
|
|
||||||
#ifdef STEPDEBUG
|
#ifdef STEPDEBUG
|
||||||
double debugtemp;
|
double debugtemp;
|
||||||
|
|
|
||||||
|
|
@ -17,10 +17,10 @@
|
||||||
int
|
int
|
||||||
BSIM4acLoad(inModel,ckt)
|
BSIM4acLoad(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM4model *model = (BSIM4model*)inModel;
|
BSIM4model *model = (BSIM4model*)inModel;
|
||||||
register BSIM4instance *here;
|
BSIM4instance *here;
|
||||||
|
|
||||||
double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb;
|
double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb;
|
||||||
double xcbgb, xcbdb, xcbsb, xcbbb;
|
double xcbgb, xcbdb, xcbsb, xcbbb;
|
||||||
|
|
|
||||||
|
|
@ -20,8 +20,8 @@
|
||||||
|
|
||||||
int
|
int
|
||||||
BSIM4checkModel(model, here, ckt)
|
BSIM4checkModel(model, here, ckt)
|
||||||
register BSIM4model *model;
|
BSIM4model *model;
|
||||||
register BSIM4instance *here;
|
BSIM4instance *here;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
struct bsim4SizeDependParam *pParam;
|
struct bsim4SizeDependParam *pParam;
|
||||||
|
|
|
||||||
|
|
@ -21,10 +21,10 @@
|
||||||
int
|
int
|
||||||
BSIM4convTest(inModel,ckt)
|
BSIM4convTest(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM4model *model = (BSIM4model*)inModel;
|
BSIM4model *model = (BSIM4model*)inModel;
|
||||||
register BSIM4instance *here;
|
BSIM4instance *here;
|
||||||
double delvbd, delvbs, delvds, delvgd, delvgs;
|
double delvbd, delvbs, delvds, delvgd, delvgs;
|
||||||
double delvdbd, delvsbs;
|
double delvdbd, delvsbs;
|
||||||
double delvbd_jct, delvbs_jct;
|
double delvbd_jct, delvbs_jct;
|
||||||
|
|
|
||||||
|
|
@ -32,10 +32,10 @@
|
||||||
int
|
int
|
||||||
BSIM4load(inModel,ckt)
|
BSIM4load(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM4model *model = (BSIM4model*)inModel;
|
BSIM4model *model = (BSIM4model*)inModel;
|
||||||
register BSIM4instance *here;
|
BSIM4instance *here;
|
||||||
|
|
||||||
double ceqgstot, dgstot_dvd, dgstot_dvg, dgstot_dvs, dgstot_dvb;
|
double ceqgstot, dgstot_dvd, dgstot_dvg, dgstot_dvs, dgstot_dvb;
|
||||||
double ceqgdtot, dgdtot_dvd, dgdtot_dvg, dgdtot_dvs, dgdtot_dvb;
|
double ceqgdtot, dgdtot_dvd, dgdtot_dvg, dgdtot_dvs, dgdtot_dvb;
|
||||||
|
|
@ -423,7 +423,6 @@ for (; model != NULL; model = model->BSIM4nextModel)
|
||||||
+ here->BSIM4gdtotb * delvbs;
|
+ here->BSIM4gdtotb * delvbs;
|
||||||
|
|
||||||
|
|
||||||
#ifndef NOBYPASS
|
|
||||||
/* Following should be one IF statement, but some C compilers
|
/* Following should be one IF statement, but some C compilers
|
||||||
* can't handle that all at once, so we split it into several
|
* can't handle that all at once, so we split it into several
|
||||||
* successive IF's */
|
* successive IF's */
|
||||||
|
|
@ -515,7 +514,6 @@ for (; model != NULL; model = model->BSIM4nextModel)
|
||||||
else
|
else
|
||||||
goto line850;
|
goto line850;
|
||||||
}
|
}
|
||||||
#endif /*NOBYPASS*/
|
|
||||||
|
|
||||||
von = here->BSIM4von;
|
von = here->BSIM4von;
|
||||||
if (*(ckt->CKTstate0 + here->BSIM4vds) >= 0.0)
|
if (*(ckt->CKTstate0 + here->BSIM4vds) >= 0.0)
|
||||||
|
|
@ -3254,46 +3252,6 @@ finished:
|
||||||
if ((here->BSIM4off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
if ((here->BSIM4off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
||||||
{ if (Check == 1)
|
{ if (Check == 1)
|
||||||
{ ckt->CKTnoncon++;
|
{ ckt->CKTnoncon++;
|
||||||
#ifndef NEWCONV
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{ if (here->BSIM4mode >= 0)
|
|
||||||
{ Idtot = here->BSIM4cd + here->BSIM4csub
|
|
||||||
+ here->BSIM4Igidl - here->BSIM4cbd;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{ Idtot = here->BSIM4cd + here->BSIM4cbd;
|
|
||||||
}
|
|
||||||
tol0 = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot))
|
|
||||||
+ ckt->CKTabstol;
|
|
||||||
tol1 = ckt->CKTreltol * MAX(fabs(cseshat), fabs(Isestot))
|
|
||||||
+ ckt->CKTabstol;
|
|
||||||
tol2 = ckt->CKTreltol * MAX(fabs(cdedhat), fabs(Idedtot))
|
|
||||||
+ ckt->CKTabstol;
|
|
||||||
tol3 = ckt->CKTreltol * MAX(fabs(cgshat), fabs(Igstot))
|
|
||||||
+ ckt->CKTabstol;
|
|
||||||
tol4 = ckt->CKTreltol * MAX(fabs(cgdhat), fabs(Igdtot))
|
|
||||||
+ ckt->CKTabstol;
|
|
||||||
tol5 = ckt->CKTreltol * MAX(fabs(cgbhat), fabs(Igbtot))
|
|
||||||
+ ckt->CKTabstol;
|
|
||||||
if ((fabs(cdhat - Idtot) >= tol0) || (fabs(cseshat - Isestot) >= tol1)
|
|
||||||
|| (fabs(cdedhat - Idedtot) >= tol2))
|
|
||||||
{ ckt->CKTnoncon++;
|
|
||||||
}
|
|
||||||
else if ((fabs(cgshat - Igstot) >= tol3) || (fabs(cgdhat - Igdtot) >= tol4)
|
|
||||||
|| (fabs(cgbhat - Igbtot) >= tol5))
|
|
||||||
{ ckt->CKTnoncon++;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{ Ibtot = here->BSIM4cbs + here->BSIM4cbd
|
|
||||||
- here->BSIM4Igidl - here->BSIM4csub;
|
|
||||||
tol6 = ckt->CKTreltol * MAX(fabs(cbhat), fabs(Ibtot))
|
|
||||||
+ ckt->CKTabstol;
|
|
||||||
if (fabs(cbhat - Ibtot) > tol6)
|
|
||||||
{ ckt->CKTnoncon++;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#endif /* NEWCONV */
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
*(ckt->CKTstate0 + here->BSIM4vds) = vds;
|
*(ckt->CKTstate0 + here->BSIM4vds) = vds;
|
||||||
|
|
|
||||||
|
|
@ -72,11 +72,11 @@ BSIM4noise (mode, operation, inModel, ckt, data, OnDens)
|
||||||
int mode, operation;
|
int mode, operation;
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register Ndata *data;
|
Ndata *data;
|
||||||
double *OnDens;
|
double *OnDens;
|
||||||
{
|
{
|
||||||
register BSIM4model *model = (BSIM4model *)inModel;
|
BSIM4model *model = (BSIM4model *)inModel;
|
||||||
register BSIM4instance *here;
|
BSIM4instance *here;
|
||||||
struct bsim4SizeDependParam *pParam;
|
struct bsim4SizeDependParam *pParam;
|
||||||
char name[N_MXVLNTH];
|
char name[N_MXVLNTH];
|
||||||
double tempOnoise;
|
double tempOnoise;
|
||||||
|
|
|
||||||
|
|
@ -18,11 +18,11 @@
|
||||||
int
|
int
|
||||||
BSIM4pzLoad(inModel,ckt,s)
|
BSIM4pzLoad(inModel,ckt,s)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register SPcomplex *s;
|
SPcomplex *s;
|
||||||
{
|
{
|
||||||
register BSIM4model *model = (BSIM4model*)inModel;
|
BSIM4model *model = (BSIM4model*)inModel;
|
||||||
register BSIM4instance *here;
|
BSIM4instance *here;
|
||||||
|
|
||||||
double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb;
|
double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb;
|
||||||
double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb;
|
double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb;
|
||||||
|
|
|
||||||
|
|
@ -27,13 +27,13 @@
|
||||||
|
|
||||||
int
|
int
|
||||||
BSIM4setup(matrix,inModel,ckt,states)
|
BSIM4setup(matrix,inModel,ckt,states)
|
||||||
register SMPmatrix *matrix;
|
SMPmatrix *matrix;
|
||||||
register GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
int *states;
|
int *states;
|
||||||
{
|
{
|
||||||
register BSIM4model *model = (BSIM4model*)inModel;
|
BSIM4model *model = (BSIM4model*)inModel;
|
||||||
register BSIM4instance *here;
|
BSIM4instance *here;
|
||||||
int error;
|
int error;
|
||||||
CKTnode *tmp;
|
CKTnode *tmp;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -47,8 +47,8 @@ BSIM4temp(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register BSIM4model *model = (BSIM4model*) inModel;
|
BSIM4model *model = (BSIM4model*) inModel;
|
||||||
register BSIM4instance *here;
|
BSIM4instance *here;
|
||||||
struct bsim4SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam;
|
struct bsim4SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam;
|
||||||
double tmp, tmp1, tmp2, tmp3, Eg, Eg0, ni;
|
double tmp, tmp1, tmp2, tmp3, Eg, Eg0, ni;
|
||||||
double T0, T1, T2, T3, T4, T5, T8, T9, Ldrn, Wdrn;
|
double T0, T1, T2, T3, T4, T5, T8, T9, Ldrn, Wdrn;
|
||||||
|
|
|
||||||
|
|
@ -18,11 +18,11 @@
|
||||||
int
|
int
|
||||||
BSIM4trunc(inModel,ckt,timeStep)
|
BSIM4trunc(inModel,ckt,timeStep)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
double *timeStep;
|
double *timeStep;
|
||||||
{
|
{
|
||||||
register BSIM4model *model = (BSIM4model*)inModel;
|
BSIM4model *model = (BSIM4model*)inModel;
|
||||||
register BSIM4instance *here;
|
BSIM4instance *here;
|
||||||
|
|
||||||
#ifdef STEPDEBUG
|
#ifdef STEPDEBUG
|
||||||
double debugtemp;
|
double debugtemp;
|
||||||
|
|
|
||||||
|
|
@ -16,12 +16,12 @@ Author: 1985 Thomas L. Quarles
|
||||||
int
|
int
|
||||||
CAPacLoad(inModel,ckt)
|
CAPacLoad(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
|
|
||||||
{
|
{
|
||||||
register CAPmodel *model = (CAPmodel*)inModel;
|
CAPmodel *model = (CAPmodel*)inModel;
|
||||||
double val;
|
double val;
|
||||||
register CAPinstance *here;
|
CAPinstance *here;
|
||||||
|
|
||||||
for( ; model != NULL; model = model->CAPnextModel) {
|
for( ; model != NULL; model = model->CAPnextModel) {
|
||||||
for( here = model->CAPinstances;here != NULL;
|
for( here = model->CAPinstances;here != NULL;
|
||||||
|
|
|
||||||
|
|
@ -15,14 +15,14 @@ int
|
||||||
CAPload(inModel,ckt)
|
CAPload(inModel,ckt)
|
||||||
|
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
/* actually load the current capacitance value into the
|
/* actually load the current capacitance value into the
|
||||||
* sparse matrix previously provided
|
* sparse matrix previously provided
|
||||||
*/
|
*/
|
||||||
{
|
{
|
||||||
register CAPmodel *model = (CAPmodel*)inModel;
|
CAPmodel *model = (CAPmodel*)inModel;
|
||||||
register CAPinstance *here;
|
CAPinstance *here;
|
||||||
register int cond1;
|
int cond1;
|
||||||
double vcap;
|
double vcap;
|
||||||
double geq;
|
double geq;
|
||||||
double ceq;
|
double ceq;
|
||||||
|
|
|
||||||
|
|
@ -19,12 +19,12 @@ int
|
||||||
CAPpzLoad(inModel,ckt,s)
|
CAPpzLoad(inModel,ckt,s)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register SPcomplex *s;
|
SPcomplex *s;
|
||||||
|
|
||||||
{
|
{
|
||||||
register CAPmodel *model = (CAPmodel*)inModel;
|
CAPmodel *model = (CAPmodel*)inModel;
|
||||||
double val;
|
double val;
|
||||||
register CAPinstance *here;
|
CAPinstance *here;
|
||||||
|
|
||||||
for( ; model != NULL; model = model->CAPnextModel) {
|
for( ; model != NULL; model = model->CAPnextModel) {
|
||||||
for( here = model->CAPinstances;here != NULL;
|
for( here = model->CAPinstances;here != NULL;
|
||||||
|
|
|
||||||
|
|
@ -22,11 +22,11 @@ int
|
||||||
CAPsAcLoad(inModel,ckt)
|
CAPsAcLoad(inModel,ckt)
|
||||||
|
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
|
|
||||||
{
|
{
|
||||||
register CAPmodel *model = (CAPmodel*)inModel;
|
CAPmodel *model = (CAPmodel*)inModel;
|
||||||
register CAPinstance *here;
|
CAPinstance *here;
|
||||||
double vcap;
|
double vcap;
|
||||||
double ivcap;
|
double ivcap;
|
||||||
double val;
|
double val;
|
||||||
|
|
|
||||||
|
|
@ -16,7 +16,7 @@ Author: 1985 Thomas L. Quarles
|
||||||
/*ARGSUSED*/
|
/*ARGSUSED*/
|
||||||
int
|
int
|
||||||
CAPsetup(matrix,inModel,ckt,states)
|
CAPsetup(matrix,inModel,ckt,states)
|
||||||
register SMPmatrix *matrix;
|
SMPmatrix *matrix;
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
int *states;
|
int *states;
|
||||||
|
|
@ -25,8 +25,8 @@ CAPsetup(matrix,inModel,ckt,states)
|
||||||
*/
|
*/
|
||||||
|
|
||||||
{
|
{
|
||||||
register CAPmodel *model = (CAPmodel*)inModel;
|
CAPmodel *model = (CAPmodel*)inModel;
|
||||||
register CAPinstance *here;
|
CAPinstance *here;
|
||||||
|
|
||||||
/* loop through all the capacitor models */
|
/* loop through all the capacitor models */
|
||||||
for( ; model != NULL; model = model->CAPnextModel ) {
|
for( ; model != NULL; model = model->CAPnextModel ) {
|
||||||
|
|
|
||||||
|
|
@ -21,10 +21,10 @@ Author: 1985 Thomas L. Quarles
|
||||||
int
|
int
|
||||||
CAPsLoad(inModel,ckt)
|
CAPsLoad(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register CAPmodel *model = (CAPmodel*)inModel;
|
CAPmodel *model = (CAPmodel*)inModel;
|
||||||
register CAPinstance *here;
|
CAPinstance *here;
|
||||||
int iparmno;
|
int iparmno;
|
||||||
double vcap;
|
double vcap;
|
||||||
double Osxp;
|
double Osxp;
|
||||||
|
|
|
||||||
|
|
@ -21,10 +21,10 @@ Author: 1985 Thomas L. Quarles
|
||||||
void
|
void
|
||||||
CAPsPrint(inModel,ckt)
|
CAPsPrint(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register CAPmodel *model = (CAPmodel*)inModel;
|
CAPmodel *model = (CAPmodel*)inModel;
|
||||||
register CAPinstance *here;
|
CAPinstance *here;
|
||||||
|
|
||||||
printf("CAPACITORS-----------------\n");
|
printf("CAPACITORS-----------------\n");
|
||||||
/* loop through all the capacitor models */
|
/* loop through all the capacitor models */
|
||||||
|
|
|
||||||
|
|
@ -20,12 +20,12 @@ Author: 1985 Thomas L. Quarles
|
||||||
|
|
||||||
int
|
int
|
||||||
CAPsSetup(info,inModel)
|
CAPsSetup(info,inModel)
|
||||||
register SENstruct *info;
|
SENstruct *info;
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
|
|
||||||
{
|
{
|
||||||
register CAPmodel *model = (CAPmodel*)inModel;
|
CAPmodel *model = (CAPmodel*)inModel;
|
||||||
register CAPinstance *here;
|
CAPinstance *here;
|
||||||
|
|
||||||
/* loop through all the capacitor models */
|
/* loop through all the capacitor models */
|
||||||
for( ; model != NULL; model = model->CAPnextModel ) {
|
for( ; model != NULL; model = model->CAPnextModel ) {
|
||||||
|
|
|
||||||
|
|
@ -19,10 +19,10 @@ Author: 1985 Thomas L. Quarles
|
||||||
int
|
int
|
||||||
CAPsUpdate(inModel,ckt)
|
CAPsUpdate(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register CAPmodel *model = (CAPmodel*)inModel;
|
CAPmodel *model = (CAPmodel*)inModel;
|
||||||
register CAPinstance *here;
|
CAPinstance *here;
|
||||||
int iparmno;
|
int iparmno;
|
||||||
double s1;
|
double s1;
|
||||||
double s2;
|
double s2;
|
||||||
|
|
|
||||||
|
|
@ -24,8 +24,8 @@ CAPtemp(inModel,ckt)
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
|
|
||||||
{
|
{
|
||||||
register CAPmodel *model = (CAPmodel*)inModel;
|
CAPmodel *model = (CAPmodel*)inModel;
|
||||||
register CAPinstance *here;
|
CAPinstance *here;
|
||||||
|
|
||||||
/* loop through all the capacitor models */
|
/* loop through all the capacitor models */
|
||||||
for( ; model != NULL; model = model->CAPnextModel ) {
|
for( ; model != NULL; model = model->CAPnextModel ) {
|
||||||
|
|
|
||||||
|
|
@ -16,11 +16,11 @@ Author: 1985 Thomas L. Quarles
|
||||||
int
|
int
|
||||||
CAPtrunc(inModel,ckt,timeStep)
|
CAPtrunc(inModel,ckt,timeStep)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
register double *timeStep;
|
double *timeStep;
|
||||||
{
|
{
|
||||||
register CAPmodel *model = (CAPmodel*)inModel;
|
CAPmodel *model = (CAPmodel*)inModel;
|
||||||
register CAPinstance *here;
|
CAPinstance *here;
|
||||||
|
|
||||||
for( ; model!= NULL; model = model->CAPnextModel) {
|
for( ; model!= NULL; model = model->CAPnextModel) {
|
||||||
for(here = model->CAPinstances ; here != NULL ;
|
for(here = model->CAPinstances ; here != NULL ;
|
||||||
|
|
|
||||||
|
|
@ -24,8 +24,8 @@ CCCSload(inModel,ckt)
|
||||||
* sparse matrix previously provided
|
* sparse matrix previously provided
|
||||||
*/
|
*/
|
||||||
{
|
{
|
||||||
register CCCSmodel *model = (CCCSmodel*)inModel;
|
CCCSmodel *model = (CCCSmodel*)inModel;
|
||||||
register CCCSinstance *here;
|
CCCSinstance *here;
|
||||||
|
|
||||||
/* loop through all the voltage source models */
|
/* loop through all the voltage source models */
|
||||||
for( ; model != NULL; model = model->CCCSnextModel ) {
|
for( ; model != NULL; model = model->CCCSnextModel ) {
|
||||||
|
|
|
||||||
|
|
@ -26,8 +26,8 @@ CCCSpzLoad(inModel,ckt,s)
|
||||||
* sparse matrix previously provided
|
* sparse matrix previously provided
|
||||||
*/
|
*/
|
||||||
{
|
{
|
||||||
register CCCSmodel *model = (CCCSmodel*)inModel;
|
CCCSmodel *model = (CCCSmodel*)inModel;
|
||||||
register CCCSinstance *here;
|
CCCSinstance *here;
|
||||||
|
|
||||||
/* loop through all the voltage source models */
|
/* loop through all the voltage source models */
|
||||||
for( ; model != NULL; model = model->CCCSnextModel ) {
|
for( ; model != NULL; model = model->CCCSnextModel ) {
|
||||||
|
|
|
||||||
|
|
@ -23,8 +23,8 @@ CCCSsAcLoad(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register CCCSmodel *model = (CCCSmodel*)inModel;
|
CCCSmodel *model = (CCCSmodel*)inModel;
|
||||||
register CCCSinstance *here;
|
CCCSinstance *here;
|
||||||
double ic;
|
double ic;
|
||||||
double i_ic;
|
double i_ic;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -21,13 +21,13 @@ Author: 1985 Thomas L. Quarles
|
||||||
/*ARGSUSED*/
|
/*ARGSUSED*/
|
||||||
int
|
int
|
||||||
CCCSsetup(matrix,inModel,ckt,states)
|
CCCSsetup(matrix,inModel,ckt,states)
|
||||||
register SMPmatrix *matrix;
|
SMPmatrix *matrix;
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
int *states;
|
int *states;
|
||||||
{
|
{
|
||||||
register CCCSmodel *model = (CCCSmodel*)inModel;
|
CCCSmodel *model = (CCCSmodel*)inModel;
|
||||||
register CCCSinstance *here;
|
CCCSinstance *here;
|
||||||
|
|
||||||
/* loop through all the voltage source models */
|
/* loop through all the voltage source models */
|
||||||
for( ; model != NULL; model = model->CCCSnextModel ) {
|
for( ; model != NULL; model = model->CCCSnextModel ) {
|
||||||
|
|
|
||||||
|
|
@ -23,8 +23,8 @@ CCCSsLoad(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register CCCSmodel *model = (CCCSmodel*)inModel;
|
CCCSmodel *model = (CCCSmodel*)inModel;
|
||||||
register CCCSinstance *here;
|
CCCSinstance *here;
|
||||||
double ic ;
|
double ic ;
|
||||||
|
|
||||||
/* loop through all the CCCS models */
|
/* loop through all the CCCS models */
|
||||||
|
|
|
||||||
|
|
@ -21,10 +21,10 @@ Author: 1985 Thomas L. Quarles
|
||||||
void
|
void
|
||||||
CCCSsPrint(inModel,ckt)
|
CCCSsPrint(inModel,ckt)
|
||||||
GENmodel *inModel;
|
GENmodel *inModel;
|
||||||
register CKTcircuit *ckt;
|
CKTcircuit *ckt;
|
||||||
{
|
{
|
||||||
register CCCSmodel *model = (CCCSmodel*)inModel;
|
CCCSmodel *model = (CCCSmodel*)inModel;
|
||||||
register CCCSinstance *here;
|
CCCSinstance *here;
|
||||||
|
|
||||||
printf("CURRENT CONTROLLED CURRENT SOURCES-----------------\n");
|
printf("CURRENT CONTROLLED CURRENT SOURCES-----------------\n");
|
||||||
/* loop through all the voltage source models */
|
/* loop through all the voltage source models */
|
||||||
|
|
|
||||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue