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* Removed unnecessary 'register' keywords.

This commit is contained in:
arno 2000-07-11 13:39:04 +00:00
parent c166320d43
commit 9819983733
271 changed files with 1069 additions and 1666 deletions
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4
src/spicelib/devices/asrc/asrcacld.c
View File

@ -25,8 +25,8 @@ ASRCacLoad(GENmodel *inModel, CKTcircuit *ckt)
* been precomputed and stored with the instance model.
*/
register ASRCmodel *model = (ASRCmodel*)inModel;
register ASRCinstance *here;
ASRCmodel *model = (ASRCmodel*)inModel;
ASRCinstance *here;
int i, v_first, j;
double *derivs;
double rhs;

2
src/spicelib/devices/asrc/asrcask.c
View File

@ -30,7 +30,7 @@ ASRCask(ckt,instPtr,which,value,select)
IFvalue *value;
IFvalue *select;
{
register ASRCinstance *here = (ASRCinstance*)instPtr;
ASRCinstance *here = (ASRCinstance*)instPtr;
switch(which) {
case ASRC_CURRENT:

4
src/spicelib/devices/asrc/asrcconv.c
View File

@ -15,8 +15,8 @@ ASRCconvTest( inModel, ckt)
GENmodel *inModel;
CKTcircuit *ckt;
{
register ASRCmodel *model = (ASRCmodel *)inModel;
register ASRCinstance *here;
ASRCmodel *model = (ASRCmodel *)inModel;
ASRCinstance *here;
int i, node_num, branch;
double diff;
double prev;

2
src/spicelib/devices/asrc/asrcdel.c
View File

@ -20,7 +20,7 @@ ASRCdelete(model,name,fast)
GENinstance **fast;
{
register ASRCinstance **instPtr = (ASRCinstance**)fast;
ASRCinstance **instPtr = (ASRCinstance**)fast;
ASRCmodel *modPtr = (ASRCmodel*)model;
ASRCinstance **prev = NULL;

8
src/spicelib/devices/asrc/asrcfbr.c
View File

@ -17,12 +17,12 @@ Author: 1987 Kanwar Jit Singh
int
ASRCfindBr(ckt,inputModel,name)
register CKTcircuit *ckt;
CKTcircuit *ckt;
GENmodel *inputModel;
register IFuid name;
IFuid name;
{
register ASRCinstance *here;
register ASRCmodel *model = (ASRCmodel*)inputModel;
ASRCinstance *here;
ASRCmodel *model = (ASRCmodel*)inputModel;
int error;
CKTnode *tmp;

57
src/spicelib/devices/asrc/asrcload.c
View File

@ -27,8 +27,8 @@ CKTcircuit *ckt;
* sparse matrix previously provided
*/
register ASRCmodel *model = (ASRCmodel*)inModel;
register ASRCinstance *here;
ASRCmodel *model = (ASRCmodel*)inModel;
ASRCinstance *here;
int i, v_first, j, branch;
int node_num;
int size;
@ -39,7 +39,7 @@ CKTcircuit *ckt;
/* loop through all the instances of the model */
for (here = model->ASRCinstances; here != NULL ;
here=here->ASRCnextInstance)
here=here->ASRCnextInstance)
{
if (here->ASRCowner != ARCHme) continue;
@ -49,13 +49,13 @@ CKTcircuit *ckt;
v_first = 1;
i = here->ASRCtree->numVars;
if (asrc_nvals < i) {
if (asrc_nvals) {
FREE(asrc_vals);
FREE(asrc_derivs);
}
asrc_nvals = i;
asrc_vals = NEWN(double, i);
asrc_derivs = NEWN(double, i);
if (asrc_nvals) {
FREE(asrc_vals);
FREE(asrc_derivs);
}
asrc_nvals = i;
asrc_vals = NEWN(double, i);
asrc_derivs = NEWN(double, i);
}
j=0;
@ -65,42 +65,21 @@ CKTcircuit *ckt;
*/
for( i=0; i < here->ASRCtree->numVars; i++){
if( here->ASRCtree->varTypes[i] == IF_INSTANCE){
branch = CKTfndBranch(ckt,
here->ASRCtree->vars[i].uValue);
asrc_vals[i] = *(ckt->CKTrhsOld+branch);
branch = CKTfndBranch(ckt,
here->ASRCtree->vars[i].uValue);
asrc_vals[i] = *(ckt->CKTrhsOld+branch);
} else {
node_num = ((CKTnode *)(here->ASRCtree->vars[i].
nValue))->number;
asrc_vals[i] = *(ckt->CKTrhsOld+node_num);
node_num = ((CKTnode *)(here->ASRCtree->vars[i].
nValue))->number;
asrc_vals[i] = *(ckt->CKTrhsOld+node_num);
}
}
if ((*(here->ASRCtree->IFeval))(here->ASRCtree,ckt->CKTgmin, &rhs,
asrc_vals,asrc_derivs) == OK)
asrc_vals,asrc_derivs) == OK)
{
/* The convergence test */
if ( (ckt->CKTmode & MODEINITFIX) ||
(ckt->CKTmode & MODEINITFLOAT) )
{
#ifndef NEWCONV
prev = here->ASRCprev_value;
diff = fabs( prev - rhs);
if ( here->ASRCtype == ASRC_VOLTAGE) {
tol = ckt->CKTreltol *
MAX(fabs(rhs),fabs(prev)) + ckt->CKTvoltTol;
} else {
tol = ckt->CKTreltol *
MAX(fabs(rhs),fabs(prev)) + ckt->CKTabstol;
}
if ( diff > tol) {
ckt->CKTnoncon++;
ckt->CKTtroubleElt = (GENinstance *) here;
}
#endif /* NEWCONV */
}
here->ASRCprev_value = rhs;
/* The ac load precomputation and storage */
@ -109,7 +88,7 @@ CKTcircuit *ckt;
size = (here->ASRCtree->numVars)+1 ;
here->ASRCacValues = NEWN(double, size);
for ( i = 0; i < here->ASRCtree->numVars; i++){
here->ASRCacValues[i] = asrc_derivs[i];
here->ASRCacValues[i] = asrc_derivs[i];
}
}

10
src/spicelib/devices/asrc/asrcmdel.c
View File

@ -21,11 +21,11 @@ ASRCmDelete(modList,modname,killModel)
{
register ASRCmodel **model = (ASRCmodel**)modList;
register ASRCmodel *modfast = (ASRCmodel*)killModel;
register ASRCinstance *here;
register ASRCinstance *prev = NULL;
register ASRCmodel **oldmod;
ASRCmodel **model = (ASRCmodel**)modList;
ASRCmodel *modfast = (ASRCmodel*)killModel;
ASRCinstance *here;
ASRCinstance *prev = NULL;
ASRCmodel **oldmod;
oldmod = model;
for( ; *model ; model = &((*model)->ASRCnextModel)) {
if( (*model)->ASRCmodName == modname ||

2
src/spicelib/devices/asrc/asrcpar.c
View File

@ -22,7 +22,7 @@ ASRCparam(param,value,fast,select)
GENinstance *fast;
IFvalue *select;
{
register ASRCinstance *here = (ASRCinstance*)fast;
ASRCinstance *here = (ASRCinstance*)fast;
switch(param) {
case ASRC_VOLTAGE:
here->ASRCtype = ASRC_VOLTAGE;

4
src/spicelib/devices/asrc/asrcpzld.c
View File

@ -23,8 +23,8 @@ ASRCpzLoad(inModel,ckt,s)
* sparse matrix previously provided
*/
{
register ASRCmodel *model = (ASRCmodel*)inModel;
register ASRCinstance *here;
ASRCmodel *model = (ASRCmodel*)inModel;
ASRCinstance *here;
double value;
int i, v_first, j, branch;
int node_num;

8
src/spicelib/devices/asrc/asrcset.c
View File

@ -17,17 +17,17 @@ Author: 1987 Kanwar Jit Singh
/*ARGSUSED*/
int
ASRCsetup(matrix,inModel,ckt,states)
register SMPmatrix *matrix;
SMPmatrix *matrix;
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
int *states;
/* load the voltage source structure with those
* pointers needed later for fast matrix loading
*/
{
register ASRCinstance *here;
register ASRCmodel *model = (ASRCmodel*)inModel;
ASRCinstance *here;
ASRCmodel *model = (ASRCmodel*)inModel;
int error, i, j;
int v_first;
CKTnode *tmp;

6
src/spicelib/devices/bjt/bjtacld.c
View File

@ -18,12 +18,12 @@ Author: 1985 Thomas L. Quarles
int
BJTacLoad(inModel,ckt)
register GENmodel *inModel;
GENmodel *inModel;
CKTcircuit *ckt;
{
register BJTinstance *here;
register BJTmodel *model = (BJTmodel*)inModel;
BJTinstance *here;
BJTmodel *model = (BJTmodel*)inModel;
double gcpr;
double gepr;
double gpi;

6
src/spicelib/devices/bjt/bjtconv.c
View File

@ -18,11 +18,11 @@ Author: 1985 Thomas L. Quarles
int
BJTconvTest(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register BJTinstance *here;
register BJTmodel *model = (BJTmodel *) inModel;
BJTinstance *here;
BJTmodel *model = (BJTmodel *) inModel;
double tol;
double cc;
double cchat;

4
src/spicelib/devices/bjt/bjtdisto.c
View File

@ -17,7 +17,7 @@ Author: 1988 Jaijeet S Roychowdhury
* the correct value
*/
int
BJTdisto(int mode, GENmodel *genmodel, register CKTcircuit *ckt)
BJTdisto(int mode, GENmodel *genmodel, CKTcircuit *ckt)
{
BJTmodel *model = (BJTmodel *) genmodel;
DISTOAN* job = (DISTOAN*) ckt->CKTcurJob;
@ -39,7 +39,7 @@ BJTdisto(int mode, GENmodel *genmodel, register CKTcircuit *ckt)
double r2h1m2y,i2h1m2y;
double r2h1m2z, i2h1m2z;
double temp, itemp;
register BJTinstance *here;
BJTinstance *here;
#ifdef DISTODEBUG
double time;
#endif

4
src/spicelib/devices/bjt/bjtdset.c
View File

@ -23,8 +23,8 @@ Author: 1988 Jaijeet S Roychowdhury
int
BJTdSetup(GENmodel *inModel, CKTcircuit *ckt)
{
register BJTmodel *model = (BJTmodel*)inModel;
register BJTinstance *here;
BJTmodel *model = (BJTmodel*)inModel;
BJTinstance *here;
double arg;
double c2;
double c4;

4
src/spicelib/devices/bjt/bjtgetic.c
View File

@ -21,12 +21,12 @@ Author: 1985 Thomas L. Quarles
int
BJTgetic(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
BJTmodel *model = (BJTmodel*)inModel;
register BJTinstance *here;
BJTinstance *here;
/*
* grab initial conditions out of rhs array. User specified, so use
* external nodes to get values

25
src/spicelib/devices/bjt/bjtload.c
View File

@ -22,13 +22,13 @@ int
BJTload(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
/* actually load the current resistance value into the
* sparse matrix previously provided
*/
{
register BJTmodel *model = (BJTmodel*)inModel;
register BJTinstance *here;
BJTmodel *model = (BJTmodel*)inModel;
BJTinstance *here;
double arg1;
double arg2;
double arg3;
@ -313,7 +313,7 @@ BJTload(inModel,ckt)
cbhat= *(ckt->CKTstate0 + here->BJTcb)+ *(ckt->CKTstate0 +
here->BJTgpi)*delvbe+ *(ckt->CKTstate0 + here->BJTgmu)*
delvbc;
#ifndef NOBYPASS
/*
* bypass if solution has not changed
*/
@ -354,7 +354,7 @@ BJTload(inModel,ckt)
geqbx = *(ckt->CKTstate0 + here->BJTgeqbx);
goto load;
}
#endif /*NOBYPASS*/
/*
* limit nonlinear branch voltages
*/
@ -652,21 +652,6 @@ next1: vtn=vt*model->BJTemissionCoeffF;
if (icheck == 1) {
ckt->CKTnoncon++;
ckt->CKTtroubleElt = (GENinstance *) here;
#ifndef NEWCONV
} else {
tol=ckt->CKTreltol*MAX(fabs(cchat),fabs(cc))+ckt->CKTabstol;
if (fabs(cchat-cc) > tol) {
ckt->CKTnoncon++;
ckt->CKTtroubleElt = (GENinstance *) here;
} else {
tol=ckt->CKTreltol*MAX(fabs(cbhat),fabs(cb))+
ckt->CKTabstol;
if (fabs(cbhat-cb) > tol) {
ckt->CKTnoncon++;
ckt->CKTtroubleElt = (GENinstance *) here;
}
}
#endif /* NEWCONV */
}
}

6
src/spicelib/devices/bjt/bjtnoise.c
View File

@ -30,12 +30,12 @@ BJTnoise (mode, operation, genmodel, ckt, data, OnDens)
int mode;
int operation;
CKTcircuit *ckt;
register Ndata *data;
Ndata *data;
double *OnDens;
{
BJTmodel *firstModel = (BJTmodel *) genmodel;
register BJTmodel *model;
register BJTinstance *inst;
BJTmodel *model;
BJTinstance *inst;
char name[N_MXVLNTH];
double tempOnoise;
double tempInoise;

2
src/spicelib/devices/bjt/bjtparam.c
View File

@ -27,7 +27,7 @@ BJTparam(param,value,instPtr,select)
GENinstance *instPtr;
IFvalue *select;
{
register BJTinstance *here = (BJTinstance*)instPtr;
BJTinstance *here = (BJTinstance*)instPtr;
switch(param) {
case BJT_AREA:

8
src/spicelib/devices/bjt/bjtpzld.c
View File

@ -17,12 +17,12 @@ Author: 1985 Thomas L. Quarles
int
BJTpzLoad(inModel,ckt,s)
GENmodel *inModel;
register CKTcircuit *ckt;
register SPcomplex *s;
CKTcircuit *ckt;
SPcomplex *s;
{
register BJTmodel *model = (BJTmodel*)inModel;
register BJTinstance *here;
BJTmodel *model = (BJTmodel*)inModel;
BJTinstance *here;
double gcpr;
double gepr;
double gpi;

4
src/spicelib/devices/bjt/bjtsacl.c
View File

@ -25,8 +25,8 @@ CKTcircuit *ckt;
{
register BJTmodel *model = (BJTmodel*)inModel;
register BJTinstance *here;
BJTmodel *model = (BJTmodel*)inModel;
BJTinstance *here;
double SaveState[25];
int error;
int flag;

6
src/spicelib/devices/bjt/bjtsetup.c
View File

@ -22,7 +22,7 @@ Author: 1985 Thomas L. Quarles
int
BJTsetup(matrix,inModel,ckt,states)
register SMPmatrix *matrix;
SMPmatrix *matrix;
GENmodel *inModel;
CKTcircuit *ckt;
int *states;
@ -31,8 +31,8 @@ BJTsetup(matrix,inModel,ckt,states)
*/
{
register BJTmodel *model = (BJTmodel*)inModel;
register BJTinstance *here;
BJTmodel *model = (BJTmodel*)inModel;
BJTinstance *here;
int error;
CKTnode *tmp;

4
src/spicelib/devices/bjt/bjtsload.c
View File

@ -23,8 +23,8 @@ BJTsLoad(inModel,ckt)
GENmodel *inModel;
CKTcircuit *ckt;
{
register BJTmodel *model = (BJTmodel*)inModel;
register BJTinstance *here;
BJTmodel *model = (BJTmodel*)inModel;
BJTinstance *here;
double SaveState0[27];
int i;
int iparmno;

6
src/spicelib/devices/bjt/bjtsprt.c
View File

@ -21,11 +21,11 @@ Author: 1985 Thomas L. Quarles
void
BJTsPrint(inModel,ckt)
register CKTcircuit *ckt;
CKTcircuit *ckt;
GENmodel *inModel;
{
register BJTmodel *model = (BJTmodel*)inModel;
register BJTinstance *here;
BJTmodel *model = (BJTmodel*)inModel;
BJTinstance *here;
printf("BJTS-----------------\n");
/* loop through all the BJT models */

6
src/spicelib/devices/bjt/bjtsset.c
View File

@ -20,11 +20,11 @@ Author: 1985 Thomas L. Quarles
int
BJTsSetup(info,inModel)
register SENstruct *info;
SENstruct *info;
GENmodel *inModel;
{
register BJTmodel *model = (BJTmodel*)inModel;
register BJTinstance *here;
BJTmodel *model = (BJTmodel*)inModel;
BJTinstance *here;
#ifdef STEPDEBUG
printf(" BJTsensetup \n");

6
src/spicelib/devices/bjt/bjtsupd.c
View File

@ -19,10 +19,10 @@ Author: 1985 Thomas L. Quarles
int
BJTsUpdate(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register BJTmodel *model = (BJTmodel*)inModel;
register BJTinstance *here;
BJTmodel *model = (BJTmodel*)inModel;
BJTinstance *here;
int iparmno;
double sb;
double sbprm;

4
src/spicelib/devices/bjt/bjttemp.c
View File

@ -23,8 +23,8 @@ BJTtemp(inModel,ckt)
*/
{
register BJTmodel *model = (BJTmodel *)inModel;
register BJTinstance *here;
BJTmodel *model = (BJTmodel *)inModel;
BJTinstance *here;
double xfc;
double vt;
double ratlog;

6
src/spicelib/devices/bjt/bjttrunc.c
View File

@ -21,12 +21,12 @@ Author: 1985 Thomas L. Quarles
int
BJTtrunc(inModel,ckt,timeStep)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
double *timeStep;
{
register BJTmodel *model = (BJTmodel*)inModel;
register BJTinstance *here;
BJTmodel *model = (BJTmodel*)inModel;
BJTinstance *here;
for( ; model != NULL; model = model->BJTnextModel) {
for(here=model->BJTinstances;here!=NULL;here = here->BJTnextInstance){

6
src/spicelib/devices/bsim1/b1acld.c
View File

@ -16,10 +16,10 @@ Author: 1985 Hong J. Park, Thomas L. Quarles
int
B1acLoad(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register B1model *model = (B1model*)inModel;
register B1instance *here;
B1model *model = (B1model*)inModel;
B1instance *here;
int xnrm;
int xrev;
double gdpr;

6
src/spicelib/devices/bsim1/b1cvtest.c
View File

@ -17,14 +17,14 @@ int
B1convTest(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
/* actually load the current value into the
* sparse matrix previously provided
*/
{
register B1model *model = (B1model*)inModel;
register B1instance *here;
B1model *model = (B1model*)inModel;
B1instance *here;
double cbd;
double cbhat;
double cbs;

4
src/spicelib/devices/bsim1/b1disto.c
View File

@ -14,7 +14,7 @@ Author: 1988 Jaijeet S Roychowdhury
int
B1disto(mode,genmodel,ckt)
GENmodel *genmodel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
int mode;
/* assuming here that ckt->CKTomega has been initialised to
@ -40,7 +40,7 @@ B1disto(mode,genmodel,ckt)
double r2h1m2y,i2h1m2y;
double r2h1m2z, i2h1m2z;
double temp, itemp;
register B1instance *here;
B1instance *here;
if (mode == D_SETUP)
return(B1dSetup(model,ckt));

6
src/spicelib/devices/bsim1/b1dset.c
View File

@ -18,11 +18,11 @@ int
B1dSetup(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register B1model* model = (B1model*)inModel;
register B1instance *here;
B1model* model = (B1model*)inModel;
B1instance *here;
double DrainSatCurrent;
double EffectiveLength;
double GateBulkOverlapCap;

6
src/spicelib/devices/bsim1/b1eval.c
View File

@ -21,9 +21,9 @@ B1evaluate(vds,vbs,vgs,here,model,gmPointer,gdsPointer,gmbsPointer,
cbgbPointer,cbdbPointer,cbsbPointer,cdgbPointer,cddbPointer,
cdsbPointer,cdrainPointer,vonPointer,vdsatPointer,ckt)
register CKTcircuit *ckt;
register B1model *model;
register B1instance *here;
CKTcircuit *ckt;
B1model *model;
B1instance *here;
double vds;
double vbs;
double vgs;

25
src/spicelib/devices/bsim1/b1ld.c
View File

@ -17,14 +17,14 @@ int
B1load(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
/* actually load the current value into the
* sparse matrix previously provided
*/
{
register B1model *model = (B1model*)inModel;
register B1instance *here;
B1model *model = (B1model*)inModel;
B1instance *here;
double DrainSatCurrent = 0.0;
double EffectiveLength = 0.0;
double GateBulkOverlapCap = 0.0;
@ -123,9 +123,7 @@ B1load(inModel,ckt)
double vt0 = 0.0;
double args[8];
int ByPass = 0;
#ifndef NOBYPASS
double tempv = 0.0;
#endif /*NOBYPASS*/
int error = 0;
@ -280,7 +278,6 @@ B1load(inModel,ckt)
*(ckt->CKTstate0 + here->B1gbd) * delvbd +
*(ckt->CKTstate0 + here->B1gbs) * delvbs ;
#ifndef NOBYPASS
/* now lets see if we can bypass (ugh) */
/* following should be one big if connected by && all over
@ -344,7 +341,6 @@ B1load(inModel,ckt)
goto line850;
}
}
#endif /*NOBYPASS*/
von = model->B1type * here->B1von;
if(*(ckt->CKTstate0 + here->B1vds) >=0) {
@ -495,21 +491,6 @@ B1load(inModel,ckt)
if (Check == 1) {
ckt->CKTnoncon++;
ckt->CKTtroubleElt = (GENinstance *) here;
#ifndef NEWCONV
} else {
tol=ckt->CKTreltol*MAX(fabs(cdhat),fabs(cd))+ckt->CKTabstol;
if (fabs(cdhat-cd) >= tol) {
ckt->CKTnoncon++;
ckt->CKTtroubleElt = (GENinstance *) here;
} else {
tol=ckt->CKTreltol*MAX(fabs(cbhat),fabs(cbs+cbd))+
ckt->CKTabstol;
if (fabs(cbhat-(cbs+cbd)) > tol) {
ckt->CKTnoncon++;
ckt->CKTtroubleElt = (GENinstance *) here;
}
}
#endif /* NEWCONV */
}
}
*(ckt->CKTstate0 + here->B1vbs) = vbs;

2
src/spicelib/devices/bsim1/b1moscap.c
View File

@ -26,7 +26,7 @@ B1mosCap(ckt,vgd,vgs,vgb,
gcbsbPointer,gcdgbPointer,gcddbPointer,gcdsbPointer,
gcsgbPointer,gcsdbPointer,gcssbPointer,qGatePointer,qBulkPointer,
qDrainPointer,qSourcePointer)
register CKTcircuit *ckt;
CKTcircuit *ckt;
double vgd;
double vgs;
double vgb;

8
src/spicelib/devices/bsim1/b1pzld.c
View File

@ -17,11 +17,11 @@ Author: 1985 Thomas L. Quarles
int
B1pzLoad(inModel,ckt,s)
GENmodel *inModel;
register CKTcircuit *ckt;
register SPcomplex *s;
CKTcircuit *ckt;
SPcomplex *s;
{
register B1model *model = (B1model*)inModel;
register B1instance *here;
B1model *model = (B1model*)inModel;
B1instance *here;
int xnrm;
int xrev;
double gdpr;

10
src/spicelib/devices/bsim1/b1set.c
View File

@ -14,17 +14,17 @@ Author: 1985 Hong J. Park, Thomas L. Quarles
int
B1setup(matrix,inModel,ckt,states)
register SMPmatrix *matrix;
register GENmodel *inModel;
register CKTcircuit *ckt;
SMPmatrix *matrix;
GENmodel *inModel;
CKTcircuit *ckt;
int *states;
/* load the B1 device structure with those pointers needed later
* for fast matrix loading
*/
{
register B1model *model = (B1model*)inModel;
register B1instance *here;
B1model *model = (B1model*)inModel;
B1instance *here;
int error;
CKTnode *tmp;

4
src/spicelib/devices/bsim1/b1temp.c
View File

@ -22,8 +22,8 @@ B1temp(inModel,ckt)
*/
{
register B1model *model = (B1model*) inModel;
register B1instance *here;
B1model *model = (B1model*) inModel;
B1instance *here;
double EffChanLength;
double EffChanWidth;
double Cox;

6
src/spicelib/devices/bsim1/b1trunc.c
View File

@ -13,12 +13,12 @@ Author: 1985 Hong J. Park, Thomas L. Quarles
int
B1trunc(inModel,ckt,timeStep)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
double *timeStep;
{
register B1model *model = (B1model*)inModel;
register B1instance *here;
B1model *model = (B1model*)inModel;
B1instance *here;
#ifdef STEPDEBUG
double debugtemp;
#endif /* STEPDEBUG */

6
src/spicelib/devices/bsim2/b2acld.c
View File

@ -16,10 +16,10 @@ Author: 1985 Hong J. Park, Thomas L. Quarles
int
B2acLoad(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register B2model *model = (B2model*)inModel;
register B2instance *here;
B2model *model = (B2model*)inModel;
B2instance *here;
int xnrm;
int xrev;
double gdpr;

6
src/spicelib/devices/bsim2/b2cvtest.c
View File

@ -17,14 +17,14 @@ int
B2convTest(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
/* actually load the current value into the
* sparse matrix previously provided
*/
{
register B2model *model = (B2model*)inModel;
register B2instance *here;
B2model *model = (B2model*)inModel;
B2instance *here;
double cbd;
double cbhat;
double cbs;

6
src/spicelib/devices/bsim2/b2eval.c
View File

@ -19,9 +19,9 @@ void
B2evaluate(Vds,Vbs,Vgs,here,model,gm,gds,gmb,qg,qb,qd,cgg,cgd,cgs,
cbg,cbd,cbs,cdg,cdd,cds,Ids,von,vdsat,ckt)
register CKTcircuit *ckt;
register B2model *model;
register B2instance *here;
CKTcircuit *ckt;
B2model *model;
B2instance *here;
double Vds,Vbs,Vgs;
double *gm,*gds,*gmb,*qg,*qb,*qd,*cgg,*cgd,*cgs,*cbg;
double *cbd,*cbs,*cdg,*cdd,*cds,*Ids,*von,*vdsat;

25
src/spicelib/devices/bsim2/b2ld.c
View File

@ -17,14 +17,14 @@ int
B2load(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
/* actually load the current value into the
* sparse matrix previously provided
*/
{
register B2model *model = (B2model*)inModel;
register B2instance *here;
B2model *model = (B2model*)inModel;
B2instance *here;
double DrainSatCurrent;
double EffectiveLength;
double GateBulkOverlapCap;
@ -123,9 +123,7 @@ B2load(inModel,ckt)
double vt0;
double args[7];
int ByPass;
#ifndef NOBYPASS
double tempv;
#endif /*NOBYPASS*/
int error;
@ -280,7 +278,6 @@ B2load(inModel,ckt)
*(ckt->CKTstate0 + here->B2gbd) * delvbd +
*(ckt->CKTstate0 + here->B2gbs) * delvbs ;
#ifndef NOBYPASS
/* now lets see if we can bypass (ugh) */
/* following should be one big if connected by && all over
@ -344,7 +341,6 @@ B2load(inModel,ckt)
goto line850;
}
}
#endif /*NOBYPASS*/
von = model->B2type * here->B2von;
if(*(ckt->CKTstate0 + here->B2vds) >=0) {
@ -496,21 +492,6 @@ B2load(inModel,ckt)
if (Check == 1) {
ckt->CKTnoncon++;
ckt->CKTtroubleElt = (GENinstance *) here;
#ifndef NEWCONV
} else {
tol=ckt->CKTreltol*MAX(fabs(cdhat),fabs(cd))+ckt->CKTabstol;
if (fabs(cdhat-cd) >= tol) {
ckt->CKTnoncon++;
ckt->CKTtroubleElt = (GENinstance *) here;
} else {
tol=ckt->CKTreltol*MAX(fabs(cbhat),fabs(cbs+cbd))+
ckt->CKTabstol;
if (fabs(cbhat-(cbs+cbd)) > tol) {
ckt->CKTnoncon++;
ckt->CKTtroubleElt = (GENinstance *) here;
}
}
#endif /* NEWCONV */
}
}
*(ckt->CKTstate0 + here->B2vbs) = vbs;

2
src/spicelib/devices/bsim2/b2moscap.c
View File

@ -26,7 +26,7 @@ B2mosCap(ckt,vgd,vgs,vgb,
gcbsbPointer,gcdgbPointer,gcddbPointer,gcdsbPointer,
gcsgbPointer,gcsdbPointer,gcssbPointer,qGatePointer,qBulkPointer,
qDrainPointer,qSourcePointer)
register CKTcircuit *ckt;
CKTcircuit *ckt;
double vgd;
double vgs;
double vgb;

8
src/spicelib/devices/bsim2/b2pzld.c
View File

@ -17,11 +17,11 @@ Author: 1985 Thomas L. Quarles
int
B2pzLoad(inModel,ckt,s)
GENmodel *inModel;
register CKTcircuit *ckt;
register SPcomplex *s;
CKTcircuit *ckt;
SPcomplex *s;
{
register B2model *model = (B2model*)inModel;
register B2instance *here;
B2model *model = (B2model*)inModel;
B2instance *here;
int xnrm;
int xrev;
double gdpr;

10
src/spicelib/devices/bsim2/b2set.c
View File

@ -14,17 +14,17 @@ Author: 1988 Min-Chie Jeng, Hong J. Park, Thomas L. Quarles
int
B2setup(matrix,inModel,ckt,states)
register SMPmatrix *matrix;
register GENmodel *inModel;
register CKTcircuit *ckt;
SMPmatrix *matrix;
GENmodel *inModel;
CKTcircuit *ckt;
int *states;
/* load the B2 device structure with those pointers needed later
* for fast matrix loading
*/
{
register B2model *model = (B2model*)inModel;
register B2instance *here;
B2model *model = (B2model*)inModel;
B2instance *here;
int error;
CKTnode *tmp;

6
src/spicelib/devices/bsim2/b2temp.c
View File

@ -22,9 +22,9 @@ B2temp(inModel,ckt)
*/
{
register B2model *model = (B2model*) inModel;
register B2instance *here;
register struct bsim2SizeDependParam *pSizeDependParamKnot, *pLastKnot;
B2model *model = (B2model*) inModel;
B2instance *here;
struct bsim2SizeDependParam *pSizeDependParamKnot, *pLastKnot;
double EffectiveLength;
double EffectiveWidth;
double CoxWoverL, Inv_L, Inv_W, tmp;

6
src/spicelib/devices/bsim2/b2trunc.c
View File

@ -13,12 +13,12 @@ Author: 1985 Hong J. Park, Thomas L. Quarles
int
B2trunc(inModel,ckt,timeStep)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
double *timeStep;
{
register B2model *model = (B2model*)inModel;
register B2instance *here;
B2model *model = (B2model*)inModel;
B2instance *here;
#ifdef STEPDEBUG
double debugtemp;
#endif /* STEPDEBUG */

6
src/spicelib/devices/bsim3/b3acld.c
View File

@ -16,10 +16,10 @@ File: b3acld.c
int
BSIM3acLoad(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register BSIM3model *model = (BSIM3model*)inModel;
register BSIM3instance *here;
BSIM3model *model = (BSIM3model*)inModel;
BSIM3instance *here;
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega;

4
src/spicelib/devices/bsim3/b3check.c
View File

@ -18,8 +18,8 @@ File: b3check.c
int
BSIM3checkModel(model, here, ckt)
register BSIM3model *model;
register BSIM3instance *here;
BSIM3model *model;
BSIM3instance *here;
CKTcircuit *ckt;
{
struct bsim3SizeDependParam *pParam;

6
src/spicelib/devices/bsim3/b3cvtest.c
View File

@ -20,10 +20,10 @@ File: b3cvtest.c
int
BSIM3convTest(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register BSIM3model *model = (BSIM3model*)inModel;
register BSIM3instance *here;
BSIM3model *model = (BSIM3model*)inModel;
BSIM3instance *here;
double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds;
double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;

31
src/spicelib/devices/bsim3/b3ld.c
View File

@ -32,10 +32,10 @@ File: b3ld.c
int
BSIM3load(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register BSIM3model *model = (BSIM3model*)inModel;
register BSIM3instance *here;
BSIM3model *model = (BSIM3model*)inModel;
BSIM3instance *here;
double SourceSatCurrent, DrainSatCurrent;
double ag0, qgd, qgs, qgb, von, cbhat, VgstNVt, ExpVgst;
double cdrain, cdhat, cdreq, ceqbd, ceqbs, ceqqb, ceqqd, ceqqg, ceq, geq;
@ -242,7 +242,6 @@ for (; model != NULL; model = model->BSIM3nextModel)
+ here->BSIM3gbds * delvds;
}
#ifndef NOBYPASS
/* following should be one big if connected by && all over
* the place, but some C compilers can't handle that, so
* we split it up here to let them digest it in stages
@ -287,7 +286,6 @@ for (; model != NULL; model = model->BSIM3nextModel)
}
}
#endif /*NOBYPASS*/
von = here->BSIM3von;
if (*(ckt->CKTstate0 + here->BSIM3vds) >= 0.0)
{ vgs = DEVfetlim(vgs, *(ckt->CKTstate0+here->BSIM3vgs), von);
@ -2296,29 +2294,6 @@ finished:
if ((here->BSIM3off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
{ if (Check == 1)
{ ckt->CKTnoncon++;
#ifndef NEWCONV
}
else
{ if (here->BSIM3mode >= 0)
{ Idtot = here->BSIM3cd + here->BSIM3csub - here->BSIM3cbd;
}
else
{ Idtot = here->BSIM3cd - here->BSIM3cbd;
}
tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot))
+ ckt->CKTabstol;
if (fabs(cdhat - Idtot) >= tol)
{ ckt->CKTnoncon++;
}
else
{ Ibtot = here->BSIM3cbs + here->BSIM3cbd - here->BSIM3csub;
tol = ckt->CKTreltol * MAX(fabs(cbhat), fabs(Ibtot))
+ ckt->CKTabstol;
if (fabs(cbhat - Ibtot)) > tol)
{ ckt->CKTnoncon++;
}
}
#endif /* NEWCONV */
}
}
*(ckt->CKTstate0 + here->BSIM3vbs) = vbs;

6
src/spicelib/devices/bsim3/b3noi.c
View File

@ -97,11 +97,11 @@ BSIM3noise (mode, operation, inModel, ckt, data, OnDens)
int mode, operation;
GENmodel *inModel;
CKTcircuit *ckt;
register Ndata *data;
Ndata *data;
double *OnDens;
{
register BSIM3model *model = (BSIM3model *)inModel;
register BSIM3instance *here;
BSIM3model *model = (BSIM3model *)inModel;
BSIM3instance *here;
struct bsim3SizeDependParam *pParam;
char name[N_MXVLNTH];
double tempOnoise;

8
src/spicelib/devices/bsim3/b3pzld.c
View File

@ -16,11 +16,11 @@ File: b3pzld.c
int
BSIM3pzLoad(inModel,ckt,s)
GENmodel *inModel;
register CKTcircuit *ckt;
register SPcomplex *s;
CKTcircuit *ckt;
SPcomplex *s;
{
register BSIM3model *model = (BSIM3model*)inModel;
register BSIM3instance *here;
BSIM3model *model = (BSIM3model*)inModel;
BSIM3instance *here;
double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb;
double xcdgb, xcddb, xcdsb, xcdbb, xcsgb, xcsdb, xcssb, xcsbb;
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, FwdSum, RevSum, Gm, Gmbs;

10
src/spicelib/devices/bsim3/b3set.c
View File

@ -26,13 +26,13 @@ File: b3set.c
int
BSIM3setup(matrix,inModel,ckt,states)
register SMPmatrix *matrix;
register GENmodel *inModel;
register CKTcircuit *ckt;
SMPmatrix *matrix;
GENmodel *inModel;
CKTcircuit *ckt;
int *states;
{
register BSIM3model *model = (BSIM3model*)inModel;
register BSIM3instance *here;
BSIM3model *model = (BSIM3model*)inModel;
BSIM3instance *here;
int error;
CKTnode *tmp;

4
src/spicelib/devices/bsim3/b3temp.c
View File

@ -33,8 +33,8 @@ BSIM3temp(inModel,ckt)
GENmodel *inModel;
CKTcircuit *ckt;
{
register BSIM3model *model = (BSIM3model*) inModel;
register BSIM3instance *here;
BSIM3model *model = (BSIM3model*) inModel;
BSIM3instance *here;
struct bsim3SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam;
double tmp, tmp1, tmp2, tmp3, Eg, Eg0, ni, T0, T1, T2, T3, T4, T5, Ldrn, Wdrn;
double delTemp, Temp, TRatio, Inv_L, Inv_W, Inv_LW, Vtm0, Tnom;

6
src/spicelib/devices/bsim3/b3trunc.c
View File

@ -17,11 +17,11 @@ File: b3trunc.c
int
BSIM3trunc(inModel,ckt,timeStep)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
double *timeStep;
{
register BSIM3model *model = (BSIM3model*)inModel;
register BSIM3instance *here;
BSIM3model *model = (BSIM3model*)inModel;
BSIM3instance *here;
#ifdef STEPDEBUG
double debugtemp;

6
src/spicelib/devices/bsim3v1/b3v1acld.c
View File

@ -15,10 +15,10 @@ File: b3v1acld.c
int
BSIM3V1acLoad(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register BSIM3V1model *model = (BSIM3V1model*)inModel;
register BSIM3V1instance *here;
BSIM3V1model *model = (BSIM3V1model*)inModel;
BSIM3V1instance *here;
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega;

4
src/spicelib/devices/bsim3v1/b3v1check.c
View File

@ -17,8 +17,8 @@ File: b3v1check.c
int
BSIM3V1checkModel(model, here, ckt)
register BSIM3V1model *model;
register BSIM3V1instance *here;
BSIM3V1model *model;
BSIM3V1instance *here;
CKTcircuit *ckt;
{
struct bsim3v1SizeDependParam *pParam;

6
src/spicelib/devices/bsim3v1/b3v1cvtest.c
View File

@ -19,10 +19,10 @@ File: b3v1cvtest.c
int
BSIM3V1convTest(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register BSIM3V1model *model = (BSIM3V1model*)inModel;
register BSIM3V1instance *here;
BSIM3V1model *model = (BSIM3V1model*)inModel;
BSIM3V1instance *here;
double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds;
double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;

26
src/spicelib/devices/bsim3v1/b3v1ld.c
View File

@ -31,10 +31,10 @@ Modified by Mansun Chan (1995)
int
BSIM3V1load(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register BSIM3V1model *model = (BSIM3V1model*)inModel;
register BSIM3V1instance *here;
BSIM3V1model *model = (BSIM3V1model*)inModel;
BSIM3V1instance *here;
double SourceSatCurrent, DrainSatCurrent;
double ag0, qgd, qgs, qgb, von, cbhat, VgstNVt, ExpVgst;
double cdrain, cdhat, cdreq, ceqbd, ceqbs, ceqqb, ceqqd, ceqqg, ceq, geq;
@ -225,7 +225,6 @@ for (; model != NULL; model = model->BSIM3V1nextModel)
cbhat = here->BSIM3V1cbs + here->BSIM3V1cbd + here->BSIM3V1gbd
* delvbd + here->BSIM3V1gbs * delvbs;
#ifndef NOBYPASS
/* following should be one big if connected by && all over
* the place, but some C compilers can't handle that, so
* we split it up here to let them digest it in stages
@ -270,7 +269,6 @@ for (; model != NULL; model = model->BSIM3V1nextModel)
}
}
#endif /*NOBYPASS*/
von = here->BSIM3V1von;
if (*(ckt->CKTstate0 + here->BSIM3V1vds) >= 0.0)
{ vgs = DEVfetlim(vgs, *(ckt->CKTstate0+here->BSIM3V1vgs), von);
@ -2028,24 +2026,6 @@ finished: /* returning Values to Calling Routine */
if ((here->BSIM3V1off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
{ if (Check == 1)
{ ckt->CKTnoncon++;
#ifndef NEWCONV
}
else
{ tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(here->BSIM3V1cd))
+ ckt->CKTabstol;
if (fabs(cdhat - here->BSIM3V1cd) >= tol)
{ ckt->CKTnoncon++;
}
else
{ tol = ckt->CKTreltol * MAX(fabs(cbhat),
fabs(here->BSIM3V1cbs + here->BSIM3V1cbd))
+ ckt->CKTabstol;
if (fabs(cbhat - (here->BSIM3V1cbs + here->BSIM3V1cbd))
> tol)
{ ckt->CKTnoncon++;
}
}
#endif /* NEWCONV */
}
}
*(ckt->CKTstate0 + here->BSIM3V1vbs) = vbs;

6
src/spicelib/devices/bsim3v1/b3v1noi.c
View File

@ -97,11 +97,11 @@ BSIM3V1noise (mode, operation, inModel, ckt, data, OnDens)
int mode, operation;
GENmodel *inModel;
CKTcircuit *ckt;
register Ndata *data;
Ndata *data;
double *OnDens;
{
register BSIM3V1model *model = (BSIM3V1model *)inModel;
register BSIM3V1instance *here;
BSIM3V1model *model = (BSIM3V1model *)inModel;
BSIM3V1instance *here;
struct bsim3v1SizeDependParam *pParam;
char name[N_MXVLNTH];
double tempOnoise;

8
src/spicelib/devices/bsim3v1/b3v1pzld.c
View File

@ -15,11 +15,11 @@ File: b3v1pzld.c
int
BSIM3V1pzLoad(inModel,ckt,s)
GENmodel *inModel;
register CKTcircuit *ckt;
register SPcomplex *s;
CKTcircuit *ckt;
SPcomplex *s;
{
register BSIM3V1model *model = (BSIM3V1model*)inModel;
register BSIM3V1instance *here;
BSIM3V1model *model = (BSIM3V1model*)inModel;
BSIM3V1instance *here;
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb;

10
src/spicelib/devices/bsim3v1/b3v1set.c
View File

@ -26,13 +26,13 @@ File: b3v1set.c
int
BSIM3V1setup(matrix,inModel,ckt,states)
register SMPmatrix *matrix;
register GENmodel *inModel;
register CKTcircuit *ckt;
SMPmatrix *matrix;
GENmodel *inModel;
CKTcircuit *ckt;
int *states;
{
register BSIM3V1model *model = (BSIM3V1model*)inModel;
register BSIM3V1instance *here;
BSIM3V1model *model = (BSIM3V1model*)inModel;
BSIM3V1instance *here;
int error;
CKTnode *tmp;

4
src/spicelib/devices/bsim3v1/b3v1temp.c
View File

@ -32,8 +32,8 @@ BSIM3V1temp(inModel,ckt)
GENmodel *inModel;
CKTcircuit *ckt;
{
register BSIM3V1model *model = (BSIM3V1model*) inModel;
register BSIM3V1instance *here;
BSIM3V1model *model = (BSIM3V1model*) inModel;
BSIM3V1instance *here;
struct bsim3v1SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam;
double tmp1, tmp2, Eg, Eg0, ni, T0, T1, T2, T3, Ldrn, Wdrn;
double Temp, TRatio, Inv_L, Inv_W, Inv_LW, Vtm0, Tnom;

6
src/spicelib/devices/bsim3v1/b3v1trunc.c
View File

@ -16,11 +16,11 @@ File: b3v1trunc.c
int
BSIM3V1trunc(inModel,ckt,timeStep)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
double *timeStep;
{
register BSIM3V1model *model = (BSIM3V1model*)inModel;
register BSIM3V1instance *here;
BSIM3V1model *model = (BSIM3V1model*)inModel;
BSIM3V1instance *here;
#ifdef STEPDEBUG
double debugtemp;

6
src/spicelib/devices/bsim3v2/b3v2acld.c
View File

@ -16,10 +16,10 @@ File: b3acld.c
int
BSIM3V2acLoad(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register BSIM3V2model *model = (BSIM3V2model*)inModel;
register BSIM3V2instance *here;
BSIM3V2model *model = (BSIM3V2model*)inModel;
BSIM3V2instance *here;
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega;

4
src/spicelib/devices/bsim3v2/b3v2check.c
View File

@ -18,8 +18,8 @@ File: b3v2check.c
int
BSIM3V2checkModel(model, here, ckt)
register BSIM3V2model *model;
register BSIM3V2instance *here;
BSIM3V2model *model;
BSIM3V2instance *here;
CKTcircuit *ckt;
{
struct BSIM3V2SizeDependParam *pParam;

6
src/spicelib/devices/bsim3v2/b3v2cvtest.c
View File

@ -19,10 +19,10 @@ File: b3v2cvtest.c
int
BSIM3V2convTest(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register BSIM3V2model *model = (BSIM3V2model*)inModel;
register BSIM3V2instance *here;
BSIM3V2model *model = (BSIM3V2model*)inModel;
BSIM3V2instance *here;
double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds;
double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;

37
src/spicelib/devices/bsim3v2/b3v2ld.c
View File

@ -32,10 +32,10 @@ File: b3ld.c 1/3/92
int
BSIM3V2load(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register BSIM3V2model *model = (BSIM3V2model*)inModel;
register BSIM3V2instance *here;
BSIM3V2model *model = (BSIM3V2model*)inModel;
BSIM3V2instance *here;
double SourceSatCurrent, DrainSatCurrent;
double ag0, qgd, qgs, qgb, von, cbhat, VgstNVt, ExpVgst;
double cdrain, cdhat, cdreq, ceqbd, ceqbs, ceqqb, ceqqd, ceqqg, ceq, geq;
@ -247,7 +247,6 @@ for (; model != NULL; model = model->BSIM3V2nextModel)
+ here->BSIM3V2gbds * delvds;
}
#ifndef NOBYPASS
/* following should be one big if connected by && all over
* the place, but some C compilers can't handle that, so
* we split it up here to let them digest it in stages
@ -292,7 +291,6 @@ for (; model != NULL; model = model->BSIM3V2nextModel)
}
}
#endif /*NOBYPASS*/
von = here->BSIM3V2von;
if (*(ckt->CKTstate0 + here->BSIM3V2vds) >= 0.0)
{ vgs = DEVfetlim(vgs, *(ckt->CKTstate0+here->BSIM3V2vgs), von);
@ -2291,32 +2289,9 @@ finished:
/*
* check convergence
*/
if ((here->BSIM3V2off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
{ if (Check == 1)
{ ckt->CKTnoncon++;
#ifndef NEWCONV
}
else
{ if (here->BSIM3V2mode >= 0)
{ Idtot = here->BSIM3V2cd + here->BSIM3V2csub - here->BSIM3V2cbd;
}
else
{ Idtot = here->BSIM3V2cd - here->BSIM3V2cbd;
}
tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot))
+ ckt->CKTabstol;
if (fabs(cdhat - Idtot) >= tol)
{ ckt->CKTnoncon++;
}
else
{ Ibtot = here->BSIM3V2cbs + here->BSIM3V2cbd - here->BSIM3V2csub;
tol = ckt->CKTreltol * MAX(fabs(cbhat), fabs(Ibtot))
+ ckt->CKTabstol;
if (fabs(cbhat - Ibtot)) > tol)
{ ckt->CKTnoncon++;
}
}
#endif /* NEWCONV */
if ((here->BSIM3V2off == 0) || (!(ckt->CKTmode & MODEINITFIX))) {
if (Check == 1) {
ckt->CKTnoncon++;
}
}
*(ckt->CKTstate0 + here->BSIM3V2vbs) = vbs;

6
src/spicelib/devices/bsim3v2/b3v2noi.c
View File

@ -96,11 +96,11 @@ BSIM3V2noise (mode, operation, inModel, ckt, data, OnDens)
int mode, operation;
GENmodel *inModel;
CKTcircuit *ckt;
register Ndata *data;
Ndata *data;
double *OnDens;
{
register BSIM3V2model *model = (BSIM3V2model *)inModel;
register BSIM3V2instance *here;
BSIM3V2model *model = (BSIM3V2model *)inModel;
BSIM3V2instance *here;
struct BSIM3V2SizeDependParam *pParam;
char name[N_MXVLNTH];
double tempOnoise;

8
src/spicelib/devices/bsim3v2/b3v2pzld.c
View File

@ -16,11 +16,11 @@ File: b3v2pzld.c
int
BSIM3V2pzLoad(inModel,ckt,s)
GENmodel *inModel;
register CKTcircuit *ckt;
register SPcomplex *s;
CKTcircuit *ckt;
SPcomplex *s;
{
register BSIM3V2model *model = (BSIM3V2model*)inModel;
register BSIM3V2instance *here;
BSIM3V2model *model = (BSIM3V2model*)inModel;
BSIM3V2instance *here;
double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb;
double xcdgb, xcddb, xcdsb, xcdbb, xcsgb, xcsdb, xcssb, xcsbb;
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, FwdSum, RevSum, Gm, Gmbs;

10
src/spicelib/devices/bsim3v2/b3v2set.c
View File

@ -27,13 +27,13 @@ File: b3v2set.c
int
BSIM3V2setup(matrix,inModel,ckt,states)
register SMPmatrix *matrix;
register GENmodel *inModel;
register CKTcircuit *ckt;
SMPmatrix *matrix;
GENmodel *inModel;
CKTcircuit *ckt;
int *states;
{
register BSIM3V2model *model = (BSIM3V2model*)inModel;
register BSIM3V2instance *here;
BSIM3V2model *model = (BSIM3V2model*)inModel;
BSIM3V2instance *here;
int error;
CKTnode *tmp;

4
src/spicelib/devices/bsim3v2/b3v2temp.c
View File

@ -33,8 +33,8 @@ BSIM3V2temp(inModel,ckt)
GENmodel *inModel;
CKTcircuit *ckt;
{
register BSIM3V2model *model = (BSIM3V2model*) inModel;
register BSIM3V2instance *here;
BSIM3V2model *model = (BSIM3V2model*) inModel;
BSIM3V2instance *here;
struct BSIM3V2SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam;
double tmp, tmp1, tmp2, tmp3, Eg, Eg0, ni, T0, T1, T2, T3, T4, T5, Ldrn, Wdrn;
double delTemp, Temp, TRatio, Inv_L, Inv_W, Inv_LW, Dw, Dl, Vtm0, Tnom;

6
src/spicelib/devices/bsim3v2/b3v2trunc.c
View File

@ -16,11 +16,11 @@ File: b3v2trunc.c
int
BSIM3V2trunc(inModel,ckt,timeStep)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
double *timeStep;
{
register BSIM3V2model *model = (BSIM3V2model*)inModel;
register BSIM3V2instance *here;
BSIM3V2model *model = (BSIM3V2model*)inModel;
BSIM3V2instance *here;
#ifdef STEPDEBUG
double debugtemp;

6
src/spicelib/devices/bsim4/b4acld.c
View File

@ -17,10 +17,10 @@
int
BSIM4acLoad(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register BSIM4model *model = (BSIM4model*)inModel;
register BSIM4instance *here;
BSIM4model *model = (BSIM4model*)inModel;
BSIM4instance *here;
double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb;
double xcbgb, xcbdb, xcbsb, xcbbb;

4
src/spicelib/devices/bsim4/b4check.c
View File

@ -20,8 +20,8 @@
int
BSIM4checkModel(model, here, ckt)
register BSIM4model *model;
register BSIM4instance *here;
BSIM4model *model;
BSIM4instance *here;
CKTcircuit *ckt;
{
struct bsim4SizeDependParam *pParam;

6
src/spicelib/devices/bsim4/b4cvtest.c
View File

@ -21,10 +21,10 @@
int
BSIM4convTest(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register BSIM4model *model = (BSIM4model*)inModel;
register BSIM4instance *here;
BSIM4model *model = (BSIM4model*)inModel;
BSIM4instance *here;
double delvbd, delvbs, delvds, delvgd, delvgs;
double delvdbd, delvsbs;
double delvbd_jct, delvbs_jct;

48
src/spicelib/devices/bsim4/b4ld.c
View File

@ -32,10 +32,10 @@
int
BSIM4load(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register BSIM4model *model = (BSIM4model*)inModel;
register BSIM4instance *here;
BSIM4model *model = (BSIM4model*)inModel;
BSIM4instance *here;
double ceqgstot, dgstot_dvd, dgstot_dvg, dgstot_dvs, dgstot_dvb;
double ceqgdtot, dgdtot_dvd, dgdtot_dvg, dgdtot_dvs, dgdtot_dvb;
@ -423,7 +423,6 @@ for (; model != NULL; model = model->BSIM4nextModel)
+ here->BSIM4gdtotb * delvbs;
#ifndef NOBYPASS
/* Following should be one IF statement, but some C compilers
* can't handle that all at once, so we split it into several
* successive IF's */
@ -515,7 +514,6 @@ for (; model != NULL; model = model->BSIM4nextModel)
else
goto line850;
}
#endif /*NOBYPASS*/
von = here->BSIM4von;
if (*(ckt->CKTstate0 + here->BSIM4vds) >= 0.0)
@ -3254,46 +3252,6 @@ finished:
if ((here->BSIM4off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
{ if (Check == 1)
{ ckt->CKTnoncon++;
#ifndef NEWCONV
}
else
{ if (here->BSIM4mode >= 0)
{ Idtot = here->BSIM4cd + here->BSIM4csub
+ here->BSIM4Igidl - here->BSIM4cbd;
}
else
{ Idtot = here->BSIM4cd + here->BSIM4cbd;
}
tol0 = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot))
+ ckt->CKTabstol;
tol1 = ckt->CKTreltol * MAX(fabs(cseshat), fabs(Isestot))
+ ckt->CKTabstol;
tol2 = ckt->CKTreltol * MAX(fabs(cdedhat), fabs(Idedtot))
+ ckt->CKTabstol;
tol3 = ckt->CKTreltol * MAX(fabs(cgshat), fabs(Igstot))
+ ckt->CKTabstol;
tol4 = ckt->CKTreltol * MAX(fabs(cgdhat), fabs(Igdtot))
+ ckt->CKTabstol;
tol5 = ckt->CKTreltol * MAX(fabs(cgbhat), fabs(Igbtot))
+ ckt->CKTabstol;
if ((fabs(cdhat - Idtot) >= tol0) || (fabs(cseshat - Isestot) >= tol1)
|| (fabs(cdedhat - Idedtot) >= tol2))
{ ckt->CKTnoncon++;
}
else if ((fabs(cgshat - Igstot) >= tol3) || (fabs(cgdhat - Igdtot) >= tol4)
|| (fabs(cgbhat - Igbtot) >= tol5))
{ ckt->CKTnoncon++;
}
else
{ Ibtot = here->BSIM4cbs + here->BSIM4cbd
- here->BSIM4Igidl - here->BSIM4csub;
tol6 = ckt->CKTreltol * MAX(fabs(cbhat), fabs(Ibtot))
+ ckt->CKTabstol;
if (fabs(cbhat - Ibtot) > tol6)
{ ckt->CKTnoncon++;
}
}
#endif /* NEWCONV */
}
}
*(ckt->CKTstate0 + here->BSIM4vds) = vds;

6
src/spicelib/devices/bsim4/b4noi.c
View File

@ -72,11 +72,11 @@ BSIM4noise (mode, operation, inModel, ckt, data, OnDens)
int mode, operation;
GENmodel *inModel;
CKTcircuit *ckt;
register Ndata *data;
Ndata *data;
double *OnDens;
{
register BSIM4model *model = (BSIM4model *)inModel;
register BSIM4instance *here;
BSIM4model *model = (BSIM4model *)inModel;
BSIM4instance *here;
struct bsim4SizeDependParam *pParam;
char name[N_MXVLNTH];
double tempOnoise;

8
src/spicelib/devices/bsim4/b4pzld.c
View File

@ -18,11 +18,11 @@
int
BSIM4pzLoad(inModel,ckt,s)
GENmodel *inModel;
register CKTcircuit *ckt;
register SPcomplex *s;
CKTcircuit *ckt;
SPcomplex *s;
{
register BSIM4model *model = (BSIM4model*)inModel;
register BSIM4instance *here;
BSIM4model *model = (BSIM4model*)inModel;
BSIM4instance *here;
double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb;
double xcggb, xcgdb, xcgsb, xcgbb, xcbgb, xcbdb, xcbsb, xcbbb;

10
src/spicelib/devices/bsim4/b4set.c
View File

@ -27,13 +27,13 @@
int
BSIM4setup(matrix,inModel,ckt,states)
register SMPmatrix *matrix;
register GENmodel *inModel;
register CKTcircuit *ckt;
SMPmatrix *matrix;
GENmodel *inModel;
CKTcircuit *ckt;
int *states;
{
register BSIM4model *model = (BSIM4model*)inModel;
register BSIM4instance *here;
BSIM4model *model = (BSIM4model*)inModel;
BSIM4instance *here;
int error;
CKTnode *tmp;

4
src/spicelib/devices/bsim4/b4temp.c
View File

@ -47,8 +47,8 @@ BSIM4temp(inModel,ckt)
GENmodel *inModel;
CKTcircuit *ckt;
{
register BSIM4model *model = (BSIM4model*) inModel;
register BSIM4instance *here;
BSIM4model *model = (BSIM4model*) inModel;
BSIM4instance *here;
struct bsim4SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam;
double tmp, tmp1, tmp2, tmp3, Eg, Eg0, ni;
double T0, T1, T2, T3, T4, T5, T8, T9, Ldrn, Wdrn;

6
src/spicelib/devices/bsim4/b4trunc.c
View File

@ -18,11 +18,11 @@
int
BSIM4trunc(inModel,ckt,timeStep)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
double *timeStep;
{
register BSIM4model *model = (BSIM4model*)inModel;
register BSIM4instance *here;
BSIM4model *model = (BSIM4model*)inModel;
BSIM4instance *here;
#ifdef STEPDEBUG
double debugtemp;

6
src/spicelib/devices/cap/capacld.c
View File

@ -16,12 +16,12 @@ Author: 1985 Thomas L. Quarles
int
CAPacLoad(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register CAPmodel *model = (CAPmodel*)inModel;
CAPmodel *model = (CAPmodel*)inModel;
double val;
register CAPinstance *here;
CAPinstance *here;
for( ; model != NULL; model = model->CAPnextModel) {
for( here = model->CAPinstances;here != NULL;

8
src/spicelib/devices/cap/capload.c
View File

@ -15,14 +15,14 @@ int
CAPload(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
/* actually load the current capacitance value into the
* sparse matrix previously provided
*/
{
register CAPmodel *model = (CAPmodel*)inModel;
register CAPinstance *here;
register int cond1;
CAPmodel *model = (CAPmodel*)inModel;
CAPinstance *here;
int cond1;
double vcap;
double geq;
double ceq;

6
src/spicelib/devices/cap/cappzld.c
View File

@ -19,12 +19,12 @@ int
CAPpzLoad(inModel,ckt,s)
GENmodel *inModel;
CKTcircuit *ckt;
register SPcomplex *s;
SPcomplex *s;
{
register CAPmodel *model = (CAPmodel*)inModel;
CAPmodel *model = (CAPmodel*)inModel;
double val;
register CAPinstance *here;
CAPinstance *here;
for( ; model != NULL; model = model->CAPnextModel) {
for( here = model->CAPinstances;here != NULL;

6
src/spicelib/devices/cap/capsacl.c
View File

@ -22,11 +22,11 @@ int
CAPsAcLoad(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register CAPmodel *model = (CAPmodel*)inModel;
register CAPinstance *here;
CAPmodel *model = (CAPmodel*)inModel;
CAPinstance *here;
double vcap;
double ivcap;
double val;

6
src/spicelib/devices/cap/capsetup.c
View File

@ -16,7 +16,7 @@ Author: 1985 Thomas L. Quarles
/*ARGSUSED*/
int
CAPsetup(matrix,inModel,ckt,states)
register SMPmatrix *matrix;
SMPmatrix *matrix;
GENmodel *inModel;
CKTcircuit *ckt;
int *states;
@ -25,8 +25,8 @@ CAPsetup(matrix,inModel,ckt,states)
*/
{
register CAPmodel *model = (CAPmodel*)inModel;
register CAPinstance *here;
CAPmodel *model = (CAPmodel*)inModel;
CAPinstance *here;
/* loop through all the capacitor models */
for( ; model != NULL; model = model->CAPnextModel ) {

6
src/spicelib/devices/cap/capsload.c
View File

@ -21,10 +21,10 @@ Author: 1985 Thomas L. Quarles
int
CAPsLoad(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register CAPmodel *model = (CAPmodel*)inModel;
register CAPinstance *here;
CAPmodel *model = (CAPmodel*)inModel;
CAPinstance *here;
int iparmno;
double vcap;
double Osxp;

6
src/spicelib/devices/cap/capsprt.c
View File

@ -21,10 +21,10 @@ Author: 1985 Thomas L. Quarles
void
CAPsPrint(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register CAPmodel *model = (CAPmodel*)inModel;
register CAPinstance *here;
CAPmodel *model = (CAPmodel*)inModel;
CAPinstance *here;
printf("CAPACITORS-----------------\n");
/* loop through all the capacitor models */

6
src/spicelib/devices/cap/capsset.c
View File

@ -20,12 +20,12 @@ Author: 1985 Thomas L. Quarles
int
CAPsSetup(info,inModel)
register SENstruct *info;
SENstruct *info;
GENmodel *inModel;
{
register CAPmodel *model = (CAPmodel*)inModel;
register CAPinstance *here;
CAPmodel *model = (CAPmodel*)inModel;
CAPinstance *here;
/* loop through all the capacitor models */
for( ; model != NULL; model = model->CAPnextModel ) {

6
src/spicelib/devices/cap/capsupd.c
View File

@ -19,10 +19,10 @@ Author: 1985 Thomas L. Quarles
int
CAPsUpdate(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register CAPmodel *model = (CAPmodel*)inModel;
register CAPinstance *here;
CAPmodel *model = (CAPmodel*)inModel;
CAPinstance *here;
int iparmno;
double s1;
double s2;

4
src/spicelib/devices/cap/captemp.c
View File

@ -24,8 +24,8 @@ CAPtemp(inModel,ckt)
CKTcircuit *ckt;
{
register CAPmodel *model = (CAPmodel*)inModel;
register CAPinstance *here;
CAPmodel *model = (CAPmodel*)inModel;
CAPinstance *here;
/* loop through all the capacitor models */
for( ; model != NULL; model = model->CAPnextModel ) {

8
src/spicelib/devices/cap/captrunc.c
View File

@ -16,11 +16,11 @@ Author: 1985 Thomas L. Quarles
int
CAPtrunc(inModel,ckt,timeStep)
GENmodel *inModel;
register CKTcircuit *ckt;
register double *timeStep;
CKTcircuit *ckt;
double *timeStep;
{
register CAPmodel *model = (CAPmodel*)inModel;
register CAPinstance *here;
CAPmodel *model = (CAPmodel*)inModel;
CAPinstance *here;
for( ; model!= NULL; model = model->CAPnextModel) {
for(here = model->CAPinstances ; here != NULL ;

4
src/spicelib/devices/cccs/cccsload.c
View File

@ -24,8 +24,8 @@ CCCSload(inModel,ckt)
* sparse matrix previously provided
*/
{
register CCCSmodel *model = (CCCSmodel*)inModel;
register CCCSinstance *here;
CCCSmodel *model = (CCCSmodel*)inModel;
CCCSinstance *here;
/* loop through all the voltage source models */
for( ; model != NULL; model = model->CCCSnextModel ) {

4
src/spicelib/devices/cccs/cccspzld.c
View File

@ -26,8 +26,8 @@ CCCSpzLoad(inModel,ckt,s)
* sparse matrix previously provided
*/
{
register CCCSmodel *model = (CCCSmodel*)inModel;
register CCCSinstance *here;
CCCSmodel *model = (CCCSmodel*)inModel;
CCCSinstance *here;
/* loop through all the voltage source models */
for( ; model != NULL; model = model->CCCSnextModel ) {

4
src/spicelib/devices/cccs/cccssacl.c
View File

@ -23,8 +23,8 @@ CCCSsAcLoad(inModel,ckt)
GENmodel *inModel;
CKTcircuit *ckt;
{
register CCCSmodel *model = (CCCSmodel*)inModel;
register CCCSinstance *here;
CCCSmodel *model = (CCCSmodel*)inModel;
CCCSinstance *here;
double ic;
double i_ic;

8
src/spicelib/devices/cccs/cccsset.c
View File

@ -21,13 +21,13 @@ Author: 1985 Thomas L. Quarles
/*ARGSUSED*/
int
CCCSsetup(matrix,inModel,ckt,states)
register SMPmatrix *matrix;
SMPmatrix *matrix;
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
int *states;
{
register CCCSmodel *model = (CCCSmodel*)inModel;
register CCCSinstance *here;
CCCSmodel *model = (CCCSmodel*)inModel;
CCCSinstance *here;
/* loop through all the voltage source models */
for( ; model != NULL; model = model->CCCSnextModel ) {

4
src/spicelib/devices/cccs/cccssld.c
View File

@ -23,8 +23,8 @@ CCCSsLoad(inModel,ckt)
GENmodel *inModel;
CKTcircuit *ckt;
{
register CCCSmodel *model = (CCCSmodel*)inModel;
register CCCSinstance *here;
CCCSmodel *model = (CCCSmodel*)inModel;
CCCSinstance *here;
double ic ;
/* loop through all the CCCS models */

6
src/spicelib/devices/cccs/cccssprt.c
View File

@ -21,10 +21,10 @@ Author: 1985 Thomas L. Quarles
void
CCCSsPrint(inModel,ckt)
GENmodel *inModel;
register CKTcircuit *ckt;
CKTcircuit *ckt;
{
register CCCSmodel *model = (CCCSmodel*)inModel;
register CCCSinstance *here;
CCCSmodel *model = (CCCSmodel*)inModel;
CCCSinstance *here;
printf("CURRENT CONTROLLED CURRENT SOURCES-----------------\n");
/* loop through all the voltage source models */

Some files were not shown because too many files have changed in this diff Show More