unify state access, same procedure as other devices
access CKTstates[] via CKTstate0 CKTstate1 macros access devoce "slots" via descriptive macros do it just the same as done in other device models
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@ -33,7 +33,7 @@ SWacLoad(GENmodel *inModel, CKTcircuit *ckt)
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/* In AC analysis, just propogate the state... */
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current_state = (int)*(ckt->CKTstate0 + here->SWstate);
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current_state = (int) ckt->CKTstate0[here->SWswitchstate];
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g_now = current_state?(model->SWonConduct):(model->SWoffConduct);
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@ -57,6 +57,10 @@ typedef struct sSWinstance {
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#define SW_OFF_CONDUCTANCE ckt->CKTgmin /* default off conductance */
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#define SW_NUM_STATES 2
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#define SWswitchstate SWstate+0
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#define SWctrlvalue SWstate+1
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typedef struct sSWmodel { /* model structure for a switch */
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struct GENmodel gen;
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@ -31,8 +31,8 @@ SWload(GENmodel *inModel, CKTcircuit *ckt)
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for (; model; model = SWnextModel(model)) {
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for (here = SWinstances(model); here; here=SWnextInstance(here)) {
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old_current_state = ckt->CKTstates[0][here->SWstate + 0];
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previous_state = ckt->CKTstates[1][here->SWstate + 0];
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old_current_state = ckt->CKTstate0[here->SWswitchstate];
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previous_state = ckt->CKTstate1[here->SWswitchstate];
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v_ctrl =
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ckt->CKTrhsOld [here->SWposCntrlNode] -
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@ -132,8 +132,8 @@ SWload(GENmodel *inModel, CKTcircuit *ckt)
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// After analyzing the transient code, it seems that this is not a problem because state updating
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// occurs before the convergence loop in transient processing.
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ckt->CKTstates[0][here->SWstate + 0] = current_state;
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ckt->CKTstates[0][here->SWstate + 1] = v_ctrl;
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ckt->CKTstate0[here->SWswitchstate] = current_state;
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ckt->CKTstate0[here->SWctrlvalue] = v_ctrl;
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if ((current_state == REALLY_ON) || (current_state == HYST_ON))
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g_now = model->SWonConduct;
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@ -65,7 +65,7 @@ SWnoise (int mode, int operation, GENmodel *genmodel, CKTcircuit *ckt, Ndata *da
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switch (mode) {
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case N_DENS:
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current_state = (int)*(ckt->CKTstate0 + inst->SWstate);
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current_state = (int) ckt->CKTstate0[inst->SWswitchstate];
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NevalSrc(&noizDens,&lnNdens,ckt,THERMNOISE,
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inst->SWposNode,inst->SWnegNode,
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current_state?(model->SWonConduct):(model->SWoffConduct));
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@ -37,7 +37,7 @@ SWpzLoad(GENmodel *inModel, CKTcircuit *ckt, SPcomplex *s)
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/* In AC analysis, just propogate the state... */
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current_state = (int)*(ckt->CKTstate0 + here->SWstate);
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current_state = (int) ckt->CKTstate0[here->SWswitchstate];
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g_now = current_state?(model->SWonConduct):(model->SWoffConduct);
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@ -21,14 +21,14 @@ SWtrunc(GENmodel *inModel, CKTcircuit *ckt, double *timeStep)
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for (; model; model = SWnextModel(model)) {
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for (here = SWinstances(model); here; here = SWnextInstance(here)) {
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lastChange =
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ckt->CKTstates[0][here->SWstate + 1] -
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ckt->CKTstates[1][here->SWstate + 1];
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if (ckt->CKTstates[0][here->SWstate + 0] == 0) {
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ckt->CKTstate0[here->SWctrlvalue] -
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ckt->CKTstate1[here->SWctrlvalue];
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if (ckt->CKTstate0[here->SWswitchstate] == 0) {
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ref = (model->SWvThreshold + model->SWvHysteresis);
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if (ckt->CKTstates[0][here->SWstate + 1] < ref && lastChange > 1e-3)
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if (ckt->CKTstate0[here->SWctrlvalue] < ref && lastChange > 1e-3)
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{
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maxChange =
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(ref - ckt->CKTstates[0][here->SWstate + 1]) * 0.75
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(ref - ckt->CKTstate0[here->SWctrlvalue]) * 0.75
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+ 0.05;
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maxStep = maxChange / lastChange * ckt->CKTdeltaOld[0];
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if (maxStep < ckt->CKTdelmin)
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@ -38,10 +38,10 @@ SWtrunc(GENmodel *inModel, CKTcircuit *ckt, double *timeStep)
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}
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} else {
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ref = model->SWvThreshold - model->SWvHysteresis;
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if (ckt->CKTstates[0][here->SWstate + 1] > ref && lastChange < -1e-3)
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if (ckt->CKTstate0[here->SWctrlvalue] > ref && lastChange < -1e-3)
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{
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maxChange =
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(ref - ckt->CKTstates[0][here->SWstate + 1]) * 0.75
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(ref - ckt->CKTstate0[here->SWctrlvalue]) * 0.75
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- 0.05;
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maxStep = maxChange / lastChange * ckt->CKTdeltaOld[0];
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if (maxStep < ckt->CKTdelmin)
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