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Updated model to 4.6.0

This commit is contained in:
pnenzi 2007-04-26 09:58:35 +00:00
parent c9d9b2f337
commit 92c4be77b6
20 changed files with 1138 additions and 197 deletions
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55
src/spicelib/devices/bsim4/b4.c
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@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 04/06/2001.
* Modified by Xuemei Xi, 10/05/2001.
@ -12,6 +13,7 @@
* Modified by Xuemei Xi, 05/09/2003.
* Modified by Xuemei Xi, 03/04/2004.
* Modified by Xuemei Xi, Mohan Dunga, 07/29/2005.
* Modified by Mohan Dunga, 12/13/2006
**********/
#include "ngspice.h"
@ -328,6 +330,7 @@ IOP( "dlc", BSIM4_MOD_DLC, IF_REAL, "Delta L for C-V model"),
IOP( "xw", BSIM4_MOD_XW, IF_REAL, "W offset for channel width due to mask/etch effect"),
IOP( "xl", BSIM4_MOD_XL, IF_REAL, "L offset for channel length due to mask/etch effect"),
IOP( "dlcig", BSIM4_MOD_DLCIG, IF_REAL, "Delta L for Ig model"),
IOP( "dlcigd", BSIM4_MOD_DLCIGD, IF_REAL, "Delta L for Ig model drain side"),
IOP( "dwj", BSIM4_MOD_DWJ, IF_REAL, "Delta W for S/D junctions"),
IOP( "alpha0", BSIM4_MOD_ALPHA0, IF_REAL, "substrate current model parameter"),
@ -338,12 +341,22 @@ IOP( "agidl", BSIM4_MOD_AGIDL, IF_REAL, "Pre-exponential constant for GIDL"),
IOP( "bgidl", BSIM4_MOD_BGIDL, IF_REAL, "Exponential constant for GIDL"),
IOP( "cgidl", BSIM4_MOD_CGIDL, IF_REAL, "Parameter for body-bias dependence of GIDL"),
IOP( "egidl", BSIM4_MOD_EGIDL, IF_REAL, "Fitting parameter for Bandbending"),
IOP( "agisl", BSIM4_MOD_AGISL, IF_REAL, "Pre-exponential constant for GISL"),
IOP( "bgisl", BSIM4_MOD_BGISL, IF_REAL, "Exponential constant for GISL"),
IOP( "cgisl", BSIM4_MOD_CGISL, IF_REAL, "Parameter for body-bias dependence of GISL"),
IOP( "egisl", BSIM4_MOD_EGISL, IF_REAL, "Fitting parameter for Bandbending"),
IOP( "aigc", BSIM4_MOD_AIGC, IF_REAL, "Parameter for Igc"),
IOP( "bigc", BSIM4_MOD_BIGC, IF_REAL, "Parameter for Igc"),
IOP( "cigc", BSIM4_MOD_CIGC, IF_REAL, "Parameter for Igc"),
IOP( "aigsd", BSIM4_MOD_AIGSD, IF_REAL, "Parameter for Igs,d"),
IOP( "bigsd", BSIM4_MOD_BIGSD, IF_REAL, "Parameter for Igs,d"),
IOP( "cigsd", BSIM4_MOD_CIGSD, IF_REAL, "Parameter for Igs,d"),
IOP( "aigs", BSIM4_MOD_AIGS, IF_REAL, "Parameter for Igs"),
IOP( "bigs", BSIM4_MOD_BIGS, IF_REAL, "Parameter for Igs"),
IOP( "cigs", BSIM4_MOD_CIGS, IF_REAL, "Parameter for Igs"),
IOP( "aigd", BSIM4_MOD_AIGD, IF_REAL, "Parameter for Igd"),
IOP( "bigd", BSIM4_MOD_BIGD, IF_REAL, "Parameter for Igd"),
IOP( "cigd", BSIM4_MOD_CIGD, IF_REAL, "Parameter for Igd"),
IOP( "aigbacc", BSIM4_MOD_AIGBACC, IF_REAL, "Parameter for Igb"),
IOP( "bigbacc", BSIM4_MOD_BIGBACC, IF_REAL, "Parameter for Igb"),
IOP( "cigbacc", BSIM4_MOD_CIGBACC, IF_REAL, "Parameter for Igb"),
@ -376,6 +389,9 @@ IOP( "jtsswgd", BSIM4_MOD_JTSSWGD, IF_REAL, "Drain gate-edge sidewall trap-assis
IOP( "njts", BSIM4_MOD_NJTS, IF_REAL, "Non-ideality factor for bottom junction"),
IOP( "njtssw", BSIM4_MOD_NJTSSW, IF_REAL, "Non-ideality factor for STI sidewall junction"),
IOP( "njtsswg", BSIM4_MOD_NJTSSWG, IF_REAL, "Non-ideality factor for gate-edge sidewall junction"),
IOP( "njtsd", BSIM4_MOD_NJTSD, IF_REAL, "Non-ideality factor for bottom junction drain side"),
IOP( "njtsswd", BSIM4_MOD_NJTSSWD, IF_REAL, "Non-ideality factor for STI sidewall junction drain side"),
IOP( "njtsswgd", BSIM4_MOD_NJTSSWGD, IF_REAL, "Non-ideality factor for gate-edge sidewall junction drain side"),
IOP( "xtss", BSIM4_MOD_XTSS, IF_REAL, "Power dependence of JTSS on temperature"),
IOP( "xtsd", BSIM4_MOD_XTSD, IF_REAL, "Power dependence of JTSD on temperature"),
IOP( "xtssws", BSIM4_MOD_XTSSWS, IF_REAL, "Power dependence of JTSSWS on temperature"),
@ -385,6 +401,9 @@ IOP( "xtsswgd", BSIM4_MOD_XTSSWGD, IF_REAL, "Power dependence of JTSSWGD on temp
IOP( "tnjts", BSIM4_MOD_TNJTS, IF_REAL, "Temperature coefficient for NJTS"),
IOP( "tnjtssw", BSIM4_MOD_TNJTSSW, IF_REAL, "Temperature coefficient for NJTSSW"),
IOP( "tnjtsswg", BSIM4_MOD_TNJTSSWG, IF_REAL, "Temperature coefficient for NJTSSWG"),
IOP( "tnjtsd", BSIM4_MOD_TNJTSD, IF_REAL, "Temperature coefficient for NJTSD"),
IOP( "tnjtsswd", BSIM4_MOD_TNJTSSWD, IF_REAL, "Temperature coefficient for NJTSSWD"),
IOP( "tnjtsswgd", BSIM4_MOD_TNJTSSWGD, IF_REAL, "Temperature coefficient for NJTSSWGD"),
IOP( "vtss", BSIM4_MOD_VTSS, IF_REAL, "Source bottom trap-assisted voltage dependent parameter"),
IOP( "vtsd", BSIM4_MOD_VTSD, IF_REAL, "Drain bottom trap-assisted voltage dependent parameter"),
IOP( "vtssws", BSIM4_MOD_VTSSWS, IF_REAL, "Source STI sidewall trap-assisted voltage dependent parameter"),
@ -530,12 +549,22 @@ IOP( "lagidl", BSIM4_MOD_LAGIDL, IF_REAL, "Length dependence of agidl"),
IOP( "lbgidl", BSIM4_MOD_LBGIDL, IF_REAL, "Length dependence of bgidl"),
IOP( "lcgidl", BSIM4_MOD_LCGIDL, IF_REAL, "Length dependence of cgidl"),
IOP( "legidl", BSIM4_MOD_LEGIDL, IF_REAL, "Length dependence of egidl"),
IOP( "lagisl", BSIM4_MOD_LAGISL, IF_REAL, "Length dependence of agisl"),
IOP( "lbgisl", BSIM4_MOD_LBGISL, IF_REAL, "Length dependence of bgisl"),
IOP( "lcgisl", BSIM4_MOD_LCGISL, IF_REAL, "Length dependence of cgisl"),
IOP( "legisl", BSIM4_MOD_LEGISL, IF_REAL, "Length dependence of egisl"),
IOP( "laigc", BSIM4_MOD_LAIGC, IF_REAL, "Length dependence of aigc"),
IOP( "lbigc", BSIM4_MOD_LBIGC, IF_REAL, "Length dependence of bigc"),
IOP( "lcigc", BSIM4_MOD_LCIGC, IF_REAL, "Length dependence of cigc"),
IOP( "laigsd", BSIM4_MOD_LAIGSD, IF_REAL, "Length dependence of aigsd"),
IOP( "lbigsd", BSIM4_MOD_LBIGSD, IF_REAL, "Length dependence of bigsd"),
IOP( "lcigsd", BSIM4_MOD_LCIGSD, IF_REAL, "Length dependence of cigsd"),
IOP( "laigs", BSIM4_MOD_LAIGS, IF_REAL, "Length dependence of aigs"),
IOP( "lbigs", BSIM4_MOD_LBIGS, IF_REAL, "Length dependence of bigs"),
IOP( "lcigs", BSIM4_MOD_LCIGS, IF_REAL, "Length dependence of cigs"),
IOP( "laigd", BSIM4_MOD_LAIGD, IF_REAL, "Length dependence of aigd"),
IOP( "lbigd", BSIM4_MOD_LBIGD, IF_REAL, "Length dependence of bigd"),
IOP( "lcigd", BSIM4_MOD_LCIGD, IF_REAL, "Length dependence of cigd"),
IOP( "laigbacc", BSIM4_MOD_LAIGBACC, IF_REAL, "Length dependence of aigbacc"),
IOP( "lbigbacc", BSIM4_MOD_LBIGBACC, IF_REAL, "Length dependence of bigbacc"),
IOP( "lcigbacc", BSIM4_MOD_LCIGBACC, IF_REAL, "Length dependence of cigbacc"),
@ -666,12 +695,22 @@ IOP( "wagidl", BSIM4_MOD_WAGIDL, IF_REAL, "Width dependence of agidl"),
IOP( "wbgidl", BSIM4_MOD_WBGIDL, IF_REAL, "Width dependence of bgidl"),
IOP( "wcgidl", BSIM4_MOD_WCGIDL, IF_REAL, "Width dependence of cgidl"),
IOP( "wegidl", BSIM4_MOD_WEGIDL, IF_REAL, "Width dependence of egidl"),
IOP( "wagisl", BSIM4_MOD_WAGISL, IF_REAL, "Width dependence of agisl"),
IOP( "wbgisl", BSIM4_MOD_WBGISL, IF_REAL, "Width dependence of bgisl"),
IOP( "wcgisl", BSIM4_MOD_WCGISL, IF_REAL, "Width dependence of cgisl"),
IOP( "wegisl", BSIM4_MOD_WEGISL, IF_REAL, "Width dependence of egisl"),
IOP( "waigc", BSIM4_MOD_WAIGC, IF_REAL, "Width dependence of aigc"),
IOP( "wbigc", BSIM4_MOD_WBIGC, IF_REAL, "Width dependence of bigc"),
IOP( "wcigc", BSIM4_MOD_WCIGC, IF_REAL, "Width dependence of cigc"),
IOP( "waigsd", BSIM4_MOD_WAIGSD, IF_REAL, "Width dependence of aigsd"),
IOP( "wbigsd", BSIM4_MOD_WBIGSD, IF_REAL, "Width dependence of bigsd"),
IOP( "wcigsd", BSIM4_MOD_WCIGSD, IF_REAL, "Width dependence of cigsd"),
IOP( "waigs", BSIM4_MOD_WAIGS, IF_REAL, "Width dependence of aigs"),
IOP( "wbigs", BSIM4_MOD_WBIGS, IF_REAL, "Width dependence of bigs"),
IOP( "wcigs", BSIM4_MOD_WCIGS, IF_REAL, "Width dependence of cigs"),
IOP( "waigd", BSIM4_MOD_WAIGD, IF_REAL, "Width dependence of aigd"),
IOP( "wbigd", BSIM4_MOD_WBIGD, IF_REAL, "Width dependence of bigd"),
IOP( "wcigd", BSIM4_MOD_WCIGD, IF_REAL, "Width dependence of cigd"),
IOP( "waigbacc", BSIM4_MOD_WAIGBACC, IF_REAL, "Width dependence of aigbacc"),
IOP( "wbigbacc", BSIM4_MOD_WBIGBACC, IF_REAL, "Width dependence of bigbacc"),
IOP( "wcigbacc", BSIM4_MOD_WCIGBACC, IF_REAL, "Width dependence of cigbacc"),
@ -801,12 +840,22 @@ IOP( "pagidl", BSIM4_MOD_PAGIDL, IF_REAL, "Cross-term dependence of agidl"),
IOP( "pbgidl", BSIM4_MOD_PBGIDL, IF_REAL, "Cross-term dependence of bgidl"),
IOP( "pcgidl", BSIM4_MOD_PCGIDL, IF_REAL, "Cross-term dependence of cgidl"),
IOP( "pegidl", BSIM4_MOD_PEGIDL, IF_REAL, "Cross-term dependence of egidl"),
IOP( "pagisl", BSIM4_MOD_PAGISL, IF_REAL, "Cross-term dependence of agisl"),
IOP( "pbgisl", BSIM4_MOD_PBGISL, IF_REAL, "Cross-term dependence of bgisl"),
IOP( "pcgisl", BSIM4_MOD_PCGISL, IF_REAL, "Cross-term dependence of cgisl"),
IOP( "pegisl", BSIM4_MOD_PEGISL, IF_REAL, "Cross-term dependence of egisl"),
IOP( "paigc", BSIM4_MOD_PAIGC, IF_REAL, "Cross-term dependence of aigc"),
IOP( "pbigc", BSIM4_MOD_PBIGC, IF_REAL, "Cross-term dependence of bigc"),
IOP( "pcigc", BSIM4_MOD_PCIGC, IF_REAL, "Cross-term dependence of cigc"),
IOP( "paigsd", BSIM4_MOD_PAIGSD, IF_REAL, "Cross-term dependence of aigsd"),
IOP( "pbigsd", BSIM4_MOD_PBIGSD, IF_REAL, "Cross-term dependence of bigsd"),
IOP( "pcigsd", BSIM4_MOD_PCIGSD, IF_REAL, "Cross-term dependence of cigsd"),
IOP( "paigs", BSIM4_MOD_PAIGS, IF_REAL, "Cross-term dependence of aigs"),
IOP( "pbigs", BSIM4_MOD_PBIGS, IF_REAL, "Cross-term dependence of bigs"),
IOP( "pcigs", BSIM4_MOD_PCIGS, IF_REAL, "Cross-term dependence of cigs"),
IOP( "paigd", BSIM4_MOD_PAIGD, IF_REAL, "Cross-term dependence of aigd"),
IOP( "pbigd", BSIM4_MOD_PBIGD, IF_REAL, "Cross-term dependence of bigd"),
IOP( "pcigd", BSIM4_MOD_PCIGD, IF_REAL, "Cross-term dependence of cigd"),
IOP( "paigbacc", BSIM4_MOD_PAIGBACC, IF_REAL, "Cross-term dependence of aigbacc"),
IOP( "pbigbacc", BSIM4_MOD_PBIGBACC, IF_REAL, "Cross-term dependence of bigbacc"),
IOP( "pcigbacc", BSIM4_MOD_PCIGBACC, IF_REAL, "Cross-term dependence of cigbacc"),

7
src/spicelib/devices/bsim4/b4acld.c
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@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4acld.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4acld.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 10/05/2001.
**********/

6
src/spicelib/devices/bsim4/b4ask.c
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@ -1,8 +1,8 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/27/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4ask.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4ask.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.

53
src/spicelib/devices/bsim4/b4check.c
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@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4check.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4check.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 04/06/2001.
* Modified by Xuemei Xi, 10/05/2001.
@ -12,6 +13,7 @@
* Modified by Xuemei Xi, 05/09/2003.
* Modified by Xuemei Xi, 03/04/2004.
* Modified by Xuemei Xi, 07/29/2005.
* Modified by Mohan Dunga, 12/13/2006
**********/
#include "ngspice.h"
@ -40,9 +42,9 @@ FILE *fplog;
fprintf(fplog, "\n");
fprintf(fplog, "++++++++++ BSIM4 PARAMETER CHECKING BELOW ++++++++++\n");
if (strcmp(model->BSIM4version, "4.5.0") != 0)
{ fprintf(fplog, "Warning: This model is BSIM4.5.0; you specified a wrong version number.\n");
printf("Warning: This model is BSIM4.5.0; you specified a wrong version number.\n");
if (strcmp(model->BSIM4version, "4.6.0") != 0)
{ fprintf(fplog, "Warning: This model is BSIM4.6.0; you specified a wrong version number.\n");
printf("Warning: This model is BSIM4.6.0; you specified a wrong version number.\n");
}
fprintf(fplog, "Model = %s\n", model->BSIM4modName);
@ -721,24 +723,45 @@ FILE *fplog;
printf("Warning: Njd = %g is negative.\n",
model->BSIM4DjctEmissionCoeff);
}
if (model->BSIM4njtstemp < 0.0)
if (model->BSIM4njtsstemp < 0.0)
{ fprintf(fplog, "Warning: Njts = %g is negative at temperature = %g.\n",
model->BSIM4njtstemp, ckt->CKTtemp);
model->BSIM4njtsstemp, ckt->CKTtemp);
printf("Warning: Njts = %g is negative at temperature = %g.\n",
model->BSIM4njtstemp, ckt->CKTtemp);
model->BSIM4njtsstemp, ckt->CKTtemp);
}
if (model->BSIM4njtsswtemp < 0.0)
if (model->BSIM4njtsswstemp < 0.0)
{ fprintf(fplog, "Warning: Njtssw = %g is negative at temperature = %g.\n",
model->BSIM4njtsswtemp, ckt->CKTtemp);
model->BSIM4njtsswstemp, ckt->CKTtemp);
printf("Warning: Njtssw = %g is negative at temperature = %g.\n",
model->BSIM4njtsswtemp, ckt->CKTtemp);
model->BSIM4njtsswstemp, ckt->CKTtemp);
}
if (model->BSIM4njtsswgtemp < 0.0)
if (model->BSIM4njtsswgstemp < 0.0)
{ fprintf(fplog, "Warning: Njtsswg = %g is negative at temperature = %g.\n",
model->BSIM4njtsswgtemp, ckt->CKTtemp);
model->BSIM4njtsswgstemp, ckt->CKTtemp);
printf("Warning: Njtsswg = %g is negative at temperature = %g.\n",
model->BSIM4njtsswgtemp, ckt->CKTtemp);
model->BSIM4njtsswgstemp, ckt->CKTtemp);
}
if (model->BSIM4njtsdGiven && model->BSIM4njtsdtemp < 0.0)
{ fprintf(fplog, "Warning: Njtsd = %g is negative at temperature = %g.\n",
model->BSIM4njtsdtemp, ckt->CKTtemp);
printf("Warning: Njtsd = %g is negative at temperature = %g.\n",
model->BSIM4njtsdtemp, ckt->CKTtemp);
}
if (model->BSIM4njtsswdGiven && model->BSIM4njtsswdtemp < 0.0)
{ fprintf(fplog, "Warning: Njtsswd = %g is negative at temperature = %g.\n",
model->BSIM4njtsswdtemp, ckt->CKTtemp);
printf("Warning: Njtsswd = %g is negative at temperature = %g.\n",
model->BSIM4njtsswdtemp, ckt->CKTtemp);
}
if (model->BSIM4njtsswgdGiven && model->BSIM4njtsswgdtemp < 0.0)
{ fprintf(fplog, "Warning: Njtsswgd = %g is negative at temperature = %g.\n",
model->BSIM4njtsswgdtemp, ckt->CKTtemp);
printf("Warning: Njtsswgd = %g is negative at temperature = %g.\n",
model->BSIM4njtsswgdtemp, ckt->CKTtemp);
}
if (model->BSIM4ntnoi < 0.0)
{ fprintf(fplog, "Warning: ntnoi = %g is negative. Set to zero.\n", model->BSIM4ntnoi);
printf("Warning: ntnoi = %g is negative. Set to zero.\n", model->BSIM4ntnoi);

7
src/spicelib/devices/bsim4/b4cvtest.c
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@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4cvtest.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4cvtest.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 04/06/2001.
* Modified by Xuemei Xi, 10/05/2001.

7
src/spicelib/devices/bsim4/b4del.c
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@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4del.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4del.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
**********/

7
src/spicelib/devices/bsim4/b4dest.c
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@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4dest.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4dest.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
**********/

7
src/spicelib/devices/bsim4/b4geo.c
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@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 11/17//2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4geo.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4geo.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
**********/

7
src/spicelib/devices/bsim4/b4getic.c
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@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4getic.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4getic.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
**********/

150
src/spicelib/devices/bsim4/b4ld.c
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@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4ld.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4ld.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 04/06/2001.
* Modified by Xuemei Xi, 10/05/2001.
@ -12,6 +13,7 @@
* Modified by Xuemei Xi, 05/09/2003.
* Modified by Xuemei Xi, 02/06/2004.
* Modified by Xuemei Xi, Mohan Dunga, 07/29/2005.
* Modified by Mohan Dunga, 12/13/2006.
**********/
#include "ngspice.h"
@ -185,7 +187,8 @@ double Cgg1, Cgb1, Cgd1, Cbg1, Cbb1, Cbd1, Qac0, Qsub0;
double dQac0_dVg, dQac0_dVb, dQsub0_dVg, dQsub0_dVd, dQsub0_dVb;
double ggidld, ggidlg, ggidlb, ggislg, ggislb, ggisls;
double Igisl, Ggislg, Ggislb, Ggisls;
double Nvtmrs, Nvtmrssw, Nvtmrsswg;
double Nvtmrss, Nvtmrssws, Nvtmrsswgs;
double Nvtmrsd, Nvtmrsswd, Nvtmrsswgd;
double vs, Fsevl, dvs_dVg, dvs_dVd, dvs_dVb, dFsevl_dVg, dFsevl_dVd, dFsevl_dVb;
double vgdx, vgsx;
@ -199,7 +202,7 @@ ChargeComputationNeeded =
((ckt->CKTmode & (MODEAC | MODETRAN | MODEINITSMSIG)) ||
((ckt->CKTmode & MODETRANOP) && (ckt->CKTmode & MODEUIC)))
? 1 : 0;
ChargeComputationNeeded = 1;
/* ChargeComputationNeeded = 1; Wrong ??PN */
for (; model != NULL; model = model->BSIM4nextModel)
{ for (here = model->BSIM4instances; here != NULL;
@ -846,84 +849,87 @@ for (; model != NULL; model = model->BSIM4nextModel)
}
/* trap-assisted tunneling and recombination current for reverse bias */
Nvtmrssw = model->BSIM4vtm0 * model->BSIM4njtsswtemp;
Nvtmrsswg = model->BSIM4vtm0 * model->BSIM4njtsswgtemp;
Nvtmrs = model->BSIM4vtm0 * model->BSIM4njtstemp;
Nvtmrssws = model->BSIM4vtm0 * model->BSIM4njtsswstemp;
Nvtmrsswgs = model->BSIM4vtm0 * model->BSIM4njtsswgstemp;
Nvtmrss = model->BSIM4vtm0 * model->BSIM4njtsstemp;
Nvtmrsswd = model->BSIM4vtm0 * model->BSIM4njtsswdtemp;
Nvtmrsswgd = model->BSIM4vtm0 * model->BSIM4njtsswgdtemp;
Nvtmrsd = model->BSIM4vtm0 * model->BSIM4njtsdtemp;
if ((model->BSIM4vtss - vbs_jct) < (model->BSIM4vtss * 1e-3))
{ T9 = 1.0e3;
T0 = - vbs_jct / Nvtmrs * T9;
T0 = - vbs_jct / Nvtmrss * T9;
DEXP(T0, T1, T10);
dT1_dVb = T10 / Nvtmrs * T9;
dT1_dVb = T10 / Nvtmrss * T9;
} else {
T9 = 1.0 / (model->BSIM4vtss - vbs_jct);
T0 = -vbs_jct / Nvtmrs * model->BSIM4vtss * T9;
dT0_dVb = model->BSIM4vtss / Nvtmrs * (T9 + vbs_jct * T9 * T9) ;
T0 = -vbs_jct / Nvtmrss * model->BSIM4vtss * T9;
dT0_dVb = model->BSIM4vtss / Nvtmrss * (T9 + vbs_jct * T9 * T9) ;
DEXP(T0, T1, T10);
dT1_dVb = T10 * dT0_dVb;
}
if ((model->BSIM4vtsd - vbd_jct) < (model->BSIM4vtsd * 1e-3) )
{ T9 = 1.0e3;
T0 = -vbd_jct / Nvtmrs * T9;
T0 = -vbd_jct / Nvtmrsd * T9;
DEXP(T0, T2, T10);
dT2_dVb = T10 / Nvtmrs * T9;
dT2_dVb = T10 / Nvtmrsd * T9;
} else {
T9 = 1.0 / (model->BSIM4vtsd - vbd_jct);
T0 = -vbd_jct / Nvtmrs * model->BSIM4vtsd * T9;
dT0_dVb = model->BSIM4vtsd / Nvtmrs * (T9 + vbd_jct * T9 * T9) ;
T0 = -vbd_jct / Nvtmrsd * model->BSIM4vtsd * T9;
dT0_dVb = model->BSIM4vtsd / Nvtmrsd * (T9 + vbd_jct * T9 * T9) ;
DEXP(T0, T2, T10);
dT2_dVb = T10 * dT0_dVb;
}
if ((model->BSIM4vtssws - vbs_jct) < (model->BSIM4vtssws * 1e-3) )
{ T9 = 1.0e3;
T0 = -vbs_jct / Nvtmrssw * T9;
T0 = -vbs_jct / Nvtmrssws * T9;
DEXP(T0, T3, T10);
dT3_dVb = T10 / Nvtmrssw * T9;
dT3_dVb = T10 / Nvtmrssws * T9;
} else {
T9 = 1.0 / (model->BSIM4vtssws - vbs_jct);
T0 = -vbs_jct / Nvtmrssw * model->BSIM4vtssws * T9;
dT0_dVb = model->BSIM4vtssws / Nvtmrssw * (T9 + vbs_jct * T9 * T9) ;
T0 = -vbs_jct / Nvtmrssws * model->BSIM4vtssws * T9;
dT0_dVb = model->BSIM4vtssws / Nvtmrssws * (T9 + vbs_jct * T9 * T9) ;
DEXP(T0, T3, T10);
dT3_dVb = T10 * dT0_dVb;
}
if ((model->BSIM4vtsswd - vbd_jct) < (model->BSIM4vtsswd * 1e-3) )
{ T9 = 1.0e3;
T0 = -vbd_jct / Nvtmrssw * T9;
T0 = -vbd_jct / Nvtmrsswd * T9;
DEXP(T0, T4, T10);
dT4_dVb = T10 / Nvtmrssw * T9;
dT4_dVb = T10 / Nvtmrsswd * T9;
} else {
T9 = 1.0 / (model->BSIM4vtsswd - vbd_jct);
T0 = -vbd_jct / Nvtmrssw * model->BSIM4vtsswd * T9;
dT0_dVb = model->BSIM4vtsswd / Nvtmrssw * (T9 + vbd_jct * T9 * T9) ;
T0 = -vbd_jct / Nvtmrsswd * model->BSIM4vtsswd * T9;
dT0_dVb = model->BSIM4vtsswd / Nvtmrsswd * (T9 + vbd_jct * T9 * T9) ;
DEXP(T0, T4, T10);
dT4_dVb = T10 * dT0_dVb;
}
if ((model->BSIM4vtsswgs - vbs_jct) < (model->BSIM4vtsswgs * 1e-3) )
{ T9 = 1.0e3;
T0 = -vbs_jct / Nvtmrsswg * T9;
T0 = -vbs_jct / Nvtmrsswgs * T9;
DEXP(T0, T5, T10);
dT5_dVb = T10 / Nvtmrsswg * T9;
dT5_dVb = T10 / Nvtmrsswgs * T9;
} else {
T9 = 1.0 / (model->BSIM4vtsswgs - vbs_jct);
T0 = -vbs_jct / Nvtmrsswg * model->BSIM4vtsswgs * T9;
dT0_dVb = model->BSIM4vtsswgs / Nvtmrsswg * (T9 + vbs_jct * T9 * T9) ;
T0 = -vbs_jct / Nvtmrsswgs * model->BSIM4vtsswgs * T9;
dT0_dVb = model->BSIM4vtsswgs / Nvtmrsswgs * (T9 + vbs_jct * T9 * T9) ;
DEXP(T0, T5, T10);
dT5_dVb = T10 * dT0_dVb;
}
if ((model->BSIM4vtsswgd - vbd_jct) < (model->BSIM4vtsswgd * 1e-3) )
{ T9 = 1.0e3;
T0 = -vbd_jct / Nvtmrsswg * T9;
T0 = -vbd_jct / Nvtmrsswgd * T9;
DEXP(T0, T6, T10);
dT6_dVb = T10 / Nvtmrsswg * T9;
dT6_dVb = T10 / Nvtmrsswgd * T9;
} else {
T9 = 1.0 / (model->BSIM4vtsswgd - vbd_jct);
T0 = -vbd_jct / Nvtmrsswg * model->BSIM4vtsswgd * T9;
dT0_dVb = model->BSIM4vtsswgd / Nvtmrsswg * (T9 + vbd_jct * T9 * T9) ;
T0 = -vbd_jct / Nvtmrsswgd * model->BSIM4vtsswgd * T9;
dT0_dVb = model->BSIM4vtsswgd / Nvtmrsswgd * (T9 + vbd_jct * T9 * T9) ;
DEXP(T0, T6, T10);
dT6_dVb = T10 * dT0_dVb;
}
@ -1332,25 +1338,39 @@ for (; model != NULL; model = model->BSIM4nextModel)
{ T0 = Vgsteff + Vth + Vth;
T2 = pParam->BSIM4ua + pParam->BSIM4uc * Vbseff;
T3 = T0 / model->BSIM4toxe;
T6 = pParam->BSIM4ud / T3 / T3 * Vth * Vth;
T12 = sqrt(Vth * Vth + 0.0001);
T9 = 1.0/(Vgsteff + 2*T12);
T10 = T9*model->BSIM4toxe;
T8 = pParam->BSIM4ud * T10 * T10 * Vth;
T6 = T8 * Vth;
T5 = T3 * (T2 + pParam->BSIM4ub * T3) + T6;
T7 = - 2.0 * T6 / T0;
dDenomi_dVg = (T2 + 2.0 * pParam->BSIM4ub * T3) / model->BSIM4toxe + T7;
dDenomi_dVd = dDenomi_dVg * 2.0 * dVth_dVd;
dDenomi_dVb = dDenomi_dVg * 2.0 * dVth_dVb + pParam->BSIM4uc * T3;
T7 = - 2.0 * T6 * T9;
T11 = T7 * Vth/T12;
dDenomi_dVg = (T2 + 2.0 * pParam->BSIM4ub * T3) / model->BSIM4toxe;
T13 = 2.0 * (dDenomi_dVg + T11 + T8);
dDenomi_dVd = T13 * dVth_dVd;
dDenomi_dVb = T13 * dVth_dVb + pParam->BSIM4uc * T3;
dDenomi_dVg+= T7;
}
else if (model->BSIM4mobMod == 1)
{ T0 = Vgsteff + Vth + Vth;
T2 = 1.0 + pParam->BSIM4uc * Vbseff;
T3 = T0 / model->BSIM4toxe;
T4 = T3 * (pParam->BSIM4ua + pParam->BSIM4ub * T3);
T6 = pParam->BSIM4ud / T3 / T3 * Vth * Vth;
T12 = sqrt(Vth * Vth + 0.0001);
T9 = 1.0/(Vgsteff + 2*T12);
T10 = T9*model->BSIM4toxe;
T8 = pParam->BSIM4ud * T10 * T10 * Vth;
T6 = T8 * Vth;
T5 = T4 * T2 + T6;
T7 = - 2.0 * T6 / T0;
T7 = - 2.0 * T6 * T9;
T11 = T7 * Vth/T12;
dDenomi_dVg = (pParam->BSIM4ua + 2.0 * pParam->BSIM4ub * T3) * T2
/ model->BSIM4toxe + T7;
dDenomi_dVd = dDenomi_dVg * 2.0 * dVth_dVd;
dDenomi_dVb = dDenomi_dVg * 2.0 * dVth_dVb + pParam->BSIM4uc * T4;
/ model->BSIM4toxe;
T13 = 2.0 * (dDenomi_dVg + T11 + T8);
dDenomi_dVd = T13 * dVth_dVd;
dDenomi_dVb = T13 * dVth_dVb + pParam->BSIM4uc * T4;
dDenomi_dVg+= T7;
}
else
{ T0 = (Vgsteff + here->BSIM4vtfbphi1) / model->BSIM4toxe;
@ -1358,12 +1378,18 @@ for (; model != NULL; model = model->BSIM4nextModel)
dT1_dVg = T1 * pParam->BSIM4eu / T0 / model->BSIM4toxe;
T2 = pParam->BSIM4ua + pParam->BSIM4uc * Vbseff;
T3 = T0 / model->BSIM4toxe;
T6 = pParam->BSIM4ud / T3 / T3 * Vth * Vth;
T12 = sqrt(Vth * Vth + 0.0001);
T9 = 1.0/(Vgsteff + 2*T12);
T10 = T9*model->BSIM4toxe;
T8 = pParam->BSIM4ud * T10 * T10 * Vth;
T6 = T8 * Vth;
T5 = T1 * T2 + T6;
T7 = - 2.0 * T6 / T0;
T7 = - 2.0 * T6 * T9;
T11 = T7 * Vth/T12;
dDenomi_dVg = T2 * dT1_dVg + T7;
dDenomi_dVd = 0.0;
dDenomi_dVb = T1 * pParam->BSIM4uc;
T13 = 2.0 * (T11 + T8);
dDenomi_dVd = T13 * dVth_dVd;
dDenomi_dVb = T13 * dVth_dVb + T1 * pParam->BSIM4uc;
}
if (T5 >= -0.8)
@ -2120,23 +2146,23 @@ for (; model != NULL; model = model->BSIM4nextModel)
vgd_eff = here->BSIM4vgd_eff;
dvgd_eff_dvg = here->BSIM4dvgd_eff_dvg;
T1 = (-vds - vgd_eff - pParam->BSIM4egidl ) / T0;
T1 = (-vds - vgd_eff - pParam->BSIM4egisl ) / T0;
if ((pParam->BSIM4agidl <= 0.0) || (pParam->BSIM4bgidl <= 0.0)
|| (T1 <= 0.0) || (pParam->BSIM4cgidl <= 0.0) || (vbs > 0.0))
if ((pParam->BSIM4agisl <= 0.0) || (pParam->BSIM4bgisl <= 0.0)
|| (T1 <= 0.0) || (pParam->BSIM4cgisl <= 0.0) || (vbs > 0.0))
Igisl = Ggisls = Ggislg = Ggislb = 0.0;
else {
dT1_dVd = 1.0 / T0;
dT1_dVg = -dvgd_eff_dvg * dT1_dVd;
T2 = pParam->BSIM4bgidl / T1;
T2 = pParam->BSIM4bgisl / T1;
if (T2 < 100.0)
{ Igisl = pParam->BSIM4agidl * pParam->BSIM4weffCJ * T1 * exp(-T2);
{ Igisl = pParam->BSIM4agisl * pParam->BSIM4weffCJ * T1 * exp(-T2);
T3 = Igisl * (1.0 + T2) / T1;
Ggisls = T3 * dT1_dVd;
Ggislg = T3 * dT1_dVg;
}
else
{ Igisl = pParam->BSIM4agidl * pParam->BSIM4weffCJ * 3.720075976e-44;
{ Igisl = pParam->BSIM4agisl * pParam->BSIM4weffCJ * 3.720075976e-44;
Ggisls = Igisl * dT1_dVd;
Ggislg = Igisl * dT1_dVg;
Igisl *= T1;
@ -2144,9 +2170,9 @@ for (; model != NULL; model = model->BSIM4nextModel)
T4 = vbs * vbs;
T5 = -vbs * T4;
T6 = pParam->BSIM4cgidl + T5;
T6 = pParam->BSIM4cgisl + T5;
T7 = T5 / T6;
T8 = 3.0 * pParam->BSIM4cgidl * T4 / T6 / T6;
T8 = 3.0 * pParam->BSIM4cgisl * T4 / T6 / T6;
Ggisls = Ggisls * T7 + Igisl * T8;
Ggislg = Ggislg * T7;
Ggislb = -Igisl * T8;
@ -2363,12 +2389,12 @@ for (; model != NULL; model = model->BSIM4nextModel)
T2 = vgs * vgs_eff;
dT2_dVg = vgs * dvgs_eff_dvg + vgs_eff;
T11 = pParam->BSIM4AechvbEdge;
T11 = pParam->BSIM4AechvbEdgeS;
T12 = pParam->BSIM4BechvbEdge;
T3 = pParam->BSIM4aigsd * pParam->BSIM4cigsd
- pParam->BSIM4bigsd;
T4 = pParam->BSIM4bigsd * pParam->BSIM4cigsd;
T5 = T12 * (pParam->BSIM4aigsd + T3 * vgs_eff
T3 = pParam->BSIM4aigs * pParam->BSIM4cigs
- pParam->BSIM4bigs;
T4 = pParam->BSIM4bigs * pParam->BSIM4cigs;
T5 = T12 * (pParam->BSIM4aigs + T3 * vgs_eff
- T4 * vgs_eff * vgs_eff);
if (T5 > EXP_THRESHOLD)
{ T6 = MAX_EXP;
@ -2394,7 +2420,11 @@ for (; model != NULL; model = model->BSIM4nextModel)
T2 = vgd * vgd_eff;
dT2_dVg = vgd * dvgd_eff_dvg + vgd_eff;
T5 = T12 * (pParam->BSIM4aigsd + T3 * vgd_eff
T11 = pParam->BSIM4AechvbEdgeD;
T3 = pParam->BSIM4aigd * pParam->BSIM4cigd
- pParam->BSIM4bigd;
T4 = pParam->BSIM4bigd * pParam->BSIM4cigd;
T5 = T12 * (pParam->BSIM4aigd + T3 * vgd_eff
- T4 * vgd_eff * vgd_eff);
if (T5 > EXP_THRESHOLD)
{ T6 = MAX_EXP;

149
src/spicelib/devices/bsim4/b4mask.c
View File

@ -1,16 +1,18 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4mask.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4mask.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 04/06/2001.
* Modified by Xuemei Xi, 10/05/2001.
* Modified by Xuemei Xi, 11/15/2002.
* Modified by Xuemei Xi, 05/09/2003.
* Modified by Xuemei Xi, Mohan Dunga, 07/29/2005.
* Modified by Mohan Dunga, 12/13/2006
**********/
@ -411,6 +413,18 @@ IFvalue *value;
case BSIM4_MOD_EGIDL:
value->rValue = model->BSIM4egidl;
return(OK);
case BSIM4_MOD_AGISL:
value->rValue = model->BSIM4agisl;
return(OK);
case BSIM4_MOD_BGISL:
value->rValue = model->BSIM4bgisl;
return(OK);
case BSIM4_MOD_CGISL:
value->rValue = model->BSIM4cgisl;
return(OK);
case BSIM4_MOD_EGISL:
value->rValue = model->BSIM4egisl;
return(OK);
case BSIM4_MOD_AIGC:
value->rValue = model->BSIM4aigc;
return(OK);
@ -429,6 +443,24 @@ IFvalue *value;
case BSIM4_MOD_CIGSD:
value->rValue = model->BSIM4cigsd;
return(OK);
case BSIM4_MOD_AIGS:
value->rValue = model->BSIM4aigs;
return(OK);
case BSIM4_MOD_BIGS:
value->rValue = model->BSIM4bigs;
return(OK);
case BSIM4_MOD_CIGS:
value->rValue = model->BSIM4cigs;
return(OK);
case BSIM4_MOD_AIGD:
value->rValue = model->BSIM4aigd;
return(OK);
case BSIM4_MOD_BIGD:
value->rValue = model->BSIM4bigd;
return(OK);
case BSIM4_MOD_CIGD:
value->rValue = model->BSIM4cigd;
return(OK);
case BSIM4_MOD_AIGBACC:
value->rValue = model->BSIM4aigbacc;
return(OK);
@ -547,6 +579,15 @@ IFvalue *value;
case BSIM4_MOD_NJTSSWG:
value->rValue = model->BSIM4njtsswg;
return(OK);
case BSIM4_MOD_NJTSD:
value->rValue = model->BSIM4njtsd;
return(OK);
case BSIM4_MOD_NJTSSWD:
value->rValue = model->BSIM4njtsswd;
return(OK);
case BSIM4_MOD_NJTSSWGD:
value->rValue = model->BSIM4njtsswgd;
return(OK);
case BSIM4_MOD_XTSS:
value->rValue = model->BSIM4xtss;
return(OK);
@ -574,6 +615,15 @@ IFvalue *value;
case BSIM4_MOD_TNJTSSWG:
value->rValue = model->BSIM4tnjtsswg;
return(OK);
case BSIM4_MOD_TNJTSD:
value->rValue = model->BSIM4tnjtsd;
return(OK);
case BSIM4_MOD_TNJTSSWD:
value->rValue = model->BSIM4tnjtsswd;
return(OK);
case BSIM4_MOD_TNJTSSWGD:
value->rValue = model->BSIM4tnjtsswgd;
return(OK);
case BSIM4_MOD_VTSS:
value->rValue = model->BSIM4vtss;
return(OK);
@ -729,6 +779,9 @@ IFvalue *value;
case BSIM4_MOD_DLCIG:
value->rValue = model->BSIM4dlcig;
return(OK);
case BSIM4_MOD_DLCIGD:
value->rValue = model->BSIM4dlcigd;
return(OK);
case BSIM4_MOD_DWJ:
value->rValue = model->BSIM4dwj;
return(OK);
@ -1055,6 +1108,18 @@ IFvalue *value;
case BSIM4_MOD_LEGIDL:
value->rValue = model->BSIM4legidl;
return(OK);
case BSIM4_MOD_LAGISL:
value->rValue = model->BSIM4lagisl;
return(OK);
case BSIM4_MOD_LBGISL:
value->rValue = model->BSIM4lbgisl;
return(OK);
case BSIM4_MOD_LCGISL:
value->rValue = model->BSIM4lcgisl;
return(OK);
case BSIM4_MOD_LEGISL:
value->rValue = model->BSIM4legisl;
return(OK);
case BSIM4_MOD_LAIGC:
value->rValue = model->BSIM4laigc;
return(OK);
@ -1073,6 +1138,24 @@ IFvalue *value;
case BSIM4_MOD_LCIGSD:
value->rValue = model->BSIM4lcigsd;
return(OK);
case BSIM4_MOD_LAIGS:
value->rValue = model->BSIM4laigs;
return(OK);
case BSIM4_MOD_LBIGS:
value->rValue = model->BSIM4lbigs;
return(OK);
case BSIM4_MOD_LCIGS:
value->rValue = model->BSIM4lcigs;
return(OK);
case BSIM4_MOD_LAIGD:
value->rValue = model->BSIM4laigd;
return(OK);
case BSIM4_MOD_LBIGD:
value->rValue = model->BSIM4lbigd;
return(OK);
case BSIM4_MOD_LCIGD:
value->rValue = model->BSIM4lcigd;
return(OK);
case BSIM4_MOD_LAIGBACC:
value->rValue = model->BSIM4laigbacc;
return(OK);
@ -1439,6 +1522,18 @@ IFvalue *value;
case BSIM4_MOD_WEGIDL:
value->rValue = model->BSIM4wegidl;
return(OK);
case BSIM4_MOD_WAGISL:
value->rValue = model->BSIM4wagisl;
return(OK);
case BSIM4_MOD_WBGISL:
value->rValue = model->BSIM4wbgisl;
return(OK);
case BSIM4_MOD_WCGISL:
value->rValue = model->BSIM4wcgisl;
return(OK);
case BSIM4_MOD_WEGISL:
value->rValue = model->BSIM4wegisl;
return(OK);
case BSIM4_MOD_WAIGC:
value->rValue = model->BSIM4waigc;
return(OK);
@ -1457,6 +1552,24 @@ IFvalue *value;
case BSIM4_MOD_WCIGSD:
value->rValue = model->BSIM4wcigsd;
return(OK);
case BSIM4_MOD_WAIGS:
value->rValue = model->BSIM4waigs;
return(OK);
case BSIM4_MOD_WBIGS:
value->rValue = model->BSIM4wbigs;
return(OK);
case BSIM4_MOD_WCIGS:
value->rValue = model->BSIM4wcigs;
return(OK);
case BSIM4_MOD_WAIGD:
value->rValue = model->BSIM4waigd;
return(OK);
case BSIM4_MOD_WBIGD:
value->rValue = model->BSIM4wbigd;
return(OK);
case BSIM4_MOD_WCIGD:
value->rValue = model->BSIM4wcigd;
return(OK);
case BSIM4_MOD_WAIGBACC:
value->rValue = model->BSIM4waigbacc;
return(OK);
@ -1823,6 +1936,18 @@ IFvalue *value;
case BSIM4_MOD_PEGIDL:
value->rValue = model->BSIM4pegidl;
return(OK);
case BSIM4_MOD_PAGISL:
value->rValue = model->BSIM4pagisl;
return(OK);
case BSIM4_MOD_PBGISL:
value->rValue = model->BSIM4pbgisl;
return(OK);
case BSIM4_MOD_PCGISL:
value->rValue = model->BSIM4pcgisl;
return(OK);
case BSIM4_MOD_PEGISL:
value->rValue = model->BSIM4pegisl;
return(OK);
case BSIM4_MOD_PAIGC:
value->rValue = model->BSIM4paigc;
return(OK);
@ -1841,6 +1966,24 @@ IFvalue *value;
case BSIM4_MOD_PCIGSD:
value->rValue = model->BSIM4pcigsd;
return(OK);
case BSIM4_MOD_PAIGS:
value->rValue = model->BSIM4paigs;
return(OK);
case BSIM4_MOD_PBIGS:
value->rValue = model->BSIM4pbigs;
return(OK);
case BSIM4_MOD_PCIGS:
value->rValue = model->BSIM4pcigs;
return(OK);
case BSIM4_MOD_PAIGD:
value->rValue = model->BSIM4paigd;
return(OK);
case BSIM4_MOD_PBIGD:
value->rValue = model->BSIM4pbigd;
return(OK);
case BSIM4_MOD_PCIGD:
value->rValue = model->BSIM4pcigd;
return(OK);
case BSIM4_MOD_PAIGBACC:
value->rValue = model->BSIM4paigbacc;
return(OK);

7
src/spicelib/devices/bsim4/b4mdel.c
View File

@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4mdel.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4mdel.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
**********/

228
src/spicelib/devices/bsim4/b4mpar.c
View File

@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4mpar.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4mpar.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 04/06/2001.
* Modified by Xuemei Xi, 10/05/2001.
@ -12,6 +13,7 @@
* Modified by Xuemei Xi, 05/09/2003.
* Modified by Xuemei Xi, 03/04/2004.
* Modified by Xuemei Xi, Mohan Dunga, 07/29/2005.
* Modified by Mohan Dunga, 12/13/2006
**********/
#include "ngspice.h"
@ -547,6 +549,10 @@ GENmodel *inMod;
mod->BSIM4alpha1 = value->rValue;
mod->BSIM4alpha1Given = TRUE;
break;
case BSIM4_MOD_PHIN :
mod->BSIM4phin = value->rValue;
mod->BSIM4phinGiven = TRUE;
break;
case BSIM4_MOD_AGIDL :
mod->BSIM4agidl = value->rValue;
mod->BSIM4agidlGiven = TRUE;
@ -559,14 +565,26 @@ GENmodel *inMod;
mod->BSIM4cgidl = value->rValue;
mod->BSIM4cgidlGiven = TRUE;
break;
case BSIM4_MOD_PHIN :
mod->BSIM4phin = value->rValue;
mod->BSIM4phinGiven = TRUE;
break;
case BSIM4_MOD_EGIDL :
mod->BSIM4egidl = value->rValue;
mod->BSIM4egidlGiven = TRUE;
break;
case BSIM4_MOD_AGISL :
mod->BSIM4agisl = value->rValue;
mod->BSIM4agislGiven = TRUE;
break;
case BSIM4_MOD_BGISL :
mod->BSIM4bgisl = value->rValue;
mod->BSIM4bgislGiven = TRUE;
break;
case BSIM4_MOD_CGISL :
mod->BSIM4cgisl = value->rValue;
mod->BSIM4cgislGiven = TRUE;
break;
case BSIM4_MOD_EGISL :
mod->BSIM4egisl = value->rValue;
mod->BSIM4egislGiven = TRUE;
break;
case BSIM4_MOD_AIGC :
mod->BSIM4aigc = value->rValue;
mod->BSIM4aigcGiven = TRUE;
@ -591,6 +609,30 @@ GENmodel *inMod;
mod->BSIM4cigsd = value->rValue;
mod->BSIM4cigsdGiven = TRUE;
break;
case BSIM4_MOD_AIGS :
mod->BSIM4aigs = value->rValue;
mod->BSIM4aigsGiven = TRUE;
break;
case BSIM4_MOD_BIGS :
mod->BSIM4bigs = value->rValue;
mod->BSIM4bigsGiven = TRUE;
break;
case BSIM4_MOD_CIGS :
mod->BSIM4cigs = value->rValue;
mod->BSIM4cigsGiven = TRUE;
break;
case BSIM4_MOD_AIGD :
mod->BSIM4aigd = value->rValue;
mod->BSIM4aigdGiven = TRUE;
break;
case BSIM4_MOD_BIGD :
mod->BSIM4bigd = value->rValue;
mod->BSIM4bigdGiven = TRUE;
break;
case BSIM4_MOD_CIGD :
mod->BSIM4cigd = value->rValue;
mod->BSIM4cigdGiven = TRUE;
break;
case BSIM4_MOD_AIGBACC :
mod->BSIM4aigbacc = value->rValue;
mod->BSIM4aigbaccGiven = TRUE;
@ -925,6 +967,18 @@ GENmodel *inMod;
mod->BSIM4njtsswg = value->rValue;
mod->BSIM4njtsswgGiven = TRUE;
break;
case BSIM4_MOD_NJTSD :
mod->BSIM4njtsd = value->rValue;
mod->BSIM4njtsdGiven = TRUE;
break;
case BSIM4_MOD_NJTSSWD :
mod->BSIM4njtsswd = value->rValue;
mod->BSIM4njtsswdGiven = TRUE;
break;
case BSIM4_MOD_NJTSSWGD :
mod->BSIM4njtsswgd = value->rValue;
mod->BSIM4njtsswgdGiven = TRUE;
break;
case BSIM4_MOD_XTSS :
mod->BSIM4xtss = value->rValue;
mod->BSIM4xtssGiven = TRUE;
@ -961,6 +1015,18 @@ GENmodel *inMod;
mod->BSIM4tnjtsswg = value->rValue;
mod->BSIM4tnjtsswgGiven = TRUE;
break;
case BSIM4_MOD_TNJTSD :
mod->BSIM4tnjtsd = value->rValue;
mod->BSIM4tnjtsdGiven = TRUE;
break;
case BSIM4_MOD_TNJTSSWD :
mod->BSIM4tnjtsswd = value->rValue;
mod->BSIM4tnjtsswdGiven = TRUE;
break;
case BSIM4_MOD_TNJTSSWGD :
mod->BSIM4tnjtsswgd = value->rValue;
mod->BSIM4tnjtsswgdGiven = TRUE;
break;
case BSIM4_MOD_VTSS :
mod->BSIM4vtss = value->rValue;
mod->BSIM4vtssGiven = TRUE;
@ -1173,6 +1239,10 @@ GENmodel *inMod;
mod->BSIM4dlcig = value->rValue;
mod->BSIM4dlcigGiven = TRUE;
break;
case BSIM4_MOD_DLCIGD :
mod->BSIM4dlcigd = value->rValue;
mod->BSIM4dlcigdGiven = TRUE;
break;
case BSIM4_MOD_DWJ :
mod->BSIM4dwj = value->rValue;
mod->BSIM4dwjGiven = TRUE;
@ -1589,6 +1659,10 @@ GENmodel *inMod;
mod->BSIM4lbeta0 = value->rValue;
mod->BSIM4lbeta0Given = TRUE;
break;
case BSIM4_MOD_LPHIN :
mod->BSIM4lphin = value->rValue;
mod->BSIM4lphinGiven = TRUE;
break;
case BSIM4_MOD_LAGIDL :
mod->BSIM4lagidl = value->rValue;
mod->BSIM4lagidlGiven = TRUE;
@ -1601,14 +1675,26 @@ GENmodel *inMod;
mod->BSIM4lcgidl = value->rValue;
mod->BSIM4lcgidlGiven = TRUE;
break;
case BSIM4_MOD_LPHIN :
mod->BSIM4lphin = value->rValue;
mod->BSIM4lphinGiven = TRUE;
break;
case BSIM4_MOD_LEGIDL :
mod->BSIM4legidl = value->rValue;
mod->BSIM4legidlGiven = TRUE;
break;
case BSIM4_MOD_LAGISL :
mod->BSIM4lagisl = value->rValue;
mod->BSIM4lagislGiven = TRUE;
break;
case BSIM4_MOD_LBGISL :
mod->BSIM4lbgisl = value->rValue;
mod->BSIM4lbgislGiven = TRUE;
break;
case BSIM4_MOD_LCGISL :
mod->BSIM4lcgisl = value->rValue;
mod->BSIM4lcgislGiven = TRUE;
break;
case BSIM4_MOD_LEGISL :
mod->BSIM4legisl = value->rValue;
mod->BSIM4legislGiven = TRUE;
break;
case BSIM4_MOD_LAIGC :
mod->BSIM4laigc = value->rValue;
mod->BSIM4laigcGiven = TRUE;
@ -1633,6 +1719,30 @@ GENmodel *inMod;
mod->BSIM4lcigsd = value->rValue;
mod->BSIM4lcigsdGiven = TRUE;
break;
case BSIM4_MOD_LAIGS :
mod->BSIM4laigs = value->rValue;
mod->BSIM4laigsGiven = TRUE;
break;
case BSIM4_MOD_LBIGS :
mod->BSIM4lbigs = value->rValue;
mod->BSIM4lbigsGiven = TRUE;
break;
case BSIM4_MOD_LCIGS :
mod->BSIM4lcigs = value->rValue;
mod->BSIM4lcigsGiven = TRUE;
break;
case BSIM4_MOD_LAIGD :
mod->BSIM4laigd = value->rValue;
mod->BSIM4laigdGiven = TRUE;
break;
case BSIM4_MOD_LBIGD :
mod->BSIM4lbigd = value->rValue;
mod->BSIM4lbigdGiven = TRUE;
break;
case BSIM4_MOD_LCIGD :
mod->BSIM4lcigd = value->rValue;
mod->BSIM4lcigdGiven = TRUE;
break;
case BSIM4_MOD_LAIGBACC :
mod->BSIM4laigbacc = value->rValue;
mod->BSIM4laigbaccGiven = TRUE;
@ -2105,6 +2215,10 @@ GENmodel *inMod;
mod->BSIM4wbeta0 = value->rValue;
mod->BSIM4wbeta0Given = TRUE;
break;
case BSIM4_MOD_WPHIN :
mod->BSIM4wphin = value->rValue;
mod->BSIM4wphinGiven = TRUE;
break;
case BSIM4_MOD_WAGIDL :
mod->BSIM4wagidl = value->rValue;
mod->BSIM4wagidlGiven = TRUE;
@ -2117,14 +2231,26 @@ GENmodel *inMod;
mod->BSIM4wcgidl = value->rValue;
mod->BSIM4wcgidlGiven = TRUE;
break;
case BSIM4_MOD_WPHIN :
mod->BSIM4wphin = value->rValue;
mod->BSIM4wphinGiven = TRUE;
break;
case BSIM4_MOD_WEGIDL :
mod->BSIM4wegidl = value->rValue;
mod->BSIM4wegidlGiven = TRUE;
break;
case BSIM4_MOD_WAGISL :
mod->BSIM4wagisl = value->rValue;
mod->BSIM4wagislGiven = TRUE;
break;
case BSIM4_MOD_WBGISL :
mod->BSIM4wbgisl = value->rValue;
mod->BSIM4wbgislGiven = TRUE;
break;
case BSIM4_MOD_WCGISL :
mod->BSIM4wcgisl = value->rValue;
mod->BSIM4wcgislGiven = TRUE;
break;
case BSIM4_MOD_WEGISL :
mod->BSIM4wegisl = value->rValue;
mod->BSIM4wegislGiven = TRUE;
break;
case BSIM4_MOD_WAIGC :
mod->BSIM4waigc = value->rValue;
mod->BSIM4waigcGiven = TRUE;
@ -2149,6 +2275,30 @@ GENmodel *inMod;
mod->BSIM4wcigsd = value->rValue;
mod->BSIM4wcigsdGiven = TRUE;
break;
case BSIM4_MOD_WAIGS :
mod->BSIM4waigs = value->rValue;
mod->BSIM4waigsGiven = TRUE;
break;
case BSIM4_MOD_WBIGS :
mod->BSIM4wbigs = value->rValue;
mod->BSIM4wbigsGiven = TRUE;
break;
case BSIM4_MOD_WCIGS :
mod->BSIM4wcigs = value->rValue;
mod->BSIM4wcigsGiven = TRUE;
break;
case BSIM4_MOD_WAIGD :
mod->BSIM4waigd = value->rValue;
mod->BSIM4waigdGiven = TRUE;
break;
case BSIM4_MOD_WBIGD :
mod->BSIM4wbigd = value->rValue;
mod->BSIM4wbigdGiven = TRUE;
break;
case BSIM4_MOD_WCIGD :
mod->BSIM4wcigd = value->rValue;
mod->BSIM4wcigdGiven = TRUE;
break;
case BSIM4_MOD_WAIGBACC :
mod->BSIM4waigbacc = value->rValue;
mod->BSIM4waigbaccGiven = TRUE;
@ -2621,6 +2771,10 @@ GENmodel *inMod;
mod->BSIM4pbeta0 = value->rValue;
mod->BSIM4pbeta0Given = TRUE;
break;
case BSIM4_MOD_PPHIN :
mod->BSIM4pphin = value->rValue;
mod->BSIM4pphinGiven = TRUE;
break;
case BSIM4_MOD_PAGIDL :
mod->BSIM4pagidl = value->rValue;
mod->BSIM4pagidlGiven = TRUE;
@ -2633,14 +2787,26 @@ GENmodel *inMod;
mod->BSIM4pcgidl = value->rValue;
mod->BSIM4pcgidlGiven = TRUE;
break;
case BSIM4_MOD_PPHIN :
mod->BSIM4pphin = value->rValue;
mod->BSIM4pphinGiven = TRUE;
break;
case BSIM4_MOD_PEGIDL :
mod->BSIM4pegidl = value->rValue;
mod->BSIM4pegidlGiven = TRUE;
break;
case BSIM4_MOD_PAGISL :
mod->BSIM4pagisl = value->rValue;
mod->BSIM4pagislGiven = TRUE;
break;
case BSIM4_MOD_PBGISL :
mod->BSIM4pbgisl = value->rValue;
mod->BSIM4pbgislGiven = TRUE;
break;
case BSIM4_MOD_PCGISL :
mod->BSIM4pcgisl = value->rValue;
mod->BSIM4pcgislGiven = TRUE;
break;
case BSIM4_MOD_PEGISL :
mod->BSIM4pegisl = value->rValue;
mod->BSIM4pegislGiven = TRUE;
break;
case BSIM4_MOD_PAIGC :
mod->BSIM4paigc = value->rValue;
mod->BSIM4paigcGiven = TRUE;
@ -2665,6 +2831,30 @@ GENmodel *inMod;
mod->BSIM4pcigsd = value->rValue;
mod->BSIM4pcigsdGiven = TRUE;
break;
case BSIM4_MOD_PAIGS :
mod->BSIM4paigs = value->rValue;
mod->BSIM4paigsGiven = TRUE;
break;
case BSIM4_MOD_PBIGS :
mod->BSIM4pbigs = value->rValue;
mod->BSIM4pbigsGiven = TRUE;
break;
case BSIM4_MOD_PCIGS :
mod->BSIM4pcigs = value->rValue;
mod->BSIM4pcigsGiven = TRUE;
break;
case BSIM4_MOD_PAIGD :
mod->BSIM4paigd = value->rValue;
mod->BSIM4paigdGiven = TRUE;
break;
case BSIM4_MOD_PBIGD :
mod->BSIM4pbigd = value->rValue;
mod->BSIM4pbigdGiven = TRUE;
break;
case BSIM4_MOD_PCIGD :
mod->BSIM4pcigd = value->rValue;
mod->BSIM4pcigdGiven = TRUE;
break;
case BSIM4_MOD_PAIGBACC :
mod->BSIM4paigbacc = value->rValue;
mod->BSIM4paigbaccGiven = TRUE;

21
src/spicelib/devices/bsim4/b4noi.c
View File

@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4noi.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4noi.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 04/06/2001.
* Modified by Xuemei Xi, 10/05/2001.
@ -12,6 +13,7 @@
* Modified by Xuemei Xi, 05/09/2003.
* Modified by Xuemei Xi, 03/04/2004.
* Modified by Xuemei Xi, 07/29/2005.
* Modified by Mohan Dunga, 12/13/2006
**********/
#include "ngspice.h"
@ -93,7 +95,7 @@ double tempInoise;
double noizDens[BSIM4NSRCS];
double lnNdens[BSIM4NSRCS];
double T0, T1, T2, T5, T10, T11;
double T0, T1, T2, T5, T10, T11;
double Vds, Ssi, Swi;
double tmp=0.0, gdpr, gspr, npart_theta=0.0, npart_beta=0.0, igsquare, bodymode;
@ -240,12 +242,21 @@ int i;
gspr * m);
if ((here->BSIM4rgateMod == 1) || (here->BSIM4rgateMod == 2))
if (here->BSIM4rgateMod == 1)
{ NevalSrc(&noizDens[BSIM4RGNOIZ],
&lnNdens[BSIM4RGNOIZ], ckt, THERMNOISE,
here->BSIM4gNodePrime, here->BSIM4gNodeExt,
here->BSIM4grgeltd * m);
}
else if (here->BSIM4rgateMod == 2)
{
T0 = 1.0 + here->BSIM4grgeltd/here->BSIM4gcrg;
T1 = T0 * T0;
NevalSrc(&noizDens[BSIM4RGNOIZ],
&lnNdens[BSIM4RGNOIZ], ckt, THERMNOISE,
here->BSIM4gNodePrime, here->BSIM4gNodeExt,
here->BSIM4grgeltd * m / T1);
}
else if (here->BSIM4rgateMod == 3)
{ NevalSrc(&noizDens[BSIM4RGNOIZ],
&lnNdens[BSIM4RGNOIZ], ckt, THERMNOISE,

6
src/spicelib/devices/bsim4/b4par.c
View File

@ -1,8 +1,8 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2004 Regents of the University of California. All rights reserved.
* File: b4par.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4par.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.

7
src/spicelib/devices/bsim4/b4pzld.c
View File

@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4pzld.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4pzld.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 10/05/2001.
**********/

349
src/spicelib/devices/bsim4/b4set.c
View File

@ -1,8 +1,8 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4set.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4set.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Project Director: Prof. Chenming Hu.
@ -12,6 +12,7 @@
* Modified by Xuemei Xi, 05/09/2003.
* Modified by Xuemei Xi, 03/04/2004.
* Modified by Xuemei Xi, Mohan Dunga, 07/29/2005.
* Modified by Mohan Dunga, 12/13/2006
**********/
#include "ngspice.h"
@ -174,7 +175,7 @@ JOB *job;
}
if (!model->BSIM4versionGiven)
model->BSIM4version = "4.5.0";
model->BSIM4version = "4.6.0";
if (!model->BSIM4toxrefGiven)
model->BSIM4toxref = 30.0e-10;
if (!model->BSIM4toxeGiven)
@ -268,6 +269,8 @@ JOB *job;
model->BSIM4dsub = model->BSIM4drout;
if (!model->BSIM4vth0Given)
model->BSIM4vth0 = (model->BSIM4type == NMOS) ? 0.7 : -0.7;
if (!model->BSIM4vfbGiven)
model->BSIM4vfb = -1.0;
if (!model->BSIM4euGiven)
model->BSIM4eu = (model->BSIM4type == NMOS) ? 1.67 : 1.0;;
if (!model->BSIM4uaGiven)
@ -283,7 +286,7 @@ JOB *job;
if (!model->BSIM4uc1Given)
model->BSIM4uc1 = (model->BSIM4mobMod == 1) ? -0.056 : -0.056e-9;
if (!model->BSIM4udGiven)
model->BSIM4ud = 1.0e14; /* unit m**(-2) */
model->BSIM4ud = 0.0; /* unit m**(-2) */
if (!model->BSIM4ud1Given)
model->BSIM4ud1 = 0.0;
if (!model->BSIM4upGiven)
@ -370,18 +373,76 @@ JOB *job;
model->BSIM4cgidl = 0.5; /* V^3 */
if (!model->BSIM4egidlGiven)
model->BSIM4egidl = 0.8; /* V */
if (!model->BSIM4agislGiven)
{
if (model->BSIM4agidlGiven)
model->BSIM4agisl = model->BSIM4agidl;
else
model->BSIM4agisl = 0.0;
}
if (!model->BSIM4bgislGiven)
{
if (model->BSIM4bgidlGiven)
model->BSIM4bgisl = model->BSIM4bgidl;
else
model->BSIM4bgisl = 2.3e9; /* V/m */
}
if (!model->BSIM4cgislGiven)
{
if (model->BSIM4cgidlGiven)
model->BSIM4cgisl = model->BSIM4cgidl;
else
model->BSIM4cgisl = 0.5; /* V^3 */
}
if (!model->BSIM4egislGiven)
{
if (model->BSIM4egidlGiven)
model->BSIM4egisl = model->BSIM4egidl;
else
model->BSIM4egisl = 0.8; /* V */
}
if (!model->BSIM4aigcGiven)
model->BSIM4aigc = (model->BSIM4type == NMOS) ? 1.36e-2 : 9.80e-3;
if (!model->BSIM4bigcGiven)
model->BSIM4bigc = (model->BSIM4type == NMOS) ? 1.71e-3 : 7.59e-4;
if (!model->BSIM4cigcGiven)
model->BSIM4cigc = (model->BSIM4type == NMOS) ? 0.075 : 0.03;
if (!model->BSIM4aigsdGiven)
if (model->BSIM4aigsdGiven)
{
model->BSIM4aigs = model->BSIM4aigd = model->BSIM4aigsd;
}
else
{
model->BSIM4aigsd = (model->BSIM4type == NMOS) ? 1.36e-2 : 9.80e-3;
if (!model->BSIM4bigsdGiven)
if (!model->BSIM4aigsGiven)
model->BSIM4aigs = (model->BSIM4type == NMOS) ? 1.36e-2 : 9.80e-3;
if (!model->BSIM4aigdGiven)
model->BSIM4aigd = (model->BSIM4type == NMOS) ? 1.36e-2 : 9.80e-3;
}
if (model->BSIM4bigsdGiven)
{
model->BSIM4bigs = model->BSIM4bigd = model->BSIM4bigsd;
}
else
{
model->BSIM4bigsd = (model->BSIM4type == NMOS) ? 1.71e-3 : 7.59e-4;
if (!model->BSIM4cigsdGiven)
model->BSIM4cigsd = (model->BSIM4type == NMOS) ? 0.075 : 0.03;
if (!model->BSIM4bigsGiven)
model->BSIM4bigs = (model->BSIM4type == NMOS) ? 1.71e-3 : 7.59e-4;
if (!model->BSIM4bigdGiven)
model->BSIM4bigd = (model->BSIM4type == NMOS) ? 1.71e-3 : 7.59e-4;
}
if (model->BSIM4cigsdGiven)
{
model->BSIM4cigs = model->BSIM4cigd = model->BSIM4cigsd;
}
else
{
model->BSIM4cigsd = (model->BSIM4type == NMOS) ? 0.075 : 0.03;
if (!model->BSIM4cigsGiven)
model->BSIM4cigs = (model->BSIM4type == NMOS) ? 0.075 : 0.03;
if (!model->BSIM4cigdGiven)
model->BSIM4cigd = (model->BSIM4type == NMOS) ? 0.075 : 0.03;
}
if (!model->BSIM4aigbaccGiven)
model->BSIM4aigbacc = 1.36e-2;
if (!model->BSIM4bigbaccGiven)
@ -749,18 +810,79 @@ JOB *job;
model->BSIM4lcgidl = 0.0;
if (!model->BSIM4legidlGiven)
model->BSIM4legidl = 0.0;
if (!model->BSIM4lagislGiven)
{
if (model->BSIM4lagidlGiven)
model->BSIM4lagisl = model->BSIM4lagidl;
else
model->BSIM4lagisl = 0.0;
}
if (!model->BSIM4lbgislGiven)
{
if (model->BSIM4lbgidlGiven)
model->BSIM4lbgisl = model->BSIM4lbgidl;
else
model->BSIM4lbgisl = 0.0;
}
if (!model->BSIM4lcgislGiven)
{
if (model->BSIM4lcgidlGiven)
model->BSIM4lcgisl = model->BSIM4lcgidl;
else
model->BSIM4lcgisl = 0.0;
}
if (!model->BSIM4legislGiven)
{
if (model->BSIM4legidlGiven)
model->BSIM4legisl = model->BSIM4legidl;
else
model->BSIM4legisl = 0.0;
}
if (!model->BSIM4laigcGiven)
model->BSIM4laigc = 0.0;
if (!model->BSIM4lbigcGiven)
model->BSIM4lbigc = 0.0;
if (!model->BSIM4lcigcGiven)
model->BSIM4lcigc = 0.0;
if (!model->BSIM4laigsdGiven)
model->BSIM4laigsd = 0.0;
if (!model->BSIM4lbigsdGiven)
model->BSIM4lbigsd = 0.0;
if (!model->BSIM4lcigsdGiven)
model->BSIM4lcigsd = 0.0;
if (!model->BSIM4aigsdGiven && (model->BSIM4aigsGiven || model->BSIM4aigdGiven))
{
if (!model->BSIM4laigsGiven)
model->BSIM4laigs = 0.0;
if (!model->BSIM4laigdGiven)
model->BSIM4laigd = 0.0;
}
else
{
if (!model->BSIM4laigsdGiven)
model->BSIM4laigsd = 0.0;
model->BSIM4laigs = model->BSIM4laigd = model->BSIM4laigsd;
}
if (!model->BSIM4bigsdGiven && (model->BSIM4bigsGiven || model->BSIM4bigdGiven))
{
if (!model->BSIM4lbigsGiven)
model->BSIM4lbigs = 0.0;
if (!model->BSIM4lbigdGiven)
model->BSIM4lbigd = 0.0;
}
else
{
if (!model->BSIM4lbigsdGiven)
model->BSIM4lbigsd = 0.0;
model->BSIM4lbigs = model->BSIM4lbigd = model->BSIM4lbigsd;
}
if (!model->BSIM4cigsdGiven && (model->BSIM4cigsGiven || model->BSIM4cigdGiven))
{
if (!model->BSIM4lcigsGiven)
model->BSIM4lcigs = 0.0;
if (!model->BSIM4lcigdGiven)
model->BSIM4lcigd = 0.0;
}
else
{
if (!model->BSIM4lcigsdGiven)
model->BSIM4lcigsd = 0.0;
model->BSIM4lcigs = model->BSIM4lcigd = model->BSIM4lcigsd;
}
if (!model->BSIM4laigbaccGiven)
model->BSIM4laigbacc = 0.0;
if (!model->BSIM4lbigbaccGiven)
@ -1003,18 +1125,79 @@ JOB *job;
model->BSIM4wcgidl = 0.0;
if (!model->BSIM4wegidlGiven)
model->BSIM4wegidl = 0.0;
if (!model->BSIM4wagislGiven)
{
if (model->BSIM4wagidlGiven)
model->BSIM4wagisl = model->BSIM4wagidl;
else
model->BSIM4wagisl = 0.0;
}
if (!model->BSIM4wbgislGiven)
{
if (model->BSIM4wbgidlGiven)
model->BSIM4wbgisl = model->BSIM4wbgidl;
else
model->BSIM4wbgisl = 0.0;
}
if (!model->BSIM4wcgislGiven)
{
if (model->BSIM4wcgidlGiven)
model->BSIM4wcgisl = model->BSIM4wcgidl;
else
model->BSIM4wcgisl = 0.0;
}
if (!model->BSIM4wegislGiven)
{
if (model->BSIM4wegidlGiven)
model->BSIM4wegisl = model->BSIM4wegidl;
else
model->BSIM4wegisl = 0.0;
}
if (!model->BSIM4waigcGiven)
model->BSIM4waigc = 0.0;
if (!model->BSIM4wbigcGiven)
model->BSIM4wbigc = 0.0;
if (!model->BSIM4wcigcGiven)
model->BSIM4wcigc = 0.0;
if (!model->BSIM4waigsdGiven)
model->BSIM4waigsd = 0.0;
if (!model->BSIM4wbigsdGiven)
model->BSIM4wbigsd = 0.0;
if (!model->BSIM4wcigsdGiven)
model->BSIM4wcigsd = 0.0;
if (!model->BSIM4aigsdGiven && (model->BSIM4aigsGiven || model->BSIM4aigdGiven))
{
if (!model->BSIM4waigsGiven)
model->BSIM4waigs = 0.0;
if (!model->BSIM4waigdGiven)
model->BSIM4waigd = 0.0;
}
else
{
if (!model->BSIM4waigsdGiven)
model->BSIM4waigsd = 0.0;
model->BSIM4waigs = model->BSIM4waigd = model->BSIM4waigsd;
}
if (!model->BSIM4bigsdGiven && (model->BSIM4bigsGiven || model->BSIM4bigdGiven))
{
if (!model->BSIM4wbigsGiven)
model->BSIM4wbigs = 0.0;
if (!model->BSIM4wbigdGiven)
model->BSIM4wbigd = 0.0;
}
else
{
if (!model->BSIM4wbigsdGiven)
model->BSIM4wbigsd = 0.0;
model->BSIM4wbigs = model->BSIM4wbigd = model->BSIM4wbigsd;
}
if (!model->BSIM4cigsdGiven && (model->BSIM4cigsGiven || model->BSIM4cigdGiven))
{
if (!model->BSIM4wcigsGiven)
model->BSIM4wcigs = 0.0;
if (!model->BSIM4wcigdGiven)
model->BSIM4wcigd = 0.0;
}
else
{
if (!model->BSIM4wcigsdGiven)
model->BSIM4wcigsd = 0.0;
model->BSIM4wcigs = model->BSIM4wcigd = model->BSIM4wcigsd;
}
if (!model->BSIM4waigbaccGiven)
model->BSIM4waigbacc = 0.0;
if (!model->BSIM4wbigbaccGiven)
@ -1257,18 +1440,79 @@ JOB *job;
model->BSIM4pcgidl = 0.0;
if (!model->BSIM4pegidlGiven)
model->BSIM4pegidl = 0.0;
if (!model->BSIM4pagislGiven)
{
if (model->BSIM4pagidlGiven)
model->BSIM4pagisl = model->BSIM4pagidl;
else
model->BSIM4pagisl = 0.0;
}
if (!model->BSIM4pbgislGiven)
{
if (model->BSIM4pbgidlGiven)
model->BSIM4pbgisl = model->BSIM4pbgidl;
else
model->BSIM4pbgisl = 0.0;
}
if (!model->BSIM4pcgislGiven)
{
if (model->BSIM4pcgidlGiven)
model->BSIM4pcgisl = model->BSIM4pcgidl;
else
model->BSIM4pcgisl = 0.0;
}
if (!model->BSIM4pegislGiven)
{
if (model->BSIM4pegidlGiven)
model->BSIM4pegisl = model->BSIM4pegidl;
else
model->BSIM4pegisl = 0.0;
}
if (!model->BSIM4paigcGiven)
model->BSIM4paigc = 0.0;
if (!model->BSIM4pbigcGiven)
model->BSIM4pbigc = 0.0;
if (!model->BSIM4pcigcGiven)
model->BSIM4pcigc = 0.0;
if (!model->BSIM4paigsdGiven)
model->BSIM4paigsd = 0.0;
if (!model->BSIM4pbigsdGiven)
model->BSIM4pbigsd = 0.0;
if (!model->BSIM4pcigsdGiven)
model->BSIM4pcigsd = 0.0;
if (!model->BSIM4aigsdGiven && (model->BSIM4aigsGiven || model->BSIM4aigdGiven))
{
if (!model->BSIM4paigsGiven)
model->BSIM4paigs = 0.0;
if (!model->BSIM4paigdGiven)
model->BSIM4paigd = 0.0;
}
else
{
if (!model->BSIM4paigsdGiven)
model->BSIM4paigsd = 0.0;
model->BSIM4paigs = model->BSIM4paigd = model->BSIM4paigsd;
}
if (!model->BSIM4bigsdGiven && (model->BSIM4bigsGiven || model->BSIM4bigdGiven))
{
if (!model->BSIM4pbigsGiven)
model->BSIM4pbigs = 0.0;
if (!model->BSIM4pbigdGiven)
model->BSIM4pbigd = 0.0;
}
else
{
if (!model->BSIM4pbigsdGiven)
model->BSIM4pbigsd = 0.0;
model->BSIM4pbigs = model->BSIM4pbigd = model->BSIM4pbigsd;
}
if (!model->BSIM4cigsdGiven && (model->BSIM4cigsGiven || model->BSIM4cigdGiven))
{
if (!model->BSIM4pcigsGiven)
model->BSIM4pcigs = 0.0;
if (!model->BSIM4pcigdGiven)
model->BSIM4pcigd = 0.0;
}
else
{
if (!model->BSIM4pcigsdGiven)
model->BSIM4pcigsd = 0.0;
model->BSIM4pcigs = model->BSIM4pcigd = model->BSIM4pcigsd;
}
if (!model->BSIM4paigbaccGiven)
model->BSIM4paigbacc = 0.0;
if (!model->BSIM4pbigbaccGiven)
@ -1423,6 +1667,13 @@ JOB *job;
model->BSIM4xw = 0.0;
if (!model->BSIM4dlcigGiven)
model->BSIM4dlcig = model->BSIM4Lint;
if (!model->BSIM4dlcigdGiven)
{
if (model->BSIM4dlcigGiven)
model->BSIM4dlcigd = model->BSIM4dlcig;
else
model->BSIM4dlcigd = model->BSIM4Lint;
}
if (!model->BSIM4dwjGiven)
model->BSIM4dwj = model->BSIM4dwc;
if (!model->BSIM4cfGiven)
@ -1509,6 +1760,27 @@ JOB *job;
model->BSIM4njtssw = 20.0;
if (!model->BSIM4njtsswgGiven)
model->BSIM4njtsswg = 20.0;
if (!model->BSIM4njtsdGiven)
{
if (model->BSIM4njtsGiven)
model->BSIM4njtsd = model->BSIM4njts;
else
model->BSIM4njtsd = 20.0;
}
if (!model->BSIM4njtsswdGiven)
{
if (model->BSIM4njtsswGiven)
model->BSIM4njtsswd = model->BSIM4njtssw;
else
model->BSIM4njtsswd = 20.0;
}
if (!model->BSIM4njtsswgdGiven)
{
if (model->BSIM4njtsswgGiven)
model->BSIM4njtsswgd = model->BSIM4njtsswg;
else
model->BSIM4njtsswgd = 20.0;
}
if (!model->BSIM4xtssGiven)
model->BSIM4xtss = 0.02;
if (!model->BSIM4xtsdGiven)
@ -1527,6 +1799,27 @@ JOB *job;
model->BSIM4tnjtssw = 0.0;
if (!model->BSIM4tnjtsswgGiven)
model->BSIM4tnjtsswg = 0.0;
if (!model->BSIM4tnjtsdGiven)
{
if (model->BSIM4tnjtsGiven)
model->BSIM4tnjtsd = model->BSIM4tnjts;
else
model->BSIM4tnjtsd = 0.0;
}
if (!model->BSIM4tnjtsswdGiven)
{
if (model->BSIM4tnjtsswGiven)
model->BSIM4tnjtsswd = model->BSIM4tnjtssw;
else
model->BSIM4tnjtsswd = 0.0;
}
if (!model->BSIM4tnjtsswgdGiven)
{
if (model->BSIM4tnjtsswgGiven)
model->BSIM4tnjtsswgd = model->BSIM4tnjtsswg;
else
model->BSIM4tnjtsswgd = 0.0;
}
if (!model->BSIM4vtssGiven)
model->BSIM4vtss = 10.0;
if (!model->BSIM4vtsdGiven)
@ -1733,7 +2026,7 @@ JOB *job;
if (!here->BSIM4geoModGiven)
here->BSIM4geoMod = model->BSIM4geoMod;
if (!here->BSIM4rgeoModGiven)
here->BSIM4rgeoMod = 0;
here->BSIM4rgeoMod = 0.0;
if (!here->BSIM4trnqsModGiven)
here->BSIM4trnqsMod = model->BSIM4trnqsMod;
else if ((here->BSIM4trnqsMod != 0) && (here->BSIM4trnqsMod != 1))

75
src/spicelib/devices/bsim4/b4temp.c
View File

@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2005 Regents of the University of California. All rights reserved.
* File: b4temp.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4temp.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
* Modified by Xuemei Xi, 04/06/2001.
* Modified by Xuemei Xi, 10/05/2001.
@ -12,6 +13,7 @@
* Modified by Xuemei Xi, 05/09/2003.
* Modified by Xuemei Xi, 03/04/2004.
* Modified by Xuemei Xi, Mohan Dunga, 07/29/2005.
* Modified by Mohan Dunga, 12/13/2006
**********/
#include "ngspice.h"
@ -841,6 +843,22 @@ int Size_Not_Found, i;
+ model->BSIM4legidl * Inv_L
+ model->BSIM4wegidl * Inv_W
+ model->BSIM4pegidl * Inv_LW;
pParam->BSIM4agisl = model->BSIM4agisl
+ model->BSIM4lagisl * Inv_L
+ model->BSIM4wagisl * Inv_W
+ model->BSIM4pagisl * Inv_LW;
pParam->BSIM4bgisl = model->BSIM4bgisl
+ model->BSIM4lbgisl * Inv_L
+ model->BSIM4wbgisl * Inv_W
+ model->BSIM4pbgisl * Inv_LW;
pParam->BSIM4cgisl = model->BSIM4cgisl
+ model->BSIM4lcgisl * Inv_L
+ model->BSIM4wcgisl * Inv_W
+ model->BSIM4pcgisl * Inv_LW;
pParam->BSIM4egisl = model->BSIM4egisl
+ model->BSIM4legisl * Inv_L
+ model->BSIM4wegisl * Inv_W
+ model->BSIM4pegisl * Inv_LW;
pParam->BSIM4aigc = model->BSIM4aigc
+ model->BSIM4laigc * Inv_L
+ model->BSIM4waigc * Inv_W
@ -853,18 +871,30 @@ int Size_Not_Found, i;
+ model->BSIM4lcigc * Inv_L
+ model->BSIM4wcigc * Inv_W
+ model->BSIM4pcigc * Inv_LW;
pParam->BSIM4aigsd = model->BSIM4aigsd
+ model->BSIM4laigsd * Inv_L
+ model->BSIM4waigsd * Inv_W
+ model->BSIM4paigsd * Inv_LW;
pParam->BSIM4bigsd = model->BSIM4bigsd
+ model->BSIM4lbigsd * Inv_L
+ model->BSIM4wbigsd * Inv_W
+ model->BSIM4pbigsd * Inv_LW;
pParam->BSIM4cigsd = model->BSIM4cigsd
+ model->BSIM4lcigsd * Inv_L
+ model->BSIM4wcigsd * Inv_W
+ model->BSIM4pcigsd * Inv_LW;
pParam->BSIM4aigs = model->BSIM4aigs
+ model->BSIM4laigs * Inv_L
+ model->BSIM4waigs * Inv_W
+ model->BSIM4paigs * Inv_LW;
pParam->BSIM4bigs = model->BSIM4bigs
+ model->BSIM4lbigs * Inv_L
+ model->BSIM4wbigs * Inv_W
+ model->BSIM4pbigs * Inv_LW;
pParam->BSIM4cigs = model->BSIM4cigs
+ model->BSIM4lcigs * Inv_L
+ model->BSIM4wcigs * Inv_W
+ model->BSIM4pcigs * Inv_LW;
pParam->BSIM4aigd = model->BSIM4aigd
+ model->BSIM4laigd * Inv_L
+ model->BSIM4waigd * Inv_W
+ model->BSIM4paigd * Inv_LW;
pParam->BSIM4bigd = model->BSIM4bigd
+ model->BSIM4lbigd * Inv_L
+ model->BSIM4wbigd * Inv_W
+ model->BSIM4pbigd * Inv_LW;
pParam->BSIM4cigd = model->BSIM4cigd
+ model->BSIM4lcigd * Inv_L
+ model->BSIM4wcigd * Inv_W
+ model->BSIM4pcigd * Inv_LW;
pParam->BSIM4aigbacc = model->BSIM4aigbacc
+ model->BSIM4laigbacc * Inv_L
+ model->BSIM4waigbacc * Inv_W
@ -1147,8 +1177,10 @@ int Size_Not_Found, i;
/ pParam->BSIM4poxedge / pParam->BSIM4poxedge;
pParam->BSIM4Aechvb = (model->BSIM4type == NMOS) ? 4.97232e-7 : 3.42537e-7;
pParam->BSIM4Bechvb = (model->BSIM4type == NMOS) ? 7.45669e11 : 1.16645e12;
pParam->BSIM4AechvbEdge = pParam->BSIM4Aechvb * pParam->BSIM4weff
pParam->BSIM4AechvbEdgeS = pParam->BSIM4Aechvb * pParam->BSIM4weff
* model->BSIM4dlcig * pParam->BSIM4ToxRatioEdge;
pParam->BSIM4AechvbEdgeD = pParam->BSIM4Aechvb * pParam->BSIM4weff
* model->BSIM4dlcigd * pParam->BSIM4ToxRatioEdge;
pParam->BSIM4BechvbEdge = -pParam->BSIM4Bechvb
* model->BSIM4toxe * pParam->BSIM4poxedge;
pParam->BSIM4Aechvb *= pParam->BSIM4weff * pParam->BSIM4leff
@ -1796,9 +1828,12 @@ int Size_Not_Found, i;
/* GEDL current reverse bias */
T0 = (TRatio - 1.0);
model->BSIM4njtstemp = model->BSIM4njts * (1.0 + model->BSIM4tnjts * T0);
model->BSIM4njtsswtemp = model->BSIM4njtssw * (1.0 + model->BSIM4tnjtssw * T0);
model->BSIM4njtsswgtemp = model->BSIM4njtsswg * (1.0 + model->BSIM4tnjtsswg * T0);
model->BSIM4njtsstemp = model->BSIM4njts * (1.0 + model->BSIM4tnjts * T0);
model->BSIM4njtsswstemp = model->BSIM4njtssw * (1.0 + model->BSIM4tnjtssw * T0);
model->BSIM4njtsswgstemp = model->BSIM4njtsswg * (1.0 + model->BSIM4tnjtsswg * T0);
model->BSIM4njtsdtemp = model->BSIM4njtsd * (1.0 + model->BSIM4tnjtsd * T0);
model->BSIM4njtsswdtemp = model->BSIM4njtsswd * (1.0 + model->BSIM4tnjtsswd * T0);
model->BSIM4njtsswgdtemp = model->BSIM4njtsswgd * (1.0 + model->BSIM4tnjtsswgd * T0);
T7 = Eg0 / model->BSIM4vtm * T0;
T9 = model->BSIM4xtss * T7;
DEXP(T9, T1);
@ -1826,7 +1861,7 @@ int Size_Not_Found, i;
{ IFuid namarray[2];
namarray[0] = model->BSIM4modName;
namarray[1] = here->BSIM4name;
(*(SPfrontEnd->IFerror)) (ERR_FATAL, "Fatal error(s) detected during BSIM4.5.0 parameter checking for %s in model %s", namarray);
(*(SPfrontEnd->IFerror)) (ERR_FATAL, "Fatal error(s) detected during BSIM4.6.0 parameter checking for %s in model %s", namarray);
return(E_BADPARM);
}
} /* End instance */

7
src/spicelib/devices/bsim4/b4trunc.c
View File

@ -1,10 +1,11 @@
/**** BSIM4.5.0 Released by Xuemei (Jane) Xi 07/29/2005 ****/
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
* Copyright 2004 Regents of the University of California. All rights reserved.
* File: b4trunc.c of BSIM4.5.0.
* Copyright 2006 Regents of the University of California. All rights reserved.
* File: b4trunc.c of BSIM4.6.0.
* Author: 2000 Weidong Liu
* Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
* Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
* Project Director: Prof. Chenming Hu.
**********/

180
src/spicelib/devices/bsim4/bsim4def.h
View File

@ -1,11 +1,16 @@
/**** BSIM4.6.0 Released by Mohan Dunga 12/13/2006 ****/
/**********
Copyright 2005 Regents of the University of California. All rights reserved.
Copyright 2006 Regents of the University of California. All rights reserved.
Author: 2000 Weidong Liu.
Authors: 2001- Xuemei Xi, Mohan Dunga, Ali Niknejad, Chenming Hu.
Authors: 2006- Mohan Dunga, Ali Niknejad, Chenming Hu
Modified by Xuemei Xi, 11/15/2002.
Modified by Xuemei Xi, 05/09/2003.
Modified by Xuemei Xi, 03/04/2004.
Modified by Xuemei Xi, Mohan Dunga, 09/24/2004.
Modified by Xuemei Xi, 07/29/2005.
Modified by Mohan Dunga, 12/13/2006
File: bsim4def.h
**********/
@ -17,7 +22,7 @@ File: bsim4def.h
#include "cktdefs.h"
#include "complex.h"
#include "noisedef.h"
typedef struct sBSIM4instance
{
struct sBSIM4model *BSIM4modPtr;
@ -545,12 +550,19 @@ struct bsim4SizeDependParam
double BSIM4bgidl;
double BSIM4cgidl;
double BSIM4egidl;
double BSIM4agisl;
double BSIM4bgisl;
double BSIM4cgisl;
double BSIM4egisl;
double BSIM4aigc;
double BSIM4bigc;
double BSIM4cigc;
double BSIM4aigsd;
double BSIM4bigsd;
double BSIM4cigsd;
double BSIM4aigs;
double BSIM4bigs;
double BSIM4cigs;
double BSIM4aigd;
double BSIM4bigd;
double BSIM4cigd;
double BSIM4aigbacc;
double BSIM4bigbacc;
double BSIM4cigbacc;
@ -608,7 +620,6 @@ struct bsim4SizeDependParam
double BSIM4dwc;
double BSIM4dlc;
double BSIM4dlcig;
double BSIM4dwj;
double BSIM4leffCV;
double BSIM4weffCV;
@ -642,14 +653,14 @@ struct bsim4SizeDependParam
double BSIM4Aechvb;
double BSIM4Bechvb;
double BSIM4ToxRatioEdge;
double BSIM4AechvbEdge;
double BSIM4AechvbEdgeS;
double BSIM4AechvbEdgeD;
double BSIM4BechvbEdge;
double BSIM4ldeb;
double BSIM4k1ox;
double BSIM4k2ox;
double BSIM4vfbzbfactor;
struct bsim4SizeDependParam *pNext;
};
@ -781,12 +792,22 @@ typedef struct sBSIM4model
double BSIM4bgidl;
double BSIM4cgidl;
double BSIM4egidl;
double BSIM4agisl;
double BSIM4bgisl;
double BSIM4cgisl;
double BSIM4egisl;
double BSIM4aigc;
double BSIM4bigc;
double BSIM4cigc;
double BSIM4aigsd;
double BSIM4bigsd;
double BSIM4cigsd;
double BSIM4aigs;
double BSIM4bigs;
double BSIM4cigs;
double BSIM4aigd;
double BSIM4bigd;
double BSIM4cigd;
double BSIM4aigbacc;
double BSIM4bigbacc;
double BSIM4cigbacc;
@ -819,6 +840,9 @@ typedef struct sBSIM4model
double BSIM4njts;
double BSIM4njtssw;
double BSIM4njtsswg;
double BSIM4njtsd;
double BSIM4njtsswd;
double BSIM4njtsswgd;
double BSIM4xtss;
double BSIM4xtsd;
double BSIM4xtssws;
@ -828,6 +852,9 @@ typedef struct sBSIM4model
double BSIM4tnjts;
double BSIM4tnjtssw;
double BSIM4tnjtsswg;
double BSIM4tnjtsd;
double BSIM4tnjtsswd;
double BSIM4tnjtsswgd;
double BSIM4vtss;
double BSIM4vtsd;
double BSIM4vtssws;
@ -904,6 +931,7 @@ typedef struct sBSIM4model
double BSIM4xw;
double BSIM4xl;
double BSIM4dlcig;
double BSIM4dlcigd;
double BSIM4dwj;
double BSIM4noff;
double BSIM4voffcv;
@ -1017,12 +1045,22 @@ typedef struct sBSIM4model
double BSIM4lbgidl;
double BSIM4lcgidl;
double BSIM4legidl;
double BSIM4lagisl;
double BSIM4lbgisl;
double BSIM4lcgisl;
double BSIM4legisl;
double BSIM4laigc;
double BSIM4lbigc;
double BSIM4lcigc;
double BSIM4laigsd;
double BSIM4lbigsd;
double BSIM4lcigsd;
double BSIM4laigs;
double BSIM4lbigs;
double BSIM4lcigs;
double BSIM4laigd;
double BSIM4lbigd;
double BSIM4lcigd;
double BSIM4laigbacc;
double BSIM4lbigbacc;
double BSIM4lcigbacc;
@ -1151,12 +1189,22 @@ typedef struct sBSIM4model
double BSIM4wbgidl;
double BSIM4wcgidl;
double BSIM4wegidl;
double BSIM4wagisl;
double BSIM4wbgisl;
double BSIM4wcgisl;
double BSIM4wegisl;
double BSIM4waigc;
double BSIM4wbigc;
double BSIM4wcigc;
double BSIM4waigsd;
double BSIM4wbigsd;
double BSIM4wcigsd;
double BSIM4waigs;
double BSIM4wbigs;
double BSIM4wcigs;
double BSIM4waigd;
double BSIM4wbigd;
double BSIM4wcigd;
double BSIM4waigbacc;
double BSIM4wbigbacc;
double BSIM4wcigbacc;
@ -1285,12 +1333,22 @@ typedef struct sBSIM4model
double BSIM4pbgidl;
double BSIM4pcgidl;
double BSIM4pegidl;
double BSIM4pagisl;
double BSIM4pbgisl;
double BSIM4pcgisl;
double BSIM4pegisl;
double BSIM4paigc;
double BSIM4pbigc;
double BSIM4pcigc;
double BSIM4paigsd;
double BSIM4pbigsd;
double BSIM4pcigsd;
double BSIM4paigs;
double BSIM4pbigs;
double BSIM4pcigs;
double BSIM4paigd;
double BSIM4pbigd;
double BSIM4pcigd;
double BSIM4paigbacc;
double BSIM4pbigbacc;
double BSIM4pcigbacc;
@ -1363,9 +1421,12 @@ typedef struct sBSIM4model
double BSIM4DjctEmissionCoeff;
double BSIM4SjctTempExponent;
double BSIM4DjctTempExponent;
double BSIM4njtstemp;
double BSIM4njtsswtemp;
double BSIM4njtsswgtemp;
double BSIM4njtsstemp;
double BSIM4njtsswstemp;
double BSIM4njtsswgstemp;
double BSIM4njtsdtemp;
double BSIM4njtsswdtemp;
double BSIM4njtsswgdtemp;
double BSIM4Lint;
double BSIM4Ll;
@ -1594,12 +1655,22 @@ typedef struct sBSIM4model
unsigned BSIM4bgidlGiven :1;
unsigned BSIM4cgidlGiven :1;
unsigned BSIM4egidlGiven :1;
unsigned BSIM4agislGiven :1;
unsigned BSIM4bgislGiven :1;
unsigned BSIM4cgislGiven :1;
unsigned BSIM4egislGiven :1;
unsigned BSIM4aigcGiven :1;
unsigned BSIM4bigcGiven :1;
unsigned BSIM4cigcGiven :1;
unsigned BSIM4aigsdGiven :1;
unsigned BSIM4bigsdGiven :1;
unsigned BSIM4cigsdGiven :1;
unsigned BSIM4aigsGiven :1;
unsigned BSIM4bigsGiven :1;
unsigned BSIM4cigsGiven :1;
unsigned BSIM4aigdGiven :1;
unsigned BSIM4bigdGiven :1;
unsigned BSIM4cigdGiven :1;
unsigned BSIM4aigbaccGiven :1;
unsigned BSIM4bigbaccGiven :1;
unsigned BSIM4cigbaccGiven :1;
@ -1631,6 +1702,9 @@ typedef struct sBSIM4model
unsigned BSIM4njtsGiven :1;
unsigned BSIM4njtsswGiven :1;
unsigned BSIM4njtsswgGiven :1;
unsigned BSIM4njtsdGiven :1;
unsigned BSIM4njtsswdGiven :1;
unsigned BSIM4njtsswgdGiven :1;
unsigned BSIM4xtssGiven :1;
unsigned BSIM4xtsdGiven :1;
unsigned BSIM4xtsswsGiven :1;
@ -1640,6 +1714,9 @@ typedef struct sBSIM4model
unsigned BSIM4tnjtsGiven :1;
unsigned BSIM4tnjtsswGiven :1;
unsigned BSIM4tnjtsswgGiven :1;
unsigned BSIM4tnjtsdGiven :1;
unsigned BSIM4tnjtsswdGiven :1;
unsigned BSIM4tnjtsswgdGiven :1;
unsigned BSIM4vtssGiven :1;
unsigned BSIM4vtsdGiven :1;
unsigned BSIM4vtsswsGiven :1;
@ -1716,6 +1793,7 @@ typedef struct sBSIM4model
unsigned BSIM4xwGiven :1;
unsigned BSIM4xlGiven :1;
unsigned BSIM4dlcigGiven :1;
unsigned BSIM4dlcigdGiven :1;
unsigned BSIM4dwjGiven :1;
unsigned BSIM4noffGiven :1;
unsigned BSIM4voffcvGiven :1;
@ -1830,12 +1908,22 @@ typedef struct sBSIM4model
unsigned BSIM4lbgidlGiven :1;
unsigned BSIM4lcgidlGiven :1;
unsigned BSIM4legidlGiven :1;
unsigned BSIM4lagislGiven :1;
unsigned BSIM4lbgislGiven :1;
unsigned BSIM4lcgislGiven :1;
unsigned BSIM4legislGiven :1;
unsigned BSIM4laigcGiven :1;
unsigned BSIM4lbigcGiven :1;
unsigned BSIM4lcigcGiven :1;
unsigned BSIM4laigsdGiven :1;
unsigned BSIM4lbigsdGiven :1;
unsigned BSIM4lcigsdGiven :1;
unsigned BSIM4laigsGiven :1;
unsigned BSIM4lbigsGiven :1;
unsigned BSIM4lcigsGiven :1;
unsigned BSIM4laigdGiven :1;
unsigned BSIM4lbigdGiven :1;
unsigned BSIM4lcigdGiven :1;
unsigned BSIM4laigbaccGiven :1;
unsigned BSIM4lbigbaccGiven :1;
unsigned BSIM4lcigbaccGiven :1;
@ -1964,12 +2052,22 @@ typedef struct sBSIM4model
unsigned BSIM4wbgidlGiven :1;
unsigned BSIM4wcgidlGiven :1;
unsigned BSIM4wegidlGiven :1;
unsigned BSIM4wagislGiven :1;
unsigned BSIM4wbgislGiven :1;
unsigned BSIM4wcgislGiven :1;
unsigned BSIM4wegislGiven :1;
unsigned BSIM4waigcGiven :1;
unsigned BSIM4wbigcGiven :1;
unsigned BSIM4wcigcGiven :1;
unsigned BSIM4waigsdGiven :1;
unsigned BSIM4wbigsdGiven :1;
unsigned BSIM4wcigsdGiven :1;
unsigned BSIM4waigsGiven :1;
unsigned BSIM4wbigsGiven :1;
unsigned BSIM4wcigsGiven :1;
unsigned BSIM4waigdGiven :1;
unsigned BSIM4wbigdGiven :1;
unsigned BSIM4wcigdGiven :1;
unsigned BSIM4waigbaccGiven :1;
unsigned BSIM4wbigbaccGiven :1;
unsigned BSIM4wcigbaccGiven :1;
@ -2098,12 +2196,22 @@ typedef struct sBSIM4model
unsigned BSIM4pbgidlGiven :1;
unsigned BSIM4pcgidlGiven :1;
unsigned BSIM4pegidlGiven :1;
unsigned BSIM4pagislGiven :1;
unsigned BSIM4pbgislGiven :1;
unsigned BSIM4pcgislGiven :1;
unsigned BSIM4pegislGiven :1;
unsigned BSIM4paigcGiven :1;
unsigned BSIM4pbigcGiven :1;
unsigned BSIM4pcigcGiven :1;
unsigned BSIM4paigsdGiven :1;
unsigned BSIM4pbigsdGiven :1;
unsigned BSIM4pcigsdGiven :1;
unsigned BSIM4paigsGiven :1;
unsigned BSIM4pbigsGiven :1;
unsigned BSIM4pcigsGiven :1;
unsigned BSIM4paigdGiven :1;
unsigned BSIM4pbigdGiven :1;
unsigned BSIM4pcigdGiven :1;
unsigned BSIM4paigbaccGiven :1;
unsigned BSIM4pbigbaccGiven :1;
unsigned BSIM4pcigbaccGiven :1;
@ -3157,6 +3265,56 @@ typedef struct sBSIM4model
#define BSIM4_MOD_RBSDBYW 1125
#define BSIM4_MOD_RBSDBYNF 1126
#define BSIM4_MOD_AGISL 1200
#define BSIM4_MOD_BGISL 1201
#define BSIM4_MOD_EGISL 1202
#define BSIM4_MOD_CGISL 1203
#define BSIM4_MOD_LAGISL 1204
#define BSIM4_MOD_LBGISL 1205
#define BSIM4_MOD_LEGISL 1206
#define BSIM4_MOD_LCGISL 1207
#define BSIM4_MOD_WAGISL 1208
#define BSIM4_MOD_WBGISL 1209
#define BSIM4_MOD_WEGISL 1210
#define BSIM4_MOD_WCGISL 1211
#define BSIM4_MOD_PAGISL 1212
#define BSIM4_MOD_PBGISL 1213
#define BSIM4_MOD_PEGISL 1214
#define BSIM4_MOD_PCGISL 1215
#define BSIM4_MOD_AIGS 1220
#define BSIM4_MOD_BIGS 1221
#define BSIM4_MOD_CIGS 1222
#define BSIM4_MOD_LAIGS 1223
#define BSIM4_MOD_LBIGS 1224
#define BSIM4_MOD_LCIGS 1225
#define BSIM4_MOD_WAIGS 1226
#define BSIM4_MOD_WBIGS 1227
#define BSIM4_MOD_WCIGS 1228
#define BSIM4_MOD_PAIGS 1229
#define BSIM4_MOD_PBIGS 1230
#define BSIM4_MOD_PCIGS 1231
#define BSIM4_MOD_AIGD 1232
#define BSIM4_MOD_BIGD 1233
#define BSIM4_MOD_CIGD 1234
#define BSIM4_MOD_LAIGD 1235
#define BSIM4_MOD_LBIGD 1236
#define BSIM4_MOD_LCIGD 1237
#define BSIM4_MOD_WAIGD 1238
#define BSIM4_MOD_WBIGD 1239
#define BSIM4_MOD_WCIGD 1240
#define BSIM4_MOD_PAIGD 1241
#define BSIM4_MOD_PBIGD 1242
#define BSIM4_MOD_PCIGD 1243
#define BSIM4_MOD_DLCIGD 1244
#define BSIM4_MOD_NJTSD 1250
#define BSIM4_MOD_NJTSSWD 1251
#define BSIM4_MOD_NJTSSWGD 1252
#define BSIM4_MOD_TNJTSD 1253
#define BSIM4_MOD_TNJTSSWD 1254
#define BSIM4_MOD_TNJTSSWGD 1255
#include "bsim4ext.h"
extern void BSIM4evaluate(double,double,double,BSIM4instance*,BSIM4model*,