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Tentative reduction of order for generating new time step. 

Has to be checked further!
This commit is contained in:
Vogt 2025-11-06 13:04:44 +01:00
parent eb65673f92
commit 913c735139
1 changed files with 30 additions and 3 deletions
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33
src/spicelib/analysis/ckttrunc.c
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@ -92,8 +92,8 @@ CKTtrunc(CKTcircuit *ckt, double *timeStep)
#endif #endif
if(diff != 0) { if(diff != 0) {
// if (!AlmostEqualUlps(diff, 0, 10)) { // if (!AlmostEqualUlps(diff, 0, 10)) {
tmp = ckt->CKTlteTrtol * tol * 2 /diff; tmp = ckt->CKTlteTrtol * tol * 2 / diff;
tmp = ckt->CKTdeltaOld[0]*sqrt(fabs(tmp)); tmp = ckt->CKTdeltaOld[0]*fabs(tmp);
timetemp = MIN(timetemp,tmp); timetemp = MIN(timetemp,tmp);
#ifdef STEPDEBUG #ifdef STEPDEBUG
printf("tol = %g, diff = %g, h->%g\n",tol,diff,tmp); printf("tol = %g, diff = %g, h->%g\n",tol,diff,tmp);
@ -106,6 +106,33 @@ CKTtrunc(CKTcircuit *ckt, double *timeStep)
} }
break; break;
case 2: case 2:
for (i = 1; i < size; i++) {
tol = MAX(fabs(ckt->CKTrhs[i]), fabs(ckt->CKTpred[i])) *
ckt->CKTlteReltol + ckt->CKTlteAbstol;
node = node->next;
if (node->type != SP_VOLTAGE) continue;
diff = ckt->CKTrhs[i] - ckt->CKTpred[i];
#ifdef STEPDEBUG
printf("%s: cor=%g, pred=%g ", node->name,
ckt->CKTrhs[i], ckt->CKTpred[i]);
#endif
if (diff != 0) {
// if (!AlmostEqualUlps(diff, 0, 10)) {
tmp = ckt->CKTlteTrtol * tol * 2 / diff;
tmp = ckt->CKTdeltaOld[0] * sqrt(fabs(tmp));
timetemp = MIN(timetemp, tmp);
#ifdef STEPDEBUG
printf("tol = %g, diff = %g, h->%g\n", tol, diff, tmp);
#endif
}
else {
#ifdef STEPDEBUG
printf("diff is 0\n");
#endif
}
}
break;
/* case 2:
for(i=1;i<size;i++) { for(i=1;i<size;i++) {
tol = MAX( fabs(ckt->CKTrhs[i]),fabs(ckt->CKTpred[i]))* tol = MAX( fabs(ckt->CKTrhs[i]),fabs(ckt->CKTpred[i]))*
ckt->CKTlteReltol+ckt->CKTlteAbstol; ckt->CKTlteReltol+ckt->CKTlteAbstol;
@ -133,7 +160,7 @@ CKTtrunc(CKTcircuit *ckt, double *timeStep)
#endif #endif
} }
} }
break; break; */
default: default:
return(E_ORDER); return(E_ORDER);
break; break;