Merge branch 'pre-master-47' into bt_dev

NEWS

@@ -1,3 +1,26 @@
+Ngspice-47, June ??, 2026
+============
+- New features:
+    + Update periodic state sim (PSS) and examples
+    + Update to measure available memory for all OSs
+    + Implement small signal noise simulation for code models
+    + Status display 'shell' and 'gnuplot' (Windows only).
+    + Enable printing outputs with engineering exponents
+    + If newcompat.ki is enabled, replace /gnd and /0 (local ground symbols)
+      by 0.
+    + Add instance parameters td and r to the ISRC pwl source.
+    + Do not replace GND by 0 f if GND is used inside of the subcircuit
+      and is referenced on the .subckt line, and ps is set.
+    + Add reading and writing audio files (*.wav).
+    + Add dot commands .sndprint, .sndparam.
+    + Vdmos bulk diode now has a smart recovery model
+    + Update to the SEEgenerator as describes in README.SEEgenerator
+    + No integration, if dc sweep is to return cpacitances
+    + Add sweeping dc for capacitance measurement in 
+      HFET, MEASFET, VDMOS models, correct it for BJT, VBIC, HICUM.
+    + Add two macros TSTEP and TSTOP to XSPICE.
+
+
 Ngspice-46, March 29th, 2026
 ============
 - New features:

README.SEEgenerator

@@ -39,6 +39,23 @@ As literature please see for example
     Single-Event Effects, from Space to Accelerator Environments
     Springer 2025
 
+There is an alternative pulse variant possible by setting the parameters scdelay and scaling.
+In advanced process nodes a single particle hit with its electron/hole pairs generated may
+influence not only a single node, but several neighboring nodes as well, may be a little less
+and with a small delay. This behaviour may be emulated by connecting SEEgen to a central node
+and some surrounding nodes. These will get a portion of the charge carriers, with a possible
+(small) delay. The .model line
+
+.model seemod1 seegen (tdelay = 400p tperiod=500p tfall='tfall' trise='trise' let='let' cdepth='d'
++ perlim=TRUE ctrlthres=0 scaling=[1, 0.5, 0.25, 0.125] scdelay=[0, 10p, 20p, 30p])
+
+now contain the arrays scaling and scdelay. The nummber of array elements has to equal the number
+of ports. Scaling will distribute the LET onto the different nodes with each weight given.
+Scdelay will delay each port relative to the parameter tdelay. Parameters tperiod, perlim, and
+ctrlthres are ignored for now. As the netlist does not contain information on the location of the
+nodes in the layout, the user has to provide these data be selecting the proper nodes and pulse
+scaling.
+
 Detailed description (will be added to the manual):
 
 NAME_TABLE:
@@ -131,6 +148,25 @@ Vector:             no                     no
 Vector_Bounds:      -                      -
 Null_Allowed:       yes                    yes
 
+
+PARAMETER_TABLE:
+
+Parameter_Name:     scaling                scdelay
+Description:        "scale the current"    "delay scaled pulses individually"
+Data_Type:          real                   real
+Default_Value:      1                      0
+Limits:             [0 1]                  [0, -]
+Vector:             yes                    yes
+Vector_Bounds:      -                      -
+Null_Allowed:       yes                    yes
+
+STATIC_VAR_TABLE:
+
+Static_Var_Name:    pulses
+Data_Type:          pointer
+Vector:             no
+Description:        "info on pulse for each port"
+
 STATIC_VAR_TABLE:
 
 Static_Var_Name:    last_t_value

examples/IHPOpenSourcePDK/19-stage-ro.cir

@@ -0,0 +1,75 @@
+NAND-2 Ring Oscillator IHP Open PDK
+
+.lib "$PDK_ROOT/$PDK/libs.tech/ngspice/models/cornerMOSlv.lib" mos_tt
+
+.subckt nand2 a b vdd vss z
+xm01 vdd   a     z     vdd sg13_lv_pmos  l=0.15u  w=0.96u  as=0.20405p  ad=0.20405p  ps=2.07u   pd=2.07u
+xm02 vss   a     sig3  vss sg13_lv_nmos  l=0.15u  w=0.82u  as=0.1749p   ad=0.1749p   ps=1.85u   pd=1.85u
+xm03 z     b     vdd   vdd sg13_lv_pmos  l=0.15u  w=0.96u  as=0.20405p  ad=0.20405p  ps=2.07u   pd=2.07u
+xm04 sig3  b     z     vss sg13_lv_nmos  l=0.15u  w=0.82u  as=0.1749p   ad=0.1749p   ps=1.85u   pd=1.85u
+c4  a     vss   0.549f
+c5  b     vss   0.578f
+c1  z     vss   0.609f
+.ends
+
+XNAND1 1 1 vd vs 2 nand2
+XNAND2 2 2 vd vs 3 nand2
+XNAND3 3 3 vd vs 4 nand2
+XNAND4 4 4 vd vs 5 nand2
+XNAND5 5 5 vd vs 6 nand2
+XNAND6 6 6 vd vs 7 nand2
+XNAND7 7 7 vd vs 8 nand2
+XNAND8 8 8 vd vs 9 nand2
+XNAND9 9 9 vd vs 10 nand2
+XNAND10 10 10 vd vs 11 nand2
+XNAND11 11 11 vd vs 12 nand2
+XNAND12 12 12 vd vs 13 nand2
+XNAND13 13 13 vd vs 14 nand2
+XNAND14 14 14 vd vs 15 nand2
+XNAND15 15 15 vd vs 16 nand2
+XNAND16 16 16 vd vs 17 nand2
+XNAND17 17 17 vd vs 18 nand2
+XNAND18 18 18 vd vs 19 nand2
+XNAND19 19 19 vd vs 1 nand2
+
+XNAND20 1 1 vd 0 out nand2
+
+Vdd vd 0 1.5
+Vss vs 0 0
+
+.option noinit
+
+.tran 10p 80n uic
+
+.control
+pre_osdi ../lib/ngspice/psp103_nqs.osdi
+pre_osdi ../lib/ngspice/psp103.osdi
+set temp=0
+option klu
+run
+rusage
+set xbrushwidth=3
+plot i(Vss) ylimit 0 500u xlimit 50n 60n
+plot out xlimit 50n 60n
+meas tran tdiff TRIG V(out) val=0.7 rise=5 TARG v(out) val=0.7 rise=15
+let freq=10/tdiff
+print freq
+linearize out
+fft out
+plot mag(out)  xlimit 300Meg 2300Meg
+meas sp fmax MAX_AT out from=1e8 to=1e9
+echo
+echo
+set temp=120
+run
+plot out xlimit 50n 60n
+meas tran tdiff TRIG V(out) val=0.7 rise=5 TARG v(out) val=0.7 rise=15
+let freq=10/tdiff
+print freq
+linearize out
+fft out
+plot mag(out)  xlimit 300Meg 2300Meg
+meas sp fmax MAX_AT out from=1e8 to=1e9
+.endc
+
+.end

examples/IHPOpenSourcePDK/IHP-PDK-howto.txt

@@ -0,0 +1,17 @@
+H. Vogt, 30.06.2026
+
+
+Install IHP PDK from github at https://github.com/IHP-GmbH/IHP-Open-PDK 
+Set the environmental variables PDK_ROOT and PDK, e.g.
+
+PDK_ROOT   D:\Spice_general\IHP-Open-PDK
+PDK        ihp-sg13g2
+
+Have the OpenVAF-compiled models for MOS ready: psp103.osdi, psp103_nqs.osdi.
+
+in .spiceinit, add the following:
+
+set ngbehavior=hsa
+option KLU
+
+Run the examples.

examples/IHPOpenSourcePDK/nmos_pmos_PSP103.sp

@@ -0,0 +1,45 @@
+***  NMOS and PMOS transistors PSP103.6 IHP Open PDK (Id-Vgs, Vbs) (Id-Vds, Vgs) (Id-Vgs, T)  ***
+
+xm02  2  1  3  4  sg13_lv_nmos  l=0.15u  w=0.495u as=0.131175p ad=0.131175p ps=1.52u   pd=1.52u
+vgsn 1 0 3.5
+vdsn 2 0 0.1
+vssn 3 0 0
+vbsn 4 0 0
+
+xm01 22 11 33 44 sg13_lv_pmos  l=0.15u  w=0.99u  as=0.26235p  ad=0.26235p  ps=2.51u   pd=2.51u
+vgsp 11 0 -3.5
+vdsp 22 0 -0.1
+vssp 33 0 0
+vbsp 44 0 0
+
+* IHP Open PDK
+.lib "D:\Spice_general\IHP-Open-PDK\ihp-sg13g2\libs.tech\ngspice\models\cornerMOSlv.lib" mos_tt
+
+.control
+pre_osdi ../lib/ngspice/psp103.osdi
+
+set xgridwidth=2
+set xbrushwidth=3
+
+* NMOS
+dc vgsn 0 1.5 0.05 vbsn 0 -1.5 -0.3
+plot vssn#branch ylabel 'Id vs. Vgs, Vbs 0 ... -1.5'
+plot abs(vssn#branch) ylog ylabel 'Id vs. Vgs, Vbs 0 ... -1.5'
+dc vdsn 0 1.6 0.01 vgsn 0 1.6 0.2
+plot vssn#branch ylabel 'Id vs. Vds, Vgs 0 ... 1.6'
+dc vgsn 0 1.5 0.05 temp -40 160 40
+plot vssn#branch ylabel 'Id vs. Vds, Temp. -40 ... 160'
+plot abs(vssn#branch) ylog ylabel 'Id vs. Vds, Temp. -40 ... 160'
+
+* PMOS
+dc vgsp 0 -1.5 -0.05 vbsp 0 1.5 0.3
+plot vssp#branch ylabel 'Id vs. Vgs, Vbs 0 ... 1.5'
+plot abs(vssp#branch) ylog ylabel 'Id vs. Vgs, Vbs 0 ... 1.5'
+dc vdsp 0 -1.6 -0.01 vgsp 0 -1.6 -0.2
+plot vssp#branch ylabel 'Id vs. Vds, Vgs 0 ... -1.6'
+dc vgsp 0 -1.5 -0.05 temp -40 160 40
+plot vssp#branch ylabel 'Id vs. Vds, Temp. -40 ... 160'
+plot abs(vssp#branch) ylog ylabel 'Id vs. Vds, Temp. -40 ... 160'
+.endc
+
+.end

examples/xspice/ghdl/README.txt

@@ -27,7 +27,7 @@ mechanical quantities do not match standard units.
 
 Before a simulation can be run, the associated VHDL code must be compiled
 and an additional shared library, ghdlng.vpi must be built.  A library script
-isavailable to simplify the steps, run like this:
+is available to simplify the steps, run like this:
 
     ngspice ghnggen adc.vhd
 

examples/xspice/noise/noise_gain.cir

@@ -0,0 +1,22 @@
+Noise in gain code model
+
+a1 in1 out1 amp1
+.model amp1 gain(in_offset=0.1 gain=5.0
++ out_offset=-0.01 noise_voltage=1u noise_corner=2k noise_exponent=2)
+
+a2 in1 out2 amp2
+.model amp2 gain(in_offset=0.1 gain=5.0
++ out_offset=-0.01 noise_voltage=2u noise_corner=1k noise_exponent=1.2)
+
+Vin1 in1 0 1 ac 1
+
+.control
+noise V(out1) vin1 dec 333 1 1e6 16
+print inoise_total onoise_total
+noise V(out2) vin1 dec 333 1 1e6 16
+print inoise_total onoise_total
+set xbrushwidth=3
+plot noise1.onoise_spectrum noise1.inoise_spectrum noise3.onoise_spectrum noise3.inoise_spectrum loglog
+.endc
+
+.end

examples/xspice/noise/ota_noise_test1.cir

@@ -1,4 +1,4 @@
-* noise analysis with analogue code model
+* noise analysis with analogue code model, programmatic example
 
 aota inn 0 out newota
 *.model newota ota (gm=1 rout=1e12 rin=1Meg en=31n enk=100 in_noise=100u ink=10k incm=0 incmk=2k noise_programmatic=TRUE)

examples/xspice/various/ro_nand_digi.cir

@@ -0,0 +1,50 @@
+.TITLE DIGITAL RING OSCILLATOR, 9 stages, NAND gates, enable
+
+.OPTIONS NOACCT NOINIT NOMOD NOPAGE METHOD=gear XTRTOL=7
+.PARAM TEMP=25 VDD=3.3
+
+.subckt ringOsc int_di1 a_clock d_en0 riseDelay=200e-12 fallDelay=200e-12
+    A_ring_osc0 [int_di1 d_en0] int_di2 CM_NAND0
+    A_ring_osc1 [int_di2 d_en0] int_di3 CM_NAND0
+    A_ring_osc2 [int_di3 d_en0] int_di4 CM_NAND0
+    A_ring_osc3 [int_di4 d_en0] int_di5 CM_NAND0
+    A_ring_osc4 [int_di5 d_en0] int_di6 CM_NAND0
+    A_ring_osc5 [int_di6 d_en0] int_di7 CM_NAND0
+    A_ring_osc6 [int_di7 d_en0] int_di8 CM_NAND0
+    A_ring_osc7 [int_di8 d_en0] int_di9 CM_NAND0
+    A_ring_osc8 [int_di9 d_en0] int_di1 CM_NAND0
+
+    .model CM_NAND0 d_nand ( rise_delay= {riseDelay} fall_delay= {fallDelay} )
+    A_adc1 [%vd(a_clock 0)] [d_en0] ADC
+    * oscillation starts only if no unknown logic state is produced at d_en0
+    .model ADC adc_bridge in_low='VDD/2' in_high='VDD/2'
+.ends
+
+* analogue output
+abridge1 [node1] [aout] dac1
+.model dac1 dac_bridge( out_low = 0 out_high = {VDD} out_undef = {VDD/2}
++ input_load = 5.0e-12 t_rise = 200e-12 t_fall = 200e-12 )
+
+* calling the r.o.
+X1 node1 node2 node3 ringOsc riseDelay=200e-12 fallDelay=200e-12
+* enable signal
+V_en node2 0 PULSE(0 3.3 30n 1n 1n 40n 80n) 
+
+.control
+    tran 200p 200n
+* sim time and memory usage
+    rusage
+* plot and display the digital data
+    plot node1 node3 digitop
+    set xbrushwidth=2
+    plot node1 node3 digitop xlimit 60n 80n
+    edisplay
+* frequency and delay (measure 10 periods)
+    meas tran tdiff TRIG v(aout) VAL=1.65 RISE=2 TARG v(aout) VAL=1.65 RISE=12
+    let freq = 10/tdiff*1e-9
+    let del = 1/freq/9/2
+    echo The oscillation frequency is $&freq GHz, the gate delay is $&del ns
+.endc
+
+.endc
+.end

paranoia_parallel/README

@@ -0,0 +1,16 @@
+How to run paranoia_parallel
+
+Install valgrind
+Install parallel
+
+Extract paranoia_parallel.7z into a directory of your choice.
+In a terminal window, cd into the directory chosen.
+
+Edit runtest.sh, line 14, -jx, with x being the physical cores available on your machine.
+
+Run ./paranoia_table_generators.sh 
+to generate some input tables (only required once in the beginning).
+
+Run ./runtests.sh paranoia_test_extra.sh ./working
+
+

paranoia_parallel/examples/Monte_Carlo/MC_2_circ.sp

@@ -0,0 +1,111 @@
+Circuit to perform Monte Carlo simulation in ngspice
+* 25 stage Ring-Osc. using inverters with BSIM3
+
+vin in out dc 0.5 pulse 0.5 0 0.1n 5n 1 1 1
+vdd dd 0 dc 3.3
+vss ss 0 dc 0
+ve  sub  0 dc 0
+vpe well 0 dc 3.3
+
+.subckt inv1 dd ss sub well in out
+mn1  out in  ss  sub  n1  w=2u l=0.35u as=3p ad=3p ps=4u pd=4u
+mp1  out in  dd  well p1  w=4u l=0.35u as=7p ad=7p ps=6u pd=6u
+.ends inv1
+
+.subckt inv5 dd ss sub well in out
+xinv1 dd ss sub well in 1 inv1
+xinv2 dd ss sub well 1  2 inv1
+xinv3 dd ss sub well 2  3 inv1
+xinv4 dd ss sub well 3  4 inv1
+xinv5 dd ss sub well 4 out inv1
+.ends inv5
+
+xinv1 dd ss sub well in out5 inv5
+xinv2 dd ss sub well out5 out10 inv5
+xinv3 dd ss sub well out10 out15 inv5
+xinv4 dd ss sub well out15 out20 inv5
+xinv5 dd ss sub well out20 out inv5
+xinv11 dd 0 sub well out buf inv1
+* output is buf
+cout  buf ss 0.2pF
+
+.ic v(out20) = 0
+*
+.options noacct
+
+* The following model parameters are varying statistically:
+* vth0, u0, tox
+* see the AGAUSS function used to define the parameter
+* the deviation is 10%, just for example, not measured
+
+********************************************************************************
+.model n1 nmos
++level=8
++version=3.3.0
++tnom=27.0
++nch=2.498e+17  tox=AGAUSS(9e-09, 9e-09, 10)  xj=1.00000e-07
++lint=9.36e-8 wint=1.47e-7
++vth0=AGAUSS(.6322,.6322,10)    k1=.756  k2=-3.83e-2  k3=-2.612
++dvt0=2.812  dvt1=0.462  dvt2=-9.17e-2
++nlx=3.52291e-08  w0=1.163e-6
++k3b=2.233
++vsat=86301.58  ua=6.47e-9  ub=4.23e-18  uc=-4.706281e-11
++rdsw=650  u0=AGAUSS(388.3203,388.3203,10) wr=1
++a0=.3496967 ags=.1    b0=0.546    b1=1
++dwg=-6.0e-09 dwb=-3.56e-09 prwb=-.213
++keta=-3.605872e-02  a1=2.778747e-02  a2=.9
++voff=-6.735529e-02  nfactor=1.139926  cit=1.622527e-04
++cdsc=-2.147181e-05
++cdscb=0  dvt0w=0 dvt1w=0 dvt2w=0
++cdscd=0 prwg=0
++eta0=1.0281729e-02  etab=-5.042203e-03
++dsub=.31871233
++pclm=1.114846  pdiblc1=2.45357e-03  pdiblc2=6.406289e-03
++drout=.31871233  pscbe1=5000000  pscbe2=5e-09 pdiblcb=-.234
++pvag=0 delta=0.01
++wl=0 ww=-1.420242e-09 wwl=0
++wln=0 wwn=.2613948 ll=1.300902e-10
++lw=0 lwl=0 lln=.316394 lwn=0
++kt1=-.3  kt2=-.051
++at=22400
++ute=-1.48
++ua1=3.31e-10  ub1=2.61e-19 uc1=-3.42e-10
++kt1l=0 prt=764.3
++noimod=2
++af=1.075e+00              kf=9.670e-28               ef=1.056e+00
++noia=1.130e+20            noib=7.530e+04             noic=-8.950e-13
+**** PMOS ***
+.model p1 pmos
++level=8
++version=3.3.0
++tnom=27.0
++nch=3.533024e+17  tox=AGAUSS(9e-09,9e-09,10) xj=1.00000e-07
++lint=6.23e-8 wint=1.22e-7
++vth0=AGAUSS(-.6732829,-.6732829,10) k1=.8362093  k2=-8.606622e-02  k3=1.82
++dvt0=1.903801  dvt1=.5333922  dvt2=-.1862677
++nlx=1.28e-8  w0=2.1e-6
++k3b=-0.24 prwg=-0.001 prwb=-0.323
++vsat=103503.2  ua=1.39995e-09  ub=1.e-19  uc=-2.73e-11
++rdsw=460  u0=AGAUSS(138.7609,138.7609,10)
++a0=.4716551 ags=0.12
++keta=-1.871516e-03  a1=.3417965  a2=0.83
++voff=-.074182  nfactor=1.54389  cit=-1.015667e-03
++cdsc=8.937517e-04
++cdscb=1.45e-4  cdscd=1.04e-4
++dvt0w=0.232 dvt1w=4.5e6 dvt2w=-0.0023
++eta0=6.024776e-02  etab=-4.64593e-03
++dsub=.23222404
++pclm=.989  pdiblc1=2.07418e-02  pdiblc2=1.33813e-3
++drout=.3222404  pscbe1=118000  pscbe2=1e-09
++pvag=0
++kt1=-0.25  kt2=-0.032 prt=64.5
++at=33000
++ute=-1.5
++ua1=4.312e-9 ub1=6.65e-19  uc1=0
++kt1l=0
++noimod=2
++af=9.970e-01              kf=2.080e-29               ef=1.015e+00
++noia=1.480e+18            noib=3.320e+03             noic=1.770e-13
+.end
+
+.end

paranoia_parallel/examples/Monte_Carlo/MC_2_control.sp

@@ -0,0 +1,47 @@
+*ng_script
+* Perform Monte Carlo simulation in ngspice
+* script for use with 25 stage Ring-Osc. BSIM3
+* circuit is in MC_2_circ.sp
+* edit 'set sourcepath' for your path to circuit file
+* start script by 'ngspice -o MC_2_control.log MC_2_control.sp'
+*
+.control
+  let mc_runs = 3                ; number of runs for monte carlo
+  let run = 1                     ; number of the actual run
+
+* Where to find the circuit netlist file MC_2_circ.sp
+  setcs sourcepath = ( /home/holger/Software/paranoia/examples/Monte_Carlo )
+
+* create file for frequency information
+  echo Monte Carlo, frequency of R.O. > MC_frequ.log
+
+* run the simulation loop
+  dowhile run <= mc_runs
+    * without the reset switch there is some strange drift
+    * towards lower and lower frequencies
+    set run = $&run               ; create a variable from the vector
+    setseed $run                  ; set the rnd seed value to the loop index
+    if run = 1
+       source MC_2_circ.sp        ; load the circuit once from file, including model data
+    else
+       mc_source                  ; re-load the circuit from internal storage
+    end
+    save buf                      ; we just need output vector buf, save memory by more than 10x
+    tran 15p 2n 0
+    write mc_ring{$run}.out buf   ; write each sim output to its own rawfile
+    linearize buf                 ; lienarize buf to allow fft
+    fft buf                       ; run fft on vector buf
+    let buf2=db(mag(buf))
+    * find the frequency where buf has its maximum of the fft signal
+    meas sp fft_max MAX_AT buf2 from=0.1G to=0.7G
+    print fft_max >> MC_frequ.log ; print frequency to file
+    destroy all                   ; delete all output vectors
+    remcirc                       ; delete circuit
+    let run = run + 1             ; increase loop counter
+  end
+
+  quit
+
+.endc
+
+.end

paranoia_parallel/examples/Monte_Carlo/MC_frequ.log

@@ -0,0 +1,4 @@
+Monte Carlo frequency of R.O.
+fft_max = 2.604167e+08
+fft_max = 2.604167e+08
+fft_max = 2.604167e+08

paranoia_parallel/examples/Monte_Carlo/MC_ring.sp

@@ -0,0 +1,292 @@
+Perform Monte Carlo simulation in ngspice
+* 25 stage Ring-Osc. BSIM3 with statistical variation of various model parameters
+* cd into ngspice/examples/Monte_Carlo
+* start in interactive mode 'ngspice MC_ring.sp' with several plots for output
+* or start in batch mode, controlled by .control section (Control mode)
+* with 'ngspice -b -r MC_ring.raw -o MC_ring.log MC_ring.sp'.
+
+vin in out dc 0.5 pulse 0.5 0 0.1n 5n 1 1 1
+vdd dd 0 dc 3.3
+vss ss 0 dc 0
+ve  sub  0 dc 0
+vpe well 0 dc 3.3
+
+.subckt inv1 dd ss sub well in out
+mn1  out in  ss  sub  n1  w=2u l=0.35u as=3p ad=3p ps=4u pd=4u
+mp1  out in  dd  well p1  w=4u l=0.35u as=7p ad=7p ps=6u pd=6u
+.ends inv1
+
+.subckt inv5 dd ss sub well in out
+xinv1 dd ss sub well in 1 inv1
+xinv2 dd ss sub well 1  2 inv1
+xinv3 dd ss sub well 2  3 inv1
+xinv4 dd ss sub well 3  4 inv1
+xinv5 dd ss sub well 4 out inv1
+.ends inv5
+
+xinv1 dd ss sub well in out5 inv5
+xinv2 dd ss sub well out5 out10 inv5
+xinv3 dd ss sub well out10 out15 inv5
+xinv4 dd ss sub well out15 out20 inv5
+xinv5 dd ss sub well out20 out inv5
+xinv11 dd 0 sub well out buf inv1
+cout  buf ss 0.2pF
+
+.ic v(out20) = 0
+
+*
+.options noacct
+.control
+  save buf                        ; we just need buf, save memory by more than 10x
+  let mc_runs = 2             ; number of runs for monte carlo
+  let run = 0                     ; number of actual run
+  set curplot = new               ; create a new plot
+  set curplottitle = "Transient outputs"
+  set plot_out = $curplot         ; store its name to 'plot_out'
+  set curplot = new               ; create a new plot
+  set curplottitle = "FFT outputs"
+  set plot_fft = $curplot         ; store its name to 'plot_fft'
+  set curplot = new               ; create a new plot
+  set curplottitle = "Oscillation frequency"
+  set max_fft = $curplot          ; store its name to 'max_fft'
+  let mc_runsp = mc_runs + 1
+  let maxffts = unitvec(mc_runsp) ; vector for storing max measure results
+  let halfffts = unitvec(mc_runsp)$ vector for storing measure results at -40dB rising
+*
+* define distributions for random numbers:
+* unif: uniform distribution, deviation relativ to nominal value
+* aunif: uniform distribution, deviation absolut
+* gauss: Gaussian distribution, deviation relativ to nominal value
+* agauss: Gaussian distribution, deviation absolut
+  define unif(nom, var) (nom + (nom*var) * sunif(0))
+  define aunif(nom, avar) (nom + avar * sunif(0))
+  define gauss(nom, var, sig) (nom + (nom*var)/sig * sgauss(0))
+  define agauss(nom, avar, sig) (nom + avar/sig * sgauss(0))
+*
+* We want to vary the model parameters vth0, u0, tox, lint, and wint
+* of the BSIM3 model for the NMOS and PMOS transistors.
+* We may obtain the nominal values (nom) by manually extracting them from
+* the parameter set. Here we get them automatically and store them into
+* vectors. This has the advantage that you may change the parameter set
+* without having to look up the values again.
+  let n1vth0=@n1[vth0]
+  let n1u0=@n1[u0]
+  let n1tox=@n1[tox]
+  let n1lint=@n1[lint]
+  let n1wint=@n1[wint]
+  let p1vth0=@p1[vth0]
+  let p1u0=@p1[u0]
+  let p1tox=@p1[tox]
+  let p1lint=@p1[lint]
+  let p1wint=@p1[wint]
+
+*
+* run the simulation loop
+  dowhile run <= mc_runs
+    * run=0 simulates with nominal parameters
+    if run > 0
+      setplot $max_fft
+      altermod @n1[vth0] = gauss(n1vth0, 0.1, 3)
+      altermod @n1[u0] = gauss(n1u0, 0.05, 3)
+      altermod @n1[tox] = gauss(n1tox, 0.1, 3)
+      altermod @n1[lint] = gauss(n1lint, 0.1, 3)
+      altermod @n1[wint] = gauss(n1wint, 0.1, 3)
+      altermod @p1[vth0] = gauss(p1vth0, 0.1, 3)
+      altermod @p1[u0] = gauss(p1u0, 0.1, 3)
+      altermod @p1[tox] = gauss(p1tox, 0.1, 3 )
+      altermod @p1[lint] = gauss(p1lint, 0.1, 3)
+      altermod @p1[wint] = gauss(p1wint, 0.1, 3)
+    end
+    tran 15p 3n 0
+* select stop and step so that number of data points after linearization is not too
+* close to 8192, which would yield varying number of line length and thus scale for fft.
+*
+* We have to figure out what to do if a single simulation will not converge.
+* There is the variable 'sim_status' which is set to 1 if the simulation
+* fails with ’xx simulation(s) aborted’, e.g. because of non-convergence.
+* Then we might skip this run and continue with a new run.
+*
+    echo Simulation status $sim_status
+    let simstat = $sim_status
+    if simstat = 1
+      if run = mc_runs
+        echo go to end
+      else
+        echo go to next run
+      end
+      destroy $curplot
+      goto next
+    end
+
+    set run ="$&run"              ; create a variable from the vector
+    set mc_runs ="$&mc_runs"      ; create a variable from the vector
+    echo simulation run no. $run of $mc_runs
+    set dt = $curplot
+    * save the linearized data for having equal time scales for all runs
+    linearize buf                 ; linearize only buf, no other vectors needed
+    destroy $dt                   ; delete the tran i plot
+    set dt = $curplot             ; store the current plot to dt (tran i+1)
+    setplot $plot_out             ; make 'plt_out' the active plot
+    * firstly save the time scale once to become the default scale
+    if run=0
+       let time={$dt}.time
+    end
+    let vout{$run}={$dt}.buf      ; store the output vector to plot 'plot_out'
+    setplot $dt                   ; go back to the previous plot (tran i+1)
+    fft buf ; run fft on vector buf
+    destroy $dt                   ; delete the tran i+1 plot
+    let buf2=db(mag(buf))
+    plot buf2
+    * find the frequency where buf has its maximum of the fft signal
+    meas sp fft_max MAX_AT buf2 from=0.0 to=0.7G
+    * find the frequency where buf is -40dB at rising fft signal
+    meas sp fft_40 WHEN buf2=-40 FALL=1 from=0 to=7G
+    echo
+    echo
+    * store the fft vector
+    set dt = $curplot             ; store the current plot to dt (spec i)
+    setplot $plot_fft             ; make 'plot_fft' the active plot
+    if run=0
+       let frequency={$dt}.frequency
+    end
+    let fft{$run}={$dt}.buf       ; store the output vector to plot 'plot_fft'
+    * store the measured value
+    setplot $max_fft              ; make 'max_fft' the active plot
+    let maxffts[{$run}]={$dt}.fft_max
+    let halfffts[{$run}]={$dt}.fft_40
+    let run = run + 1
+    label next
+    reset
+  end
+***** plotting **********************************************************
+if $?batchmode
+  echo
+  echo Plotting not available in batch mode
+  echo Write linearized vout0 to vout{$mc_runs} to rawfile $rawfile
+  echo
+  write $rawfile {$plot_out}.allv
+  rusage
+  quit
+else
+  setplot $plot_out
+  plot vout0  ylabel 'RO output, original parameters'        ; just plot the tran output with nominal parameters
+  setplot $plot_fft
+  settype decibel ally
+  plot db(mag(ally)) xlimit .1G 1G ylimit -80 10 ylabel 'fft output'
+*
+* create a histogram from vector maxffts
+  setplot $max_fft                ; make 'max_fft' the active plot
+  set startfreq=400MEG
+  set bin_size=5MEG
+  set bin_count=20
+  compose xvec start=$startfreq step=$bin_size lin=$bin_count ; requires variables as parameters
+  settype frequency xvec
+  let bin_count=$bin_count        ; create a vector from the variable
+  let yvec=unitvec(bin_count)     ; requires vector as parameter
+  let startfreq=$startfreq
+  let bin_size=$bin_size
+  * put data into the correct bins
+  let run = 0
+  dowhile run < mc_runs
+    set run = $&run               ; create a variable from the vector
+    let val = maxffts[{$run}]
+    let part = 0
+    * Check if val fits into a bin. If yes, raise bin by 1
+    dowhile part < bin_count
+      if ((val < (startfreq + (part+1)*bin_size)) & (val > (startfreq + part*bin_size)))
+        let yvec[part] = yvec[part] + 1
+                break
+      end
+      let part = part + 1
+    end
+    let run = run + 1
+  end
+
+  * plot the histogram
+  set plotstyle=combplot
+  plot yvec-1 vs xvec   xlabel 'oscillation frequency' ylabel 'bin count'     ; subtract 1 because we started with unitvec containing ones
+
+  * plot simulation series
+  set plotstyle=linplot
+  let xx = vector(mc_runsp)
+  settype frequency maxffts
+  plot maxffts vs xx xlabel 'iteration no.' ylabel 'RO frequency'
+
+* calculate jitter
+  let diff40 = (vecmax(halfffts) - vecmin(halfffts))*1e-6
+  echo
+  echo Max. jitter is "$&diff40" MHz
+end   
+  rusage
+  
+quit  
+.endc
+********************************************************************************
+.model n1 nmos
++level=8
++version=3.3.0
++tnom=27.0
++nch=2.498e+17  tox=9e-09 xj=1.00000e-07
++lint=9.36e-8 wint=1.47e-7
++vth0=.6322    k1=.756  k2=-3.83e-2  k3=-2.612
++dvt0=2.812  dvt1=0.462  dvt2=-9.17e-2
++nlx=3.52291e-08  w0=1.163e-6
++k3b=2.233
++vsat=86301.58  ua=6.47e-9  ub=4.23e-18  uc=-4.706281e-11
++rdsw=650  u0=388.3203 wr=1
++a0=.3496967 ags=.1    b0=0.546    b1=1
++dwg=-6.0e-09 dwb=-3.56e-09 prwb=-.213
++keta=-3.605872e-02  a1=2.778747e-02  a2=.9
++voff=-6.735529e-02  nfactor=1.139926  cit=1.622527e-04
++cdsc=-2.147181e-05
++cdscb=0  dvt0w=0 dvt1w=0 dvt2w=0
++cdscd=0 prwg=0
++eta0=1.0281729e-02  etab=-5.042203e-03
++dsub=.31871233
++pclm=1.114846  pdiblc1=2.45357e-03  pdiblc2=6.406289e-03
++drout=.31871233  pscbe1=5000000  pscbe2=5e-09 pdiblcb=-.234
++pvag=0 delta=0.01
++wl=0 ww=-1.420242e-09 wwl=0
++wln=0 wwn=.2613948 ll=1.300902e-10
++lw=0 lwl=0 lln=.316394 lwn=0
++kt1=-.3  kt2=-.051
++at=22400
++ute=-1.48
++ua1=3.31e-10  ub1=2.61e-19 uc1=-3.42e-10
++kt1l=0 prt=764.3
++noimod=2
++af=1.075e+00              kf=9.670e-28               ef=1.056e+00
++noia=1.130e+20            noib=7.530e+04             noic=-8.950e-13
+**** PMOS ***
+.model p1 pmos
++level=8
++version=3.3.0
++tnom=27.0
++nch=3.533024e+17  tox=9e-09 xj=1.00000e-07
++lint=6.23e-8 wint=1.22e-7
++vth0=-.6732829 k1=.8362093  k2=-8.606622e-02  k3=1.82
++dvt0=1.903801  dvt1=.5333922  dvt2=-.1862677
++nlx=1.28e-8  w0=2.1e-6
++k3b=-0.24 prwg=-0.001 prwb=-0.323
++vsat=103503.2  ua=1.39995e-09  ub=1.e-19  uc=-2.73e-11
++rdsw=460  u0=138.7609
++a0=.4716551 ags=0.12
++keta=-1.871516e-03  a1=.3417965  a2=0.83
++voff=-.074182  nfactor=1.54389  cit=-1.015667e-03
++cdsc=8.937517e-04
++cdscb=1.45e-4  cdscd=1.04e-4
++dvt0w=0.232 dvt1w=4.5e6 dvt2w=-0.0023
++eta0=6.024776e-02  etab=-4.64593e-03
++dsub=.23222404
++pclm=.989  pdiblc1=2.07418e-02  pdiblc2=1.33813e-3
++drout=.3222404  pscbe1=118000  pscbe2=1e-09
++pvag=0
++kt1=-0.25  kt2=-0.032 prt=64.5
++at=33000
++ute=-1.5
++ua1=4.312e-9 ub1=6.65e-19  uc1=0
++kt1l=0
++noimod=2
++af=9.970e-01              kf=2.080e-29               ef=1.015e+00
++noia=1.480e+18            noib=3.320e+03             noic=1.770e-13
+.end

paranoia_parallel/examples/Monte_Carlo/MC_ring_ts.sp

@@ -0,0 +1,180 @@
+*ng_script
+* Example script for Monte Carlo with commercial HSPICE-compatible libraries
+* The circuit in mc_ring_circ.net is a 25-stage inverter ring oscillator.
+* Add your library to mc_ring_circ.net and choose transistors accordingly.
+* Add the source file and the library path.
+* A simple BSIM3 inverter R.O. serves as an MC example wtihout need for a library.
+.control
+begin
+  let mc_runs = 3                 ; number of runs for monte carlo
+  let run = 0                     ; number of actual run
+  set curplot = new               ; create a new plot
+  set curplottitle = "Transient outputs"
+  set plot_out = $curplot         ; store its name to 'plot_out'
+  set curplot = new               ; create a new plot
+  set curplottitle = "FFT outputs"
+  set plot_fft = $curplot         ; store its name to 'plot_fft'
+  set curplot = new               ; create a new plot
+  set curplottitle = "Oscillation frequency"
+  set max_fft = $curplot          ; store its name to 'max_fft'
+  let mc_runsp = mc_runs + 1
+  let maxffts = unitvec(mc_runsp) ; vector for storing max measure results
+  let halfffts = unitvec(mc_runsp)$ vector for storing measure results at -40dB rising
+  unlet mc_runsp
+
+  set mc_runs = $&mc_runs         ; create a variable from the vector
+  let seeds = mc_runs + 2
+  setseed $&seeds
+  unlet seeds
+
+  echo source the input file
+* Path of your circuit file and library file here
+* Will be added to the already existing sourcepath
+  set sourcepath = ( $inputdir $sourcepath ./ngspice/examples/Monte_Carlo )
+* source with file name of your circuit file
+  source mc_ring_circ.net
+
+  save buf                        ; we just need buf, save memory by more than 10x
+
+* Output path (directory has already to be there)
+*  set outputpath = 'D:\Spice_general\ngspice\examples\Monte_Carlo\out'
+* If your current directory is the 'ngspice' directory
+*  set outputpath = './examples/Monte_Carlo/out' ; LINUX alternative
+* run the simulation loop
+
+* We have to figure out what to do if a single simulation will not converge.
+* There is now the variable sim_status, that is 0 if simulation ended regularly,
+* and 1 if the simulation has been aborted with error message '...simulation(s) aborted'.
+* Then we skip the rest of the run and continue with a new run.
+
+  dowhile run <= mc_runs
+
+    set run = $&run               ; create a variable from the vector
+
+    * run=0 simulates with nominal parameters
+    if run > 0
+      echo
+      echo * * * * * *
+      echo Source the circuit again internally for run no. $run
+      echo * * * * * *
+      setseed $run
+      mc_source  ; re-source the input file
+    else
+      echo run no. $run
+    end
+    echo simulation run no. $run of $mc_runs
+    tran 100p 2n 0
+    echo Simulation status $sim_status
+    let simstat = $sim_status
+    if simstat = 1
+      if run = mc_runs
+        echo go to end
+      else
+        echo go to next run
+      end
+      destroy $curplot
+      goto next
+    end
+
+* select stop and step so that number of data points after linearization is not too
+* close to 8192, which would yield varying number of line length and thus scale for fft.
+*
+    set dt0 = $curplot
+    * save the linearized data for having equal time scales for all runs
+    linearize buf                 ; linearize only buf, no other vectors needed
+    set dt1 = $curplot             ; store the current plot to dt (tran i+1)
+    setplot $plot_out             ; make 'plt_out' the active plot
+    * firstly save the time scale once to become the default scale
+    if run=0
+       let time={$dt1}.time
+    end
+    let vout{$run}={$dt1}.buf     ; store the output vector to plot 'plot_out'
+    setplot $dt1                  ; go back to the previous plot (tran i+1)
+    fft buf ; run fft on vector buf
+    let buf2=db(mag(buf))
+    * find the frequency where buf has its maximum of the fft signal
+    meas sp fft_max MAX_AT buf2 from=0.05G to=0.7G
+    * find the frequency where buf is -40dB at rising fft signal
+    meas sp fft_40 WHEN buf2=-40 FALL=1 from=0.05G to=7G
+    * store the fft vector
+    set dt2 = $curplot            ; store the current plot to dt (spec i)
+    setplot $plot_fft             ; make 'plot_fft' the active plot
+    if run=0
+       let frequency={$dt2}.frequency
+    end
+    let fft{$run}={$dt2}.buf      ; store the output vector to plot 'plot_fft'
+    settype decibel fft{$run}
+    * store the measured value
+    setplot $max_fft              ; make 'max_fft' the active plot
+    let maxffts[{$run}]={$dt2}.fft_max
+    let halfffts[{$run}]={$dt2}.fft_40
+    destroy $dt0  $dt1  $dt2      ; save memory, we don't need this plot (spec) any more
+
+    label next
+    remcirc
+    let run = run + 1
+  end
+***** plotting **********************************************************
+if $?batchmode
+  echo
+  echo Plotting not available in batch mode
+  echo Write linearized vout0 to vout{$mc_runs} to rawfile $rawfile
+  echo
+  write $rawfile {$plot_out}.allv
+  rusage
+  quit
+else
+  if $?sharedmode or $?win_console
+    gnuplot xnp_pl1 {$plot_out}.vout0   ; just plot the tran output with nominal parameters
+  else
+    plot {$plot_out}.vout0          ; just plot the tran output with nominal parameters
+  end
+  setplot $plot_fft
+  if $?sharedmode or $?win_console
+    gnuplot xnp_pl2 db(mag(ally)) xlimit 0 1G ylimit -80 10
+  else
+    plot db(mag(ally)) xlimit 0 1G ylimit -80 10
+  end
+*
+* create a histogram from vector maxffts
+  setplot $max_fft                ; make 'max_fft' the active plot
+  set startfreq=50MEG
+  set bin_size=1MEG
+  set bin_count=100
+  compose osc_frequ start=$startfreq step=$bin_size lin=$bin_count ; requires variables as parameters
+  settype frequency osc_frequ
+  let bin_count=$bin_count        ; create a vector from the variable
+  let yvec=unitvec(bin_count)     ; requires vector as parameter
+  let startfreq=$startfreq
+  let bin_size=$bin_size
+  * put data into the correct bins
+  let run = 0
+  dowhile run < mc_runs
+    set run = $&run              ; create a variable from the vector
+    let val = maxffts[{$run}]
+    let part = 0
+    * Check if val fits into a bin. If yes, raise bin by 1
+    dowhile part < bin_count
+      if ((val < (startfreq + (part+1)*bin_size)) & (val >= (startfreq + part*bin_size)))
+        let yvec[part] = yvec[part] + 1
+                break
+      end
+      let part = part + 1
+    end
+    let run = run + 1
+  end
+  * plot the histogram
+  let count = yvec - 1             ; subtract 1 because we started with unitvec containing ones
+  if $?sharedmode or $?win_console
+    gnuplot np_pl3 count vs osc_frequ combplot
+  else
+    plot count vs osc_frequ combplot
+  end
+* calculate jitter
+  let diff40 = (vecmax(halfffts) - vecmin(halfffts))*1e-6
+  echo
+  echo Max. jitter is "$&diff40" MHz
+end
+  rusage
+  quit
+end

paranoia_parallel/examples/Monte_Carlo/MC_ring_ts_short.sp

@@ -0,0 +1,180 @@
+*ng_script
+* Example script for Monte Carlo with commercial HSPICE-compatible libraries
+* The circuit in mc_ring_circ.net is a 25-stage inverter ring oscillator.
+* Add your library to mc_ring_circ.net and choose transistors accordingly.
+* Add the source file and the library path.
+* A simple BSIM3 inverter R.O. serves as an MC example wtihout need for a library.
+.control
+begin
+  let mc_runs = 5                ; number of runs for monte carlo
+  let run = 0                     ; number of actual run
+  set curplot = new               ; create a new plot
+  set curplottitle = "Transient outputs"
+  set plot_out = $curplot         ; store its name to 'plot_out'
+  set curplot = new               ; create a new plot
+  set curplottitle = "FFT outputs"
+  set plot_fft = $curplot         ; store its name to 'plot_fft'
+  set curplot = new               ; create a new plot
+  set curplottitle = "Oscillation frequency"
+  set max_fft = $curplot          ; store its name to 'max_fft'
+  let mc_runsp = mc_runs + 1
+  let maxffts = unitvec(mc_runsp) ; vector for storing max measure results
+  let halfffts = unitvec(mc_runsp)$ vector for storing measure results at -40dB rising
+  unlet mc_runsp
+
+  set mc_runs = $&mc_runs         ; create a variable from the vector
+  let seeds = mc_runs + 2
+  setseed $&seeds
+  unlet seeds
+
+  echo source the input file
+* Path of your circuit file and library file here
+* Will be added to the already existing sourcepath
+  set sourcepath = ( $inputdir $sourcepath ./ngspice/examples/Monte_Carlo )
+* source with file name of your circuit file
+  source mc_ring_circ.net
+
+  save buf                        ; we just need buf, save memory by more than 10x
+
+* Output path (directory has already to be there)
+*  set outputpath = 'D:\Spice_general\ngspice\examples\Monte_Carlo\out'
+* If your current directory is the 'ngspice' directory
+*  set outputpath = './examples/Monte_Carlo/out' ; LINUX alternative
+* run the simulation loop
+
+* We have to figure out what to do if a single simulation will not converge.
+* There is now the variable sim_status, that is 0 if simulation ended regularly,
+* and 1 if the simulation has been aborted with error message '...simulation(s) aborted'.
+* Then we skip the rest of the run and continue with a new run.
+
+  dowhile run <= mc_runs
+
+    set run = $&run               ; create a variable from the vector
+
+    * run=0 simulates with nominal parameters
+    if run > 0
+      echo
+      echo * * * * * *
+      echo Source the circuit again internally for run no. $run
+      echo * * * * * *
+      setseed $run
+      mc_source  ; re-source the input file
+    else
+      echo run no. $run
+    end
+    echo simulation run no. $run of $mc_runs
+    tran 100p 5n 0
+    echo Simulation status $sim_status
+    let simstat = $sim_status
+    if simstat = 1
+      if run = mc_runs
+        echo go to end
+      else
+        echo go to next run
+      end
+      destroy $curplot
+      goto next
+    end
+
+* select stop and step so that number of data points after linearization is not too
+* close to 8192, which would yield varying number of line length and thus scale for fft.
+*
+    set dt0 = $curplot
+    * save the linearized data for having equal time scales for all runs
+    linearize buf                 ; linearize only buf, no other vectors needed
+    set dt1 = $curplot             ; store the current plot to dt (tran i+1)
+    setplot $plot_out             ; make 'plt_out' the active plot
+    * firstly save the time scale once to become the default scale
+    if run=0
+       let time={$dt1}.time
+    end
+    let vout{$run}={$dt1}.buf     ; store the output vector to plot 'plot_out'
+    setplot $dt1                  ; go back to the previous plot (tran i+1)
+    fft buf ; run fft on vector buf
+    let buf2=db(mag(buf))
+    * find the frequency where buf has its maximum of the fft signal
+    meas sp fft_max MAX_AT buf2 from=0.05G to=0.7G
+    * find the frequency where buf is -40dB at rising fft signal
+    meas sp fft_40 WHEN buf2=-40 RISE=1 from=0.05G to=0.7G
+    * store the fft vector
+    set dt2 = $curplot            ; store the current plot to dt (spec i)
+    setplot $plot_fft             ; make 'plot_fft' the active plot
+    if run=0
+       let frequency={$dt2}.frequency
+    end
+    let fft{$run}={$dt2}.buf      ; store the output vector to plot 'plot_fft'
+    settype decibel fft{$run}
+    * store the measured value
+    setplot $max_fft              ; make 'max_fft' the active plot
+    let maxffts[{$run}]={$dt2}.fft_max
+    let halfffts[{$run}]={$dt2}.fft_40
+    destroy $dt0  $dt1  $dt2      ; save memory, we don't need this plot (spec) any more
+
+    label next
+    remcirc
+    let run = run + 1
+  end
+***** plotting **********************************************************
+if $?batchmode
+  echo
+  echo Plotting not available in batch mode
+  echo Write linearized vout0 to vout{$mc_runs} to rawfile $rawfile
+  echo
+  write $rawfile {$plot_out}.allv
+  rusage
+  quit
+else
+  if $?sharedmode or $?win_console
+    gnuplot xnp_pl1 {$plot_out}.vout0   ; just plot the tran output with nominal parameters
+  else
+    plot {$plot_out}.vout0          ; just plot the tran output with nominal parameters
+  end
+  setplot $plot_fft
+  if $?sharedmode or $?win_console
+    gnuplot xnp_pl2 db(mag(ally)) xlimit 0 1G ylimit -80 10
+  else
+    plot db(mag(ally)) xlimit 0 1G ylimit -80 10
+  end
+*
+* create a histogram from vector maxffts
+  setplot $max_fft                ; make 'max_fft' the active plot
+  set startfreq=50MEG
+  set bin_size=1MEG
+  set bin_count=100
+  compose osc_frequ start=$startfreq step=$bin_size lin=$bin_count ; requires variables as parameters
+  settype frequency osc_frequ
+  let bin_count=$bin_count        ; create a vector from the variable
+  let yvec=unitvec(bin_count)     ; requires vector as parameter
+  let startfreq=$startfreq
+  let bin_size=$bin_size
+  * put data into the correct bins
+  let run = 0
+  dowhile run < mc_runs
+    set run = $&run              ; create a variable from the vector
+    let val = maxffts[{$run}]
+    let part = 0
+    * Check if val fits into a bin. If yes, raise bin by 1
+    dowhile part < bin_count
+      if ((val < (startfreq + (part+1)*bin_size)) & (val >= (startfreq + part*bin_size)))
+        let yvec[part] = yvec[part] + 1
+                break
+      end
+      let part = part + 1
+    end
+    let run = run + 1
+  end
+  * plot the histogram
+  let count = yvec - 1             ; subtract 1 because we started with unitvec containing ones
+  if $?sharedmode or $?win_console
+    gnuplot np_pl3 count vs osc_frequ combplot
+  else
+    plot count vs osc_frequ combplot
+  end
+* calculate jitter
+  let diff40 = (vecmax(halfffts) - vecmin(halfffts))*1e-6
+  echo
+  echo Max. jitter is "$&diff40" MHz
+end
+  rusage
+*  quit
+end

paranoia_parallel/examples/Monte_Carlo/MC_ring_ts_test.sp

@@ -0,0 +1,180 @@
+*ng_script
+* Example script for Monte Carlo with commercial HSPICE-compatible libraries
+* The circuit in mc_ring_circ.net is a 25-stage inverter ring oscillator.
+* Add your library to mc_ring_circ.net and choose transistors accordingly.
+* Add the source file and the library path.
+* A simple BSIM3 inverter R.O. serves as an MC example wtihout need for a library.
+.control
+begin
+  let mc_runs = 3                 ; number of runs for monte carlo
+  let run = 0                     ; number of actual run
+  set curplot = new               ; create a new plot
+  set curplottitle = "Transient outputs"
+  set plot_out = $curplot         ; store its name to 'plot_out'
+  set curplot = new               ; create a new plot
+  set curplottitle = "FFT outputs"
+  set plot_fft = $curplot         ; store its name to 'plot_fft'
+  set curplot = new               ; create a new plot
+  set curplottitle = "Oscillation frequency"
+  set max_fft = $curplot          ; store its name to 'max_fft'
+  let mc_runsp = mc_runs + 1
+  let maxffts = unitvec(mc_runsp) ; vector for storing max measure results
+  let halfffts = unitvec(mc_runsp)$ vector for storing measure results at -40dB rising
+  unlet mc_runsp
+
+  set mc_runs = $&mc_runs         ; create a variable from the vector
+  let seeds = mc_runs + 2
+  setseed $&seeds
+  unlet seeds
+
+  echo source the input file
+* Path of your circuit file and library file here
+* Will be added to the already existing sourcepath
+  set sourcepath = ( $inputdir $sourcepath ./ngspice/examples/Monte_Carlo )
+* source with file name of your circuit file
+  source mc_ring_circ.net
+
+  save buf                        ; we just need buf, save memory by more than 10x
+
+* Output path (directory has already to be there)
+*  set outputpath = 'D:\Spice_general\ngspice\examples\Monte_Carlo\out'
+* If your current directory is the 'ngspice' directory
+*  set outputpath = './examples/Monte_Carlo/out' ; LINUX alternative
+* run the simulation loop
+
+* We have to figure out what to do if a single simulation will not converge.
+* There is now the variable sim_status, that is 0 if simulation ended regularly,
+* and 1 if the simulation has been aborted with error message '...simulation(s) aborted'.
+* Then we skip the rest of the run and continue with a new run.
+
+  dowhile run <= mc_runs
+
+    set run = $&run               ; create a variable from the vector
+
+    * run=0 simulates with nominal parameters
+    if run > 0
+      echo
+      echo * * * * * *
+      echo Source the circuit again internally for run no. $run
+      echo * * * * * *
+      setseed $run
+      mc_source  ; re-source the input file
+    else
+      echo run no. $run
+    end
+    echo simulation run no. $run of $mc_runs
+    tran 100p 10n 0
+    echo Simulation status $sim_status
+    let simstat = $sim_status
+    if simstat = 1
+      if run = mc_runs
+        echo go to end
+      else
+        echo go to next run
+      end
+      destroy $curplot
+      goto next
+    end
+
+* select stop and step so that number of data points after linearization is not too
+* close to 8192, which would yield varying number of line length and thus scale for fft.
+*
+    set dt0 = $curplot
+    * save the linearized data for having equal time scales for all runs
+    linearize buf                 ; linearize only buf, no other vectors needed
+    set dt1 = $curplot             ; store the current plot to dt (tran i+1)
+    setplot $plot_out             ; make 'plt_out' the active plot
+    * firstly save the time scale once to become the default scale
+    if run=0
+       let time={$dt1}.time
+    end
+    let vout{$run}={$dt1}.buf     ; store the output vector to plot 'plot_out'
+    setplot $dt1                  ; go back to the previous plot (tran i+1)
+    fft buf ; run fft on vector buf
+    let buf2=db(mag(buf))
+    * find the frequency where buf has its maximum of the fft signal
+    meas sp fft_max MAX_AT buf2 from=0.05G to=0.7G
+    * find the frequency where buf is -40dB at rising fft signal
+    meas sp fft_40 WHEN buf2=-40 RISE=1 from=0.05G to=0.7G
+    * store the fft vector
+    set dt2 = $curplot            ; store the current plot to dt (spec i)
+    setplot $plot_fft             ; make 'plot_fft' the active plot
+    if run=0
+       let frequency={$dt2}.frequency
+    end
+    let fft{$run}={$dt2}.buf      ; store the output vector to plot 'plot_fft'
+    settype decibel fft{$run}
+    * store the measured value
+    setplot $max_fft              ; make 'max_fft' the active plot
+    let maxffts[{$run}]={$dt2}.fft_max
+    let halfffts[{$run}]={$dt2}.fft_40
+    destroy $dt0  $dt1  $dt2      ; save memory, we don't need this plot (spec) any more
+
+    label next
+    remcirc
+    let run = run + 1
+  end
+***** plotting **********************************************************
+if $?batchmode
+  echo
+  echo Plotting not available in batch mode
+  echo Write linearized vout0 to vout{$mc_runs} to rawfile $rawfile
+  echo
+  write $rawfile {$plot_out}.allv
+  rusage
+  quit
+else
+  if $?sharedmode or $?win_console
+    gnuplot xnp_pl1 {$plot_out}.vout0   ; just plot the tran output with nominal parameters
+  else
+    plot {$plot_out}.vout0          ; just plot the tran output with nominal parameters
+  end
+  setplot $plot_fft
+  if $?sharedmode or $?win_console
+    gnuplot xnp_pl2 db(mag(ally)) xlimit 0 1G ylimit -80 10
+  else
+    plot db(mag(ally)) xlimit 0 1G ylimit -80 10
+  end
+*
+* create a histogram from vector maxffts
+  setplot $max_fft                ; make 'max_fft' the active plot
+  set startfreq=50MEG
+  set bin_size=1MEG
+  set bin_count=100
+  compose osc_frequ start=$startfreq step=$bin_size lin=$bin_count ; requires variables as parameters
+  settype frequency osc_frequ
+  let bin_count=$bin_count        ; create a vector from the variable
+  let yvec=unitvec(bin_count)     ; requires vector as parameter
+  let startfreq=$startfreq
+  let bin_size=$bin_size
+  * put data into the correct bins
+  let run = 0
+  dowhile run < mc_runs
+    set run = $&run              ; create a variable from the vector
+    let val = maxffts[{$run}]
+    let part = 0
+    * Check if val fits into a bin. If yes, raise bin by 1
+    dowhile part < bin_count
+      if ((val < (startfreq + (part+1)*bin_size)) & (val >= (startfreq + part*bin_size)))
+        let yvec[part] = yvec[part] + 1
+                break
+      end
+      let part = part + 1
+    end
+    let run = run + 1
+  end
+  * plot the histogram
+  let count = yvec - 1             ; subtract 1 because we started with unitvec containing ones
+  if $?sharedmode or $?win_console
+    gnuplot np_pl3 count vs osc_frequ combplot
+  else
+    plot count vs osc_frequ combplot
+  end
+* calculate jitter
+  let diff40 = (vecmax(halfffts) - vecmin(halfffts))*1e-6
+  echo
+  echo Max. jitter is "$&diff40" MHz
+end
+  rusage
+*  quit
+end

paranoia_parallel/examples/Monte_Carlo/MC_ring_val.sp

@@ -0,0 +1,286 @@
+Perform Monte Carlo simulation in ngspice
+* 25 stage Ring-Osc. BSIM3 with statistical variation of various model parameters
+* cd into ngspice/examples/Monte_Carlo
+* start in interactive mode 'ngspice MC_ring.sp' with several plots for output
+* or start in batch mode, controlled by .control section (Control mode)
+* with 'ngspice -b -r MC_ring.raw -o MC_ring.log MC_ring.sp'.
+
+vin in out dc 0.5 pulse 0.5 0 0.1n 5n 1 1 1
+vdd dd 0 dc 3.3
+vss ss 0 dc 0
+ve  sub  0 dc 0
+vpe well 0 dc 3.3
+
+.subckt inv1 dd ss sub well in out
+mn1  out in  ss  sub  n1  w=2u l=0.35u as=3p ad=3p ps=4u pd=4u
+mp1  out in  dd  well p1  w=4u l=0.35u as=7p ad=7p ps=6u pd=6u
+.ends inv1
+
+.subckt inv5 dd ss sub well in out
+xinv1 dd ss sub well in 1 inv1
+xinv2 dd ss sub well 1  2 inv1
+xinv3 dd ss sub well 2  3 inv1
+xinv4 dd ss sub well 3  4 inv1
+xinv5 dd ss sub well 4 out inv1
+.ends inv5
+
+xinv1 dd ss sub well in out5 inv5
+xinv2 dd ss sub well out5 out10 inv5
+xinv3 dd ss sub well out10 out15 inv5
+xinv4 dd ss sub well out15 out20 inv5
+xinv5 dd ss sub well out20 out inv5
+xinv11 dd 0 sub well out buf inv1
+cout  buf ss 0.2pF
+*
+.options noacct
+.control
+  save buf                        ; we just need buf, save memory by more than 10x
+  let mc_runs = 10             ; number of runs for monte carlo
+  let run = 0                     ; number of actual run
+  set curplot = new               ; create a new plot
+  set curplottitle = "Transient outputs"
+  set plot_out = $curplot         ; store its name to 'plot_out'
+  set curplot = new               ; create a new plot
+  set curplottitle = "FFT outputs"
+  set plot_fft = $curplot         ; store its name to 'plot_fft'
+  set curplot = new               ; create a new plot
+  set curplottitle = "Oscillation frequency"
+  set max_fft = $curplot          ; store its name to 'max_fft'
+  let mc_runsp = mc_runs + 1
+  let maxffts = unitvec(mc_runsp) ; vector for storing max measure results
+  let halfffts = unitvec(mc_runsp)$ vector for storing measure results at -40dB rising
+*
+* define distributions for random numbers:
+* unif: uniform distribution, deviation relativ to nominal value
+* aunif: uniform distribution, deviation absolut
+* gauss: Gaussian distribution, deviation relativ to nominal value
+* agauss: Gaussian distribution, deviation absolut
+  define unif(nom, var) (nom + (nom*var) * sunif(0))
+  define aunif(nom, avar) (nom + avar * sunif(0))
+  define gauss(nom, var, sig) (nom + (nom*var)/sig * sgauss(0))
+  define agauss(nom, avar, sig) (nom + avar/sig * sgauss(0))
+*
+* We want to vary the model parameters vth0, u0, tox, lint, and wint
+* of the BSIM3 model for the NMOS and PMOS transistors.
+* We may obtain the nominal values (nom) by manually extracting them from
+* the parameter set. Here we get them automatically and store them into
+* vectors. This has the advantage that you may change the parameter set
+* without having to look up the values again.
+  let n1vth0=@n1[vth0]
+  let n1u0=@n1[u0]
+  let n1tox=@n1[tox]
+  let n1lint=@n1[lint]
+  let n1wint=@n1[wint]
+  let p1vth0=@p1[vth0]
+  let p1u0=@p1[u0]
+  let p1tox=@p1[tox]
+  let p1lint=@p1[lint]
+  let p1wint=@p1[wint]
+
+*
+* run the simulation loop
+  dowhile run <= mc_runs
+    * run=0 simulates with nominal parameters
+    if run > 0
+      setplot $max_fft
+      altermod @n1[vth0] = gauss(n1vth0, 0.1, 3)
+      altermod @n1[u0] = gauss(n1u0, 0.05, 3)
+      altermod @n1[tox] = gauss(n1tox, 0.1, 3)
+      altermod @n1[lint] = gauss(n1lint, 0.1, 3)
+      altermod @n1[wint] = gauss(n1wint, 0.1, 3)
+      altermod @p1[vth0] = gauss(p1vth0, 0.1, 3)
+      altermod @p1[u0] = gauss(p1u0, 0.1, 3)
+      altermod @p1[tox] = gauss(p1tox, 0.1, 3 )
+      altermod @p1[lint] = gauss(p1lint, 0.1, 3)
+      altermod @p1[wint] = gauss(p1wint, 0.1, 3)
+    end
+    tran 15p 1n 0
+* select stop and step so that number of data points after linearization is not too
+* close to 8192, which would yield varying number of line length and thus scale for fft.
+*
+* We have to figure out what to do if a single simulation will not converge.
+* There is the variable 'sim_status' which is set to 1 if the simulation
+* fails with ’xx simulation(s) aborted’, e.g. because of non-convergence.
+* Then we might skip this run and continue with a new run.
+*
+    echo Simulation status $sim_status
+    let simstat = $sim_status
+    if simstat = 1
+      if run = mc_runs
+        echo go to end
+      else
+        echo go to next run
+      end
+      destroy $curplot
+      goto next
+    end
+
+    set run ="$&run"              ; create a variable from the vector
+    set mc_runs ="$&mc_runs"      ; create a variable from the vector
+    echo simulation run no. $run of $mc_runs
+    set dt = $curplot
+    * save the linearized data for having equal time scales for all runs
+    linearize buf                 ; linearize only buf, no other vectors needed
+    destroy $dt                   ; delete the tran i plot
+    set dt = $curplot             ; store the current plot to dt (tran i+1)
+    setplot $plot_out             ; make 'plt_out' the active plot
+    * firstly save the time scale once to become the default scale
+    if run=0
+       let time={$dt}.time
+    end
+    let vout{$run}={$dt}.buf      ; store the output vector to plot 'plot_out'
+    setplot $dt                   ; go back to the previous plot (tran i+1)
+    fft buf ; run fft on vector buf
+    destroy $dt                   ; delete the tran i+1 plot
+    let buf2=db(mag(buf))
+    * find the frequency where buf has its maximum of the fft signal
+    meas sp fft_max MAX_AT buf2 from=0.1G to=0.7G
+    * find the frequency where buf is -40dB at rising fft signal
+    meas sp fft_40 WHEN buf2=-40 RISE=1 from=0.1G to=0.7G
+    echo
+    echo
+    * store the fft vector
+    set dt = $curplot             ; store the current plot to dt (spec i)
+    setplot $plot_fft             ; make 'plot_fft' the active plot
+    if run=0
+       let frequency={$dt}.frequency
+    end
+    let fft{$run}={$dt}.buf       ; store the output vector to plot 'plot_fft'
+    * store the measured value
+    setplot $max_fft              ; make 'max_fft' the active plot
+    let maxffts[{$run}]={$dt}.fft_max
+    let halfffts[{$run}]={$dt}.fft_40
+    let run = run + 1
+    label next
+    reset
+  end
+***** plotting **********************************************************
+if $?batchmode
+  echo
+  echo Plotting not available in batch mode
+  echo Write linearized vout0 to vout{$mc_runs} to rawfile $rawfile
+  echo
+  write $rawfile {$plot_out}.allv
+  rusage
+  quit
+else
+  setplot $plot_out
+  plot vout0  ylabel 'RO output, original parameters'        ; just plot the tran output with nominal parameters
+  setplot $plot_fft
+  settype decibel ally
+  plot db(mag(ally)) xlimit .1G 1G ylimit -80 10 ylabel 'fft output'
+*
+* create a histogram from vector maxffts
+  setplot $max_fft                ; make 'max_fft' the active plot
+  set startfreq=400MEG
+  set bin_size=5MEG
+  set bin_count=20
+  compose xvec start=$startfreq step=$bin_size lin=$bin_count ; requires variables as parameters
+  settype frequency xvec
+  let bin_count=$bin_count        ; create a vector from the variable
+  let yvec=unitvec(bin_count)     ; requires vector as parameter
+  let startfreq=$startfreq
+  let bin_size=$bin_size
+  * put data into the correct bins
+  let run = 0
+  dowhile run < mc_runs
+    set run = $&run               ; create a variable from the vector
+    let val = maxffts[{$run}]
+    let part = 0
+    * Check if val fits into a bin. If yes, raise bin by 1
+    dowhile part < bin_count
+      if ((val < (startfreq + (part+1)*bin_size)) & (val > (startfreq + part*bin_size)))
+        let yvec[part] = yvec[part] + 1
+                break
+      end
+      let part = part + 1
+    end
+    let run = run + 1
+  end
+
+  * plot the histogram
+  set plotstyle=combplot
+  plot yvec-1 vs xvec   xlabel 'oscillation frequency' ylabel 'bin count'     ; subtract 1 because we started with unitvec containing ones
+
+  * plot simulation series
+  set plotstyle=linplot
+  let xx = vector(mc_runsp)
+  settype frequency maxffts
+  plot maxffts vs xx xlabel 'iteration no.' ylabel 'RO frequency'
+
+* calculate jitter
+  let diff40 = (vecmax(halfffts) - vecmin(halfffts))*1e-6
+  echo
+  echo Max. jitter is "$&diff40" MHz
+end   
+  rusage
+.endc
+********************************************************************************
+.model n1 nmos
++level=8
++version=3.3.0
++tnom=27.0
++nch=2.498e+17  tox=9e-09 xj=1.00000e-07
++lint=9.36e-8 wint=1.47e-7
++vth0=.6322    k1=.756  k2=-3.83e-2  k3=-2.612
++dvt0=2.812  dvt1=0.462  dvt2=-9.17e-2
++nlx=3.52291e-08  w0=1.163e-6
++k3b=2.233
++vsat=86301.58  ua=6.47e-9  ub=4.23e-18  uc=-4.706281e-11
++rdsw=650  u0=388.3203 wr=1
++a0=.3496967 ags=.1    b0=0.546    b1=1
++dwg=-6.0e-09 dwb=-3.56e-09 prwb=-.213
++keta=-3.605872e-02  a1=2.778747e-02  a2=.9
++voff=-6.735529e-02  nfactor=1.139926  cit=1.622527e-04
++cdsc=-2.147181e-05
++cdscb=0  dvt0w=0 dvt1w=0 dvt2w=0
++cdscd=0 prwg=0
++eta0=1.0281729e-02  etab=-5.042203e-03
++dsub=.31871233
++pclm=1.114846  pdiblc1=2.45357e-03  pdiblc2=6.406289e-03
++drout=.31871233  pscbe1=5000000  pscbe2=5e-09 pdiblcb=-.234
++pvag=0 delta=0.01
++wl=0 ww=-1.420242e-09 wwl=0
++wln=0 wwn=.2613948 ll=1.300902e-10
++lw=0 lwl=0 lln=.316394 lwn=0
++kt1=-.3  kt2=-.051
++at=22400
++ute=-1.48
++ua1=3.31e-10  ub1=2.61e-19 uc1=-3.42e-10
++kt1l=0 prt=764.3
++noimod=2
++af=1.075e+00              kf=9.670e-28               ef=1.056e+00
++noia=1.130e+20            noib=7.530e+04             noic=-8.950e-13
+**** PMOS ***
+.model p1 pmos
++level=8
++version=3.3.0
++tnom=27.0
++nch=3.533024e+17  tox=9e-09 xj=1.00000e-07
++lint=6.23e-8 wint=1.22e-7
++vth0=-.6732829 k1=.8362093  k2=-8.606622e-02  k3=1.82
++dvt0=1.903801  dvt1=.5333922  dvt2=-.1862677
++nlx=1.28e-8  w0=2.1e-6
++k3b=-0.24 prwg=-0.001 prwb=-0.323
++vsat=103503.2  ua=1.39995e-09  ub=1.e-19  uc=-2.73e-11
++rdsw=460  u0=138.7609
++a0=.4716551 ags=0.12
++keta=-1.871516e-03  a1=.3417965  a2=0.83
++voff=-.074182  nfactor=1.54389  cit=-1.015667e-03
++cdsc=8.937517e-04
++cdscb=1.45e-4  cdscd=1.04e-4
++dvt0w=0.232 dvt1w=4.5e6 dvt2w=-0.0023
++eta0=6.024776e-02  etab=-4.64593e-03
++dsub=.23222404
++pclm=.989  pdiblc1=2.07418e-02  pdiblc2=1.33813e-3
++drout=.3222404  pscbe1=118000  pscbe2=1e-09
++pvag=0
++kt1=-0.25  kt2=-0.032 prt=64.5
++at=33000
++ute=-1.5
++ua1=4.312e-9 ub1=6.65e-19  uc1=0
++kt1l=0
++noimod=2
++af=9.970e-01              kf=2.080e-29               ef=1.015e+00
++noia=1.480e+18            noib=3.320e+03             noic=1.770e-13
+.end

paranoia_parallel/examples/Monte_Carlo/MonteCarlo.sp

@@ -0,0 +1,68 @@
+* Effecting a Monte Carlo calculation in ngspice
+V1 N001 0 AC 1 DC 0
+R1 N002 N001 141
+*
+C1 OUT 0 1e-09
+L1 OUT 0 10e-06
+C2 N002 0 1e-09
+L2 N002 0 10e-06
+L3 N003 N002 40e-06
+C3 OUT N003 250e-12
+*
+R2 0 OUT 141
+.control
+  let mc_runs = 5
+  let run = 0
+  set curplot=new          ; create a new plot
+  set scratch=$curplot     ; store its name to 'scratch'
+  setplot $scratch         ; make 'scratch' the active plot
+  let bwh=unitvec(mc_runs) ; create a vector in plot 'scratch' to store bandwidth data
+
+* define distributions for random numbers:
+* unif: uniform distribution, deviation relativ to nominal value
+* aunif: uniform distribution, deviation absolut
+* gauss: Gaussian distribution, deviation relativ to nominal value
+* agauss: Gaussian distribution, deviation absolut
+* limit: if unif. distributed value >=0 then add +avar to nom, else -avar
+  define unif(nom, rvar) (nom + (nom*rvar) * sunif(0))
+  define aunif(nom, avar) (nom + avar * sunif(0))
+  define gauss(nom, rvar, sig) (nom + (nom*rvar)/sig * sgauss(0))
+  define agauss(nom, avar, sig) (nom + avar/sig * sgauss(0))
+*  define limit(nom, avar) (nom + ((sgauss(0) ge 0) ? avar : -avar))
+  define limit(nom, avar) (nom + ((sgauss(0) >= 0) ? avar : -avar))
+*
+*
+  dowhile run < mc_runs    ; loop starts here
+*
+*    alter c1 = unif(1e-09, 0.1)
+*    alter c1 = aunif(1e-09, 100e-12)
+*    alter c1 = gauss(1e-09, 0.1, 3)
+*    alter c1 = agauss(1e-09, 100e-12, 3)
+*
+    alter c1 = unif(1e-09, 0.1)
+    alter l1 = unif(10e-06, 0.1)
+    alter c2 = unif(1e-09, 0.1)
+    alter l2 = unif(10e-06, 0.1)
+    alter l3 = unif(40e-06, 0.1)
+    alter c3 = limit(250e-12, 25e-12)
+*
+    ac oct 100 250K 10Meg
+*
+* measure bandwidth at -10 dB
+    meas ac bw trig vdb(out) val=-10 rise=1 targ vdb(out) val=-10 fall=1
+*
+    set run = $&run             ; create a variable from the vector
+    set dt = $curplot           ; store the current plot to dt
+    setplot $scratch            ; make 'scratch' the active plot
+    let vout{$run}={$dt}.v(out) ; store the output vector to plot 'scratch'
+    let bwh[run]={$dt}.bw       ; store bw to vector bwh in plot 'scratch'
+    setplot $dt                 ; go back to the previous plot
+    let run = run + 1
+  end    ; loop ends here
+*
+  plot db({$scratch}.allv)
+  echo
+  print {$scratch}.bwh
+.endc
+
+.end

paranoia_parallel/examples/Monte_Carlo/OpWien.sp

@@ -0,0 +1,88 @@
+OPWIEN.CIR - OPAMP WIEN-BRIDGE OSCILLATOR
+* http://www.ecircuitcenter.com/circuits/opwien/opwien.htm
+* single simulation run
+* 2 resistors and 2 capacitors of Wien bridge a varied statistically
+* number of variations: varia
+
+* Simulation time
+.param ttime=120m
+.param varia=100
+.param ttime10 = 'ttime/varia'
+
+* nominal resistor and capacitor values
+.param res = 10k
+.param cn = 16NF
+
+* CURRENT PULSE TO START OSCILLATIONS
+IS	0	3	dc 0 PWL(0US 0MA   10US 0.1MA   40US 0.1MA   50US 0MA   10MS 0MA)
+*
+* RC TUNING
+VR2 r2  0 dc 0 trrandom (2 'ttime10' 0 1)  ; Gauss controlling voltage
+* 
+*VR2 r2  0 dc 0 trrandom (1 'ttime10' 0 3) ; Uniform within -3 3
+*
+* If Gauss, factor 0.033 is 10% equivalent to 3 sigma
+* if uniform, uniform between +/- 10%
+R2 4 6  R = 'res + 0.033 * res*V(r2)'  ; behavioral resistor
+*R2 4 6 'res' ; constant R
+
+VC2 c2 0 dc 0  trrandom (2 'ttime10' 0 1)
+*C2	6 	3'cn'  ; constant C
+C2 6 3 C = 'cn + 0.033 * cn*V(c2)'  ; behavioral capacitor
+
+VR1 r1  0 dc 0 trrandom (2 'ttime10' 0 1)
+*VR1 r1  0 dc 0 trrandom (1 'ttime10' 0 3)
+R1	3	0	R = 'res + 0.033 * res*V(r1)'
+*R1	3 	0	'res'
+
+VC1 c1 0 dc 0  trrandom (2 'ttime10' 0 1)
+C1 3 0 C =  'cn + 0.033 * cn*V(c2)'
+*C1	3 	0	'cn'
+
+* NON-INVERTING OPAMP
+R10	0	2	10K
+R11	2	5	18K
+XOP	3 2	4	OPAMP1
+* AMPLITUDE STABILIZATION
+R12	5	4	5K
+D1	5	4	D1N914
+D2	4	5	D1N914
+*
+.model	D1N914	D(Is=0.1p Rs=16 CJO=2p Tt=12n Bv=100 Ibv=0.4n)
+*
+* OPAMP MACRO MODEL, SINGLE-POLE 
+* connections:      non-inverting input
+*                   |   inverting input
+*                   |   |   output
+*                   |   |   |
+.SUBCKT OPAMP1      1   2   6
+* INPUT IMPEDANCE
+RIN	1	2	10MEG
+* DC GAIN (100K) AND POLE 1 (100HZ)
+EGAIN	3 0	1 2	100K
+RP1	3	4	1K
+CP1	4	0	1.5915UF
+* OUTPUT BUFFER AND RESISTANCE
+EBUFFER	5 0	4 0	1
+ROUT	5	6	10
+.ENDS
+*
+* ANALYSIS
+.TRAN 	0.05MS 'ttime'
+*
+* VIEW RESULTS
+.control
+option noinit
+run
+plot V(4) 5*V(r1) 5*V(r2) 5*V(c1) 5*V(c2)
+linearize v(4)
+fft v(4)
+let v4mag =  mag(v(4))
+plot v4mag
+plot v4mag xlimit 500 1500
+*wrdata histo v4mag
+rusage
+quit
+.endc
+
+.END

paranoia_parallel/examples/Monte_Carlo/OpWien_s.sp

@@ -0,0 +1,87 @@
+OPWIEN.CIR - OPAMP WIEN-BRIDGE OSCILLATOR
+* http://www.ecircuitcenter.com/circuits/opwien/opwien.htm
+* single simulation run
+* 2 resistors and 2 capacitors of Wien bridge a varied statistically
+* number of variations: varia
+
+* Simulation time
+.param ttime=1200m
+.param varia=100
+.param ttime10 = 'ttime/varia'
+
+* nominal resistor and capacitor values
+.param res = 10k
+.param cn = 16NF
+
+* CURRENT PULSE TO START OSCILLATIONS
+IS	0	3	dc 0 PWL(0US 0MA   10US 0.1MA   40US 0.1MA   50US 0MA   10MS 0MA)
+*
+* RC TUNING
+VR2 r2  0 dc 0 trrandom (2 'ttime10' 0 1)  ; Gauss controlling voltage
+* 
+*VR2 r2  0 dc 0 trrandom (1 'ttime10' 0 3) ; Uniform within -3 3
+*
+* If Gauss, factor 0.033 is 10% equivalent to 3 sigma
+* if uniform, uniform between +/- 10%
+R2 4 6  R = 'res + 0.033 * res*V(r2)'  ; behavioral resistor
+*R2 4 6 'res' ; constant R
+
+VC2 c2 0 dc 0  trrandom (2 'ttime10' 0 1)
+*C2	6 	3'cn'  ; constant C
+C2 6 3 C = 'cn + 0.033 * cn*V(c2)'  ; behavioral capacitor
+
+VR1 r1  0 dc 0 trrandom (2 'ttime10' 0 1)
+*VR1 r1  0 dc 0 trrandom (1 'ttime10' 0 3)
+R1	3	0	R = 'res + 0.033 * res*V(r1)'
+*R1	3 	0	'res'
+
+VC1 c1 0 dc 0  trrandom (2 'ttime10' 0 1)
+C1 3 0 C =  'cn + 0.033 * cn*V(c2)'
+*C1	3 	0	'cn'
+
+* NON-INVERTING OPAMP
+R10	0	2	10K
+R11	2	5	18K
+XOP	3 2	4	OPAMP1
+* AMPLITUDE STABILIZATION
+R12	5	4	5K
+D1	5	4	D1N914
+D2	4	5	D1N914
+*
+.model	D1N914	D(Is=0.1p Rs=16 CJO=2p Tt=12n Bv=100 Ibv=0.4n)
+*
+* OPAMP MACRO MODEL, SINGLE-POLE 
+* connections:      non-inverting input
+*                   |   inverting input
+*                   |   |   output
+*                   |   |   |
+.SUBCKT OPAMP1      1   2   6
+* INPUT IMPEDANCE
+RIN	1	2	10MEG
+* DC GAIN (100K) AND POLE 1 (100HZ)
+EGAIN	3 0	1 2	100K
+RP1	3	4	1K
+CP1	4	0	1.5915UF
+* OUTPUT BUFFER AND RESISTANCE
+EBUFFER	5 0	4 0	1
+ROUT	5	6	10
+.ENDS
+*
+* ANALYSIS
+.TRAN 	0.05MS 'ttime'
+*
+* VIEW RESULTS
+.control
+option noinit
+run
+plot V(4) 5*V(r1) 5*V(r2) 5*V(c1) 5*V(c2)
+linearize v(4)
+fft v(4)
+let v4mag =  mag(v(4))
+plot v4mag
+plot v4mag xlimit 500 1500
+*wrdata histo v4mag
+rusage
+.endc
+
+.END

paranoia_parallel/examples/Monte_Carlo/mc_ring_circ.net

@@ -0,0 +1,58 @@
+Perform Monte Carlo simulation in ngspice
+* 25 stage Ring-Osc. BSIM3 or 4 with statistical variation of model parameters
+* Model parameters are varied according to the PDK selection.
+* Tested with 3 different commercial HSPICE libraries from 2 vendors.
+* To be started with script MC_ring_ts.sp
+
+.options noacct seedinfo
+
+vin in out dc 0.5 pulse 0.5 0 0.1n 5n 1 1 1
+vdd dd 0 dc 3.3
+vss ss 0 dc 0
+ve  sub  0 dc 0
+vpe well 0 dc 3.3
+
+* transistors to be selected according to the library (here: p33ll and n33ll or pch_5_mac and nch_5_mac
+* or pe3 and ne3 or p1 and n1 (these models see below))
+.subckt inv1 dd ss sub well in out
+*XMP1 out in  dd  well p33ll w=5u l=800n m=3 nf=1 ad=1.35p as=1.35p pd=9.6u ps=9.6u mosmis_mod=1
+*XMN1 out in  ss  sub n33ll w=5u l=800n m=1 nf=3 ad=0.9p as=0.9p pd=6.6u ps=6.6u mosmis_mod=1
+*XMP1 out in  dd  well pch_5_mac w=5u l=800n m=3 nf=1 ad=1.35p as=1.35p pd=9.6u ps=9.6u mosmis_mod=1
+*XMN1 out in  ss  sub nch_5_mac w=5u l=800n m=1 nf=3 ad=0.9p as=0.9p pd=6.6u ps=6.6u mosmis_mod=1
+*XMP1 out in  dd  well pe3 w=5u l=800n m=3 nf=1 ad=1.35p as=1.35p pd=9.6u ps=9.6u mosmis_mod=1
+*XMN1 out in  ss  sub ne3 w=5u l=800n m=1 nf=3 ad=0.9p as=0.9p pd=6.6u ps=6.6u mosmis_mod=1
+MP1 out in  dd  well p1 w=5u l=800n m=3 ad=1.35p as=1.35p pd=9.6u ps=9.6u
+MN1 out in  ss  sub n1 w=5u l=800n m=1 ad=0.9p as=0.9p pd=6.6u ps=6.6u
+.ends inv1
+
+.subckt inv5 dd ss sub well in out
+xinv1 dd ss sub well in 1 inv1
+xinv2 dd ss sub well 1  2 inv1
+xinv3 dd ss sub well 2  3 inv1
+xinv4 dd ss sub well 3  4 inv1
+xinv5 dd ss sub well 4 out inv1
+.ends inv5
+
+xinv1 dd ss sub well in out5 inv5
+xinv2 dd ss sub well out5 out10 inv5
+xinv3 dd ss sub well out10 out15 inv5
+xinv4 dd ss sub well out15 out20 inv5
+xinv5 dd ss sub well out20 out inv5
+xinv11 dd 0 sub well out buf inv1
+cout  buf ss 0.2pF
+
+.ic v(out20) = 0
+
+ *** Model library files.
+* Add your library here
+* Chose the transistors for XMP1 and XMN1 accordingly
+*.lib "jc_usage.l" MC_LIB
+*.lib "my_ts_usage.l" MC_LIB
+*.lib "x_usage.l" MC_LIB
+
+* or use the BSIM3 model with internal parameters except Vth0
+* that varies the threshold voltage +-3 sigma around a mean of +-0.6V
+.model p1 PMOS version=3.3.0 Level=8 Vth0=agauss(-0.6, 0.1, 3)
+.model n1 NMOS version=3.3.0 Level=8 Vth0=agauss(0.6, 0.1, 3)
+
+.end

paranoia_parallel/examples/Monte_Carlo/mc_ring_lib_complete_actual.cir

@@ -0,0 +1,212 @@
+Perform Monte Carlo simulation in ngspice
+* 25 stage Ring-Osc. BSIM3 or 4 with statistical variation of model parameters
+* Model parameters are varied according to the PDK selection.
+* Tested with 3 different commercial HSPICE libraries from 2 vendors.
+* Add your library to mc_ring_circ.net and choose transistors accordingly.
+* Add the library path to the .LIB statement.
+* A simple BSIM3 inverter R.O. serves as an MC example.
+
+.options noacct
+
+vin in out dc 0.5 pulse 0.5 0 0.1n 5n 1 1 1
+vdd dd 0 dc 3.3
+vss ss 0 dc 0
+ve  sub  0 dc 0
+vpe well 0 dc 3.3
+
+* transistors to be selected according to the library (here: p33ll and n33ll or pch_5_mac and nch_5_mac
+* or pe3 and ne3 or p1 and n1 (these models see below))
+.subckt inv1 dd ss sub well in out
+*XMP1 out in  dd  well p33ll w=5u l=800n m=3 nf=1 ad=1.35p as=1.35p pd=9.6u ps=9.6u mosmis_mod=1
+*XMN1 out in  ss  sub n33ll w=5u l=800n m=1 nf=3 ad=0.9p as=0.9p pd=6.6u ps=6.6u mosmis_mod=1
+XMP1 out in  dd  well pch_5_mac w=5u l=800n m=3 nf=1 ad=1.35p as=1.35p pd=9.6u ps=9.6u mosmis_mod=1
+XMN1 out in  ss  sub nch_5_mac w=5u l=800n m=1 nf=3 ad=0.9p as=0.9p pd=6.6u ps=6.6u mosmis_mod=1
+*XMP1 out in  dd  well pe3 w=5u l=800n m=3 nf=1 ad=1.35p as=1.35p pd=9.6u ps=9.6u mosmis_mod=1
+*XMN1 out in  ss  sub ne3 w=5u l=800n m=1 nf=3 ad=0.9p as=0.9p pd=6.6u ps=6.6u mosmis_mod=1
+*MP1 out in  dd  well p1 w=5u l=800n m=3 ad=1.35p as=1.35p pd=9.6u ps=9.6u
+*MN1 out in  ss  sub n1 w=5u l=800n m=1 ad=0.9p as=0.9p pd=6.6u ps=6.6u
+.ends inv1
+
+.subckt inv5 dd ss sub well in out
+xinv1 dd ss sub well in 1 inv1
+xinv2 dd ss sub well 1  2 inv1
+xinv3 dd ss sub well 2  3 inv1
+xinv4 dd ss sub well 3  4 inv1
+xinv5 dd ss sub well 4 out inv1
+.ends inv5
+
+xinv1 dd ss sub well in out5 inv5
+xinv2 dd ss sub well out5 out10 inv5
+xinv3 dd ss sub well out10 out15 inv5
+xinv4 dd ss sub well out15 out20 inv5
+xinv5 dd ss sub well out20 out inv5
+xinv11 dd 0 sub well out buf inv1
+cout  buf ss 0.2pF
+
+ *** Model library files.
+* Add your library here (full path required, or path relative to path
+* of ngspice executable (interactive mode), or relative to path of
+* input file (batch mode))
+* Chose the transistors for XMP1 and XMN1 according to the library
+*.lib "jc_usage.l" MC_LIB
+*.lib "../../../various/lib-test/my_usage.l" MC_LIB
+.lib "D:\Spice_general\tests\lib-test\ts14\my_ts_usage.l" MC_LIB
+*.lib "x_usage.l" MC_LIB
+
+* or use the BSIM3 model with internal parameters except Vth0
+* that varies the threshold voltage +-3 sigma around a mean of +-0.6V
+*.model p1 PMOS version=3.3.0 Level=8 Vth0=agauss(-0.6, 0.1, 3)
+*.model n1 NMOS version=3.3.0 Level=8 Vth0=agauss(0.6, 0.1, 3)
+
+.control
+  let mc_runs = 10               ; number of runs for monte carlo
+  let run = 0                     ; number of actual run
+  set curplot = new               ; create a new plot
+  set curplottitle = "Transient outputs"
+  set plot_out = $curplot         ; store its name to 'plot_out'
+  set curplot = new               ; create a new plot
+  set curplottitle = "FFT outputs"
+  set plot_fft = $curplot         ; store its name to 'plot_fft'
+  set curplot = new               ; create a new plot
+  set curplottitle = "Oscillation frequency"
+  set max_fft = $curplot          ; store its name to 'max_fft'
+  let mc_runsp = mc_runs + 1
+  let maxffts = unitvec(mc_runsp) ; vector for storing max measure results
+  let halfffts = unitvec(mc_runsp)$ vector for storing measure results at -40dB rising
+  unlet mc_runsp
+
+  set mc_runs = $&mc_runs        ; create a variable from the vector
+  let seeds = mc_runs + 2
+  setseed $&seeds
+  unlet seeds
+
+  save buf                        ; we just need buf, save memory by more than 10x
+
+* run the simulation loop
+
+* We have to figure out what to do if a single simulation will not converge.
+* There is now the variable sim_status, that is 0 if simulation ended regularly,
+* and 1 if the simulation has been aborted with error message '...simulation(s) aborted'.
+* Then we skip the rest of the run and continue with a new run.
+
+  dowhile run <= mc_runs
+
+    set run = $&run              ; create a variable from the vector
+
+    * run=0 simulates with nominal parameters
+    if run > 0
+      echo
+      echo * * * * * *
+      echo Source the circuit again internally for run no. $run
+      echo * * * * * *
+      setseed $run
+      mc_source  ; re-source the input file
+    else
+      echo run no. $run
+    end
+    echo simulation run no. $run of $mc_runs
+    tran 100p 1000n 0
+    echo Simulation status $sim_status
+    let simstat = $sim_status
+    if simstat = 1
+      if run = mc_runs
+        echo go to end
+      else
+        echo go to next run
+      end
+      destroy $curplot
+      goto next
+    end
+
+* select stop and step so that number of data points after linearization is not too
+* close to 8192, which would yield varying number of line length and thus scale for fft.
+*
+    set dt0 = $curplot
+    * save the linearized data for having equal time scales for all runs
+    linearize buf                 ; linearize only buf, no other vectors needed
+    set dt1 = $curplot             ; store the current plot to dt (tran i+1)
+    setplot $plot_out             ; make 'plt_out' the active plot
+    * firstly save the time scale once to become the default scale
+    if run=0
+       let time={$dt1}.time
+    end
+    let vout{$run}={$dt1}.buf     ; store the output vector to plot 'plot_out'
+    setplot $dt1                  ; go back to the previous plot (tran i+1)
+    fft buf ; run fft on vector buf
+    let buf2=db(mag(buf))
+    * find the frequency where buf has its maximum of the fft signal
+    meas sp fft_max MAX_AT buf2 from=0.05G to=0.7G
+    * find the frequency where buf is -40dB at rising fft signal
+    meas sp fft_40 WHEN buf2=-40 RISE=1 from=0.05G to=0.7G
+    * store the fft vector
+    set dt2 = $curplot            ; store the current plot to dt (spec i)
+    setplot $plot_fft             ; make 'plot_fft' the active plot
+    if run=0
+       let frequency={$dt2}.frequency
+    end
+    let fft{$run}={$dt2}.buf      ; store the output vector to plot 'plot_fft'
+    * store the measured value
+    setplot $max_fft              ; make 'max_fft' the active plot
+    let maxffts[{$run}]={$dt2}.fft_max
+    let halfffts[{$run}]={$dt2}.fft_40
+    destroy $dt0  $dt1  $dt2      ; save memory, we don't need this plot (spec) any more
+
+    label next
+    remcirc
+    let run = run + 1
+  end
+***** plotting **********************************************************
+if $?batchmode
+  echo
+  echo Plotting not available in batch mode
+  echo Write linearized vout0 to vout{$mc_runs} to rawfile $rawfile
+  echo
+  write $rawfile {$plot_out}.allv
+  rusage
+  quit
+else
+  plot {$plot_out}.vout0          ; just plot the tran output with run 0 parameters
+  setplot $plot_fft
+  plot db(mag(ally)) xlimit 0 1G ylimit -80 10
+*
+* create a histogram from vector maxffts
+  setplot $max_fft                ; make 'max_fft' the active plot
+  set startfreq=50MEG
+  set bin_size=1MEG
+  set bin_count=100
+  compose osc_frequ start=$startfreq step=$bin_size lin=$bin_count ; requires variables as parameters
+  settype frequency osc_frequ
+  let bin_count=$bin_count        ; create a vector from the variable
+  let yvec=unitvec(bin_count)     ; requires vector as parameter
+  let startfreq=$startfreq
+  let bin_size=$bin_size
+  * put data into the correct bins
+  let run = 0
+  dowhile run < mc_runs
+    set run = $&run             ; create a variable from the vector
+    let val = maxffts[{$run}]
+    let part = 0
+    * Check if val fits into a bin. If yes, raise bin by 1
+    dowhile part < bin_count
+      if ((val < (startfreq + (part+1)*bin_size)) & (val > (startfreq + part*bin_size)))
+        let yvec[part] = yvec[part] + 1
+                break
+      end
+      let part = part + 1
+    end
+    let run = run + 1
+  end
+  * plot the histogram
+  set plotstyle=combplot
+  let counts = yvec - 1             ; subtract 1 because we started with unitvec containing ones
+  plot counts vs osc_frequ
+* calculate jitter
+  let diff40 = (vecmax(halfffts) - vecmin(halfffts))*1e-6
+  echo
+  echo Max. jitter is "$&diff40" MHz
+end
+  rusage
+*  quit
+.endc
+
+.end

paranoia_parallel/examples/Monte_Carlo/names-test.sp

@@ -0,0 +1,9 @@
+simple test for names = ft_getpnames() versus free_pnode(names)
+
+.control
+let buf = [ 1 2 3 ]
+let buf2=db(mag(buf))
+quit
+.endc
+
+.end

paranoia_parallel/examples/Monte_Carlo/names-test2.sp

@@ -0,0 +1,21 @@
+simple test for names = ft_getpnames() versus free_pnode(names)
+* altermod
+
+R1 1 0 RE
+V1 1 0 1
+
+.model RE r r=1
+
+.control
+  op
+  print all
+  define gauss(nom, var, sig) (nom + (nom*var)/sig * sgauss(0))
+  altermod r1 R = (1 + (1 * 2) / 3 * sgauss(0)) ; no leak
+*  altermod @r1[r] = gauss(1,2,3) ; leak
+*  altermod r1 r = gauss(1,2,3) ; leak
+  op
+  print all
+  quit
+.endc
+
+.end

paranoia_parallel/examples/Monte_Carlo/names-test3.sp

@@ -0,0 +1,9 @@
+simple test for names = ft_getpnames() versus free_pnode(names)
+
+.control
+let buf = 0
+let buf = buf + 1
+quit
+.endc
+
+.end

paranoia_parallel/examples/Monte_Carlo/rand_numb_test.cir

@@ -0,0 +1,40 @@
+*** random number test for scope-inpcom-8
+
+*** Start value of seed for random number generator: variable 'rndseed' is set to 1
+*** and random number generator is seeded with this value.
+*** You may override this value by adding 'setseed 5' or similar to file .spiceinit.
+
+*** print a message when the random number generator gets a new seed
+.option seedinfo
+
+*** like HSPICE: set rndseed to (number of seconds since 1.1.1970 - 1470000000)
+*** and seed the random number generator with rndseed
+*.option seed = random
+
+*** like HSPICE: set rndseed to 55
+*** and seed the random number generator with rndseed (here 55)
+.option seed = 55
+
+*** the 'circuit'
+.param myval = agauss(0, 1, 1)
+v1 1 0  'myval'
+
+*** the .control script
+.control
+
+*** set variable rndseed to value 11
+*set rndseed = 11
+*** seed the random number generator with value from variable rndseed
+*setseed
+
+*** seed the random number generator with value 12 and set rndseed to 12
+setseed 12
+
+*** reload circuit and re-evaluate all random functions (agauss etc.)
+mc_source
+*** simulate and print result
+op
+print v(1)
+.endc
+
+.end

paranoia_parallel/examples/TransImpedanceAmp/README

@@ -0,0 +1,41 @@
+This directory holds a SPICE netlist with SPICE2 POLY constructs in
+controlled sources as typically found in vendor models.  The circuit
+is just a two-stage transimpedance amp using an AD8009,
+along with some slow components (AD780 and OP177A) to set bias
+points.  Vendor models are used for all active components.
+Successfully running this test shows that you have successfully built
+the XSpice stuff with the POLY codemodel, and that you should be able
+to simulate SPICE netlists with embedded vendor models.
+
+To run this netlist, just do the following:
+
+[localhost]# ngspice
+ngspice 1 -> source output.net
+ngspice 2 -> run
+ngspice 3 -> plot Vout2
+
+(Note that when you read in the netlist, you will get a bunch of 
+warnings saying stuff like:
+
+Warning -- Level not specified on line "()"
+Using level 1.
+
+Also, ngspice will complain about:
+
+Error on line 50 : r:u101:1 u101:40 0 1e3 tc=7e-6
+         unknown parameter (tc)
+Error on line 283 : .temp 0 25 50 75 100
+         Warning: .TEMP card obsolete - use .options TEMP and TNOM
+
+You can ignore all this stuff . . . .)
+
+You should get a pop-up window showing two square pulses (the second
+smaller than the first) with a little bit of overshoot on the rising
+and falling edges.
+
+This stuff was done as an adjunct to work on the gEDA project.
+Information about gEDA is available at http://geda.seul.org/ .
+Please direct all questions/suggestions/bugs/complaints about XSpice
+extensions to ngspice to Stuart Brorson -- mailto:sdb@cloud9.net.
+
+6.23.2002 -- SDB.

paranoia_parallel/examples/TransImpedanceAmp/output.net

@@ -0,0 +1,469 @@
+*********************************************************
+* Spice file generated by gnetlist                      *
+* spice-SDB version 3.30.2003 by SDB --                 *
+* provides advanced spice netlisting capability.        *
+* Documentation at http://www.brorson.com/gEDA/SPICE/   *
+*********************************************************
+
+* Batch command
+* ngspice -b -o output.log output.net
+* will generate a nice printer plot in output.log
+* (remember the old times !)
+
+* Interactive commands for usage:
+* run
+* plot vout1 vout2
+
+* Command stuff
+.options gmin=1e-9
+.options method=gear
+.options abstol=1e-11
+* .ac dec 10 10MegHz 10 Ghz
+* Remainder of file
+R112 0 6 1Meg 
+R111 0 8 10Meg 
+R110 0 7 1Meg 
+Rref2in 11 VU780out 25000 
+Rref2fb VU2bias+ 11 33 
+C201 0 9 1uF 
+C202 10 0 1uF 
+XU200 0 11 10 9 VU2bias+ OP177A 
+R202 10 +5V 22 
+R201 -5V 9 22 
+Rref1in VU100in- VU780out 9130 
+Rref1fb VU1bias+ VU100in- 33 
+XU101 +5V 7 0 6 VU780out 8 AD780A 
+* AD780A SPICE Macromodel 5/93, Rev. A
+* AAG / PMI
+*
+* This version of the AD780 voltage reference model simulates the worst case
+* parameters of the 'A' grade.  The worst case parameters used
+* correspond to those in the data sheet.
+*
+* Copyright 1993 by Analog Devices, Inc.
+*
+* Refer to "README.DOC" file for License Statement.  Use of this model
+* indicates your acceptance with the terms and provisions in the License Statement.
+*
+*  NODE NUMBERS
+*              VIN
+*               |  TEMP
+*               |  |  GND
+*               |  |  |  TRIM
+*               |  |  |  |  VOUT
+*               |  |  |  |  |  RANGE
+*               |  |  |  |  |  |
+.SUBCKT AD780A  2  3  4  5  6  8
+*
+* BANDGAP REFERENCE
+*
+I1 4 40 DC 1.21174E-3
+R1 40 4 1E3 TC=7E-6
+EN 10 40 42 0 1
+G1 4 10 2 4 4.85668E-9
+F1 4 10 POLY(2) VS1 VS2 (0,2.42834E-5,3.8E-5)
+Q1 2 10 11 QT
+I2 11 4 DC 12.84E-6
+R2 11 3 1E3
+I3 3 4 DC 0
+*
+* NOISE VOLTAGE GENERATOR
+*
+VN1 41 0 DC 2
+DN1 41 42 DEN
+DN2 42 43 DEN
+VN2 0 43 DC 2
+*
+* INTERNAL OP AMP
+*
+G2 4 12 10 20 1.93522E-4
+R3 12 4 2.5837E9
+C1 12 4 6.8444E-11
+D1 12 13 DX
+V1 2 13 DC 1.2
+*
+* SECONDARY POLE @ 508 kHz
+*
+G3 4 14 12 4 1E-6
+R4 14 4 1E6
+C2 14 4 3.1831E-13
+*
+* OUTPUT STAGE
+*
+ISY 2 4 6.8282E-4
+FSY 2 4 V1 -1
+RSY 2 4 500E3
+*
+G4 4 15 14 4 25E-6
+R5 15 4 40E3
+Q2 4 15 16 QP
+I4 2 16 DC 100E-6
+Q3 4 16 18 QP
+R6 18 23 15
+R7 16 21 150E3
+R8 2 17 34.6
+Q4 17 16 19 QN
+R9 21 20 6.46E3
+R10 20 4 6.1E3
+R11 20 5 53E3
+R12 20 8 15.6E3
+I5 5 4 DC 0
+I6 8 4 DC 0
+VS1 21 19 DC 0
+VS2 23 21 DC 0
+L1 21 6 1E-7
+*
+* OUTPUT CURRENT LIMIT
+*
+FSC 15 4 VSC 1
+VSC 2 22 DC 0
+QSC 22 2 17 QN
+*
+.MODEL QT NPN(level=1 IS=1.68E-16 BF=1E4)
+.MODEL QN NPN(level=1 IS=1E-15 BF=1E3)
+.MODEL QP PNP(level=1 IS=1E-15 BF=1E3)
+.MODEL DX D(IS=1E-15)
+.MODEL DEN D(IS=1E-12 RS=2.425E+05 AF=1 KF=6.969E-16)
+.ENDS AD780A
+C101 0 U100V- 1uF 
+C102 U100V+ 0 1uF 
+XU100 0 VU100in- U100V+ U100V- VU1bias+ OP177A 
+* OP177A SPICE Macro-model                 12/90, Rev. B
+*                                           JCB / PMI
+*
+* Revision History:
+*   REV. B
+*     Re-ordered subcircuit call out nodes to put the 
+*     output node last.
+*     Changed Ios from 1E-9 to 0.5E-9
+*     Added F1 and F2 to fix short circuit current limit.
+*
+*
+* This version of the OP-177 model simulates the worst case 
+* parameters of the 'A' grade.  The worst case parameters
+* used correspond to those in the data book.
+*
+*
+* Copyright 1990 by Analog Devices, Inc.
+*
+* Refer to "README.DOC" file for License Statement.  Use of this model
+* indicates your acceptance with the terms and provisions in the License Statement.
+*
+* Node assignments
+*                non-inverting input
+*                | inverting input
+*                | | positive supply
+*                | | |  negative supply
+*                | | |  |  output
+*                | | |  |  |
+.SUBCKT OP177A   1 2 99 50 39
+*
+* INPUT STAGE & POLE AT 6 MHZ
+*
+R1   2   3    5E11
+R2   1   3    5E11
+R3   5  97    0.0606
+R4   6  97    0.0606
+CIN  1   2    4E-12
+C2   5   6    218.9E-9
+I1   4  51    1
+IOS  1   2    0.5E-9
+EOS  9  10    POLY(1)  30 33  10E-6  1
+Q1   5  2  7  QX
+Q2   6  9  8  QX
+R5   7   4    0.009
+R6   8   4    0.009
+D1   2   1    DX
+D2   1   2    DX
+EN   10  1    12  0  1
+GN1  0   2    15  0  1
+GN2  0   1    18  0  1
+*
+EREF  98 0    33  0  1
+EPLUS 97 0    99  0  1
+ENEG  51 0    50  0  1 
+*
+* VOLTAGE NOISE SOURCE WITH FLICKER NOISE
+*
+DN1  11  12   DEN
+DN2  12  13   DEN
+VN1  11   0   DC 2
+VN2  0   13   DC 2
+*
+* CURRENT NOISE SOURCE WITH FLICKER NOISE
+*
+DN3  14  15   DIN
+DN4  15  16   DIN
+VN3  14   0   DC 2
+VN4  0   16   DC 2
+*
+* SECOND CURRENT NOISE SOURCE
+*
+DN5  17  18   DIN
+DN6  18  19   DIN
+VN5  17   0   DC 2
+VN6  0   19   DC 2
+*
+* FIRST GAIN STAGE
+*
+R7   20 98     1
+G1   98 20     5  6  119.8
+D3   20 21     DX
+D4   22 20     DX
+E1   97 21     POLY(1) 97 33 -2.4 1
+E2   22 51     POLY(1) 33 51 -2.4 1
+*
+* GAIN STAGE & DOMINANT POLE AT 0.127 HZ
+*
+R8   23 98     1.253E9
+C3   23 98     1E-9
+G2   98 23     20 33  33.3E-6
+V1   97 24     1.8
+V2   25 51     1.8
+D5   23 24     DX
+D6   25 23     DX
+*
+* NEGATIVE ZERO AT -4MHZ
+*
+R9   26 27     1
+C4   26 27     -39.75E-9
+R10  27 98     1E-6
+E3   26 98     23 33  1E6
+*
+* COMMON-MODE GAIN NETWORK WITH ZERO AT 63 HZ
+*
+R13  30 31     1
+L2   31 98     2.52E-3
+G4   98 30     3  33  0.316E-6
+D7   30 97     DX
+D8   51 30     DX
+*
+* POLE AT 2 MHZ
+*
+R14  32 98     1
+C5   32 98     79.5E-9
+G5   98 32     27 33  1
+*
+* OUTPUT STAGE
+*
+R15  33 97     1
+R16  33 51     1
+GSY  99 50     POLY(1) 99 50 0.725E-3 0.0425E-3
+F1   34  0     V3  1
+F2   0  34     V4  1
+R17  34 99     400
+R18  34 50     400
+L3   34 39     2E-7
+G6   37 50     32 34  2.5E-3
+G7   38 50     34 32  2.5E-3
+G8   34 99     99 32  2.5E-3
+G9   50 34     32 50  2.5E-3
+V3   35 34     6.8
+V4   34 36     4.4
+D9   32 35     DX
+D10  36 32     DX
+D11  99 37     DX
+D12  99 38     DX
+D13  50 37     DY
+D14  50 38     DY
+*
+* MODELS USED
+*
+.MODEL QX NPN(level=1 BF=333.3E6)
+.MODEL DX   D(IS=1E-15)
+.MODEL DY   D(IS=1E-15 BV=50)
+.MODEL DEN  D(IS=1E-12, RS=14.61K, KF=2E-17, AF=1)
+.MODEL DIN  D(IS=1E-12, RS=7.55E-6, KF=3E-15, AF=1)
+.ENDS
+R102 U100V+ +5V 22 
+R101 -5V U100V- 22 
+R98 0 VU2bias+ 1K 
+R99 0 VU1bias+ 1K 
+C95 VU2bias+ 0 100pF 
+* C96 0 5 1uF 
+* C97 4 0 1uF 
+Cphotodiode 0 Vinput 0.9pF 
+C99 0 VU1bias+ 100pF 
+R25 Vout2 2 250 
+C24 Vout1 VU1in- 1pF 
+R24 VU1in- 1 150 
+* C21 0 3 1uF 
+Cc Vout2 VU2in- 1pF 
+Rc Vout1 VU2in- 10 
+RL 0 Vout2 50 
+.TEMP 0 25 50 75 100
+C12 2 0 1.5pF 
+C11 0 V2- .01uF 
+C10 V2+ 0 .01uF 
+R13 +5V V2+ 5 
+R12 V2- -5V 5 
+R26 2 VU2in- 150 
+R11 Vout2 VU2in- 180 
+XU2 VU2bias+ VU2in- V2+ V2- Vout2 AD8009an 
+XU1 VU1bias+ VU1in- V1+ V1- Vout1 AD8009an 
+***** AD8009 SPICE model       Rev B SMR/ADI 8-21-97
+
+* Copyright 1997 by Analog Devices, Inc.
+
+* Refer to "README.DOC" file for License Statement.  Use of this model
+* indicates your acceptance with the terms and provisions in the License Statement.
+
+* rev B of this model corrects a problem in the output stage that would not
+* correctly reflect the output current to the voltage supplies
+
+* This model will give typical performance characteristics
+* for the following parameters;
+
+*     closed loop gain and phase vs bandwidth
+*     output current and voltage limiting
+*     offset voltage (is static, will not vary with vcm)
+*     ibias (again, is static, will not vary with vcm)
+*     slew rate and step response performance
+*     (slew rate is based on 10-90% of step response)
+*     current on output will be reflected to the supplies 
+*     vnoise, referred to the input
+*     inoise, referred to the input
+
+*     distortion is not characterized
+
+* Node assignments
+*                non-inverting input
+*                | inverting input
+*                | | positive supply
+*                | | |  negative supply
+*                | | |  |  output
+*                | | |  |  |
+.SUBCKT AD8009an 1 2 99 50 28
+
+* input stage *
+
+q1 50 3 5 qp1
+q2 99 5 4 qn1
+q3 99 3 6 qn2
+q4 50 6 4 qp2
+i1 99 5 1.625e-3
+i2 6 50 1.625e-3
+cin1 1 98 2.6e-12
+cin2 2 98 1e-12
+v1 4 2 0
+
+* input error sources *
+
+eos 3 1 poly(1) 20 98 2e-3 1
+fbn 2 98 poly(1) vnoise3 50e-6 1e-3
+fbp 1 98 poly(1) vnoise3 50e-6 1e-3
+
+* slew limiting stage *
+
+fsl 98 16 v1 1
+dsl1 98 16 d1
+dsl2 16 98 d1
+dsl3 16 17 d1
+dsl4 17 16 d1
+rsl  17 18 0.22
+vsl  18 98 0
+
+* gain stage *
+
+f1 98 7 vsl 2
+rgain 7 98 2.5e5
+cgain 7 98 1.25e-12
+dcl1 7 8 d1
+dcl2 9 7 d1
+vcl1 99 8 1.83
+vcl2 9 50 1.83
+
+gcm 98 7 poly(2) 98 0 30 0 0 1e-5 1e-5
+
+* second pole *
+
+epole 14 98 7 98 1
+rpole 14 15 1
+cpole 15 98 2e-10
+
+* reference stage *
+
+eref 98 0 poly(2) 99 0 50 0 0 0.5 0.5 
+
+ecmref 30 0 poly(2) 1 0 2 0 0 0.5 0.5
+
+* vnoise stage *
+
+rnoise1 19 98 4.6e-3
+vnoise1 19 98 0
+vnoise2 21 98 0.53
+dnoise1 21 19 dn
+
+fnoise1 20 98 vnoise1 1
+rnoise2 20 98 1
+
+* inoise stage *
+
+rnoise3 22 98 8.18e-6
+vnoise3 22 98 0
+vnoise4 24 98 0.575
+dnoise2 24 22 dn
+
+fnoise2 23 98 vnoise3 1
+rnoise4 23 98 1
+
+* buffer stage *
+
+gbuf 98 13 15 98 1e-2
+rbuf 98 13 1e2
+
+* output current reflected to supplies *
+
+fcurr 98 40 voc 1
+vcur1 26 98 0
+vcur2 98 27 0
+dcur1 40 26 d1
+dcur2 27 40 d1
+
+* output stage *
+
+vo1 99 90 0
+vo2 91 50 0
+fout1 0 99 poly(2) vo1 vcur1 -9.27e-3 1 -1
+fout2 50 0 poly(2) vo2 vcur2 -9.27e-3 1 -1 
+gout1 90 10 13 99 0.5
+gout2 91 10 13 50 0.5
+rout1 10 90 2
+rout2 10 91 2
+voc 10 28 0
+rout3 28 98 1e6
+dcl3 13 11 d1
+dcl4 12 13 d1
+vcl3 11 10 -0.445
+vcl4 10 12 -0.445
+
+.model qp1 pnp(level=1)
+.model qp2 pnp(level=1)
+.model qn1 npn(level=1)
+.model qn2 npn(level=1)
+.model d1  d()
+.model dn  d(af=1 kf=1e-8)
+.ends
+R6 1 Vout1 250 
+C3 1 0 1.5pF 
+V3 VU1in- Vinput DC 0V 
+* .INCLUDE /home/sdb/OpticalReceiver/Simulation.cmd
+R5 -5V Vout1 1K 
+I1 0 Vinput AC 1 PWL (0ns 0mA 1nS 0mA 1.01nS 1mA 10nS 1mA 10.01nS 0mA 20nS 0mA 20.01nS .1mA 30nS .1mA 30.01nS 0mA)
+R4 V1- -5V 5 
+C2 0 V1- .01uF 
+V2 -5V 0 DC -5V
+R2 VU1in- Vout1 180 
+V1 +5V 0 DC 5V
+C1 V1+ 0 .01uF 
+R1 +5V V1+ 5 
+* When run, this SPICE file should output a square waveform
+* with a little overshoot
+.tran 0.05ns 4ns
+.plot tran Vout2
+
+.control
+run
+quit
+.endc
+.END

paranoia_parallel/examples/TransmissionLines/cpl1_4_line.sp

@@ -0,0 +1,63 @@
+MOSdriver -- 6.3inch 4 lossy line CPL model -- C load 
+
+m1     1     2      6       1  mp1p0  w = 36.0u l=1.0u
+m2     1     3      7       1  mp1p0  w = 36.0u l=1.0u
+m3     1     4      8       1  mp1p0  w = 36.0u l=1.0u
+m4     1     10     5       1  mp1p0  w = 36.0u l=1.0u
+m5     1     11     13      1  mp1p0  w = 36.0u l=1.0u
+m6     1     12     13      1  mp1p0  w = 36.0u l=1.0u
+
+m7     0     2      6       0  mn0p9  w = 18.0u l=0.9u
+m8     0     3      7       0  mn0p9  w = 18.0u l=0.9u
+m9     0     4      8       0  mn0p9  w = 18.0u l=0.9u
+m10    0     10     5       0  mn0p9  w = 18.0u l=0.9u
+m11    14    11     13      0  mn0p9  w = 18.0u l=0.9u
+m12    0     12     14      0  mn0p9  w = 18.0u l=0.9u
+
+*
+CN5  5     0  0.025398e-12 
+CN6  6     0  0.007398e-12 
+CN7  7     0  0.007398e-12 
+CN8  8     0  0.007398e-12 
+CN9  9     0  0.097398e-12 
+CN10 10    0  0.007398e-12 
+CN11 11    0  0.003398e-12 
+CN12 12    0  0.004398e-12 
+CN13 13    0  0.008398e-12 
+CN14 14    0  0.005398e-12 
+
+*
+P1    5 6 7 8 0      9 10 11 12 0 pline
+
+*
+*
+vdd    1    0   DC  5.0
+v3     3    0   DC  5.0
+*
+VS1 2  0 PULSE ( 0 5 15.9NS 0.2NS 0.2NS 15.8NS 32NS)
+VS2 4  0 PULSE (0 5 15.9NS 0.2NS 0.2NS 15.8NS 32NS )
+*
+.control
+TRAN 0.2N 47.9N 0 0.05N
+plot V(5) V(6) V(7) V(8) V(9) V(10) V(11) V(12)
+.endc
+.MODEL mn0p9 NMOS VTO=0.8 KP=48U GAMMA=0.30 PHI=0.55 LAMBDA=0.00 CGSO=0 CGDO=0
++CJ=0 CJSW=0 TOX=18000N LD=0.0U
+.MODEL mp1p0 PMOS VTO=-0.8 KP=21U GAMMA=0.45 PHI=0.61 LAMBDA=0.00 CGSO=0 CGDO=0 
++CJ=0 CJSW=0 TOX=18000N LD=0.0U
+.MODEL PLINE cpl
++R=0.03     0       0      0 
++          0.03     0      0 
++                  0.03    0 
++                         0.03
++L=9e-9    5.4e-9   0      0
++           9e-9   5.4e-9  0
++                   9e-9  5.4e-9
++                         9e-9
++G=0 0 0 0 0 0 0 0 0 0
++C=3.5e-13 -3e-14   0      0
++          3.5e-13 -3e-14  0
++                  3.5e-13 -3e-14
++                         3.5e-13
++length=6.3
+.END

paranoia_parallel/examples/TransmissionLines/cpl2_2_line.sp

@@ -0,0 +1,46 @@
+MOSdriver -- 24inch 2 lossy lines CPL model -- C load 
+
+m1     0     268    299     0  mn0p9  w = 18.0u l=1.0u
+m2    299    267    748     0  mn0p9  w = 18.0u l=1.0u
+m3     0     168    648     0  mn0p9  w = 18.0u l=0.9u
+m4     1     268    748     1  mp1p0  w = 36.0u l=1.0u
+m5     1     267    748     1  mp1p0  w = 36.0u l=1.0u
+m6     1     168    648     1  mp1p0  w = 36.0u l=1.0u
+*
+CN648  648   0  0.025398e-12 
+CN651  651   0  0.007398e-12 
+CN748  748   0  0.025398e-12 
+CN751  751   0  0.009398e-12 
+CN299  299   0  0.005398e-12 
+*
+P1  648 748 0  651 751 0  PLINE 
+*
+vdd    1    0   DC  5.0
+VK   267    0   DC  5.0
+*
+*VS 168  0  PWL 4 15.9N 0.0 16.1n 5.0 31.9n 5.0 32.1n 0.0
+*VS 268  0  PWL 4 15.9N 0.0 16.1n 5.0 31.9n 5.0 32.1n 0.0
+*
+VS1 168  0  PULSE (0 5 15.9N 0.2N 0.2N 15.8N 60N)
+VS2 268  0  PULSE (0 5 15.9N 0.2N 0.2N 15.8N 60N)
+*
+.control
+TRAN 0.2N 47.9NS 0 1N
+plot v(648) v(651) v(751)
+.endc
+*
+.MODEL PLINE CPL
++R=0.2       0 
++           0.2
++L=9.13e-9  3.3e-9
++           9.13e-9
++G=0 0 0
++C=3.65e-13 -9e-14
++           3.65e-13
++length=24
+*******************     MODEL SPECIFICATION    **********************
+.MODEL mn0p9 NMOS VTO=0.8 KP=48U GAMMA=0.30 PHI=0.55 LAMBDA=0.00 CGSO=0 CGDO=0
++            CJ=0 CJSW=0 TOX=18000N LD=0.0U
+.MODEL mp1p0 PMOS VTO=-0.8 KP=21U GAMMA=0.45 PHI=0.61 LAMBDA=0.00 CGSO=0 CGDO=0 
++           CJ=0 CJSW=0 TOX=18000N LD=0.0U
+.END

paranoia_parallel/examples/TransmissionLines/cpl3_4_line.sp

@@ -0,0 +1,37 @@
+6.3inch 4 lossy lines CPL model -- R load 
+
+Ra    1    2                       1K
+Rb    0    3                       1K
+Rc    0    4                       1K
+Rd    0    5                       1K
+Re    6    0                       1Meg
+Rf    7    0                       1Meg
+Rg    8    0                       1Meg
+Rh    9    0                       1Meg
+*
+P1    2 3 4 5  0  6 7 8 9 0  LOSSYMODE
+*
+*
+VS1   1    0   PWL(15.9NS 0.0 16.1Ns 5.0 31.9Ns 5.0 32.1Ns 0.0) 
+*
+.control
+TRAN   0.2NS  50NS 0  0.05N 
+PLOT V(1) V(2) V(6) V(7) V(8) V(9)
+.endc
+.MODEL LOSSYMODE   CPL
++R=0.3      0        0        0 
++          0.3       0        0 
++                   0.3       0  
++                            0.3
++L=9e-9    5.4e-9    0        0
++           9e-9    5.4e-9    0
++                   9e-9     5.4e-9
++                            9e-9
++G=0 0 0 0 0 0 0 0 0 0
++C=3.5e-13 -3e-14    0        0
++          3.5e-13 -3e-14     0    
++                   3.5e-13  -3e-14
++                            3.5e-13
++length=6.3
+
+.END

paranoia_parallel/examples/TransmissionLines/cpl4_txl_2_line.sp

@@ -0,0 +1,378 @@
+BJTdriver -- 2in st. lin -- 20in coupled line CPL -- 2in st line -- DiodeCircuit
+
+* This unclassified circuit is from Raytheon, courtesy Gerry Marino.
+* 
+*                                      _______
+* -------- 2in  _________________ 2in  |     |
+* | BJT  |______|               |______|Diode|
+* |      |------|               |------|     |
+* | Drvr | line |   2-wire      | line |rcvr.|
+* --------      |   coupled     |      |_____|
+*               |  transmission |
+* |-/\/\/\/\----|   line        |-------\/\/\/\/\----|
+* |  50ohms     |               |         50ohms     |
+* |             |               |                    |
+* Ground        -----------------                   Ground
+*                      
+*
+* Each inch of the lossy line is modelled by 10 LRC lumps in the 
+* Raytheon model.
+
+* The line parameters (derived from the Raytheon input file) are:
+* L = 9.13nH per inch
+* C = 3.65pF per inch
+* R = 0.2 ohms per inch
+* K = 0.482 [coupling coefficient; K = M/sqrt(L1*L2)]
+* Cc = 1.8pF per inch
+*
+* coupled ltra model generated  using the standalone program
+* multi_decomp
+
+* the circuit
+*tran 0.1ns 60ns
+
+v1 1 0 0v pulse(0 4 1ns 1ns 1ns 20ns 40ns)
+*v1 1 0 4v pulse(4 0 1ns 1ns 1ns 20ns 40ns)
+vcc 10 0 5v
+
+* series termination
+*x1 1 oof 10 bjtdrvr
+*rseries oof 2 50
+
+x1 1 2 10 bjtdrvr
+rt1 3 0 50
+
+
+* convolution model
+x2 2 3 4 5 conv2wetcmodel
+
+* rlc segments model
+*x2 2 3 4 5 rlc2wetcmodel
+
+x3 4 dioload
+rt2 5 0 50
+
+
+
+.model qmodn npn(bf=100 rb=100 cje=0.09375pF cjc=0.28125pF is=1e-12
++pe=0.5 pc=0.5)
+
+.model qmodpd npn(bf=100 rb=100 cje=0.08187pF cjc=0.2525pF is=1e-12
++pe=0.5 pc=0.5)
+.model qmodpdmine npn(bf=100 rb=100  cje=0.08187pF cjc=0.05pF is=1e-12
++pe=0.5 pc=0.5)
+
+.model dmod1 d(n=2.25 is=1.6399e-4 bv=10)
+
+.model dmod2 d
+
+.model dmod d(vj=0.3v)
+
+.model diod1 d(tt=0.75ns vj=0.6 rs=909 bv=10)
+
+.model diod2 d(tt=0.5ns vj=0.3 rs=100 bv=10)
+
+.options acct reltol=1e-3 abstol=1e-12
+.control
+tran 0.1ns 60ns 0 0.35N
+plot v(2) v(4) v(5)
+.endc
+
+* bjt driver - 19=input, 268=output, 20=vcc; wierd node numbers from 
+* the Raytheon file
+
+.subckt bjtdrvr 19 268 20
+q1 22 18 13 qmodn
+q2 18 16 13 qmodn
+qd2 21 9 0 qmodn
+q4 14 14 0 qmodn
+q3 16 15 14 qmodpd
+q5 8 13 17 qmodn
+q6 25 12 0 qmodn
+q7 6 17 0 qmodpd
+qd1 26 10 0 qmodn
+q8 7 11 10 qmodn
+*q10 268 17 0 qmodpd
+q10 268 17 0 qmodpdmine
+q9 7 10 268 qmodn
+
+d1 0 19 dmod1
+d2 18 19 dmod2
+d3 13 19 dmod
+dq1 18 22 dmod
+dq2 16 18 dmod
+d502 9 21 dmod
+dq3 15 16 dmod
+d10 24 8 dmod
+d4 15 6 dmod
+dq6 12 25 dmod
+dq7 17 6 dmod
+dd1 17 10 dmod
+d7 11 6 dmod
+dd2 17 26 dmod
+d9 23 6 dmod
+dq8 11 7 dmod
+d501 17 268 dmod
+dq9 10 7 dmod
+d14 20 27 dmod
+d8 0 268 dmod
+
+r1 18 20 6k
+r2 22 20 2.2k
+r4 0 13 7k
+rd1 9 13 2k
+rd2 21 13 3k
+r3 16 20 10k
+r5 15 20 15k
+r9 0 17 4k
+r6 24 20 750
+r10 12 17 2k
+r12 24 11 1.5k
+r11 25 17 3k
+r15 23 20 10k
+r13 0 10 15k
+r14 7 27 12
+
+.ends bjtdrvr
+
+* subckt dioload - diode load: input=28, output=4, vcc=5
+
+.subckt dioload 28
+*comment out everything in dioload except d5 and r503, and watch
+* the difference in results obtained between a tran 0.1ns 20ns and
+* a tran 0.01ns 20ns
+vccint 5 0 5v
+
+c1 28 0 5pF
+r503 0 4 5.55
+r4 0 28 120k
+r5 1 5 7.5k
+
+d5 4 28 diod2
+d1 1 28 diod1
+d4 2 0 diod1
+d3 3 2 diod1
+d2 1 3 diod1
+.ends dioload
+
+* subckt rlclump - one RLC lump of the lossy line
+
+.subckt rlclump 1 2
+*r1 1 3 0.02
+*c1 3 0 0.365pF
+*l1 3 2 0.913nH
+
+l1 1 3 0.913nH
+c1 2 0 0.365pF
+r1 3 2 0.02
+
+*r1 1 3 0.01
+*c1 3 0 0.1825pF
+*l1 3 4 0.4565nH
+*r2 4 5 0.01
+*c2 5 0 0.1825pF
+*l2 5 2 0.4565nH
+
+*c1 1 0 0.365pF
+*l1 1 2 0.913nH
+.ends lump
+
+.subckt rlconeinch 1 2
+x1 1 3 rlclump
+x2 3 4 rlclump
+x3 4 5 rlclump
+x4 5 6 rlclump
+x5 6 7 rlclump
+x6 7 8 rlclump
+x7 8 9 rlclump
+x8 9 10 rlclump
+x9 10 11 rlclump
+x10 11 2 rlclump
+.ends rlconeinch
+
+.subckt rlctwoinch 1 2
+x1 1 3 rlconeinch
+x2 3 2 rlconeinch
+.ends rlctwoinch
+
+.subckt rlcfourinch 1 2
+x1 1 3 rlconeinch
+x2 3 4 rlconeinch
+x3 4 5 rlconeinch
+x4 5 2 rlconeinch
+.ends rlcfourinch
+
+.subckt rlcfiveinch 1 2
+x1 1 3 rlconeinch
+x2 3 4 rlconeinch
+x3 4 5 rlconeinch
+x4 5 6 rlconeinch
+x5 6 2 rlconeinch
+.ends rlcfiveinch
+
+.subckt rlctwentyrlcfourinch 1 2
+x1 1 3 rlcfiveinch
+x2 3 4 rlcfiveinch
+x3 4 5 rlcfiveinch
+x4 5 6 rlcfiveinch
+x5 6 2 rlcfourinch
+.ends rlctwentyrlcfourinch
+
+.subckt rlclumpstub A B C D
+x1 A int1 rlcfiveinch
+x2 int1 int2 rlcfiveinch
+x3 int2 1 rlcfiveinch
+x4 1 2 rlcfourinch
+x5 1 int3 rlcfiveinch
+x6 int3 B rlconeinch
+x7 2 C rlcfiveinch
+x8 2 D rlcfourinch
+.ends rlclumpstub
+
+.subckt ltrastub A B C D
+yy1 A 0 1 0 ylline15in
+yy2 1 0 B 0 ylline6in
+yy3 1 0 2 0 ylline4in
+yy4 2 0 C 0 ylline5in
+yy5 2 0 D 0 ylline4in
+.ends ltrastub
+
+*modelling using R and lossless lines
+
+*5 segments per inch
+.model yllfifth txl r=0 g=0 l=9.13e-9 c=3.65e-12 length=0.2 
+
+.subckt xlump 1 2 
+y1 1 0 3 0 yllfifth
+r1 2 3 0.04
+.ends xlump
+
+.subckt xoneinch 1 2
+x1 1 3 xlump
+x2 3 4 xlump
+x3 4 5 xlump
+x4 5 6 xlump
+x5 6 2 xlump
+*x5 6 7 xlump
+*x6 7 8 xlump
+*x7 8 9 xlump
+*x8 9 10 xlump
+*x9 10 11 xlump
+*x10 11 2 xlump
+.ends xoneinch
+
+.subckt xFourinch 1 2
+x1 1 3 xoneinch
+x2 3 4 xoneinch
+x3 4 5 xoneinch
+x4 5 2 xoneinch
+.ends xfourinch
+
+.subckt xfiveinch 1 2
+x1 1 3 xoneinch
+x2 3 4 xoneinch
+x3 4 5 xoneinch
+x4 5 6 xoneinch
+x5 6 2 xoneinch
+.ends xfiveinch
+
+.subckt xlumpstub A B C D
+x1 A int1 xfiveinch
+x2 int1 int2 xfiveinch
+x3 int2 1 xfiveinch
+x4 1 2 xfourinch
+x5 1 int3 xfiveinch
+x6 int3 B xoneinch
+x7 2 C xfiveinch
+x8 2 D xfourinch
+.ends xlumpstub
+
+* modelling a 2 wire coupled system using RLC lumps
+* 10 segments per inch
+*
+* 1---xxxxx----2
+* 3---xxxxx----4
+
+.subckt rlc2wlump 1 3 2 4
+l1 1 5 0.913nH
+c1 2 0 0.365pF
+r1 5 2 0.02
+l2 3 6 0.913nH
+c2 4 0 0.365pF
+r2 6 4 0.02
+cmut 2 4 0.18pF
+k12 l1 l2 0.482
+.ends rlc2wlump
+
+.subckt rlc2woneinch 1 2 3 4
+x1 1 2 5 6 rlc2wlump
+x2 5 6 7 8  rlc2wlump
+x3 7 8 9 10 rlc2wlump
+x4 9 10 11 12 rlc2wlump
+x5 11 12 13 14 rlc2wlump
+x6 13 14 15 16 rlc2wlump
+x7 15 16 17 18 rlc2wlump
+x8 17 18 19 20 rlc2wlump
+x9 19 20 21 22 rlc2wlump
+x10 21 22 3 4 rlc2wlump
+.ends rlc2woneinch
+
+.subckt rlc2wfiveinch 1 2 3 4
+x1 1 2 5 6 rlc2woneinch
+x2 5 6 7 8 rlc2woneinch
+x3 7 8 9 10 rlc2woneinch
+x4 9 10 11 12 rlc2woneinch
+x5 11 12 3 4 rlc2woneinch
+.ends rlc2wfiveinch
+
+.subckt rlc2wtwentyinch 1 2 3 4
+x1 1 2 5 6 rlc2wfiveinch
+x2 5 6 7 8 rlc2wfiveinch
+x3 7 8 9 10 rlc2wfiveinch
+x4 9 10 3 4 rlc2wfiveinch
+.ends rlc2wtwentyinch
+
+.subckt rlc2wetcmodel 1 2 3 4
+x1 1 5 rlctwoinch
+x2 5 2 6 4 rlc2wtwentyinch
+x3 6 3 rlctwoinch
+.ends rlc2wetcmodel
+
+* Subcircuit conv2wtwentyinch
+* conv2wtwentyinch is a subcircuit that models a 2-conductor transmission line with
+* the following parameters: l=9.13e-09, c=3.65e-12, r=0.2, g=0,
+* inductive_coeff_of_coupling k=0.482, inter-line capacitance cm=1.8e-12,
+* length=20. Derived parameters are: lm=4.40066e-09, ctot=5.45e-12.
+* 
+* It is important to note that the model is a simplified one - the
+* following assumptions are made: 1. The self-inductance l, the
+* self-capacitance ctot (note: not c), the series resistance r and the
+* parallel capacitance g are the same for all lines, and 2. Each line
+* is coupled only to the two lines adjacent to it, with the same
+* coupling parameters cm and lm. The first assumption imply that edge
+* effects have to be neglected. The utility of these assumptions is
+* that they make the sL+R and sC+G matrices symmetric, tridiagonal and
+* Toeplitz, with useful consequences.
+* 
+* It may be noted that a symmetric two-conductor line will be
+* accurately represented by this model.
+
+* swec model
+.model plines cpl
++R=0.2        0   
++            0.2
++L=9.13e-9   4.4e-9 
++            9.13e-9
++G=0 0 0
++C=5.45e-12 -1.8e-12 
++            5.45e-12
++length=20
+
+.model yconvtwoinch txl r=0.2 g=0 l=9.13e-9 c=3.65e-12 length=2.0
+.subckt conv2wetcmodel 1 2 3 4
+y1 1 0 5 0 yconvtwoinch
+p2 5 2 0 6 4 0 plines
+y2 6 0 3 0 yconvtwoinch
+.ends conv2wetcmodel
+
+.end

paranoia_parallel/examples/TransmissionLines/cpl_ibm1.sp

@@ -0,0 +1,82 @@
+6-line coupled multiconductor with ECL drivers
+vemm mm 0 DC -0.4
+vepp pp 0 DC 0.4
+vein_left  lin  0 PULSE (-0.4 0.4 0N 1N 1N 7N 200N)
+vein_right rin  0 PULSE (-0.4 0.4 2N 1N 1N 7N 200N)
+
+* upper 2 lines
+x1 lin 0 1 1outn  ECL
+x2 mm 0 2 2outn   ECL
+x7 7 0 7r 7routn  ECL
+x8 8 0 8r 8routn  ECL
+
+c7r 7r 0 0.1P
+c8r 8r 0 0.1P
+
+* lower 2 lines
+x11 pp 0 11 11outn  ECL
+x12 rin 0 12 12outn  ECL
+x5  5 0 5l 5loutn  ECL
+x6  6 0 6l 6loutn ECL
+
+c5l 5l 0 0.1P
+c6l 6l 0 0.1P
+
+p1 1 2 3 4 5 6  0  7 8 9 10 11 12  0  pline
+
+.model pline cpl
++C = 0.900000P  -0.657947P -0.0767356P -0.0536544P -0.0386514P -0.0523990P
++                1.388730P -0.607034P  -0.0597635P -0.0258851P -0.0273442P
++                             1.39328P  -0.625675P -0.0425551P -0.0319791P
++                                         1.07821P  -0.255048P -0.0715824P
++                                                     1.06882P  -0.692091P
++                                                                0.900000P
++L = 0.868493E-7 0.781712E-7 0.748428E-7 0.728358E-7 0.700915E-7 0.692178E-7
++                0.866074E-7 0.780613E-7 0.748122E-7 0.711591E-7 0.701023E-7
++                            0.865789E-7 0.781095E-7 0.725431E-7 0.711986E-7
++                                        0.867480E-7 0.744242E-7 0.725826E-7
++                                                    0.868022E-7 0.782377E-7
++                                                                0.868437E-7
++R = 0.2  0    0    0    0    0
++         0.2  0    0    0    0
++              0.2  0    0    0
++                   0.2  0    0
++                        0.2  0
++                             0.2
++G = 0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0
++
++length = 2
+
+*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
+.SUBCKT ECL EIN GND 9 8
+*    Input-GND-OUTP-OUTN
+RIN  1 2   0.077K
+REF  5 6   0.077K
+R1   7 N   1.0K
+R2   P 3   0.4555K
+R3   P 4   0.4555K
+R4   8 N   0.615K
+R5   9 N   0.615K
+RL1  8 GND 0.093K
+RL2  9 GND 0.093K
+LIN  EIN 1 0.01U
+LREF 5 GND 0.01U
+CIN  1 GND 0.68P
+CL1  8 GND 1P
+CL2  9 GND 1P
+Q1 3 2 7 JCTRAN
+Q2 4 6 7 JCTRAN
+Q3 P 3 8 JCTRAN
+Q4 P 4 9 JCTRAN
+VEP  P GND DC 1.25
+VEN  N GND DC -3
+.ENDS ECL
+
+.control
+TRAN 0.1N 20N
+plot V(3) V(5) V(8) V(11) V(12)
+.endc
+.MODEL JCTRAN NPN BF=150 VAF=20 IS=4E-17 RB=300 RC=100 CJE=30F CJC=30F
++               CJS=40F VJE=0.6 VJC=0.6 VJS=0.6 MJE=0.5 MJC=0.5
++               MJS=0.5 TF=16P TR=1N
+.END

paranoia_parallel/examples/TransmissionLines/cpl_ibm2.sp

@@ -0,0 +1,22 @@
+Simple coupled transmissionlines
+VES IN 0  PULSE (0 1 0N 1.5N 1.5N 4.5N 200N)
+R1 IN V1 50
+R2 V2 0  10
+p1 V1  V2  0 V3  V4 0 cpl1
+.model cpl1 cpl
++R = 0.5       0 
++              0.5
++L = 247.3e-9  31.65e-9
++              247.3e-9
++C = 31.4e-12 -2.45e-12
++              31.4e-12
++G = 0 0 0
++length = 0.3048
+*length = 0.6096
+R3 V3 0 100
+R4 V4 0 100
+.control
+TRAN 0.1N 20N
+plot v(in) v(v1) v(v3)
+.endc
+.END

paranoia_parallel/examples/TransmissionLines/cpl_ibm3.sp

@@ -0,0 +1,70 @@
+Mixed single and coupled transmission lines
+c1g 1 0 1P
+l11a 1 1a 6e-9
+r1a7 1a 7 0.025K
+rin6 in 6 0.075K
+l67 6 7 10e-9
+c7g 7 0 1P
+P2  1 7  0 2 8 0 PLINE
+.MODEL PLINE CPL
++R = 2.25     0
++             2.25
++L = 0.6e-6   0.05e-6
++             0.6e-6
++G = 0 0 0
++C =  1.2e-9  -0.11e-9
++               1.2e-9
++length = 0.03
+c2g 2 0 0.5P
+r2g 2 0 0.05K
+r23 2 3 0.025K
+l34 3 4 5e-9
+c4g 4 0 2P
+l89 8 9 10e-9
+c9g 9 0 1P
+Y1  9 0 10 0 txline
+.model  txline txl R = 1 L =0.6e-6 G = 0 C= 1.0e-9 length=0.04
+l1011 10 11 10e-9
+c11g 11 0 0.5P
+r11g 11 0 0.05K
+r1112 11 12 0.025K
+l1213 12 13 5e-9
+c13g 13 0 2P
+r1116 11 16 0.025K
+l1617 16 17 5e-9
+c17g 17 0 2P
+P1    4 2 13 17   0   5 14 15 18   0   PLINE1
+
+.MODEL PLINE1 CPL
++R = 3.5  0    0    0
++         3.5  0    0
++              3.5  0
++                   3.5
++L =
++1e-6    0.11e-6 0.03e-6  0
++        1e-6    0.11e-6  0.03e-6
++                1e-6     0.11e-6
++                            1e-6
++G = 0 0 0 0 0 0 0 0 0 0
++C =
++1.5e-9 -0.17e-9 -0.03e-9   0
++         1.5e-9 -0.17e-9 -0.03e-9 
++                  1.5e-9 -0.17e-9
++                           1.5e-9
++length = 0.02
+
+D1   5  0 dmod
+D2  14  0 dmod
+D3  15  0 dmod
+D4  18  0 dmod
+
+.model dmod d
+
+VES in 0 PULSE (0 5 0 1.1ns 0.1ns 0.9ns 200ns)
+
+.control
+TRAN 0.2N 10.0N 
+plot v(3) v(6) v(7) v(8) v(11) v(15)
+.endc
+
+.END

paranoia_parallel/examples/TransmissionLines/ltra1_1_line.sp

@@ -0,0 +1,19 @@
+MOSdriver -- lossy line LTRA model -- C load 
+m5     0     168    2     0  mn0p9  w = 18.0u l=0.9u
+m6     1     168    2     1  mp1p0  w = 36.0u l=1.0u
+CN2  2   0  0.025398e-12
+CN3  3   0  0.007398e-12
+o1  2 0 3 0 lline
+vdd    1    0   dc 	5.0
+VS 168  0  PULSE (0 5 15.9NS 0.2NS 0.2NS 15.8NS 32NS )
+.control
+TRAN 0.2N 47N 0 0.1N
+plot v(2) v(3) ylimit -0.5 5
+.endc
+.MODEL mn0p9 NMOS VTO=0.8 KP=48U GAMMA=0.30 PHI=0.55
++LAMBDA=0.00 CGSO=0 CGDO=0 CJ=0 CJSW=0 TOX=18000N LD=0.0U
+.MODEL mp1p0 PMOS VTO=-0.8 KP=21U GAMMA=0.45 PHI=0.61
++LAMBDA=0.00 CGSO=0 CGDO=0 CJ=0 CJSW=0 TOX=18000N LD=0.0U
+.model lline ltra rel=1 r=12.45 g=0 l=8.972e-9 c=0.468e-12 
++len=16 steplimit compactrel=1.0e-3 compactabs=1.0e-14
+.end

paranoia_parallel/examples/TransmissionLines/ltra1_4_line.sp

@@ -0,0 +1,144 @@
+MOSdriver -- 6.3inch 4 lossy line LTRA model -- C load 
+
+m1     1     2      6       1  mp1p0  w = 36.0u l=1.0u
+m2     1     3      7       1  mp1p0  w = 36.0u l=1.0u
+m3     1     4      8       1  mp1p0  w = 36.0u l=1.0u
+m4     1     10     5       1  mp1p0  w = 36.0u l=1.0u
+m5     1     11     13      1  mp1p0  w = 36.0u l=1.0u
+m6     1     12     13      1  mp1p0  w = 36.0u l=1.0u
+
+m7     0     2      6       0  mn0p9  w = 18.0u l=0.9u
+m8     0     3      7       0  mn0p9  w = 18.0u l=0.9u
+m9     0     4      8       0  mn0p9  w = 18.0u l=0.9u
+m10    0     10     5       0  mn0p9  w = 18.0u l=0.9u
+m11    14    11     13      0  mn0p9  w = 18.0u l=0.9u
+m12    0     12     14      0  mn0p9  w = 18.0u l=0.9u
+
+
+*
+CN5  5     0  0.025398e-12
+CN6  6     0  0.007398e-12
+CN7  7     0  0.007398e-12
+CN8  8     0  0.007398e-12
+CN9  9     0  0.097398e-12
+CN10 10    0  0.007398e-12
+CN11 11    0  0.003398e-12
+CN12 12    0  0.004398e-12
+CN13 13    0  0.008398e-12
+CN14 14    0  0.005398e-12
+
+*
+* Subcircuit test
+* test is a subcircuit that models a 4-conductor transmission line with
+* the following parameters: l=9e-09, c=2.9e-13, r=0.3, g=0,
+* inductive_coeff_of_coupling k=0.6, inter-line capacitance cm=3e-14,
+* length=6.3. Derived parameters are: lm=5.4e-09, ctot=3.5e-13.
+* 
+* It is important to note that the model is a simplified one - the
+* following assumptions are made: 1. The self-inductance l, the
+* self-capacitance ctot (note: not c), the series resistance r and the
+* parallel capacitance g are the same for all lines, and 2. Each line
+* is coupled only to the two lines adjacent to it, with the same
+* coupling parameters cm and lm. The first assumption implies that edge
+* effects have to be neglected. The utility of these assumptions is
+* that they make the sL+R and sC+G matrices symmetric, tridiagonal and
+* Toeplitz, with useful consequences (see "Efficient Transient
+* Simulation of Lossy Interconnect", by J.S.  Roychowdhury and
+* D.O Pederson, Proc. DAC 91).
+
+* It may be noted that a symmetric two-conductor line is
+* represented accurately by this model.
+
+* Subckt node convention:
+* 
+*            |--------------------------|
+*      1-----|                          |-----n+1
+*      2-----|                          |-----n+2
+*         :  |   n-wire multiconductor  |  :
+*         :  |          line            |  :
+*    n-1-----|(node 0=common gnd plane) |-----2n-1
+*      n-----|                          |-----2n
+*            |--------------------------|
+
+
+* Lossy line models
+.model mod1_test ltra rel=1.2 nocontrol r=0.3 l=2.62616456193e-10 g=0 c=3.98541019688e-13 len=6.3
+.model mod2_test ltra rel=1.2 nocontrol r=0.3 l=5.662616446e-09 g=0 c=3.68541019744e-13 len=6.3
+.model mod3_test ltra rel=1.2 nocontrol r=0.3 l=1.23373835171e-08 g=0 c=3.3145898046e-13 len=6.3
+.model mod4_test ltra rel=1.2 nocontrol r=0.3 l=1.7737383521e-08 g=0 c=3.01458980439e-13 len=6.3
+
+* subcircuit m_test - modal transformation network for test
+.subckt m_test 1 2 3 4 5 6 7 8
+v1 9 0 0v
+v2 10 0 0v
+v3 11 0 0v
+v4 12 0 0v
+f1 0 5 v1 0.371748033738
+f2 0 5 v2 -0.601500954587
+f3 0 5 v3 0.601500954587
+f4 0 5 v4 -0.371748036544
+f5 0 6 v1 0.60150095443
+f6 0 6 v2 -0.371748035044
+f7 0 6 v3 -0.371748030937
+f8 0 6 v4 0.601500957402
+f9 0 7 v1 0.601500954079
+f10 0 7 v2 0.37174803072
+f11 0 7 v3 -0.371748038935
+f12 0 7 v4 -0.601500955482
+f13 0 8 v1 0.371748035626
+f14 0 8 v2 0.601500956073
+f15 0 8 v3 0.601500954504
+f16 0 8 v4 0.371748032386
+e1 13 9 5 0 0.371748033909
+e2 14 13 6 0 0.601500954587
+e3 15 14 7 0 0.601500955639
+e4 1 15 8 0 0.371748036664
+e5 16 10 5 0 -0.60150095443
+e6 17 16 6 0 -0.371748035843
+e7 18 17 7 0 0.371748032386
+e8 2 18 8 0 0.601500957319
+e9 19 11 5 0 0.601500955131
+e10 20 19 6 0 -0.371748032169
+e11 21 20 7 0 -0.371748037896
+e12 3 21 8 0 0.601500954513
+e13 22 12 5 0 -0.371748035746
+e14 23 22 6 0 0.60150095599
+e15 24 23 7 0 -0.601500953534
+e16 4 24 8 0 0.371748029317
+.ends m_test
+
+* Subckt test
+.subckt test 1 2 3 4 5 6 7 8
+x1 1 2 3 4 9 10 11 12 m_test
+o1 9 0 13 0 mod1_test
+o2 10 0 14 0 mod2_test
+o3 11 0 15 0 mod3_test
+o4 12 0 16 0 mod4_test
+x2 5 6 7 8 13 14 15 16 m_test
+.ends test
+*
+x1  5 6 7 8 9 10 11 12 test
+*
+*
+vdd    1    0   PULSE (0 5 0Ns 0.1Ns 0.1Ns 600Ns 800Ns)
+v3     3    0   PULSE (0 5 0Ns 0.1Ns 0.1Ns 600Ns 800Ns)
+
+.model mn0p9 nmos  LEVEL=1 vto=0.8V kp=48u gamma=0.3 phi=0.55 lambda=0.00
++                 PHI=0.55 LAMBDA=0.00 CGSO=0 CGDO=0 CGBO=0
++                 CJ=0 CJSW=0 TOX=18000N NSUB=1E16 LD=0.0U
+
+.model mp1p0 pmos  vto=-0.8V kp=21u gamma=0.45 phi=0.61 lambda=0.00
++                 PHI=0.61 LAMBDA=0.00 CGSO=0 CGDO=0 CGBO=0
++                 CJ=0 CJSW=0 TOX=18000N NSUB=3E16 LD=0.0U 
+
+VS1  2   0  PULSE (0 5 15.9Ns 0.2Ns 0.2Ns 15.8Ns 32Ns)
+VS2  4   0  PULSE (0 5 15.9Ns 0.2Ns 0.2Ns 15.8Ns 32Ns)
+
+.control
+TRAN 0.1N 47.9N
+plot v(5) v(6) v(7) v(8) v(9) v(10) v(11) v(12)
+.endc
+*
+
+.END
+

paranoia_parallel/examples/TransmissionLines/ltra2_2_line.sp

@@ -0,0 +1,24 @@
+MOSdriver -- 2 lossy lines LTRA model -- C load 
+m5     0     168    2     0  mn0p9  w = 18.0u l=0.9u
+m6     1     168    2     1  mp1p0  w = 36.0u l=1.0u
+m1     0     3    4     0  mn0p9  w = 18.0u l=0.9u
+m2     1     3    4     1  mp1p0  w = 36.0u l=1.0u
+CN2  2   0  0.025398e-12
+CN3  3   0  0.007398e-12
+CN4  4   0  0.025398e-12
+CN5  5   0  0.007398e-12
+o1  2 0 3 0  lline
+o2  4 0 5 0  lline
+vdd    1    0   dc 	5.0
+VS 168  0  PULSE (0 5 15.9NS 0.2NS 0.2NS 15.8NS 32NS )
+.control
+TRAN 0.2N 47N 0 0.1N
+plot v(2) v(3) v(4) v(5)
+.endc
+.MODEL mn0p9 NMOS VTO=0.8 KP=48U GAMMA=0.30 PHI=0.55
++LAMBDA=0.00 CGSO=0 CGDO=0 CJ=0 CJSW=0 TOX=18000N LD=0.0U
+.MODEL mp1p0 PMOS VTO=-0.8 KP=21U GAMMA=0.45 PHI=0.61
++LAMBDA=0.00 CGSO=0 CGDO=0 CJ=0 CJSW=0 TOX=18000N LD=0.0U
+.model lline ltra rel=1 r=12.45 g=0 l=8.972e-9 c=0.468e-12 
++len=16 steplimit compactrel=1.0e-3 compactabs=1.0e-14
+.end

paranoia_parallel/examples/TransmissionLines/ltra3_2_line.sp

@@ -0,0 +1,98 @@
+MOSdriver -- 24inch 2 lossy lines LTRA model -- C load 
+
+m1     0     268    299     0  mn0p9  w = 18.0u l=1.0u
+m2    299    267    748     0  mn0p9  w = 18.0u l=1.0u
+m3     0     168    648     0  mn0p9  w = 18.0u l=0.9u
+m4     1     268    748     1  mp1p0  w = 36.0u l=1.0u
+m5     1     267    748     1  mp1p0  w = 36.0u l=1.0u
+m6     1     168    648     1  mp1p0  w = 36.0u l=1.0u
+
+*
+CN648  648   0  0.025398e-12 
+CN651  651   0  0.007398e-12 
+CN748  748   0  0.025398e-12 
+CN751  751   0  0.009398e-12 
+CN299  299   0  0.005398e-12 
+*
+* Subcircuit test
+* test is a subcircuit that models a 2-conductor transmission line with
+* the following parameters: l=9.13e-09, c=2.75e-13, r=0.2, g=0,
+* inductive_coeff_of_coupling k=0.36144, inter-line capacitance cm=9e-14,
+* length=24. Derived parameters are: lm=3.29995e-09, ctot=3.65e-13.
+* 
+* It is important to note that the model is a simplified one - the
+* following assumptions are made: 1. The self-inductance l, the
+* self-capacitance ctot (note: not c), the series resistance r and the
+* parallel capacitance g are the same for all lines, and 2. Each line
+* is coupled only to the two lines adjacent to it, with the same
+* coupling parameters cm and lm. The first assumption implies that edge
+* effects have to be neglected. The utility of these assumptions is
+* that they make the sL+R and sC+G matrices symmetric, tridiagonal and
+* Toeplitz, with useful consequences (see "Efficient Transient
+* Simulation of Lossy Interconnect", by J.S.  Roychowdhury and
+* D.O Pederson, Proc. DAC 91).
+
+* It may be noted that a symmetric two-conductor line is
+* represented accurately by this model.
+
+* Subckt node convention:
+* 
+*            |--------------------------|
+*      1-----|                          |-----n+1
+*      2-----|                          |-----n+2
+*         :  |   n-wire multiconductor  |  :
+*         :  |          line            |  :
+*    n-1-----|(node 0=common gnd plane) |-----2n-1
+*      n-----|                          |-----2n
+*            |--------------------------|
+
+
+* Lossy line models
+.model mod1_test ltra rel=1.2 nocontrol r=0.2 l=5.83005279316e-09 g=0 c=4.55000000187e-13 len=24
+.model mod2_test ltra rel=1.2 nocontrol r=0.2 l=1.24299471863e-08 g=0 c=2.75000000373e-13 len=24
+
+* subcircuit m_test - modal transformation network for test
+.subckt m_test 1 2 3 4
+v1 5 0 0v
+v2 6 0 0v
+f1 0 3 v1 0.707106779721
+f2 0 3 v2 -0.707106782652
+f3 0 4 v1 0.707106781919
+f4 0 4 v2 0.707106780454
+e1 7 5 3 0 0.707106780454
+e2 1 7 4 0 0.707106782652
+e3 8 6 3 0 -0.707106781919
+e4 2 8 4 0 0.707106779721
+.ends m_test
+
+* Subckt test
+.subckt test 1 2 3 4
+x1 1 2 5 6 m_test
+o1 5 0 7 0 mod1_test
+o2 6 0 8 0 mod2_test
+x2 3 4 7 8 m_test
+.ends test
+*
+x1  648 748  651 751  test
+*
+*
+vdd    1    0   DC  5.0
+VK   267    0   DC  5.0
+*
+VS1 168  0  PULSE (0 5 15.9N 0.2N 0.2N 15.8N 60N)
+VS2 268  0  PULSE (0 5 15.9N 0.2N 0.2N 15.8N 60N)
+*
+.control
+TRAN 0.2N 47.9NS
+PLOT v(648) v(651) v(751)
+.endc
+*
+.model mn0p9 nmos  LEVEL=1 vto=0.8V kp=48u gamma=0.3 phi=0.55 lambda=0.0
++                 PHI=0.55 LAMBDA=0.00 CGSO=0 CGDO=0 CGBO=0
++                 CJ=0 CJSW=0 TOX=18000N NSUB=1E16 LD=0.0U
+
+.model mp1p0 pmos  LEVEL=1 vto=-0.8V kp=21u gamma=0.45 phi=0.61 lambda=0.0
++                 PHI=0.61 LAMBDA=0.00 CGSO=0 CGDO=0 CGBO=0
++                 CJ=0 CJSW=0 TOX=18000N NSUB=3E16 LD=0.0U
+
+.END

paranoia_parallel/examples/TransmissionLines/ltra4_1_line.sp

@@ -0,0 +1,239 @@
+   BJTdriver -- 24inch lossy line LTRA model -- DiodeCircuit
+
+* This unclassified circuit is from Raytheon, courtesy Gerry Marino.
+* It consists of a BJT driver connected by a 24 inch lossy line to a
+* passive load consisting mostly of diodes. Each inch 
+* of the lossy line is modelled by 10 LRC lumps in the Raytheon
+* model.
+
+* The line parameters (derived from the Raytheon input file) are:
+* L = 9.13nH per inch
+* C = 3.65pF per inch
+* R = 0.2 ohms per inch
+
+* the circuit
+
+v1 1 0 0v pulse(0 4 1ns 1ns 1ns 20ns 40ns)
+
+vcc 10 0 5v
+*rseries 1 2 5
+x1 1 2 10 bjtdrvr
+*t1 2 0 3 0 z0=50.0136 td=4.38119ns rel=10
+o2 2 0 3 0 lline1
+*x2 2 3 oneinch
+*x2 100 101 twentyfourinch
+*x2 100 101 xtwentyfourinch
+vtest1 2 100 0
+vtest2 101 3 0
+x3 3 4 10 dioload
+*rl 3 0 5
+*dl 0 3 diod2
+
+.model lline1 ltra rel=1 r=0.2 g=0 l=9.13e-9 c=3.65e-12 len=24 steplimit
+
+.model qmodn npn(bf=100 rb=100 cje=0.09375pF cjc=0.28125pF is=1e-12
++pe=0.5 pc=0.5)
+
+.model qmodpd npn(bf=100 rb=100 cje=0.08187pF cjc=0.2525pF is=1e-12
++pe=0.5 pc=0.5)
+.model qmodpdmine npn(bf=100 rb=100  cje=0.08187pF cjc=0.05pF is=1e-12
++pe=0.5 pc=0.5)
+
+.model dmod1 d(n=2.25 is=1.6399e-4 bv=10)
+
+.model dmod2 d
+
+.model dmod d(vj=0.3v)
+
+.model diod1 d(tt=0.75ns vj=0.6 rs=909 bv=10)
+
+.model diod2 d(tt=0.5ns vj=0.3 rs=100 bv=10)
+
+.options acct
++reltol=1e-3 abstol=1e-14
+.control
+tran 0.1ns 60ns
+plot v(1) v(2) v(3)
+.endc
+
+* bjt driver - 19=input, 268=output, 20=vcc; wierd node numbers from 
+* the Raytheon file
+
+.subckt bjtdrvr 19 268 20
+q1 22 18 13 qmodn
+q2 18 16 13 qmodn
+qd2 21 9 0 qmodn
+q4 14 14 0 qmodn
+q3 16 15 14 qmodpd
+q5 8 13 17 qmodn
+q6 25 12 0 qmodn
+q7 6 17 0 qmodpd
+qd1 26 10 0 qmodn
+q8 7 11 10 qmodn
+q10 268 17 0 qmodpdmine
+*q10 268 17 0 qmodpd
+q9 7 10 268 qmodn
+
+d1 0 19 dmod1
+d2 18 19 dmod2
+d3 13 19 dmod
+dq1 18 22 dmod
+dq2 16 18 dmod
+d502 9 21 dmod
+dq3 15 16 dmod
+d10 24 8 dmod
+d4 15 6 dmod
+dq6 12 25 dmod
+dq7 17 6 dmod
+dd1 17 10 dmod
+d7 11 6 dmod
+dd2 17 26 dmod
+d9 23 6 dmod
+dq8 11 7 dmod
+d501 17 268 dmod
+dq9 10 7 dmod
+d14 20 27 dmod
+d8 0 268 dmod
+
+r1 18 20 6k
+r2 22 20 2.2k
+r4 0 13 7k
+rd1 9 13 2k
+rd2 21 13 3k
+r3 16 20 10k
+r5 15 20 15k
+r9 0 17 4k
+r6 24 20 750
+r10 12 17 2k
+r12 24 11 1.5k
+r11 25 17 3k
+r15 23 20 10k
+r13 0 10 15k
+r14 7 27 12
+
+.ends bjtdrvr
+
+* subckt dioload - diode load: input=28, output=4, vcc=5
+
+.subckt dioload 28 4 5
+*comment out everything in dioload except d5 and r503, and watch
+* the difference in results obtained between a tran 0.1ns 20ns and
+* a tran 0.01ns 20ns
+c1 28 0 5pF
+r503 0 4 5.55
+r4 0 28 120k
+r5 1 5 7.5k
+
+d5 4 28 diod2
+d1 1 28 diod1
+d4 2 0 diod1
+d3 3 2 diod1
+d2 1 3 diod1
+.ends dioload
+
+* subckt lump - one RLC lump of the lossy line
+
+*10 segments per inch
+.subckt lump 1 2
+*r1 1 3 0.02
+*c1 3 0 0.365pF
+*l1 3 2 0.913nH
+
+l1 1 3 0.913nH
+c1 2 0 0.365pF
+r1 3 2 0.02
+
+*r1 1 3 0.01
+*c1 3 0 0.1825pF
+*l1 3 4 0.4565nH
+*r2 4 5 0.01
+*c2 5 0 0.1825pF
+*l2 5 2 0.4565nH
+
+*c1 1 0 0.365pF
+*l1 1 2 0.913nH
+.ends lump
+
+.subckt oneinch 1 2
+x1 1 3 lump
+x2 3 4 lump
+x3 4 5 lump
+x4 5 6 lump
+x5 6 7 lump
+x6 7 8 lump
+x7 8 9 lump
+x8 9 10 lump
+x9 10 11 lump
+x10 11 2 lump
+.ends oneinch
+
+.subckt fourinch 1 2
+x1 1 3 oneinch
+x2 3 4 oneinch
+x3 4 5 oneinch
+x4 5 2 oneinch
+.ends fourinch
+
+.subckt fiveinch 1 2
+x1 1 3 oneinch
+x2 3 4 oneinch
+x3 4 5 oneinch
+x4 5 6 oneinch
+x5 6 2 oneinch
+.ends fiveinch
+
+.subckt twentyfourinch 1 2
+x1 1 3 fiveinch
+x2 3 4 fiveinch
+x3 4 5 fiveinch
+x4 5 6 fiveinch
+x5 6 2 fourinch
+.ends twentyfourinch
+
+*modelling using R and lossless lines
+*5 segments per inch
+.model llfifth ltra nocontrol noprint rel=10 r=0 g=0 l=9.13e-9
++c=3.65e-12 len=0.2 steplimit quadinterp
+.subckt xlump 1 2 
+o1 1 0 3 0 llfifth
+r1 2 3 0.04
+.ends xlump
+
+.subckt xoneinch 1 2
+x1 1 3 xlump
+x2 3 4 xlump
+x3 4 5 xlump
+x4 5 6 xlump
+x5 6 2 xlump
+*x5 6 7 xlump
+*x6 7 8 xlump
+*x7 8 9 xlump
+*x8 9 10 xlump
+*x9 10 11 xlump
+*x10 11 2 xlump
+.ends xoneinch
+
+.subckt xfourinch 1 2
+x1 1 3 xoneinch
+x2 3 4 xoneinch
+x3 4 5 xoneinch
+x4 5 2 xoneinch
+.ends xfourinch
+
+.subckt xfiveinch 1 2
+x1 1 3 xoneinch
+x2 3 4 xoneinch
+x3 4 5 xoneinch
+x4 5 6 xoneinch
+x5 6 2 xoneinch
+.ends xfiveinch
+
+.subckt xtwentyfourinch 1 2
+x1 1 3 xfiveinch
+x2 3 4 xfiveinch
+x3 4 5 xfiveinch
+x4 5 6 xfiveinch
+x5 6 2 xfourinch
+.ends xtwentyfourinch
+
+.end

paranoia_parallel/examples/TransmissionLines/ltra5_1_line.sp

@@ -0,0 +1,530 @@
+        Example 3 for interconnect simulation
+
+* From neug1, Mosaic aluminum lines. 2um thick, 11um wide. Assuming
+* 10um above the ground.
+* Material: aluminum; resistivity (sigma) = 2.74uohm-cm = 2.74e-8 ohm-m 
+* Dielectric: SiO2, dielectric constant (epsilon) =3.7 
+* epsilon0 = 8.85e-12 MKS units
+* mu0 = 4e-7*PI
+* speed of light in free space = 1/sqrt(mu0*epsilon0) = 2.9986e8 MKS units
+*
+*  Line parameter calculations:
+*  capacitance: parallel plate
+*  C = epsilon*epsilon0 * A / l
+*  C = 3.7*8.85e-12 * 11e-6 * 1(metre) / 10e-6 = 36.02e-12 F/m
+*    + 30% = 46.8e-12 F/m = 0.468pF/cm
+*
+*  C_freespace = 46.8e-12/epsilon = 12.65e-12 F/m
+*  speed of light in free space v0 = 2.9986e8 = 1/sqrt(L0*C0)
+*  => L0 = 1/C0*v0^2
+*  L0 = 1/(12.65e-12 * 8.9916e16) = 1/113.74e4 = 0.008792e-4 H/m
+*    = 0.8792 uH/m = 8.792nH/cm
+*  
+*  R = rho * l / A = 2.74e-8 * 1 / (11e-6*2e-6) = 1245.45 ohms/m
+*    = 12.45ohms/cm
+*
+*  transmission line parameters:
+*  	nominal z0 = sqrt(L/C) = 137 ohms
+*	td = sqrt(LC) = 64.14e-12 secs/cm = 0.064ns/cm
+*
+*
+
+
+vcc vcc 0 5
+
+v1 1 0 0v pulse(0 5 0.1ns 0.1ns 0.1ns 1ns 100ns)
+rs 1 2 10
+xdrv 1 2 vcc bjtdrvr
+xrcv 3 4 vcc bjtdrvr
+xrcv 3 4 vcc dioload
+d1 3 vcc diod
+d2 0 3 diod
+cl 3 0 1pF
+o1 2 0 3 0 lline
+*x1 2 3 sixteencm
+x1 2 3 xonecm
+
+.model diod d
+.model lline ltra rel=1.8 r=12.45 g=0 l=8.792e-9 c=0.468e-12 len=16 steplimit
+
+.control
+* 1cm
+* 2cm
+* 4cm
+* 6cm
+* 8cm
+* 10cm
+* 12cm
+*tran 0.001ns 15ns 0 0.1ns
+* 24cm
+tran 0.001ns 10ns 0 0.1ns
+* onecm10
+*tran 0.001ns 10ns 0 0.01ns
+plot v(1) v(2) v(3)
+.endc
+
+
+* 1. define the subckt r10 to be one tenth of the resistance per cm.
+* 2. define the subckt onecm to be one of onecm10 (modelled using
+* 10 segments), onecm8, onecm4, onecm2 and lump1. Then use
+* the subckts onecm, fourcm, fivecm, tencm, twelvecm,
+* twentyfourcm in the circuit. The line is modelled as rlc segments.
+* 3. define the subckt xonecm to be one of xonecm10, xonecm8,
+* xonecm4, xonecm2 and xlump1. Use the subckts xonecm,
+* xfourcm, xfivecm, xtencm, xtwelvecm, xtwentyfourcm in the
+* circuit. The line will be modelled as r-lossless lumps.
+
+.subckt xonecm 1 2
+*x1 1 2 xlump1
+x1 1 2 xonecm4
+.ends xonecm
+
+.subckt onecm 1 2
+*x1 1 2 lump1
+x1 1 2 onecm4
+.ends onecm
+
+.subckt r10 1 2
+r1 1 2 1.245
+.ends r10
+
+* ECL driver and diode receiver models - from Raytheon
+
+.model qmodn npn(bf=100 rb=100 cje=0.09375pF cjc=0.28125pF is=1e-12
++pe=0.5 pc=0.5)
+
+.model qmodpd npn(bf=100 rb=100 cje=0.08187pF cjc=0.2525pF is=1e-12
++pe=0.5 pc=0.5)
+
+.model qmodpdmine npn(bf=100 rb=100  cje=0.08187pF cjc=0.05pF is=1e-12
++pe=0.5 pc=0.5)
+
+.model dmod1 d(n=2.25 is=1.6399e-4 bv=10)
+
+.model dmod2 d
+
+.model dmod d(vj=0.3v)
+
+.model diod1 d(tt=0.75ns vj=0.6 rs=909 bv=10)
+
+.model diod2 d(tt=0.5ns vj=0.3 rs=100 bv=10)
+
+* bjt driver - 19=input, 268=output, 20=vcc; wierd node numbers from 
+* the Raytheon file
+
+.subckt bjtdrvr 19 268 20
+q1 22 18 13 qmodn
+q2 18 16 13 qmodn
+qd2 21 9 0 qmodn
+q4 14 14 0 qmodn
+q3 16 15 14 qmodpd
+q5 8 13 17 qmodn
+q6 25 12 0 qmodn
+q7 6 17 0 qmodpd
+qd1 26 10 0 qmodn
+q8 7 11 10 qmodn
+q10 268 17 0 qmodpdmine
+*q10 268 17 0 qmodpd
+q9 7 10 268 qmodn
+
+d1 0 19 dmod1
+d2 18 19 dmod2
+d3 13 19 dmod
+dq1 18 22 dmod
+dq2 16 18 dmod
+d502 9 21 dmod
+dq3 15 16 dmod
+d10 24 8 dmod
+d4 15 6 dmod
+dq6 12 25 dmod
+dq7 17 6 dmod
+dd1 17 10 dmod
+d7 11 6 dmod
+dd2 17 26 dmod
+d9 23 6 dmod
+dq8 11 7 dmod
+d501 17 268 dmod
+dq9 10 7 dmod
+d14 20 27 dmod
+d8 0 268 dmod
+
+r1 18 20 6k
+r2 22 20 2.2k
+r4 0 13 7k
+rd1 9 13 2k
+rd2 21 13 3k
+r3 16 20 10k
+r5 15 20 15k
+r9 0 17 4k
+r6 24 20 750
+r10 12 17 2k
+r12 24 11 1.5k
+r11 25 17 3k
+r15 23 20 10k
+r13 0 10 15k
+r14 7 27 12
+
+.ends bjtdrvr
+
+* subckt dioload - diode load: input=28, output=4, vcc=5
+
+.subckt dioload 28 4 5
+c1 28 0 5pF
+r503 0 4 5.55
+r400 0 28 120k
+r500 1 5 7.5k
+
+d5 4 28 diod2
+d1 1 28 diod1
+d4 2 0 diod1
+d3 3 2 diod1
+d2 1 3 diod1
+.ends dioload
+
+* End ECL driver and Diode receiver models from Raytheon
+
+*10 segments per cm
+.subckt lump10 1 2
+l1 1 3 0.0.8792nH
+c1 2 0 0.0468pF
+x1 3 2 r10
+.ends lump10
+
+*1 segment per cm
+.subckt lump1 1 2
+l1 1 3 8.792nH
+c1 2 0 0.468pF
+x1 3 4 r10
+x2 4 5 r10
+x3 5 6 r10
+x4 6 7 r10
+x5 7 8 r10
+x6 8 9 r10
+x7 9 10 r10
+x8 10 11 r10
+x9 11 12 r10
+x10 12 2 r10
+.ends lump1
+
+*2 segments per cm
+.subckt lump2 1 2
+l1 1 3 4.396nH
+c1 2 0 0.234pF
+x1 3 4 r10
+x2 4 5 r10
+x3 5 6 r10
+x4 6 7 r10
+x5 7 2 r10
+.ends lump2
+
+*4 segments per cm
+.subckt lump4 1 2
+l1 1 3 2.198nH
+c1 2 0 0.117pF
+x1 3 4 r10
+x2 4 5 r10
+x3 5 2 r10
+x4 5 2 r10
+.ends lump4
+
+*8 segments per cm
+.subckt lump8 1 2
+l1 1 3 1.099nH
+c1 2 0 0.0585pF
+x1 3 4 r10
+x2 4 2 r10
+x3 4 2 r10
+x4 4 2 r10
+x5 4 2 r10
+.ends lump8
+
+.subckt onecm10 1 2
+x1 1 3 lump10
+x2 3 4 lump10
+x3 4 5 lump10
+x4 5 6 lump10
+x5 6 7 lump10
+x6 7 8 lump10
+x7 8 9 lump10
+x8 9 10 lump10
+x9 10 11 lump10
+x10 11 2 lump10
+.ends onecm10
+
+.subckt onecm8 1 2
+x1 1 3 lump8
+x2 3 4 lump8
+x3 4 5 lump8
+x4 5 6 lump8
+x5 6 7 lump8
+x6 7 8 lump8
+x7 8 9 lump8
+x8 9 2 lump8
+.ends onecm8
+
+.subckt onecm4 1 2
+x1 1 3 lump4
+x2 3 4 lump4
+x3 4 5 lump4
+x4 5 2 lump4
+.ends onecm4
+
+.subckt onecm2 1 2
+x1 1 3 lump2
+x2 3 2 lump2
+.ends onecm2
+
+.subckt twocm 1 2
+x1 1 3 onecm
+x2 3 2 onecm
+.ends twocm
+
+.subckt threecm 1 2
+x1 1 3 onecm
+x2 3 4 onecm
+x3 4 2 onecm
+.ends threecm
+
+.subckt fourcm 1 2
+x1 1 3 onecm
+x2 3 4 onecm
+x3 4 5 onecm
+x4 5 2 onecm
+.ends fourcm
+
+.subckt fivecm 1 2
+x1 1 3 onecm
+x2 3 4 onecm
+x3 4 5 onecm
+x4 5 6 onecm
+x5 6 2 onecm
+.ends fivecm
+
+.subckt sixcm 1 2
+x1 1 3 fivecm
+x2 3 2 onecm
+.ends sixcm
+
+.subckt sevencm 1 2
+x1 1 3 sixcm
+x2 3 2 onecm
+.ends sevencm
+
+.subckt eightcm 1 2
+x1 1 3 sevencm
+x2 3 2 onecm
+.ends eightcm
+
+.subckt ninecm 1 2
+x1 1 3 eightcm
+x2 3 2 onecm
+.ends ninecm
+
+.subckt tencm 1 2
+x1 1 3 fivecm
+x2 3 2 fivecm
+.ends tencm
+
+.subckt elevencm 1 2
+x1 1 3 tencm
+x2 3 2 onecm
+.ends elevencm
+
+.subckt twelvecm 1 2
+x1 1 3 tencm
+x2 3 4 onecm
+x3 4 2 onecm
+.ends twelvecm
+
+.subckt sixteencm 1 2
+x1 1 3 eightcm
+x2 3 2 eightcm
+.ends sixteencm
+
+.subckt twentyfourcm 1 2
+x1 1 3 twelvecm
+x2 3 2 twelvecm
+.ends twentyfourcm
+
+
+*modelling using R and lossless lines
+* 10 segments per cm
+.model lless10 ltra nocontrol rel=10 r=0 g=0 l=8.792e-9
++c=0.468e-12 len=0.1 steplimit quadinterp
+
+* 8 segments per cm
+.model lless8 ltra nocontrol rel=10 r=0 g=0 l=8.792e-9
++c=0.468e-12 len=0.125 steplimit quadinterp
+
+* 4 segments per cm
+.model lless4 ltra nocontrol rel=10 r=0 g=0 l=8.792e-9
++c=0.468e-12 len=0.25 steplimit quadinterp
+
+* 2 segments per cm
+.model lless2 ltra nocontrol rel=10 r=0 g=0 l=8.792e-9
++c=0.468e-12 len=0.5 steplimit quadinterp
+
+* 1 segment per cm
+.model lless1 ltra nocontrol rel=10 r=0 g=0 l=8.792e-9
++c=0.468e-12 len=1 steplimit quadinterp
+
+*10 segments per cm
+.subckt xlump10 1 2
+o1 1 0 3 0 lless10
+x1 3 2 r10
+.ends xlump10
+
+*1 segment per cm
+.subckt xlump1 1 2
+o1 1 0 3 0 lless1
+x1 3 4 r10
+x2 4 5 r10
+x3 5 6 r10
+x4 6 7 r10
+x5 7 8 r10
+x6 8 9 r10
+x7 9 10 r10
+x8 10 11 r10
+x9 11 12 r10
+x10 12 2 r10
+.ends xlump1
+
+*2 segments per cm
+.subckt xlump2 1 2
+o1 1 0 3 0 lless2
+x1 3 4 r10
+x2 4 5 r10
+x3 5 6 r10
+x4 6 7 r10
+x5 7 2 r10
+.ends xlump2
+
+*4 segments per cm
+.subckt xlump4 1 2
+o1 1 0 3 0 lless4
+x1 3 4 r10
+x2 4 5 r10
+x3 5 2 r10
+x4 5 2 r10
+.ends xlump4
+
+*8 segments per cm
+.subckt xlump8 1 2
+o1 1 0 3 0 lless8
+x1 3 4 r10
+x2 4 2 r10
+x3 4 2 r10
+x4 4 2 r10
+x5 4 2 r10
+.ends xlump8
+
+.subckt xonecm10 1 2
+x1 1 3 xlump10
+x2 3 4 xlump10
+x3 4 5 xlump10
+x4 5 6 xlump10
+x5 6 7 xlump10
+x6 7 8 xlump10
+x7 8 9 xlump10
+x8 9 10 xlump10
+x9 10 11 xlump10
+x10 11 2 xlump10
+.ends xonecm10
+
+.subckt xonecm8 1 2
+x1 1 3 xlump8
+x2 3 4 xlump8
+x3 4 5 xlump8
+x4 5 6 xlump8
+x5 6 7 xlump8
+x6 7 8 xlump8
+x7 8 9 xlump8
+x8 9 2 xlump8
+.ends xonecm8
+
+.subckt xonecm4 1 2
+x1 1 3 xlump4
+x2 3 4 xlump4
+x3 4 5 xlump4
+x4 5 2 xlump4
+.ends xonecm4
+
+.subckt xonecm2 1 2
+x1 1 3 xlump2
+x2 3 2 xlump2
+.ends xonecm2
+
+
+.subckt xtwocm 1 2
+x1 1 3 xonecm
+x2 3 2 xonecm
+.ends xtwocm
+
+.subckt xthreecm 1 2
+x1 1 3 xonecm
+x2 3 4 xonecm
+x3 4 2 xonecm
+.ends xthreecm
+
+.subckt xfourcm 1 2
+x1 1 3 xonecm
+x2 3 4 xonecm
+x3 4 5 xonecm
+x4 5 2 xonecm
+.ends xfourcm
+
+.subckt xfivecm 1 2
+x1 1 3 xonecm
+x2 3 4 xonecm
+x3 4 5 xonecm
+x4 5 6 xonecm
+x5 6 2 xonecm
+.ends xfivecm
+
+.subckt xsixcm 1 2
+x1 1 3 xfivecm
+x2 3 2 xonecm
+.ends xsixcm
+
+.subckt xsevencm 1 2
+x1 1 3 xsixcm
+x2 3 2 xonecm
+.ends xsevencm
+
+.subckt xeightcm 1 2
+x1 1 3 xsevencm
+x2 3 2 xonecm
+.ends xeightcm
+
+.subckt xninecm 1 2
+x1 1 3 xeightcm
+x2 3 2 xonecm
+.ends xninecm
+
+.subckt xtencm 1 2
+x1 1 3 xfivecm
+x2 3 2 xfivecm
+.ends xtencm
+
+.subckt xelevencm 1 2
+x1 1 3 xtencm
+x2 3 2 xonecm
+.ends xelevencm
+
+.subckt xtwelvecm 1 2
+x1 1 3 xtencm
+x2 3 4 xonecm
+x3 4 2 xonecm
+.ends xtwelvecm
+
+.subckt xsixteencm 1 2
+x1 1 3 xeightcm
+x2 3 2 xeightcm
+.ends xsixteencm
+
+.subckt xtwentyfourcm 1 2
+x1 1 3 xtwelvecm
+x2 3 2 xtwelvecm
+.ends xtwentyfourcm
+
+.end

paranoia_parallel/examples/TransmissionLines/ltra6_2_line.sp

@@ -0,0 +1,394 @@
+BJTdriver -- 2in st. lin -- 20in coupled line LTRA -- 2in st line -- DiodeCircuit
+
+* This unclassified circuit is from Raytheon, courtesy Gerry Marino.
+* 
+*                                      _______
+* -------- 2in  _________________ 2in  |     |
+* | BJT  |______|               |______|Diode|
+* |      |------|               |------|     |
+* | Drvr | line |   2-wire      | line |rcvr.|
+* --------      |   coupled     |      |_____|
+*               |  transmission |
+* |-/\/\/\/\----|   line        |-------\/\/\/\/\----|
+* |  50ohms     |               |         50ohms     |
+* |             |               |                    |
+* Ground        -----------------                   Ground
+*                      
+*
+* Each inch of the lossy line is modelled by 10 LRC lumps in the 
+* Raytheon model.
+
+* The line parameters (derived from the Raytheon input file) are:
+* L = 9.13nH per inch
+* C = 3.65pF per inch
+* R = 0.2 ohms per inch
+* K = 0.482 [coupling coefficient; K = M/sqrt(L1*L2)]
+* Cc = 1.8pF per inch
+*
+* coupled ltra model generated  using the standalone program
+* multi_decomp
+
+* the circuit
+
+v1 1 0 0v pulse(0 4 1ns 1ns 1ns 20ns 40ns)
+
+vcc 10 0 5v
+
+* series termination
+*x1 1 oof 10 bjtdrvr
+*rseries oof 2 50
+
+x1 1 2 10 bjtdrvr
+rt1 3 0 50
+
+
+* convolution model
+x2 2 3 4 5 conv2wetcmodel
+
+* rlc segments model
+*x2 2 3 4 5 rlc2wetcmodel
+
+x3 4 dioload
+rt2 5 0 50
+
+
+
+.model qmodn npn(bf=100 rb=100 cje=0.09375pF cjc=0.28125pF is=1e-12
++pe=0.5 pc=0.5)
+
+.model qmodpd npn(bf=100 rb=100 cje=0.08187pF cjc=0.2525pF is=1e-12
++pe=0.5 pc=0.5)
+
+.model qmodpdmine npn(bf=100 rb=100  cje=0.08187pF cjc=0.05pF is=1e-12
++pe=0.5 pc=0.5)
+
+.model dmod1 d(n=2.25 is=1.6399e-4 bv=10)
+
+.model dmod2 d
+
+.model dmod d(vj=0.3v)
+
+.model diod1 d(tt=0.75ns vj=0.6 rs=909 bv=10)
+
+.model diod2 d(tt=0.5ns vj=0.3 rs=100 bv=10)
+
+.options acct reltol=1e-3 abstol=1e-12
+.control
+tran 0.1ns 60ns
+plot v(2) v(4) v(5)
+.endc
+
+* bjt driver - 19=input, 268=output, 20=vcc; wierd node numbers from 
+* the Raytheon file
+
+.subckt bjtdrvr 19 268 20
+q1 22 18 13 qmodn
+q2 18 16 13 qmodn
+qd2 21 9 0 qmodn
+q4 14 14 0 qmodn
+q3 16 15 14 qmodpd
+q5 8 13 17 qmodn
+q6 25 12 0 qmodn
+q7 6 17 0 qmodpd
+qd1 26 10 0 qmodn
+q8 7 11 10 qmodn
+*q10 268 17 0 qmodpd
+q10 268 17 0 qmodpdmine
+q9 7 10 268 qmodn
+
+d1 0 19 dmod1
+d2 18 19 dmod2
+d3 13 19 dmod
+dq1 18 22 dmod
+dq2 16 18 dmod
+d502 9 21 dmod
+dq3 15 16 dmod
+d10 24 8 dmod
+d4 15 6 dmod
+dq6 12 25 dmod
+dq7 17 6 dmod
+dd1 17 10 dmod
+d7 11 6 dmod
+dd2 17 26 dmod
+d9 23 6 dmod
+dq8 11 7 dmod
+d501 17 268 dmod
+dq9 10 7 dmod
+d14 20 27 dmod
+d8 0 268 dmod
+
+r1 18 20 6k
+r2 22 20 2.2k
+r4 0 13 7k
+rd1 9 13 2k
+rd2 21 13 3k
+r3 16 20 10k
+r5 15 20 15k
+r9 0 17 4k
+r6 24 20 750
+r10 12 17 2k
+r12 24 11 1.5k
+r11 25 17 3k
+r15 23 20 10k
+r13 0 10 15k
+r14 7 27 12
+
+.ends bjtdrvr
+
+* subckt dioload - diode load: input=28, output=4, vcc=5
+
+.subckt dioload 28
+*comment out everything in dioload except d5 and r503, and watch
+* the difference in results obtained between a tran 0.1ns 20ns and
+* a tran 0.01ns 20ns
+vccint 5 0 5v
+
+c1 28 0 5pF
+r503 0 4 5.55
+r4 0 28 120k
+r5 1 5 7.5k
+
+d5 4 28 diod2
+d1 1 28 diod1
+d4 2 0 diod1
+d3 3 2 diod1
+d2 1 3 diod1
+.ends dioload
+
+* subckt rlclump - one RLC lump of the lossy line
+
+.subckt rlclump 1 2
+*r1 1 3 0.02
+*c1 3 0 0.365pF
+*l1 3 2 0.913nH
+
+l1 1 3 0.913nH
+c1 2 0 0.365pF
+r1 3 2 0.02
+
+*r1 1 3 0.01
+*c1 3 0 0.1825pF
+*l1 3 4 0.4565nH
+*r2 4 5 0.01
+*c2 5 0 0.1825pF
+*l2 5 2 0.4565nH
+
+*c1 1 0 0.365pF
+*l1 1 2 0.913nH
+.ends lump
+
+.subckt rlconeinch 1 2
+x1 1 3 rlclump
+x2 3 4 rlclump
+x3 4 5 rlclump
+x4 5 6 rlclump
+x5 6 7 rlclump
+x6 7 8 rlclump
+x7 8 9 rlclump
+x8 9 10 rlclump
+x9 10 11 rlclump
+x10 11 2 rlclump
+.ends rlconeinch
+
+.subckt rlctwoinch 1 2
+x1 1 3 rlconeinch
+x2 3 2 rlconeinch
+.ends rlctwoinch
+
+.subckt rlcfourinch 1 2
+x1 1 3 rlconeinch
+x2 3 4 rlconeinch
+x3 4 5 rlconeinch
+x4 5 2 rlconeinch
+.ends rlcfourinch
+
+.subckt rlcfiveinch 1 2
+x1 1 3 rlconeinch
+x2 3 4 rlconeinch
+x3 4 5 rlconeinch
+x4 5 6 rlconeinch
+x5 6 2 rlconeinch
+.ends rlcfiveinch
+
+.subckt rlctwentyrlcfourinch 1 2
+x1 1 3 rlcfiveinch
+x2 3 4 rlcfiveinch
+x3 4 5 rlcfiveinch
+x4 5 6 rlcfiveinch
+x5 6 2 rlcfourinch
+.ends rlctwentyrlcfourinch
+
+.subckt rlclumpstub A B C D
+x1 A int1 rlcfiveinch
+x2 int1 int2 rlcfiveinch
+x3 int2 1 rlcfiveinch
+x4 1 2 rlcfourinch
+x5 1 int3 rlcfiveinch
+x6 int3 B rlconeinch
+x7 2 C rlcfiveinch
+x8 2 D rlcfourinch
+.ends rlclumpstub
+
+.subckt ltrastub A B C D
+o1 A 0 1 0 lline15in
+o2 1 0 B 0 lline6in
+o3 1 0 2 0 lline4in
+o4 2 0 C 0 lline5in
+o5 2 0 D 0 lline4in
+.ends ltrastub
+
+*modelling using R and lossless lines
+
+*5 segments per inch
+.model llfifth ltra nocontrol rel=10 r=0 g=0 l=9.13e-9
++c=3.65e-12 len=0.2 steplimit quadinterp
+
+.subckt xlump 1 2 
+o1 1 0 3 0 llfifth
+r1 2 3 0.04
+.ends xlump
+
+.subckt xoneinch 1 2
+x1 1 3 xlump
+x2 3 4 xlump
+x3 4 5 xlump
+x4 5 6 xlump
+x5 6 2 xlump
+*x5 6 7 xlump
+*x6 7 8 xlump
+*x7 8 9 xlump
+*x8 9 10 xlump
+*x9 10 11 xlump
+*x10 11 2 xlump
+.ends xoneinch
+
+.subckt xFourinch 1 2
+x1 1 3 xoneinch
+x2 3 4 xoneinch
+x3 4 5 xoneinch
+x4 5 2 xoneinch
+.ends xfourinch
+
+.subckt xfiveinch 1 2
+x1 1 3 xoneinch
+x2 3 4 xoneinch
+x3 4 5 xoneinch
+x4 5 6 xoneinch
+x5 6 2 xoneinch
+.ends xfiveinch
+
+.subckt xlumpstub A B C D
+x1 A int1 xfiveinch
+x2 int1 int2 xfiveinch
+x3 int2 1 xfiveinch
+x4 1 2 xfourinch
+x5 1 int3 xfiveinch
+x6 int3 B xoneinch
+x7 2 C xfiveinch
+x8 2 D xfourinch
+.ends xlumpstub
+
+* modelling a 2 wire coupled system using RLC lumps
+* 10 segments per inch
+*
+* 1---xxxxx----2
+* 3---xxxxx----4
+
+.subckt rlc2wlump 1 3 2 4
+l1 1 5 0.913nH
+c1 2 0 0.365pF
+r1 5 2 0.02
+l2 3 6 0.913nH
+c2 4 0 0.365pF
+r2 6 4 0.02
+cmut 2 4 0.18pF
+k12 l1 l2 0.482
+.ends rlc2wlump
+
+.subckt rlc2woneinch 1 2 3 4
+x1 1 2 5 6 rlc2wlump
+x2 5 6 7 8  rlc2wlump
+x3 7 8 9 10 rlc2wlump
+x4 9 10 11 12 rlc2wlump
+x5 11 12 13 14 rlc2wlump
+x6 13 14 15 16 rlc2wlump
+x7 15 16 17 18 rlc2wlump
+x8 17 18 19 20 rlc2wlump
+x9 19 20 21 22 rlc2wlump
+x10 21 22 3 4 rlc2wlump
+.ends rlc2woneinch
+
+.subckt rlc2wfiveinch 1 2 3 4
+x1 1 2 5 6 rlc2woneinch
+x2 5 6 7 8 rlc2woneinch
+x3 7 8 9 10 rlc2woneinch
+x4 9 10 11 12 rlc2woneinch
+x5 11 12 3 4 rlc2woneinch
+.ends rlc2wfiveinch
+
+.subckt rlc2wtwentyinch 1 2 3 4
+x1 1 2 5 6 rlc2wfiveinch
+x2 5 6 7 8 rlc2wfiveinch
+x3 7 8 9 10 rlc2wfiveinch
+x4 9 10 3 4 rlc2wfiveinch
+.ends rlc2wtwentyinch
+
+.subckt rlc2wetcmodel 1 2 3 4
+x1 1 5 rlctwoinch
+x2 5 2 6 4 rlc2wtwentyinch
+x3 6 3 rlctwoinch
+.ends rlc2wetcmodel
+
+* Subcircuit conv2wtwentyinch
+* conv2wtwentyinch is a subcircuit that models a 2-conductor transmission line with
+* the following parameters: l=9.13e-09, c=3.65e-12, r=0.2, g=0,
+* inductive_coeff_of_coupling k=0.482, inter-line capacitance cm=1.8e-12,
+* length=20. Derived parameters are: lm=4.40066e-09, ctot=5.45e-12.
+* 
+* It is important to note that the model is a simplified one - the
+* following assumptions are made: 1. The self-inductance l, the
+* self-capacitance ctot (note: not c), the series resistance r and the
+* parallel capacitance g are the same for all lines, and 2. Each line
+* is coupled only to the two lines adjacent to it, with the same
+* coupling parameters cm and lm. The first assumption imply that edge
+* effects have to be neglected. The utility of these assumptions is
+* that they make the sL+R and sC+G matrices symmetric, tridiagonal and
+* Toeplitz, with useful consequences.
+* 
+* It may be noted that a symmetric two-conductor line will be
+* accurately represented by this model.
+
+* Lossy line models
+.model mod1_conv2wtwentyinch ltra rel=1.2 nocontrol r=0.2 l=4.72933999088e-09 g=0 c=7.25000000373e-12 len=20
+.model mod2_conv2wtwentyinch ltra rel=1.2 nocontrol r=0.2 l=1.35306599818e-08 g=0 c=3.65000000746e-12 len=20
+
+* subcircuit m_conv2wtwentyinch - modal transformation network for conv2wtwentyinch
+.subckt m_conv2wtwentyinch 1 2 3 4
+v1 5 0 0v
+v2 6 0 0v
+f1 0 3 v1 0.707106779721
+f2 0 3 v2 -0.707106782652
+f3 0 4 v1 0.707106781919
+f4 0 4 v2 0.707106780454
+e1 7 5 3 0 0.707106780454
+e2 1 7 4 0 0.707106782652
+e3 8 6 3 0 -0.707106781919
+e4 2 8 4 0 0.707106779721
+.ends m_conv2wtwentyinch
+
+* Subckt conv2wtwentyinch
+.subckt conv2wtwentyinch 1 2 3 4
+x1 1 2 5 6 m_conv2wtwentyinch
+o1 5 0 7 0 mod1_conv2wtwentyinch
+o2 6 0 8 0 mod2_conv2wtwentyinch
+x2 3 4 7 8 m_conv2wtwentyinch
+.ends conv2wtwentyinch
+
+.model convtwoinch ltra r=0.2 l=9.13e-9 c=3.65e-12 len=2.0 rel=1.2 nocontrol
+.subckt conv2wetcmodel 1 2 3 4
+o1 1 0 5 0 convtwoinch
+x1 5 2 6 4 conv2wtwentyinch
+o2 6 0 3 0 convtwoinch
+.ends conv2wetcmodel
+
+.end

paranoia_parallel/examples/TransmissionLines/ltra7_4_line.sp

@@ -0,0 +1,113 @@
+6.3inch 4 lossy lines LTRA model -- R load 
+
+Ra    1    2                       1K
+Rb    0    3                       1K
+Rc    0    4                       1K
+Rd    0    5                       1K
+Re    6    0                       1Meg
+Rf    7    0                       1Meg
+Rg    8    0                       1Meg
+Rh    9    0                       1Meg
+
+
+*
+* Subcircuit test
+* test is a subcircuit that models a 4-conductor transmission line with
+* the following parameters: l=9e-09, c=2.9e-13, r=0.3, g=0,
+* inductive_coeff_of_coupling k=0.6, inter-line capacitance cm=3e-14,
+* length=6.3. Derived parameters are: lm=5.4e-09, ctot=3.5e-13.
+* 
+* It is important to note that the model is a simplified one - the
+* following assumptions are made: 1. The self-inductance l, the
+* self-capacitance ctot (note: not c), the series resistance r and the
+* parallel capacitance g are the same for all lines, and 2. Each line
+* is coupled only to the two lines adjacent to it, with the same
+* coupling parameters cm and lm. The first assumption implies that edge
+* effects have to be neglected. The utility of these assumptions is
+* that they make the sL+R and sC+G matrices symmetric, tridiagonal and
+* Toeplitz, with useful consequences (see "Efficient Transient
+* Simulation of Lossy Interconnect", by J.S.  Roychowdhury and
+* D.O Pederson, Proc. DAC 91).
+
+* It may be noted that a symmetric two-conductor line is
+* represented accurately by this model.
+
+* Subckt node convention:
+* 
+*            |--------------------------|
+*      1-----|                          |-----n+1
+*      2-----|                          |-----n+2
+*         :  |   n-wire multiconductor  |  :
+*         :  |          line            |  :
+*    n-1-----|(node 0=common gnd plane) |-----2n-1
+*      n-----|                          |-----2n
+*            |--------------------------|
+
+
+* Lossy line models
+.model mod1_test ltra rel=1.2 nocontrol r=0.3 l=2.62616456193e-10 g=0 c=3.98541019688e-13 len=6.3
+.model mod2_test ltra rel=1.2 nocontrol r=0.3 l=5.662616446e-09 g=0 c=3.68541019744e-13 len=6.3
+.model mod3_test ltra rel=1.2 nocontrol r=0.3 l=1.23373835171e-08 g=0 c=3.3145898046e-13 len=6.3
+.model mod4_test ltra rel=1.2 nocontrol r=0.3 l=1.7737383521e-08 g=0 c=3.01458980439e-13 len=6.3
+
+* subcircuit m_test - modal transformation network for test
+.subckt m_test 1 2 3 4 5 6 7 8
+v1 9 0 0v
+v2 10 0 0v
+v3 11 0 0v
+v4 12 0 0v
+f1 0 5 v1 0.371748033738
+f2 0 5 v2 -0.601500954587
+f3 0 5 v3 0.601500954587
+f4 0 5 v4 -0.371748036544
+f5 0 6 v1 0.60150095443
+f6 0 6 v2 -0.371748035044
+f7 0 6 v3 -0.371748030937
+f8 0 6 v4 0.601500957402
+f9 0 7 v1 0.601500954079
+f10 0 7 v2 0.37174803072
+f11 0 7 v3 -0.371748038935
+f12 0 7 v4 -0.601500955482
+f13 0 8 v1 0.371748035626
+f14 0 8 v2 0.601500956073
+f15 0 8 v3 0.601500954504
+f16 0 8 v4 0.371748032386
+e1 13 9 5 0 0.371748033909
+e2 14 13 6 0 0.601500954587
+e3 15 14 7 0 0.601500955639
+e4 1 15 8 0 0.371748036664
+e5 16 10 5 0 -0.60150095443
+e6 17 16 6 0 -0.371748035843
+e7 18 17 7 0 0.371748032386
+e8 2 18 8 0 0.601500957319
+e9 19 11 5 0 0.601500955131
+e10 20 19 6 0 -0.371748032169
+e11 21 20 7 0 -0.371748037896
+e12 3 21 8 0 0.601500954513
+e13 22 12 5 0 -0.371748035746
+e14 23 22 6 0 0.60150095599
+e15 24 23 7 0 -0.601500953534
+e16 4 24 8 0 0.371748029317
+.ends m_test
+
+* Subckt test
+.subckt test 1 2 3 4 5 6 7 8
+x1 1 2 3 4 9 10 11 12 m_test
+o1 9 0 13 0 mod1_test
+o2 10 0 14 0 mod2_test
+o3 11 0 15 0 mod3_test
+o4 12 0 16 0 mod4_test
+x2 5 6 7 8 13 14 15 16 m_test
+.ends test
+*
+x1  2 3 4 5    6 7 8 9 test
+*
+*
+VS1   1    0   PWL(15.9NS 0.0 16.1Ns 5.0 31.9Ns 5.0 32.1Ns 0.0)
+
+.control
+TRAN   0.2NS  50NS 
+plot v(1) v(2) v(6) v(7) v(8) v(9)
+.endc
+*
+.END

paranoia_parallel/examples/TransmissionLines/txl1_1_line.sp

@@ -0,0 +1,18 @@
+MOSdriver -- lossy line TXL model -- C load 
+m5     0     168    2     0  mn0p9  w = 18.0u l=0.9u
+m6     1     168    2     1  mp1p0  w = 36.0u l=1.0u
+CN2  2   0  0.025398e-12
+CN3  3   0  0.007398e-12
+y1  2 0 3 0 ymod
+vdd    1    0   dc 	5.0
+VS 168  0  PULSE (0 5 15.9NS 0.2NS 0.2NS 15.8NS 32NS )
+.control
+TRAN 0.2N 47N 0 0.1N
+plot v(2) v(3) ylimit -0.5 5
+.endc
+.MODEL mn0p9 NMOS VTO=0.8 KP=48U GAMMA=0.30 PHI=0.55
++LAMBDA=0.00 CGSO=0 CGDO=0 CJ=0 CJSW=0 TOX=18000N LD=0.0U
+.MODEL mp1p0 PMOS VTO=-0.8 KP=21U GAMMA=0.45 PHI=0.61
++LAMBDA=0.00 CGSO=0 CGDO=0 CJ=0 CJSW=0 TOX=18000N LD=0.0U
+.MODEL ymod txl R=12.45 L=8.972e-9 G=0 C=0.468e-12 length=16
+.end

paranoia_parallel/examples/TransmissionLines/txl2_3_line.sp

@@ -0,0 +1,26 @@
+MOSdriver -- 3 lossy lines TXL model -- C load 
+m5     0     168    2     0  mn0p9  w = 18.0u l=0.9u
+m6     1     168    2     1  mp1p0  w = 36.0u l=1.0u
+m1     0     3    4     0  mn0p9  w = 18.0u l=0.9u
+m2     1     3    4     1  mp1p0  w = 36.0u l=1.0u
+CN2  2   0  0.025398e-12
+CN3  3   0  0.007398e-12
+CN4  4	 0  0.025398e-12
+CN5  5   0  0.007398e-12
+CN6  6   0  0.007398e-12
+CN7  168   0  0.007398e-12
+y1  2 0 3 0  ymod
+y2  4  0 5  0 ymod
+y3  6 0 168 0  ymod
+vdd    1    0   dc 	5.0
+VS 168  0  PULSE (0 5 15.9NS 0.2NS 0.2NS 15.8NS 32NS )
+.control
+TRAN 0.2N 47N 0 0.1N
+plot v(2) v(3) v(4) v(5) v(6)
+.endc
+.MODEL mn0p9 NMOS VTO=0.8 KP=48U GAMMA=0.30 PHI=0.55
++LAMBDA=0.00 CGSO=0 CGDO=0 CJ=0 CJSW=0 TOX=18000N LD=0.0U
+.MODEL mp1p0 PMOS VTO=-0.8 KP=21U GAMMA=0.45 PHI=0.61
++LAMBDA=0.00 CGSO=0 CGDO=0 CJ=0 CJSW=0 TOX=18000N LD=0.0U
+.MODEL ymod txl R=12.45 L=8.972e-9 G=0 C=0.468e-12 length=16
+.end

paranoia_parallel/examples/TransmissionLines/txl3_1_line.sp

@@ -0,0 +1,236 @@
+   BJTdriver -- 24inch lossy line TXL model -- DiodeCircuit
+
+* This unclassified circuit is from Raytheon, courtesy Gerry Marino.
+* It consists of a BJT driver connected by a 24 inch lossy line to a
+* passive load consisting mostly of diodes. Each inch 
+* of the lossy line is modelled by 10 LRC lumps in the Raytheon
+* model.
+
+* The line parameters (derived from the Raytheon input file) are:
+* L = 9.13nH per inch
+* C = 3.65pF per inch
+* R = 0.2 ohms per inch
+
+* the circuit
+v1 1 0 0v pulse(0 4 1ns 1ns 1ns 20ns 40ns)
+vcc 10 0 5v
+*rseries 1 2 5
+x1 1 2 10 bjtdrvr
+*t1 2 0 3 0 z0=50.0136 td=4.38119ns rel=10
+y2 2 0 3 0 ymod1
+*x2 2 3 oneinch
+*x2 100 101 twentyfourinch
+*x2 100 101 xtwentyfourinch
+vtest1 2 100 0
+vtest2 101 3 0
+x3 3 4 10 dioload
+*rl 3 0 5
+*dl 0 3 diod2
+
+.model ymod1 txl r=0.2 g=0 l=9.13e-9 c=3.65e-12 length=24 
+
+.model qmodn npn(bf=100 rb=100 cje=0.09375pF cjc=0.28125pF is=1e-12
++pe=0.5 pc=0.5)
+
+.model qmodpd npn(bf=100 rb=100 cje=0.08187pF cjc=0.2525pF is=1e-12
++pe=0.5 pc=0.5)
+.model qmodpdmine npn(bf=100 rb=100  cje=0.08187pF cjc=0.05pF is=1e-12
++pe=0.5 pc=0.5)
+
+.model dmod1 d(n=2.25 is=1.6399e-4 bv=10)
+
+.model dmod2 d
+
+.model dmod d(vj=0.3v)
+
+.model diod1 d(tt=0.75ns vj=0.6 rs=909 bv=10)
+
+.model diod2 d(tt=0.5ns vj=0.3 rs=100 bv=10)
+
+.options acct
++reltol=1e-3 abstol=1e-14
+.control
+tran 0.1ns 60ns 0 0.5ns
+plot v(1) v(2) v(3)
+.endc
+
+* bjt driver - 19=input, 268=output, 20=vcc; wierd node numbers from 
+* the Raytheon file
+
+.subckt bjtdrvr 19 268 20
+q1 22 18 13 qmodn
+q2 18 16 13 qmodn
+qd2 21 9 0 qmodn
+q4 14 14 0 qmodn
+q3 16 15 14 qmodpd
+q5 8 13 17 qmodn
+q6 25 12 0 qmodn
+q7 6 17 0 qmodpd
+qd1 26 10 0 qmodn
+q8 7 11 10 qmodn
+q10 268 17 0 qmodpdmine
+*q10 268 17 0 qmodpd
+q9 7 10 268 qmodn
+
+d1 0 19 dmod1
+d2 18 19 dmod2
+d3 13 19 dmod
+dq1 18 22 dmod
+dq2 16 18 dmod
+d502 9 21 dmod
+dq3 15 16 dmod
+d10 24 8 dmod
+d4 15 6 dmod
+dq6 12 25 dmod
+dq7 17 6 dmod
+dd1 17 10 dmod
+d7 11 6 dmod
+dd2 17 26 dmod
+d9 23 6 dmod
+dq8 11 7 dmod
+d501 17 268 dmod
+dq9 10 7 dmod
+d14 20 27 dmod
+d8 0 268 dmod
+
+r1 18 20 6k
+r2 22 20 2.2k
+r4 0 13 7k
+rd1 9 13 2k
+rd2 21 13 3k
+r3 16 20 10k
+r5 15 20 15k
+r9 0 17 4k
+r6 24 20 750
+r10 12 17 2k
+r12 24 11 1.5k
+r11 25 17 3k
+r15 23 20 10k
+r13 0 10 15k
+r14 7 27 12
+
+.ends bjtdrvr
+
+* subckt dioload - diode load: input=28, output=4, vcc=5
+
+.subckt dioload 28 4 5
+*comment out everything in dioload except d5 and r503, and watch
+* the difference in results obtained between a tran 0.1ns 20ns and
+* a tran 0.01ns 20ns
+c1 28 0 5pF
+r503 0 4 5.55
+r4 0 28 120k
+r5 1 5 7.5k
+
+d5 4 28 diod2
+d1 1 28 diod1
+d4 2 0 diod1
+d3 3 2 diod1
+d2 1 3 diod1
+.ends dioload
+
+* subckt lump - one RLC lump of the lossy line
+
+*10 segments per inch
+.subckt lump 1 2
+*r1 1 3 0.02
+*c1 3 0 0.365pF
+*l1 3 2 0.913nH
+
+l1 1 3 0.913nH
+c1 2 0 0.365pF
+r1 3 2 0.02
+
+*r1 1 3 0.01
+*c1 3 0 0.1825pF
+*l1 3 4 0.4565nH
+*r2 4 5 0.01
+*c2 5 0 0.1825pF
+*l2 5 2 0.4565nH
+
+*c1 1 0 0.365pF
+*l1 1 2 0.913nH
+.ends lump
+
+.subckt oneinch 1 2
+x1 1 3 lump
+x2 3 4 lump
+x3 4 5 lump
+x4 5 6 lump
+x5 6 7 lump
+x6 7 8 lump
+x7 8 9 lump
+x8 9 10 lump
+x9 10 11 lump
+x10 11 2 lump
+.ends oneinch
+
+.subckt fourinch 1 2
+x1 1 3 oneinch
+x2 3 4 oneinch
+x3 4 5 oneinch
+x4 5 2 oneinch
+.ends fourinch
+
+.subckt fiveinch 1 2
+x1 1 3 oneinch
+x2 3 4 oneinch
+x3 4 5 oneinch
+x4 5 6 oneinch
+x5 6 2 oneinch
+.ends fiveinch
+
+.subckt twentyfourinch 1 2
+x1 1 3 fiveinch
+x2 3 4 fiveinch
+x3 4 5 fiveinch
+x4 5 6 fiveinch
+x5 6 2 fourinch
+.ends twentyfourinch
+
+*modelling using R and lossless lines
+*5 segments per inch
+.model ymod2 txl r=0 g=0 l=9.13e-9 c=3.65e-12 length=0.2 
+.subckt xlump 1 2 
+y1 1 0 3 0 ymod2
+r1 2 3 0.04
+.ends xlump
+
+.subckt xoneinch 1 2
+x1 1 3 xlump
+x2 3 4 xlump
+x3 4 5 xlump
+x4 5 6 xlump
+x5 6 2 xlump
+*x5 6 7 xlump
+*x6 7 8 xlump
+*x7 8 9 xlump
+*x8 9 10 xlump
+*x9 10 11 xlump
+*x10 11 2 xlump
+.ends xoneinch
+
+.subckt xfourinch 1 2
+x1 1 3 xoneinch
+x2 3 4 xoneinch
+x3 4 5 xoneinch
+x4 5 2 xoneinch
+.ends xfourinch
+
+.subckt xfiveinch 1 2
+x1 1 3 xoneinch
+x2 3 4 xoneinch
+x3 4 5 xoneinch
+x4 5 6 xoneinch
+x5 6 2 xoneinch
+.ends xfiveinch
+
+.subckt xtwentyfourinch 1 2
+x1 1 3 xfiveinch
+x2 3 4 xfiveinch
+x3 4 5 xfiveinch
+x4 5 6 xfiveinch
+x5 6 2 xfourinch
+.ends xtwentyfourinch
+
+.end

paranoia_parallel/examples/TransmissionLines/txl4_1_line.sp

@@ -0,0 +1,523 @@
+ 	Example 3 for interconnect simulation
+
+* From neug1, Mosaic aluminum lines. 2um thick, 11um wide. Assuming
+* 10um above the ground.
+* Material: aluminum; resistivity (sigma) = 2.74uohm-cm = 2.74e-8 ohm-m 
+* Dielectric: SiO2, dielectric constant (epsilon) =3.7 
+* epsilon0 = 8.85e-12 MKS units
+* mu0 = 4e-7*PI
+* speed of light in free space = 1/sqrt(mu0*epsilon0) = 2.9986e8 MKS units
+*
+*  Line parameter calculations:
+*  capacitance: parallel plate
+*  C = epsilon*epsilon0 * A / l
+*  C = 3.7*8.85e-12 * 11e-6 * 1(metre) / 10e-6 = 36.02e-12 F/m
+*    + 30% = 46.8e-12 F/m = 0.468pF/cm
+*
+*  C_freespace = 46.8e-12/epsilon = 12.65e-12 F/m
+*  speed of light in free space v0 = 2.9986e8 = 1/sqrt(L0*C0)
+*  => L0 = 1/C0*v0^2
+*  L0 = 1/(12.65e-12 * 8.9916e16) = 1/113.74e4 = 0.008792e-4 H/m
+*    = 0.8792 uH/m = 8.792nH/cm
+*  
+*  R = rho * l / A = 2.74e-8 * 1 / (11e-6*2e-6) = 1245.45 ohms/m
+*    = 12.45ohms/cm
+*
+*  transmission line parameters:
+*  	nominal z0 = sqrt(L/C) = 137 ohms
+*	td = sqrt(LC) = 64.14e-12 secs/cm = 0.064ns/cm
+*
+*
+
+
+vcc vcc 0 5
+v1 1 0 0v pulse(0 5 0.1ns 0.1ns 0.1ns 1ns 100ns)
+rs 1 2 10
+xdrv 1 2 vcc bjtdrvr
+xrcv 3 4 vcc bjtdrvr
+xrcv 3 4 vcc dioload
+d1 3 vcc diod
+d2 0 3 diod
+cl 3 0 1pF
+y1 2 0 3 0 yline
+*x1 2 3 sixteencm
+x1 2 3 xonecm
+
+.model diod d
+.model yline txl r=12.45 g=0 l=8.792e-9 c=0.468e-12 length=16 
+
+.control
+* 1cm
+* 2cm
+* 4cm
+* 6cm
+* 8cm
+* 10cm
+* 12cm
+*tran 0.001ns 15ns 0 0.1ns
+* 24cm
+tran 0.001ns 10ns 0 0.1ns
+* onecm10
+*tran 0.001ns 10ns 0 0.01ns
+plot v(1) v(2) v(3)
+.endc
+
+
+* 1. define the subckt r10 to be one tenth of the resistance per cm.
+* 2. define the subckt onecm to be one of onecm10 (modelled using
+* 10 segments), onecm8, onecm4, onecm2 and lump1. Then use
+* the subckts onecm, fourcm, fivecm, tencm, twelvecm,
+* twentyfourcm in the circuit. The line is modelled as rlc segments.
+* 3. define the subckt xonecm to be one of xonecm10, xonecm8,
+* xonecm4, xonecm2 and xlump1. Use the subckts xonecm,
+* xfourcm, xfivecm, xtencm, xtwelvecm, xtwentyfourcm in the
+* circuit. The line will be modelled as r-lossless lumps.
+
+.subckt xonecm 1 2
+*x1 1 2 xlump1
+x1 1 2 xonecm4
+.ends xonecm
+
+.subckt onecm 1 2
+*x1 1 2 lump1
+x1 1 2 onecm4
+.ends onecm
+
+.subckt r10 1 2
+r1 1 2 1.245
+.ends r10
+
+* ECL driver and diode receiver models - from Raytheon
+
+.model qmodn npn(bf=100 rb=100 cje=0.09375pF cjc=0.28125pF is=1e-12
++pe=0.5 pc=0.5)
+
+.model qmodpd npn(bf=100 rb=100 cje=0.08187pF cjc=0.2525pF is=1e-12
++pe=0.5 pc=0.5)
+.model qmodpdmine npn(bf=100 rb=100  cje=0.08187pF cjc=0.05pF is=1e-12
++pe=0.5 pc=0.5)
+
+.model dmod1 d(n=2.25 is=1.6399e-4 bv=10)
+
+.model dmod2 d
+
+.model dmod d(vj=0.3v)
+
+.model diod1 d(tt=0.75ns vj=0.6 rs=909 bv=10)
+
+.model diod2 d(tt=0.5ns vj=0.3 rs=100 bv=10)
+
+* bjt driver - 19=input, 268=output, 20=vcc; wierd node numbers from 
+* the Raytheon file
+
+.subckt bjtdrvr 19 268 20
+q1 22 18 13 qmodn
+q2 18 16 13 qmodn
+qd2 21 9 0 qmodn
+q4 14 14 0 qmodn
+q3 16 15 14 qmodpd
+q5 8 13 17 qmodn
+q6 25 12 0 qmodn
+q7 6 17 0 qmodpd
+qd1 26 10 0 qmodn
+q8 7 11 10 qmodn
+q10 268 17 0 qmodpdmine
+*q10 268 17 0 qmodpd
+q9 7 10 268 qmodn
+
+d1 0 19 dmod1
+d2 18 19 dmod2
+d3 13 19 dmod
+dq1 18 22 dmod
+dq2 16 18 dmod
+d502 9 21 dmod
+dq3 15 16 dmod
+d10 24 8 dmod
+d4 15 6 dmod
+dq6 12 25 dmod
+dq7 17 6 dmod
+dd1 17 10 dmod
+d7 11 6 dmod
+dd2 17 26 dmod
+d9 23 6 dmod
+dq8 11 7 dmod
+d501 17 268 dmod
+dq9 10 7 dmod
+d14 20 27 dmod
+d8 0 268 dmod
+
+r1 18 20 6k
+r2 22 20 2.2k
+r4 0 13 7k
+rd1 9 13 2k
+rd2 21 13 3k
+r3 16 20 10k
+r5 15 20 15k
+r9 0 17 4k
+r6 24 20 750
+r10 12 17 2k
+r12 24 11 1.5k
+r11 25 17 3k
+r15 23 20 10k
+r13 0 10 15k
+r14 7 27 12
+
+.ends bjtdrvr
+
+* subckt dioload - diode load: input=28, output=4, vcc=5
+
+.subckt dioload 28 4 5
+c1 28 0 5pF
+r503 0 4 5.55
+r400 0 28 120k
+r500 1 5 7.5k
+
+d5 4 28 diod2
+d1 1 28 diod1
+d4 2 0 diod1
+d3 3 2 diod1
+d2 1 3 diod1
+.ends dioload
+
+* End ECL driver and Diode receiver models from Raytheon
+
+*10 segments per cm
+.subckt lump10 1 2
+l1 1 3 0.0.8792nH
+c1 2 0 0.0468pF
+x1 3 2 r10
+.ends lump10
+
+*1 segment per cm
+.subckt lump1 1 2
+l1 1 3 8.792nH
+c1 2 0 0.468pF
+x1 3 4 r10
+x2 4 5 r10
+x3 5 6 r10
+x4 6 7 r10
+x5 7 8 r10
+x6 8 9 r10
+x7 9 10 r10
+x8 10 11 r10
+x9 11 12 r10
+x10 12 2 r10
+.ends lump1
+
+*2 segments per cm
+.subckt lump2 1 2
+l1 1 3 4.396nH
+c1 2 0 0.234pF
+x1 3 4 r10
+x2 4 5 r10
+x3 5 6 r10
+x4 6 7 r10
+x5 7 2 r10
+.ends lump2
+
+*4 segments per cm
+.subckt lump4 1 2
+l1 1 3 2.198nH
+c1 2 0 0.117pF
+x1 3 4 r10
+x2 4 5 r10
+x3 5 2 r10
+x4 5 2 r10
+.ends lump4
+
+*8 segments per cm
+.subckt lump8 1 2
+l1 1 3 1.099nH
+c1 2 0 0.0585pF
+x1 3 4 r10
+x2 4 2 r10
+x3 4 2 r10
+x4 4 2 r10
+x5 4 2 r10
+.ends lump8
+
+.subckt onecm10 1 2
+x1 1 3 lump10
+x2 3 4 lump10
+x3 4 5 lump10
+x4 5 6 lump10
+x5 6 7 lump10
+x6 7 8 lump10
+x7 8 9 lump10
+x8 9 10 lump10
+x9 10 11 lump10
+x10 11 2 lump10
+.ends onecm10
+
+.subckt onecm8 1 2
+x1 1 3 lump8
+x2 3 4 lump8
+x3 4 5 lump8
+x4 5 6 lump8
+x5 6 7 lump8
+x6 7 8 lump8
+x7 8 9 lump8
+x8 9 2 lump8
+.ends onecm8
+
+.subckt onecm4 1 2
+x1 1 3 lump4
+x2 3 4 lump4
+x3 4 5 lump4
+x4 5 2 lump4
+.ends onecm4
+
+.subckt onecm2 1 2
+x1 1 3 lump2
+x2 3 2 lump2
+.ends onecm2
+
+.subckt twocm 1 2
+x1 1 3 onecm
+x2 3 2 onecm
+.ends twocm
+
+.subckt threecm 1 2
+x1 1 3 onecm
+x2 3 4 onecm
+x3 4 2 onecm
+.ends threecm
+
+.subckt fourcm 1 2
+x1 1 3 onecm
+x2 3 4 onecm
+x3 4 5 onecm
+x4 5 2 onecm
+.ends fourcm
+
+.subckt fivecm 1 2
+x1 1 3 onecm
+x2 3 4 onecm
+x3 4 5 onecm
+x4 5 6 onecm
+x5 6 2 onecm
+.ends fivecm
+
+.subckt sixcm 1 2
+x1 1 3 fivecm
+x2 3 2 onecm
+.ends sixcm
+
+.subckt sevencm 1 2
+x1 1 3 sixcm
+x2 3 2 onecm
+.ends sevencm
+
+.subckt eightcm 1 2
+x1 1 3 sevencm
+x2 3 2 onecm
+.ends eightcm
+
+.subckt ninecm 1 2
+x1 1 3 eightcm
+x2 3 2 onecm
+.ends ninecm
+
+.subckt tencm 1 2
+x1 1 3 fivecm
+x2 3 2 fivecm
+.ends tencm
+
+.subckt elevencm 1 2
+x1 1 3 tencm
+x2 3 2 onecm
+.ends elevencm
+
+.subckt twelvecm 1 2
+x1 1 3 tencm
+x2 3 4 onecm
+x3 4 2 onecm
+.ends twelvecm
+
+.subckt sixteencm 1 2
+x1 1 3 eightcm
+x2 3 2 eightcm
+.ends sixteencm
+
+.subckt twentyfourcm 1 2
+x1 1 3 twelvecm
+x2 3 2 twelvecm
+.ends twentyfourcm
+
+
+*modelling using R and lossless lines
+* 10 segments per cm
+.model yless10 txl r=0 g=0 l=8.792e-9 c=0.468e-12 length=0.1 
+
+* 8 segments per cm
+.model yless8 txl r=0 g=0 l=8.792e-9 c=0.468e-12 length=0.125 
+
+* 4 segments per cm
+.model yless4 txl r=0 g=0 l=8.792e-9 c=0.468e-12 length=0.25 
+
+* 2 segments per cm
+.model yless2 txl r=0 g=0 l=8.792e-9 c=0.468e-12 length=0.5 
+
+* 1 segment per cm
+.model yless1 txl r=0 g=0 l=8.792e-9 c=0.468e-12 length=1 
+
+*10 segments per cm
+.subckt xlump10 1 2
+y1 1  0 3  0 yless10
+x1 3 2 r10
+.ends xlump10
+
+*1 segment per cm
+.subckt xlump1 1 2
+y1 1  0 3  0 yless1
+x1 3 4 r10
+x2 4 5 r10
+x3 5 6 r10
+x4 6 7 r10
+x5 7 8 r10
+x6 8 9 r10
+x7 9 10 r10
+x8 10 11 r10
+x9 11 12 r10
+x10 12 2 r10
+.ends xlump1
+
+*2 segments per cm
+.subckt xlump2 1 2
+y1 1  0 3  0 yless2
+x1 3 4 r10
+x2 4 5 r10
+x3 5 6 r10
+x4 6 7 r10
+x5 7 2 r10
+.ends xlump2
+
+*4 segments per cm
+.subckt xlump4 1 2
+y1 1  0 3  0 yless4
+x1 3 4 r10
+x2 4 5 r10
+x3 5 2 r10
+x4 5 2 r10
+.ends xlump4
+
+*8 segments per cm
+.subckt xlump8 1 2
+y1 1  0 3  0 yless8
+x1 3 4 r10
+x2 4 2 r10
+x3 4 2 r10
+x4 4 2 r10
+x5 4 2 r10
+.ends xlump8
+
+.subckt xonecm10 1 2
+x1 1 3 xlump10
+x2 3 4 xlump10
+x3 4 5 xlump10
+x4 5 6 xlump10
+x5 6 7 xlump10
+x6 7 8 xlump10
+x7 8 9 xlump10
+x8 9 10 xlump10
+x9 10 11 xlump10
+x10 11 2 xlump10
+.ends xonecm10
+
+.subckt xonecm8 1 2
+x1 1 3 xlump8
+x2 3 4 xlump8
+x3 4 5 xlump8
+x4 5 6 xlump8
+x5 6 7 xlump8
+x6 7 8 xlump8
+x7 8 9 xlump8
+x8 9 2 xlump8
+.ends xonecm8
+
+.subckt xonecm4 1 2
+x1 1 3 xlump4
+x2 3 4 xlump4
+x3 4 5 xlump4
+x4 5 2 xlump4
+.ends xonecm4
+
+.subckt xonecm2 1 2
+x1 1 3 xlump2
+x2 3 2 xlump2
+.ends xonecm2
+
+
+.subckt xtwocm 1 2
+x1 1 3 xonecm
+x2 3 2 xonecm
+.ends xtwocm
+
+.subckt xthreecm 1 2
+x1 1 3 xonecm
+x2 3 4 xonecm
+x3 4 2 xonecm
+.ends xthreecm
+
+.subckt xfourcm 1 2
+x1 1 3 xonecm
+x2 3 4 xonecm
+x3 4 5 xonecm
+x4 5 2 xonecm
+.ends xfourcm
+
+.subckt xfivecm 1 2
+x1 1 3 xonecm
+x2 3 4 xonecm
+x3 4 5 xonecm
+x4 5 6 xonecm
+x5 6 2 xonecm
+.ends xfivecm
+
+.subckt xsixcm 1 2
+x1 1 3 xfivecm
+x2 3 2 xonecm
+.ends xsixcm
+
+.subckt xsevencm 1 2
+x1 1 3 xsixcm
+x2 3 2 xonecm
+.ends xsevencm
+
+.subckt xeightcm 1 2
+x1 1 3 xsevencm
+x2 3 2 xonecm
+.ends xeightcm
+
+.subckt xninecm 1 2
+x1 1 3 xeightcm
+x2 3 2 xonecm
+.ends xninecm
+
+.subckt xtencm 1 2
+x1 1 3 xfivecm
+x2 3 2 xfivecm
+.ends xtencm
+
+.subckt xelevencm 1 2
+x1 1 3 xtencm
+x2 3 2 xonecm
+.ends xelevencm
+
+.subckt xtwelvecm 1 2
+x1 1 3 xtencm
+x2 3 4 xonecm
+x3 4 2 xonecm
+.ends xtwelvecm
+
+.subckt xsixteencm 1 2
+x1 1 3 xeightcm
+x2 3 2 xeightcm
+.ends xsixteencm
+
+.subckt xtwentyfourcm 1 2
+x1 1 3 xtwelvecm
+x2 3 2 xtwelvecm
+.ends xtwentyfourcm
+
+.end

paranoia_parallel/examples/cider/cmosinv.cir

@@ -0,0 +1,123 @@
+CMOS Inverter
+
+Vdd 1 0 5.0v
+Vss 2 0 0.0v
+
+X1 1 2 3 4 INV
+
+Vin 3 0 2.5v
+
+.SUBCKT INV 1   2   3   4
+*           Vdd Vss Vin Vout
+M1  14 13 15 16 M_PMOS w=6.0u
+M2  24 23 25 26 M_NMOS w=3.0u
+
+Vgp 3 13 0.0v
+Vdp 4 14 0.0v
+Vsp 1 15 0.0v
+Vbp 1 16 0.0v
+
+Vgn 3 23 0.0v
+Vdn 4 24 0.0v
+Vsn 2 25 0.0v
+Vbn 2 26 0.0v
+.ENDS INV
+
+.model M_NMOS numos
++ x.mesh l=0.0 n=1
++ x.mesh l=0.6 n=4
++ x.mesh l=0.7 n=5
++ x.mesh l=1.0 n=7
++ x.mesh l=1.2 n=11
++ x.mesh l=3.2 n=21
++ x.mesh l=3.4 n=25
++ x.mesh l=3.7 n=27
++ x.mesh l=3.8 n=28
++ x.mesh l=4.4 n=31
++
++ y.mesh l=-.05 n=1
++ y.mesh l=0.0  n=5
++ y.mesh l=.05  n=9
++ y.mesh l=0.3  n=14
++ y.mesh l=2.0  n=19
++
++ region num=1 material=1 y.l=0.0
++ material num=1 silicon
++ mobility material=1 concmod=sg fieldmod=sg
++ mobility material=1 elec major
++ mobility material=1 elec minor
++ mobility material=1 hole major
++ mobility material=1 hole minor
++
++ region num=2 material=2 y.h=0.0 x.l=0.7 x.h=3.7
++ material num=2 oxide
++
++ elec num=1 x.l=3.8 x.h=4.4	y.l=0.0 y.h=0.0
++ elec num=2 x.l=0.7 x.h=3.7	iy.l=1  iy.h=1
++ elec num=3 x.l=0.0 x.h=0.6	y.l=0.0 y.h=0.0
++ elec num=4 x.l=0.0 x.h=4.4	y.l=2.0 y.h=2.0
++
++ doping unif p.type conc=2.5e16 x.l=0.0 x.h=4.4  y.l=0.0 y.h=2.0
++ doping unif p.type conc=1e16   x.l=0.0 x.h=4.4  y.l=0.0 y.h=0.05
++ doping unif n.type conc=1e20   x.l=0.0 x.h=1.1  y.l=0.0 y.h=0.2
++ doping unif n.type conc=1e20   x.l=3.3 x.h=4.4  y.l=0.0 y.h=0.2
++
++ models concmob fieldmob bgn srh conctau
++ method ac=direct onec
+
+.model M_PMOS numos
++ x.mesh l=0.0 n=1
++ x.mesh l=0.6 n=4
++ x.mesh l=0.7 n=5
++ x.mesh l=1.0 n=7
++ x.mesh l=1.2 n=11
++ x.mesh l=3.2 n=21
++ x.mesh l=3.4 n=25
++ x.mesh l=3.7 n=27
++ x.mesh l=3.8 n=28
++ x.mesh l=4.4 n=31
++
++ y.mesh l=-.05 n=1
++ y.mesh l=0.0  n=5
++ y.mesh l=.05  n=9
++ y.mesh l=0.3  n=14
++ y.mesh l=2.0  n=19
++
++ region num=1 material=1 y.l=0.0
++ material num=1 silicon
++ mobility material=1 concmod=sg fieldmod=sg
++ mobility material=1 elec major
++ mobility material=1 elec minor
++ mobility material=1 hole major
++ mobility material=1 hole minor
++
++ region num=2 material=2 y.h=0.0 x.l=0.7 x.h=3.7
++ material num=2 oxide
++
++ elec num=1 x.l=3.8 x.h=4.4	y.l=0.0 y.h=0.0
++ elec num=2 x.l=0.7 x.h=3.7	iy.l=1  iy.h=1
++ elec num=3 x.l=0.0 x.h=0.6	y.l=0.0 y.h=0.0
++ elec num=4 x.l=0.0 x.h=4.4	y.l=2.0 y.h=2.0
++
++ doping unif n.type conc=1e16   x.l=0.0 x.h=4.4  y.l=0.0 y.h=2.0
++ doping unif p.type conc=3e16   x.l=0.0 x.h=4.4  y.l=0.0 y.h=0.05
++ doping unif p.type conc=1e20   x.l=0.0 x.h=1.1  y.l=0.0 y.h=0.2
++ doping unif p.type conc=1e20   x.l=3.3 x.h=4.4  y.l=0.0 y.h=0.2
++
++ models concmob fieldmob bgn srh conctau
++ method ac=direct onec
+
+*.tran 0.1ns 1ns
+*.op
+.dc Vin 0.0v 3.001v 0.05v
+.print dc v(4)
+*.plot dc v(4)
+.options acct bypass=1 method=gear nopage
+
+.control
+run
+print v(4)
+quit
+.endc
+
+.end

paranoia_parallel/examples/cider/diode.cir

@@ -0,0 +1,40 @@
+One-Dimensional Diode Simulation
+
+* Several simulations are performed by this file.
+* They are:
+*   1. An operating point at 0.7v forward bias.
+*   2. An ac analysis at 0.7v forward bias.
+*   3. The forward and reverse bias characteristics from -3v to 2v.
+
+Vpp 1 0 0.7v (PWL 0ns 3.0v 0.01ns -6.0v) (AC 1v)
+Vnn 2 0 0v
+D1  1 2 M_PN AREA=100
+
+.model M_PN numd level=1
++ ***************************************
++ *** One-Dimensional Numerical Diode ***
++ ***************************************
++ options defa=1p
++ x.mesh loc=0.0 n=1
++ x.mesh loc=1.3 n=201
++ domain   num=1 material=1
++ material num=1 silicon
++ mobility mat=1 concmod=ct fieldmod=ct
++ doping gauss p.type conc=1e20 x.l=0.0  x.h=0.0 char.l=0.100
++ doping unif  n.type conc=1e16 x.l=0.0  x.h=1.3
++ doping gauss n.type conc=5e19 x.l=1.3  x.h=1.3 char.l=0.100 
++ models bgn aval srh auger conctau concmob fieldmob
++ method ac=direct
+
+.option acct bypass=0 abstol=1e-18 itl2=100
+*.op
+.ac dec 10 100kHz 10gHz
+*.dc Vpp -3.0v 2.0001v 50mv
+*.print i(Vpp)
+
+.control
+run
+quit
+.endc
+
+.END

paranoia_parallel/examples/cider/pullup.cir

@@ -0,0 +1,74 @@
+BICMOS INVERTER PULLUP CIRCUIT
+
+VDD 1 0 5.0V
+VSS 2 0 0.0V
+
+VIN 3 0 0.75V
+
+VC  1 11 0.0V
+VB  5 15 0.0V
+
+Q1  11 15 4 M_NPN  AREA=4
+M1  5 3 1 1 M_PMOS W=20U L=2U AD=30P AS=30P PD=21U PS=21U
+
+CL  4 0 5.0PF
+
+.IC V(4)=0.75V V(5)=0.0V
+
+.MODEL M_PMOS PMOS VTO=-0.8 UO=250 TOX=25N NSUB=5E16
++ UCRIT=10K UEXP=.15 VMAX=50K NEFF=2 XJ=.02U
++ LD=.15U CGSO=.1N CGDO=.1N CJ=.12M MJ=0.5
++ CJSW=0.3N MJSW=0.5 LEVEL=2
+
+.MODEL M_NPN NBJT LEVEL=2
++ TITLE TWO-DIMENSIONAL NUMERICAL POLYSILICON EMITTER BIPOLAR TRANSISTOR
++ ; SINCE ONLY HALF THE DEVICE IS SIMULATED, DOUBLE THE UNIT WIDTH TO GET
++ ; 1.0 UM EMITTER.
++ OPTIONS DEFW=2.0U
++ OUTPUT STATISTICS
++ 
++ X.MESH W=2.0 H.E=0.02 H.M=0.5 R=2.0
++ X.MESH W=0.5 H.S=0.02 H.M=0.2 R=2.0
++ 
++ Y.MESH L=-0.2 N=1
++ Y.MESH L= 0.0 N=5
++ Y.MESH W=0.10 H.E=0.004 H.M=0.05  R=2.5
++ Y.MESH W=0.15 H.S=0.004 H.M=0.02  R=2.5
++ Y.MESH W=1.05 H.S=0.02  H.M=0.1   R=2.5
++
++ DOMAIN NUM=1 MATERIAL=1 X.L=2.0 Y.H=0.0
++ DOMAIN NUM=2 MATERIAL=2 X.H=2.0 Y.H=0.0
++ DOMAIN NUM=3 MATERIAL=3 Y.L=0.0
++ MATERIAL NUM=1 POLYSILICON
++ MATERIAL NUM=2 OXIDE
++ MATERIAL NUM=3 SILICON
++
++ ELEC NUM=1 X.L=0.0  X.H=0.0  Y.L=1.1  Y.H=1.3
++ ELEC NUM=2 X.L=0.0  X.H=0.5  Y.L=0.0  Y.H=0.0
++ ELEC NUM=3 X.L=2.0  X.H=3.0  Y.L=-0.2 Y.H=-0.2
++
++ DOPING GAUSS N.TYPE CONC=3E20 X.L=2.0 X.H=3.0 Y.L=-0.2 Y.H=0.0
++ + CHAR.L=0.047 LAT.ROTATE
++ DOPING GAUSS P.TYPE CONC=5E18 X.L=0.0 X.H=5.0 Y.L=-0.2 Y.H=0.0
++ + CHAR.L=0.100 LAT.ROTATE
++ DOPING GAUSS P.TYPE CONC=1E20 X.L=0.0 X.H=0.5 Y.L=-0.2 Y.H=0.0
++ + CHAR.L=0.100 LAT.ROTATE RATIO=0.7
++ DOPING UNIF  N.TYPE CONC=1E16 X.L=0.0 X.H=5.0 Y.L=0.0 Y.H=1.3
++ DOPING GAUSS N.TYPE CONC=5E19 X.L=0.0 X.H=5.0 Y.L=1.3 Y.H=1.3
++ + CHAR.L=0.100 LAT.ROTATE
++
++ METHOD AC=DIRECT ITLIM=10
++ MODELS BGN SRH AUGER CONCTAU CONCMOB FIELDMOB
+
+.TRAN 0.5NS 1.5NS
+.PRINT TRAN V(3) V(4)
+
+.OPTION ACCT BYPASS=1
+
+.control
+run
+print V(3) V(4)
+quit
+.endc
+
+.END

paranoia_parallel/examples/cider/recovery.cir

@@ -0,0 +1,46 @@
+DIODE REVERSE RECOVERY
+
+VPP 1 0 0.0V (PULSE 1.0V -1.0V 1NS 1PS 1PS 20NS 40NS)
+VNN 2 0 0.0V
+RS  1 3 1.0
+LS  3 4 0.5UH
+DT  4 2 M_PIN AREA=1
+
+.MODEL M_PIN NUMD LEVEL=2
++ OPTIONS DEFW=100U
++ X.MESH N=1 L=0.0
++ X.MESH N=2 L=0.2
++ X.MESH N=4 L=0.4
++ X.MESH N=8 L=0.6
++ X.MESH N=13 L=1.0
++
++ Y.MESH N=1 L=0.0
++ Y.MESH N=9 L=4.0
++ Y.MESH N=24 L=10.0
++ Y.MESH N=29 L=15.0
++ Y.MESH N=34 L=20.0
++
++ DOMAIN NUM=1 MATERIAL=1
++ MATERIAL NUM=1 SILICON TN=20NS TP=20NS
++
++ ELECTRODE NUM=1 X.L=0.6 X.H=1.0 Y.L=0.0 Y.H=0.0
++ ELECTRODE NUM=2 X.L=-0.1 X.H=1.0 Y.L=20.0 Y.H=20.0
++
++ DOPING GAUSS P.TYPE CONC=1.0E19 CHAR.LEN=1.076 X.L=0.75 X.H=1.1 Y.H=0.0
++ + LAT.ROTATE RATIO=0.1
++ DOPING UNIF  N.TYPE CONC=1.0E14
++ DOPING GAUSS N.TYPE CONC=1.0E19 CHAR.LEN=1.614 X.L=-0.1 X.H=1.1 Y.L=20.0
++
++ MODELS BGN SRH AUGER CONCTAU CONCMOB FIELDMOB
+
+.OPTION ACCT BYPASS=1
+.TRAN 0.1NS 1NS
+.PRINT TRAN V(3) I(VNN)
+
+.control
+run
+print V(3) I(VNN)
+quit
+.endc
+
+.END

paranoia_parallel/examples/cider/rtlinv.cir

@@ -0,0 +1,34 @@
+RTL inverter
+
+vin 1 0 dc 1 pwl 0 4 1ns 0
+vcc 12 0 dc 5.0
+rc1 12 3 2.5k
+rb1 1 2 8k
+q1 3 2 0 qmod area = 100p
+
+.option acct bypass=1
+.tran 0.5n 5n
+.print tran v(2) v(3)
+
+.model qmod nbjt level=1
++ x.mesh node=1  loc=0.0
++ x.mesh node=61 loc=3.0
++ region num=1 material=1
++ material num=1 silicon nbgnn=1e17 nbgnp=1e17
++ mobility material=1 concmod=sg fieldmod=sg
++ mobility material=1 elec major
++ mobility material=1 elec minor
++ mobility material=1 hole major
++ mobility material=1 hole minor
++ doping unif n.type conc=1e17 x.l=0.0 x.h=1.0
++ doping unif p.type conc=1e16 x.l=0.0 x.h=1.5
++ doping unif n.type conc=1e15 x.l=0.0 x.h=3.0
++ models bgnw srh conctau auger concmob fieldmob
++ options base.length=1.0 base.depth=1.25
+
+.control
+run
+quit
+.endc
+
+.end

paranoia_parallel/examples/control_structs/foreach_bjt_ft.sp

@@ -0,0 +1,52 @@
+BJT ft Test
+
+vce 1 0 dc 3.0
+vgain 1 c dc 0.0
+f 0 2 vgain -1000
+l 2 b 1g
+c 2 0 1g
+ib 0 b dc 0.0 ac 1.0
+ic 0 c 0.01
+q1 c b 0 bfs17
+
+.control
+foreach myic 0.5e-3 1e-3 5e-3 10e-3 50e-3 100e-3
+ alter ic = $myic
+ ac dec 10 10k 5g
+end
+*foreach mytf 50p 100p 150p 200p 250p 300p
+* altermod q.x1.q1 tf = $mytf
+* ac dec 10 10k 5g
+*end
+plot abs(ac1.vgain#branch) abs(ac2.vgain#branch) abs(ac3.vgain#branch) abs(ac4.vgain#branch) abs(ac5.vgain#branch) abs(ac6.vgain#branch) ylimit 0.1 100 loglog
+quit
+.endc
+
+*****************************************************************
+* SPICE2G6 MODEL OF THE NPN BIPOLAR TRANSISTOR BFS17 (SOT-23)   *
+* REV: 98.1                  DANALYSE GMBH BERLIN (27.07.1998)  *
+*****************************************************************
+.SUBCKT BFS17C 1 2 3
+Q1   6 5 7 BFS17 1.000
+LC   1 6 0.350N
+L1   2 4 0.400N
+LB   4 5 0.500N
+L2   3 8 0.400N
+LE   8 7 0.600N
+CGBC 4 6 70.00F
+CGBE 4 8 0.150P
+CGCE 6 8 15.00F
+.ENDS
+.MODEL BFS17 NPN (level=1 IS=0.480F NF=1.008 BF=99.655 VAF=90.000 IKF=0.190
++ ISE=7.490F NE=1.762 NR=1.010 BR=38.400 VAR=7.000 IKR=93.200M
++ ISC=0.200F NC=1.042
++ RB=1.500 IRB=0.100M RBM=1.200
++ RE=0.500 RC=2.680
++ CJE=1.325P VJE=0.700 MJE=0.220 FC=0.890
++ CJC=1.050P VJC=0.610 MJC=0.240 XCJC=0.400
++ TF=56.940P TR=1.000N PTF=21.000
++ XTF=68.398 VTF=0.600 ITF=0.700
++ XTB=1.600 EG=1.110 XTI=3.000
++ KF=1.000F AF=1.000)
+
+.end

paranoia_parallel/examples/control_structs/if-batchmode.cir

@@ -0,0 +1,31 @@
+use $batchmode
+
+* use $batchmode variable to steer control flow
+*
+* start either with
+*    ngspice -b -r rawfile.raw if-batchmode.cir
+* or with
+*    ngspice if-batchmode.cir
+
+v0  1 0  dc 1
+R1  1 2  1k
+C1  2 0  1u
+
+.tran 100u 10m uic
+.print tran all
+
+.control
+
+if $?batchmode
+  echo "Info: batchmode has been set by command line option -b"
+  echo
+else
+  echo "Info: batchmode has not been set"
+  echo
+  unset ngdebug
+  tran 100u 10m uic
+  plot v(2)
+end
+
+.endc
+.end

paranoia_parallel/examples/control_structs/if-test-1.cir

@@ -0,0 +1,78 @@
+test if conditions
+
+* test behaviour in special circumstances
+
+v1  1 0  dc 42
+R1  1 0  1k
+
+
+.control
+
+echo "expect Error: missing if condition"
+* does not enter cp_istrue()
+if
+  echo "FAIL: you should not see this"
+else
+  echo "nonetheless evaluated as FALSE"
+end
+echo
+
+set testvar_b=""
+echo "expect |false|"
+* in cp_istrue(): wl!=NULL names==NULL v==NULL
+if $testvar_b
+  echo "FAIL: you should not see this"
+else
+  echo "|false|"
+end
+echo
+
+set testvar_c
+echo "expect testvar_c=|TRUE|"
+* in cp_istrue(): wl!=NULL names!=NULL v!=NULL
+if $testvar_c
+  echo "testvar_c=|$testvar_c|"
+end
+echo
+
+echo "expect Error: testvar_d: no such variable."
+* in cp_istrue(): wl!=NULL then wl==NULL names==NULL v==NULL
+if $testvar_d
+  echo "FAIL: you should not see this"
+else
+  echo "nonetheless evaluated as FALSE"
+end
+echo
+
+echo "expect Error(parse.c--checkvalid): testvar_e: no such vector."
+* in cp_istrue(): wl!=NULL names==NULL v==NULL
+if testvar_e = 3.3
+  echo "FAIL: you should not see this"
+else
+  echo "nonetheless evaluated as FALSE"
+end
+echo
+
+let testvar_f = 3.5
+
+echo "expect |false|"
+if testvar_f = 3.3
+  echo "FAIL: you should not see this"
+else
+  echo "|false|"
+end
+echo
+
+echo "expect |true|"
+if testvar_f = 3.5
+  echo "|true|"
+else
+  echo "FAIL: you should not see this"
+end
+echo
+
+op
+print v(1)
+
+.endc
+.end

paranoia_parallel/examples/control_structs/new-check-3.sp

@@ -0,0 +1,96 @@
+new ft_getpnames parser check 3, try ternary
+
+* (compile (concat "tmp-1/ng-spice-rework/src/ngspice "  buffer-file-name) t)
+
+VIN  1 0  DC=0
+
+.control
+
+dc VIN 0 10 5
+
+* trying the ternary
+
+let checks = 0
+
+let const0 = 0
+let const5 = 5
+let const6 = 6
+
+
+let tmp = const0 ? const5 : const6
+if tmp eq const6
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+let tmp = const6 ? const5 : const6
+if tmp eq const5
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+define foo(a,b,d) a ? b : d
+
+if foo(const0,const5,const6) eq const6
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+if foo(const6,const5,const6) eq const5
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+let vec7 = 7*unitvec(7)
+let vec8 = 8*unitvec(8)
+
+if length(const5 ? vec7 : vec8) eq 7
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+if length(const0 ? vec7 : vec8) eq 8
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+* FIXME, "1 ? 1:1" (without spaces around of ':') doesnt work,
+*   "1:1" is a lexem, WHY !!!
+*   ist that an old artifact, (ancient hierarchical name separator ':')
+*
+*print length(1?1:1)
+
+*if (1 ? 1:1) eq 1
+if (1 ? 1 : 1) eq 1
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+print @vin[dc]
+
+* '"' survives, and will be processed in the ft_getpnames() lexer, that is PPlex()
+*   where the string will be unqoted
+*   thats used vor weired variable names, for example "zero(1)"
+let foo = "vec8"
+if foo eq vec8
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+if checks eq 8
+  echo "INFO: ok"
+else
+  echo "ERROR:"
+end
+
+.endc
+
+.end

paranoia_parallel/examples/control_structs/new-check-4.sp

@@ -0,0 +1,111 @@
+demonstrate < etc in ft_getpnames
+
+* (compile (concat "tmp-1/ng-spice-rework/src/ngspice " buffer-file-name) t)
+
+VIN  1 0  DC=0
+
+.control
+
+dc VIN 0 10 5
+
+let checks = 0
+
+let const0 = 0
+let const5 = 5
+let const6 = 6
+
+* check some relational operators, which are in danger to mixed up
+*   with csh semantic, that is IO redirection
+
+if const5 < const6
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+if const6 > const5
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+if const5 >= const5
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+if const5 <= const5
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+if const5 = const5
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+* check some wired non-equality operators
+*   note: there are some awkward tranformations ahead of the ft_getpnames lexer
+*     transforming "><" into "> <"
+*     and          "<>" into "< >"
+*   note: "!=" would have been in serious danger to be fooled up within
+*     csh history mechanism
+
+if const6 <> const5
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+if const6 >< const5
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+
+* check some boolean operators, which are in danger to be mixed up
+*   with csh semantic, `&' background '|' pipe  '~' homedirectory
+
+if const5 & const5
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+if const0 | const5
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+if ~ const0
+  let checks = checks + 1
+else
+  echo "ERROR:"
+end
+
+* note:
+*   "!=" would be in danger, '!' triggers the csh history mechanism
+*if const5 != const6
+*  echo "just trying"
+*end
+
+
+* Note: csh semantics swallows the '>' and '<' operators
+*   on most of the com lines
+* witnessed by
+let tmp = const5 > unwanted_output_file_1
+define foo(a,b) a > unwanted_output_file_2
+print const0 > unwanted_output_file_3
+
+if checks eq 10
+  echo "INFO: ok"
+end
+
+.endc
+
+.end

paranoia_parallel/examples/control_structs/repeat3.sp

@@ -0,0 +1,150 @@
+Test sequences for ngspice control structures
+*vectors are used (except foreach)
+*start in interactive mode
+
+.control
+
+* test for while, repeat, if, break
+  let loop = 0
+  while loop < 4
+    let index = 0
+    repeat
+      let index = index + 1
+      if index > 4
+        break
+      end  
+    end
+    echo index "$&index"   loop "$&loop"
+    let loop = loop + 1
+  end
+
+
+* test sequence for while, dowhile  
+  let loop = 0
+  echo
+  echo enter loop with  "$&loop" 
+  dowhile loop < 3
+    echo within dowhile loop "$&loop"     
+    let loop = loop + 1 
+  end
+  echo after dowhile loop "$&loop" 
+  echo  
+  let loop = 0
+  while loop < 3
+    echo within while loop "$&loop"   
+    let loop = loop + 1
+  end
+  echo after while loop "$&loop"  
+  let loop = 3
+  echo
+  echo enter loop with  "$&loop" 
+  dowhile loop < 3
+    echo within dowhile loop "$&loop"     ; output expected
+    let loop = loop + 1 
+  end
+  echo after dowhile loop "$&loop"   
+  echo  
+  let loop = 3
+  while loop < 3
+    echo within while loop "$&loop"       ; no output expected   
+    let loop = loop + 1
+  end
+  echo after while loop "$&loop"   
+ 
+  
+* test sequence for foreach
+  echo
+  foreach outvar 0 0.5 1 1.5
+    echo parameters: $outvar   ; foreach parameters are variables, not vectors!
+  end  
+  
+* test for if ... else ... end  
+  echo
+  let loop = 0 
+  let index = 1 
+  dowhile loop < 10
+    let index = index * 2
+    if index < 128
+      echo "$&index" lt 128
+    else
+      echo "$&index"  ge 128  
+    end
+    let loop = loop + 1
+  end   
+  
+* simple test for label, goto
+  echo
+  let loop = 0
+  label starthere 
+  echo start "$&loop"
+  let loop = loop + 1
+  if loop < 3
+    goto starthere
+  end  
+  echo end "$&loop"   
+  
+* test for label, nested goto
+  echo
+  let loop = 0
+  label starthere1 
+  echo start nested "$&loop"
+  let loop = loop + 1
+  if loop < 3
+    if loop < 3
+      goto starthere1
+    end  
+  end  
+  echo end "$&loop"   
+  
+* test for label, goto   
+  echo
+  let index = 0    
+  label starthere2
+  let loop = 0   
+  echo We are at start with index "$&index" and loop "$&loop"
+  if index < 6
+    label inhere
+    let index = index + 1
+    if loop < 3
+      let loop = loop + 1
+      if index > 1
+        echo jump2
+        goto starthere2
+      end  
+    end
+    echo jump
+    goto inhere
+  end 
+  echo We are at end with index "$&index" and loop "$&loop"   
+  
+* test goto in while loop
+  echo
+  let loop = 0
+  if 1    ; outer loop to allow nested forward label 'endlabel'
+    while loop < 10
+      if loop > 5
+        echo jump
+        goto endlabel
+      end
+      let loop = loop + 1
+    end
+    echo before  ; never reached
+    label endlabel
+    echo after "$&loop"  
+  end  
+
+*test for using variables
+* simple test for label, goto
+  echo
+  set loop = 0
+  label starthe 
+  echo start $loop
+  let loop = $loop + 1  ; expression needs vector at lhs
+  set loop = "$&loop"   ; convert vector contents to variable
+  if $loop < 3
+    goto starthe
+  end  
+  echo end $loop
+  
+  quit
+.endc

paranoia_parallel/examples/control_structs/repeat_no_one_goto.sp

@@ -0,0 +1,11 @@
+Test sequences for ngspice control structure got
+
+.control
+
+  goto starthere
+  echo this not
+*  label starthere
+  echo done 
+  
+  quit
+.endc

paranoia_parallel/examples/control_structs/repeat_one_goto.sp

@@ -0,0 +1,19 @@
+Test sequences for ngspice control structures
+*vectors are used (except foreach)
+*start in interactive mode
+
+.control
+
+* simple test for label, goto
+  echo
+  let loop = 0
+  label starthere 
+  echo start "$&loop"
+  let loop = loop + 1
+  if loop < 3
+    goto starthere
+  end  
+  echo end "$&loop"   
+  
+  quit
+.endc

paranoia_parallel/examples/control_structs/repeat_s.sp

@@ -0,0 +1,46 @@
+Test sequences for ngspice control structures
+*vectors are used (except foreach)
+*start in interactive mode
+
+.control
+
+* test for label, goto   
+  echo
+  let index = 0    
+  label starthere2
+  let loop = 0   
+  echo We are at start with index "$&index" and loop "$&loop"
+  if index < 6
+    label inhere
+    let index = index + 1
+    if loop < 3
+      let loop = loop + 1
+      if index > 1
+        echo jump2
+        goto starthere2
+      end  
+    end
+    echo jump
+    goto inhere
+  end 
+  echo We are at end with index "$&index" and loop "$&loop"   
+  
+* test goto in while loop
+  echo
+  let loop = 0
+  if 1    ; outer loop to allow nested forward label 'endlabel'
+    while loop < 10
+      if loop > 5
+        echo jump
+        goto endlabel
+      end
+      let loop = loop + 1
+    end
+    echo before  ; never reached
+    label endlabel
+    echo after "$&loop"  
+  end  
+
+  
+  quit
+.endc

paranoia_parallel/examples/control_structs/s-param.cir

@@ -0,0 +1,121 @@
+Test for Scattering Parameters
+** Two ports
+** Examples: Bipolar,  Tschebyschef, RC
+
+.param Rbase=50 Vbias_in=0 Vbias_out=0
+
+*** The two-port circuit: 
+** port 1: in 0
+** port 2: out 0
+** Bias on both ports through resistor Rbase (to obtain operating point)
+
+** Example RF Bipolar mrf5711
+** VCE 1 V, IE = 5mA
+** QXXXXXXX nc nb ne
+** model obtained from
+** http://141.69.160.32/~krausg/Spice_Model_CD/Vendor%20List/Motorola/Spice/RFBJT/
+*.include MRF5711.lib
+*XMRF5711 out in e  MRF5711
+*Ie e 0 5m
+*Ce e 0 1
+
+** Example Tschebyschef Low Pass filter
+C1 in 0 33.2p
+L1 in 2 99.2n
+C2 2 0 57.2p
+L2 2 out 99.2n
+C3 out 0 33.2p
+
+** Example RC
+** see
+** http://www.allenhollister.com/allen/files/scatteringparameters.pdf
+*R2 in out 10
+*C1 out int5 30p
+*R1 int5 0 10
+
+*** End of circuit
+
+
+** The following subcircuit to be changed only by an experienced user!
+
+*** Driver and readout
+X1 in out S_2_2 S_1_2 S_PARAM
+
+.SUBCKT S_PARAM 22 66 5 7
+* Resistors emulate switches with Ron=0.001 and Roff=1e12
+* to switch driver to input and readout to output (and vice versa, see below)
+RS1 22 2 0.001
+RS2 66 6 0.001
+RS3 22 6 1e12
+RS4 66 2 1e12
+*Driver
+Vacdc 1 0 DC 'Vbias_in' AC 1 ; ac voltage and dc bias at input (applied through load resistor)
+R1 1 2 'Rbase'
+E1 3 0 2 0 2       ; amplify in port ac voltage by 2
+Vac 3 4 DC 0 AC 1  ; subtract driving ac voltage
+R_loop 4 5 0.001
+R3 5 0 1           ; ground return for measure node 5
+*Readout
+E2 7 0 6 0 2       ; amplify out port ac voltage by 2
+R4 6 8 'Rbase'     ; load resistor at output (ac)
+Vdc 8 0 DC 'Vbias_out' AC 0 ; dc bias at output (applied through load resistor)
+.ends
+
+** Check the two ac lines below for being equal!
+.control
+set noaskquit
+set filetype=ascii
+*** measurement for s_1_1 and s_2_1
+op
+** save bias voltages to vector
+let Vdcnew=V(X1.1) ; former Vacdc 
+let Vacdcnew=v(X1.8) ; former Vdc 
+** first ac measurement (change this line only together with following ac line)
+*ac lin 20 0.1G 2G ; use for bip transistor
+ac lin 100 2.5MEG 250MEG ; use for Tschebyschef 
+*ac lin 101 1k 10G ; use for RC
+** 
+** switch input and output
+alter R.X1.RS1=1e12
+alter R.X1.RS2=1e12
+alter R.X1.RS3=0.001
+alter R.X1.RS4=0.001
+** switch bias voltages between in and out
+alter V.X1.Vacdc DC=op1.Vacdcnew
+alter V.X1.Vdc DC=op1.Vdcnew
+*** measurement for s_1_2 and s_2_2
+op
+** second ac measurement (change this line only together with ac line above)
+*ac lin 20 0.1G 2G ; use for bip transistor
+ac lin 100 2.5MEG 250MEG ; use for Tschebyschef 
+*ac lin 101 1 10G ; use for RC 
+**
+let s_1_1=ac1.s_2_2
+let s_2_1=ac1.s_1_2
+settype s-param S_1_1 S_2_1 S_2_2 S_1_2
+
+let S11db = db(s_1_1)
+let S12db = db(s_1_2)
+let S21db = db(s_2_1)
+let S22db = db(s_2_2)
+settype decibel S11db S21db S22db S12db
+
+let P11=180*ph(s_1_1)/pi
+let P21=180*ph(s_2_1)/pi
+let P22=180*ph(S_2_2)/pi
+let P12=180*ph(S_1_2)/pi
+settype phase P11 P21 P22 P12
+
+let Rbase=@R.X1.R4[Resistance]
+settype impedance Rbase
+
+*plot s11db s21db S22db S12db ylimit -50 0 xlog ; used with RC 
+plot s11db s21db S22db S12db ylimit -0.5 0 ; used with Tschebyschef  
+plot P11 P21 P22 P12
+plot smithgrid S_1_1 S_1_2
+*wrdata s3046 mag(S11) P11 mag(S21) P21 mag(S22) P22 mag(S12) P12 ; write simple table
+wrs2p s3046.s2p ; write touchstone vers. 1 file s3046.s2p
+quit
+.endc
+
+.end

paranoia_parallel/examples/control_structs/s3046.s2p

@@ -0,0 +1,105 @@
+!2-port S-parameter file
+!Title: test for scattering parameters
+!Generated by ngspice at Mon Jun 29 16:30:10  2026
+# Hz S RI R 50
+!freq           ReS11          ImS11          ReS21          ImS21          ReS12          ImS12          ReS22          ImS22        
+ 2.500000e+06  -1.358762e-03  -1.726349e-02   9.966563e-01  -7.959753e-02   9.966563e-01  -7.959753e-02  -1.358762e-03  -1.726349e-02  
+ 5.000000e+06  -5.439573e-03  -3.397117e-02   9.867253e-01  -1.585780e-01   9.867253e-01  -1.585780e-01  -5.439573e-03  -3.397117e-02  
+ 7.500000e+06  -1.205882e-02  -4.958988e-02   9.703054e-01  -2.363411e-01   9.703054e-01  -2.363411e-01  -1.205882e-02  -4.958988e-02  
+ 1.000000e+07  -2.095226e-02  -6.363041e-02   9.475859e-01  -3.123192e-01   9.475859e-01  -3.123192e-01  -2.095226e-02  -6.363041e-02  
+ 1.250000e+07  -3.176693e-02  -7.566616e-02   9.188161e-01  -3.859893e-01   9.188161e-01  -3.859893e-01  -3.176693e-02  -7.566616e-02  
+ 1.500000e+07  -4.407645e-02  -8.534828e-02   8.842915e-01  -4.568821e-01   8.842915e-01  -4.568821e-01  -4.407645e-02  -8.534828e-02  
+ 1.750000e+07  -5.739842e-02  -9.241679e-02   8.443387e-01  -5.245862e-01   8.443387e-01  -5.245862e-01  -5.739842e-02  -9.241679e-02  
+ 2.000000e+07  -7.121292e-02  -9.670767e-02   7.992999e-01  -5.887480e-01   7.992999e-01  -5.887480e-01  -7.121292e-02  -9.670767e-02  
+ 2.250000e+07  -8.498089e-02  -9.815599e-02   7.495191e-01  -6.490667e-01   7.495191e-01  -6.490667e-01  -8.498089e-02  -9.815599e-02  
+ 2.500000e+07  -9.816184e-02  -9.679587e-02   6.953303e-01  -7.052862e-01   6.953303e-01  -7.052862e-01  -9.816184e-02  -9.679587e-02  
+ 2.750000e+07  -1.102302e-01  -9.275778e-02   6.370488e-01  -7.571844e-01   6.370488e-01  -7.571844e-01  -1.102302e-01  -9.275778e-02  
+ 3.000000e+07  -1.206903e-01  -8.626387e-02   5.749671e-01  -8.045597e-01   5.749671e-01  -8.045597e-01  -1.206903e-01  -8.626387e-02  
+ 3.250000e+07  -1.290901e-01  -7.762196e-02   5.093540e-01  -8.472181e-01   5.093540e-01  -8.472181e-01  -1.290901e-01  -7.762196e-02  
+ 3.500000e+07  -1.350339e-01  -6.721847e-02   4.404583e-01  -8.849594e-01   4.404583e-01  -8.849594e-01  -1.350339e-01  -6.721847e-02  
+ 3.750000e+07  -1.381947e-01  -5.551036e-02   3.685166e-01  -9.175655e-01   3.685166e-01  -9.175655e-01  -1.381947e-01  -5.551036e-02  
+ 4.000000e+07  -1.383257e-01  -4.301599e-02   2.937651e-01  -9.447911e-01   2.937651e-01  -9.447911e-01  -1.383257e-01  -4.301599e-02  
+ 4.250000e+07  -1.352730e-01  -3.030416e-02   2.164537e-01  -9.663575e-01   2.164537e-01  -9.663575e-01  -1.352730e-01  -3.030416e-02  
+ 4.500000e+07  -1.289872e-01  -1.798090e-02   1.368634e-01  -9.819513e-01   1.368634e-01  -9.819513e-01  -1.289872e-01  -1.798090e-02  
+ 4.750000e+07  -1.195356e-01  -6.672926e-03   5.532482e-02  -9.912277e-01   5.532482e-02  -9.912277e-01  -1.195356e-01  -6.672926e-03  
+ 5.000000e+07  -1.071119e-01   2.992941e-03  -2.776434e-02  -9.938209e-01  -2.776434e-02  -9.938209e-01  -1.071119e-01   2.992941e-03  
+ 5.250000e+07  -9.204473e-02   1.041495e-02  -1.119227e-01  -9.893593e-01  -1.119227e-01  -9.893593e-01  -9.204473e-02   1.041495e-02  
+ 5.500000e+07  -7.479988e-02   1.504632e-02  -1.965734e-01  -9.774880e-01  -1.965734e-01  -9.774880e-01  -7.479988e-02   1.504632e-02  
+ 5.750000e+07  -5.597718e-02   1.642913e-02  -2.810392e-01  -9.578959e-01  -2.810392e-01  -9.578959e-01  -5.597718e-02   1.642913e-02  
+ 6.000000e+07  -3.629761e-02   1.423063e-02  -3.645451e-01  -9.303453e-01  -3.645451e-01  -9.303453e-01  -3.629761e-02   1.423063e-02  
+ 6.250000e+07  -1.658003e-02   8.279254e-03  -4.462325e-01  -8.947021e-01  -4.462325e-01  -8.947021e-01  -1.658003e-02   8.279254e-03  
+ 6.500000e+07   2.293456e-03  -1.403107e-03  -5.251827e-01  -8.509618e-01  -5.251827e-01  -8.509618e-01   2.293456e-03  -1.403107e-03  
+ 6.750000e+07   1.942301e-02  -1.457657e-02  -6.004512e-01  -7.992673e-01  -6.004512e-01  -7.992673e-01   1.942301e-02  -1.457657e-02  
+ 7.000000e+07   3.394498e-02  -3.077019e-02  -6.711071e-01  -7.399144e-01  -6.711071e-01  -7.399144e-01   3.394498e-02  -3.077019e-02  
+ 7.250000e+07   4.509064e-02  -4.928309e-02  -7.362749e-01  -6.733425e-01  -7.362749e-01  -6.733425e-01   4.509064e-02  -4.928309e-02  
+ 7.500000e+07   5.224510e-02  -6.920078e-02  -7.951722e-01  -6.001083e-01  -7.951722e-01  -6.001083e-01   5.224510e-02  -6.920078e-02  
+ 7.750000e+07   5.500169e-02  -8.942553e-02  -8.471349e-01  -5.208459e-01  -8.471349e-01  -5.208459e-01   5.500169e-02  -8.942553e-02  
+ 8.000000e+07   5.320862e-02  -1.087178e-01  -8.916265e-01  -4.362158e-01  -8.916265e-01  -4.362158e-01   5.320862e-02  -1.087178e-01  
+ 8.250000e+07   4.700673e-02  -1.257444e-01  -9.282245e-01  -3.468485e-01  -9.282245e-01  -3.468485e-01   4.700673e-02  -1.257444e-01  
+ 8.500000e+07   3.686015e-02  -1.391301e-01  -9.565809e-01  -2.532925e-01  -9.565809e-01  -2.532925e-01   3.686015e-02  -1.391301e-01  
+ 8.750000e+07   2.358475e-02  -1.475095e-01  -9.763571e-01  -1.559739e-01  -9.763571e-01  -1.559739e-01   2.358475e-02  -1.475095e-01  
+ 9.000000e+07   8.381382e-03  -1.495831e-01  -9.871299e-01  -5.517864e-02  -9.871299e-01  -5.517864e-02   8.381382e-03  -1.495831e-01  
+ 9.250000e+07  -7.118544e-03  -1.441840e-01  -9.882734e-01   4.892923e-02  -9.882734e-01   4.892923e-02  -7.118544e-03  -1.441840e-01  
+ 9.500000e+07  -2.079005e-02  -1.303751e-01  -9.788181e-01   1.562356e-01  -9.788181e-01   1.562356e-01  -2.079005e-02  -1.303751e-01  
+ 9.750000e+07  -2.993798e-02  -1.076032e-01  -9.573006e-01   2.665235e-01  -9.573006e-01   2.665235e-01  -2.993798e-02  -1.076032e-01  
+ 1.000000e+08  -3.123039e-02  -7.595215e-02  -9.216321e-01   3.792038e-01  -9.216321e-01   3.792038e-01  -3.123039e-02  -7.595215e-02  
+ 1.025000e+08  -2.070470e-02  -3.654144e-02  -8.690529e-01   4.928882e-01  -8.690529e-01   4.928882e-01  -2.070470e-02  -3.654144e-02  
+ 1.050000e+08   6.025502e-03   7.907262e-03  -7.963008e-01   6.047861e-01  -7.963008e-01   6.047861e-01   6.025502e-03   7.907262e-03  
+ 1.075000e+08   5.315491e-02   5.240190e-02  -7.002024e-01   7.099973e-01  -7.002024e-01   7.099973e-01   5.315491e-02   5.240190e-02  
+ 1.100000e+08   1.234268e-01   8.919325e-02  -5.789199e-01   8.009873e-01  -5.789199e-01   8.009873e-01   1.234268e-01   8.919325e-02  
+ 1.125000e+08   2.161923e-01   1.080766e-01  -4.338893e-01   8.678549e-01  -4.338893e-01   8.678549e-01   2.161923e-01   1.080766e-01  
+ 1.150000e+08   3.253809e-01   9.825973e-02  -2.718540e-01   9.001720e-01  -2.718540e-01   9.001720e-01   3.253809e-01   9.825973e-02  
+ 1.175000e+08   4.388659e-01   5.198956e-02  -1.055070e-01   8.905890e-01  -1.055070e-01   8.905890e-01   4.388659e-01   5.198956e-02  
+ 1.200000e+08   5.408130e-01  -3.149563e-02   4.884981e-02   8.387714e-01   4.884981e-02   8.387714e-01   5.408130e-01  -3.149563e-02  
+ 1.225000e+08   6.167585e-01  -1.444873e-01   1.763784e-01   7.528644e-01   1.763784e-01   7.528644e-01   6.167585e-01  -1.444873e-01  
+ 1.250000e+08   6.585082e-01  -2.734229e-01   2.685960e-01   6.468633e-01   2.685960e-01   6.468633e-01   6.585082e-01  -2.734229e-01  
+ 1.275000e+08   6.657311e-01  -4.039413e-01   3.249590e-01   5.355451e-01   3.249590e-01   5.355451e-01   6.657311e-01  -4.039413e-01  
+ 1.300000e+08   6.439584e-01  -5.250419e-01   3.508493e-01   4.302996e-01   3.508493e-01   4.302996e-01   6.439584e-01  -5.250419e-01  
+ 1.325000e+08   6.011843e-01  -6.305572e-01   3.541621e-01   3.376531e-01   3.541621e-01   3.376531e-01   6.011843e-01  -6.305572e-01  
+ 1.350000e+08   5.451725e-01  -7.184622e-01   3.426007e-01   2.599575e-01   3.426007e-01   2.599575e-01   5.451725e-01  -7.184622e-01  
+ 1.375000e+08   4.821433e-01  -7.893860e-01   3.223551e-01   1.968808e-01   3.223551e-01   1.968808e-01   4.821433e-01  -7.893860e-01  
+ 1.400000e+08   4.165141e-01  -8.452649e-01   2.978358e-01   1.467550e-01   2.978358e-01   1.467550e-01   4.165141e-01  -8.452649e-01  
+ 1.425000e+08   3.511565e-01  -8.884498e-01   2.719260e-01   1.074716e-01   2.719260e-01   1.074716e-01   3.511565e-01  -8.884498e-01  
+ 1.450000e+08   2.877951e-01  -9.212259e-01   2.463757e-01   7.696353e-02   2.463757e-01   7.696353e-02   2.877951e-01  -9.212259e-01  
+ 1.475000e+08   2.273727e-01  -9.456046e-01   2.221642e-01   5.341517e-02   2.221642e-01   5.341517e-02   2.273727e-01  -9.456046e-01  
+ 1.500000e+08   1.703290e-01  -9.632664e-01   1.997756e-01   3.532106e-02   1.997756e-01   3.532106e-02   1.703290e-01  -9.632664e-01  
+ 1.525000e+08   1.167948e-01  -9.755766e-01   1.793909e-01   2.147277e-02   1.793909e-01   2.147277e-02   1.167948e-01  -9.755766e-01  
+ 1.550000e+08   6.671938e-02  -9.836268e-01   1.610137e-01   1.091828e-02   1.610137e-01   1.091828e-02   6.671938e-02  -9.836268e-01  
+ 1.575000e+08   1.995235e-02  -9.882835e-01   1.445500e-01   2.915383e-03   1.445500e-01   2.915383e-03   1.995235e-02  -9.882835e-01  
+ 1.600000e+08  -2.370667e-02  -9.902329e-01   1.298576e-01  -3.111475e-03   1.298576e-01  -3.111475e-03  -2.370667e-02  -9.902329e-01  
+ 1.625000e+08  -6.447758e-02  -9.900183e-01   1.167745e-01  -7.607606e-03   1.167745e-01  -7.607606e-03  -6.447758e-02  -9.900183e-01  
+ 1.650000e+08  -1.025822e-01  -9.880715e-01   1.051368e-01  -1.091749e-02   1.051368e-01  -1.091749e-02  -1.025822e-01  -9.880715e-01  
+ 1.675000e+08  -1.382345e-01  -9.847362e-01   9.478726e-02  -1.330789e-02   9.478726e-02  -1.330789e-02  -1.382345e-01  -9.847362e-01  
+ 1.700000e+08  -1.716355e-01  -9.802877e-01   8.558031e-02  -1.498573e-02   8.558031e-02  -1.498573e-02  -1.716355e-01  -9.802877e-01  
+ 1.725000e+08  -2.029710e-01  -9.749474e-01   7.738382e-02  -1.611186e-02   7.738382e-02  -1.611186e-02  -2.029710e-01  -9.749474e-01  
+ 1.750000e+08  -2.324111e-01  -9.688939e-01   7.007948e-02  -1.681159e-02   7.007948e-02  -1.681159e-02  -2.324111e-01  -9.688939e-01  
+ 1.775000e+08  -2.601105e-01  -9.622725e-01   6.356230e-02  -1.718275e-02   6.356230e-02  -1.718275e-02  -2.601105e-01  -9.622725e-01  
+ 1.800000e+08  -2.862096e-01  -9.552014e-01   5.773960e-02  -1.730188e-02   5.773960e-02  -1.730188e-02  -2.862096e-01  -9.552014e-01  
+ 1.825000e+08  -3.108352e-01  -9.477774e-01   5.252990e-02  -1.722893e-02   5.252990e-02  -1.722893e-02  -3.108352e-01  -9.477774e-01  
+ 1.850000e+08  -3.341022e-01  -9.400800e-01   4.786169e-02  -1.701095e-02   4.786169e-02  -1.701095e-02  -3.341022e-01  -9.400800e-01  
+ 1.875000e+08  -3.561145e-01  -9.321749e-01   4.367231e-02  -1.668487e-02   4.367231e-02  -1.668487e-02  -3.561145e-01  -9.321749e-01  
+ 1.900000e+08  -3.769660e-01  -9.241162e-01   3.990685e-02  -1.627969e-02   3.990685e-02  -1.627969e-02  -3.769660e-01  -9.241162e-01  
+ 1.925000e+08  -3.967419e-01  -9.159490e-01   3.651720e-02  -1.581817e-02   3.651720e-02  -1.581817e-02  -3.967419e-01  -9.159490e-01  
+ 1.950000e+08  -4.155196e-01  -9.077105e-01   3.346118e-02  -1.531815e-02   3.346118e-02  -1.531815e-02  -4.155196e-01  -9.077105e-01  
+ 1.975000e+08  -4.333691e-01  -8.994320e-01   3.070179e-02  -1.479358e-02   3.070179e-02  -1.479358e-02  -4.333691e-01  -8.994320e-01  
+ 2.000000e+08  -4.503545e-01  -8.911392e-01   2.820653e-02  -1.425535e-02   2.820653e-02  -1.425535e-02  -4.503545e-01  -8.911392e-01  
+ 2.025000e+08  -4.665341e-01  -8.828538e-01   2.594680e-02  -1.371188e-02   2.594680e-02  -1.371188e-02  -4.665341e-01  -8.828538e-01  
+ 2.050000e+08  -4.819612e-01  -8.745937e-01   2.389744e-02  -1.316967e-02   2.389744e-02  -1.316967e-02  -4.819612e-01  -8.745937e-01  
+ 2.075000e+08  -4.966844e-01  -8.663740e-01   2.203625e-02  -1.263369e-02   2.203625e-02  -1.263369e-02  -4.966844e-01  -8.663740e-01  
+ 2.100000e+08  -5.107484e-01  -8.582071e-01   2.034363e-02  -1.210767e-02   2.034363e-02  -1.210767e-02  -5.107484e-01  -8.582071e-01  
+ 2.125000e+08  -5.241943e-01  -8.501032e-01   1.880226e-02  -1.159437e-02   1.880226e-02  -1.159437e-02  -5.241943e-01  -8.501032e-01  
+ 2.150000e+08  -5.370598e-01  -8.420709e-01   1.739678e-02  -1.109581e-02   1.739678e-02  -1.109581e-02  -5.370598e-01  -8.420709e-01  
+ 2.175000e+08  -5.493797e-01  -8.341172e-01   1.611357e-02  -1.061336e-02   1.611357e-02  -1.061336e-02  -5.493797e-01  -8.341172e-01  
+ 2.200000e+08  -5.611860e-01  -8.262478e-01   1.494054e-02  -1.014795e-02   1.494054e-02  -1.014795e-02  -5.611860e-01  -8.262478e-01  
+ 2.225000e+08  -5.725084e-01  -8.184672e-01   1.386692e-02  -9.700091e-03   1.386692e-02  -9.700091e-03  -5.725084e-01  -8.184672e-01  
+ 2.250000e+08  -5.833743e-01  -8.107791e-01   1.288314e-02  -9.270031e-03   1.288314e-02  -9.270031e-03  -5.833743e-01  -8.107791e-01  
+ 2.275000e+08  -5.938092e-01  -8.031864e-01   1.198062e-02  -8.857773e-03   1.198062e-02  -8.857773e-03  -5.938092e-01  -8.031864e-01  
+ 2.300000e+08  -6.038367e-01  -7.956913e-01   1.115174e-02  -8.463144e-03   1.115174e-02  -8.463144e-03  -6.038367e-01  -7.956913e-01  
+ 2.325000e+08  -6.134786e-01  -7.882954e-01   1.038964e-02  -8.085839e-03   1.038964e-02  -8.085839e-03  -6.134786e-01  -7.882954e-01  
+ 2.350000e+08  -6.227555e-01  -7.809997e-01   9.688200e-03  -7.725449e-03   9.688200e-03  -7.725449e-03  -6.227555e-01  -7.809997e-01  
+ 2.375000e+08  -6.316864e-01  -7.738050e-01   9.041918e-03  -7.381493e-03   9.041918e-03  -7.381493e-03  -6.316864e-01  -7.738050e-01  
+ 2.400000e+08  -6.402889e-01  -7.667116e-01   8.445851e-03  -7.053439e-03   8.445851e-03  -7.053439e-03  -6.402889e-01  -7.667116e-01  
+ 2.425000e+08  -6.485798e-01  -7.597196e-01   7.895554e-03  -6.740717e-03   7.895554e-03  -6.740717e-03  -6.485798e-01  -7.597196e-01  
+ 2.450000e+08  -6.565745e-01  -7.528286e-01   7.387021e-03  -6.442737e-03   7.387021e-03  -6.442737e-03  -6.565745e-01  -7.528286e-01  
+ 2.475000e+08  -6.642874e-01  -7.460383e-01   6.916640e-03  -6.158900e-03   6.916640e-03  -6.158900e-03  -6.642874e-01  -7.460383e-01  
+ 2.500000e+08  -6.717324e-01  -7.393479e-01   6.481147e-03  -5.888603e-03   6.481147e-03  -5.888603e-03  -6.717324e-01  -7.393479e-01  

paranoia_parallel/examples/delta-sigma/mod1-ct-test.cir

@@ -0,0 +1,53 @@
+* first-order delta sigma modulator
+* continuous time
+* according to Schreier, Temes: Understanding Delta-Sigma Data Converters, 2005
+* Fig. 2.13, p. 31
+
+** signal
+.param infreq=13k inampl=0.3
+** clock
+.param clkfreq=5Meg
+** simulation time
+.param simtime = 5u
+.csparam simtime = 'simtime'
+
+** input signal
+*SIN(VO VA FREQ TD THETA)
+vin in+ in- dc 0 sin(0 'inampl' 'infreq' 0 0)
+
+* clock generation
+* PULSE(V1 V2 TD TR TF PW PER)
+vclk aclk 0 dc 0 pulse(0 1 0.1u 2n 2n '1/clkfreq/2' '1/clkfreq')
+
+* digital one
+* digital zero
+vone aone 0 dc 1
+vzero azero 0 dc 0
+abridge1 [aone azero] [done dzero] adc_buff
+.model adc_buff adc_bridge(in_low = 0.5 in_high = 0.5)
+
+* digital clock
+abridge2 [aclk] [dclk] adc_buff
+.model adc_buff adc_bridge(in_low = 0.5 in_high = 0.5)
+
+Xmod in+ in- dclk dv dvb mod1
+
+* load mod1 subcircuit
+.include mod1-ct.cir
+
+.control
+save xmod.adffq in+ in- xmod.outintp xmod.outintn
+tran 0.01u $&simtime
+* digit density vs input
+plot xmod.adffq V("in+","in-") xlimit 0.1m 0.2m
+* modulator integrator out, digital out
+plot xmod.outintp-xmod.outintn xmod.adffq xlimit 0.140m 0.148m
+*eprint dv dclk > digi1.txt
+linearize xmod.adffq
+fft xmod.adffq
+* noise shaping 20dB/decade
+plot db(xmod.adffq) xlimit 10k 1Meg xlog ylimit -20 -120
+quit
+.endc
+
+.end

paranoia_parallel/examples/delta-sigma/mod1-ct.cir

@@ -0,0 +1,46 @@
+* delta sigma modulator 
+* first order, continuous time
+
+.subckt mod1 ainp ainn dclk ddffq ddffqb
+* integrator and summer
+Ri1 ainn inintn 500
+Rf1 adffq inintn 500
+Cint1 outintp inintn 1n
+.IC v(outintp) = 0 v(inintp) = 0
+*
+Rshunt1 outintp 0 100Meg
+Rshunt2 initn 0 100Meg
+*
+Ri2 ainp inintp 500
+Rf2 adffqb inintp 500
+Cint2 outintn inintp 1n
+.IC v(outintn) = 0 v(inintn) = 0
+*
+Rshunt3 outintn 0 100Meg
+Rshunt4 inintp 0 100Meg
+*
+aint %vd(inintp inintn) %vd(outintp outintn) amp
+.model amp gain ( in_offset =0.0 gain =100000
++ out_offset = 0)
+
+* latched comparator (code model or B source, analog in, digital out)
+*acomp %vd(outintp outintn) acompout limit5
+*.model limit5 limit(in_offset=0 gain=100000 out_lower_limit=-1.0
+*+ out_upper_limit=1.0 limit_range=0.10 fraction=FALSE)
+*
+BComp acompout 0 V = (V(outintp) - V(outintn)) >= 0 ? 1 : -1
+*
+abridge2 [acompout] [dcompout] adc_buff
+.model adc_buff adc_bridge(in_low = 0 in_high = 0)
+*
+* D flip flop: data clk set reset out nout
+adff1 dcompout dclk ds drs ddffq ddffqb flop2
+.model flop2 d_dff(clk_delay = 1e-9 set_delay = 1.0e-9
++ reset_delay = 1.0e-9 ic = 0 rise_delay = 1.0e-9
++ fall_delay = 1e-9)
+
+abridge1 [ddffq ddffqb dclk] [adffq adffqb aclk] dac1
+.model dac1 dac_bridge(out_low = -1 out_high = 1 out_undef = 0
++ input_load = 5.0e-12
+
+.ends mod1

paranoia_parallel/examples/digital/74HCng_short_2.lib

@@ -0,0 +1,226 @@
+*  74hcng.lib
+*
+*  derived from 74HCxxx Model libraray for LTSPICE from www.linear.com/software
+*
+*  Revision 1.01 06/25/2018   test devices NAND, NOR, and XOR as XSPICE subcircuit for ngspice
+*
+*  All parts have been divided into three sections.
+*
+*  >--| A-D-Converter (threshold VCC1/2) |----| Event LOGIC Axx (delay) |----| OUTPUT LEVEL D-A (rise and fall times) |-->
+*
+*  Delays are given for Vcc = 2V/4.5V/6V (HC) from the
+*  Philips data sheets. http://www.philipslogic.com
+*
+*  Delays are given for Vcc = 2V/4.5V/6V .
+*  Used delay:  Td = (Tpd-Tr/2)*(4.5-0.5)/(Vcc-0.5)
+*  The gate delay has to be set to tpd minus 3ns for the input filter
+*  and another minus 3ns for Trise/2
+*    td1 = tpd  - 3ns - 3ns
+*
+
+.param vcc=5 tripdt=6n
+***********************************************************************************
+* The 74HCXX gates
+*
+* 2-input NAND gate
+* vcc 2 /4.5/5 /6
+* tpd 25n/9n/7n/7n
+* tr 19n/7n /  /6n
+.SUBCKT 74HC00  in1 in2 out  NVCC NVGND  vcc1={vcc} tripdt1={tripdt}
+.param td1={1e-9*(9-3-3)*4.0/(vcc1-0.5)}
+.param Rout={60*4.0/(vcc1-0.5)} ; standard output driver
+*Cin1 in1 0 3.5p
+*Cin2 in2 0 3.5p
+abridge2 [in1 in2] [din1 din2] adc_buff
+.model adc_buff adc_bridge(in_low = {vcc1/2.0} in_high = {vcc1/2.0})
+a6 [din1 din2] dout nand1
+.model nand1 d_nand(rise_delay = {td1} fall_delay = {td1}
++ input_load = 0.5e-12)
+abridge1 [dout] [out20] dac1
+.model dac1 dac_bridge(out_low = 0.0 out_high = {vcc1} out_undef = {vcc1/2.0}
++ input_load = 5.0e-12 t_rise = {tripdt1}
++ t_fall = {tripdt1})
+Rout out20 out {Rout}
+.ends
+
+
+* 2-input NOR gate
+* tpd 25n/9n/7n
+* tr 19n/7n/6n
+.SUBCKT 74HC02  in1 in2 out  NVCC NVGND  vcc1={vcc} tripdt1={tripdt}
+.param td1={1e-9*(9-3-3)*4.0/(vcc1-0.5)}
+.param Rout={60*4.0/(vcc1-0.5)} ; standard output driver
+*Cin1 in1 0 3.5p
+*Cin2 in2 0 3.5p
+abridge2 [in1 in2] [din1 din2] adc_buff
+.model adc_buff adc_bridge(in_low = {vcc1/2.0} in_high = {vcc1/2.0})
+a6 [din1 din2] dout nor1
+.model nor1 d_nor(rise_delay = {td1} fall_delay = {td1} input_load = 0.5e-12)
+abridge1 [dout] [out20] dac1
+.model dac1 dac_bridge(out_low = 0.0 out_high = {vcc1} out_undef = {vcc1/2.0}
++ input_load = 5.0e-12 t_rise = {tripdt1} t_fall = {tripdt1})
+Rout out20 out {Rout}
+.ends
+
+
+** 2-input AND gate
+* tpd 25n/9n/7n
+* tr 19n/7n/6n
+.SUBCKT 74HC08  in1 in2 out  NVCC NVGND  vcc1={vcc} tripdt1={tripdt}
+.param td1={1e-9*(9-3-3)*4.0/(vcc1-0.5)}
+.param Rout={60*4.0/(vcc1-0.5)} ; standard output driver
+*Cin1 in1 0 3.5p
+*Cin2 in2 0 3.5p
+abridge2 [in1 in2] [din1 din2] adc_buff
+.model adc_buff adc_bridge(in_low = {vcc1/2.0} in_high = {vcc1/2.0})
+a6 [din1 din2] dout and1
+.model and1 d_and(rise_delay = {td1} fall_delay = {td1}
++ input_load = 0.5e-12)
+abridge1 [dout] [out20] dac1
+.model dac1 dac_bridge(out_low = 0.0 out_high = {vcc1} out_undef = {vcc1/2.0}
++ input_load = 5.0e-12 t_rise = {tripdt1}
++ t_fall = {tripdt1})
+Rout out20 out {Rout}
+.ends
+**
+
+* 2-input OR gate
+* tpd 25n/9n/7n
+* tr 19n/7n/6n
+.SUBCKT 74HC32  in1 in2 out  NVCC NVGND  vcc1={vcc} tripdt1={tripdt}
+.param td1={1e-9*(9-3-3)*4.0/(vcc1-0.5)}
+.param Rout={60*4.0/(vcc1-0.5)} ; standard output driver
+*Cin1 in1 0 3.5p
+*Cin2 in2 0 3.5p
+abridge2 [in1 in2] [din1 din2] adc_buff
+.model adc_buff adc_bridge(in_low = {vcc1/2.0} in_high = {vcc1/2.0})
+a6 [din1 din2] dout or1
+.model or1 d_or(rise_delay = {td1} fall_delay = {td1} input_load = 0.5e-12)
+abridge1 [dout] [out20] dac1
+.model dac1 dac_bridge(out_low = 0.0 out_high = {vcc1} out_undef = {vcc1/2.0}
++ input_load = 5.0e-12 t_rise = {tripdt1} t_fall = {tripdt1})
+Rout out20 out {Rout}
+.ends
+
+
+* 2-input EXOR gate
+* tpd 39n/14n/11n
+* tr 19n/7n/6n
+.SUBCKT 74HC86  in1 in2 out  NVCC NVGND  vcc1={vcc} tripdt1={tripdt}
+.param td1={1e-9*(14-3-3)*4.0/(vcc1-0.5)}
+.param Rout={60*4.0/(vcc1-0.5)} ; standard output driver
+*Cin1 in1 0 3.5p
+*Cin2 in2 0 3.5p
+abridge2 [in1 in2] [din1 din2] adc_buff
+.model adc_buff adc_bridge(in_low = {vcc1/2.0} in_high = {vcc1/2.0})
+a6 [din1 din2] dout xor3
+.model xor3 d_xor(rise_delay = {td1} fall_delay = {td1}
++ input_load = 0.5e-12)
+abridge1 [dout] [out20] dac1
+.model dac1 dac_bridge(out_low = 0.0 out_high = {vcc1} out_undef = {vcc1/2.0}
++ input_load = 5.0e-12 t_rise = {tripdt1} t_fall = {tripdt1})
+Rout out20 out {Rout}
+.ends
+
+
+*
+*============================================================================
+*
+* A hopefully real transistor level based model of the 74HCU04. The model
+* comes directly from philips. http://www.philipslogic.com/support/spice/
+* This a unbuffered inverter which is often used in LC or crystal oscillators.
+* Inverter, unbuffered
+* Original Philips model used.
+.SUBCKT 74HCU04  A Y  VCC VGND  vcc1={vcc} speed1={speed} tripdt1={tripdt}
+*Rin  A A1  200
+*Cin  A1 VGND  3p
+*XAY  A1 Y VCC VGND 74HC04_INV0
+XAY  A Y VCC VGND 74HC04_INV0
+.ends
+*
+*
+.SUBCKT 74HC04_INV0  2  3  80 90
+*IN=2, OUT=3, VCC=80, GND=90
+XINP  20  25  50  60    74HC_INP0N
+XOUTP 25  30  50  60    74HC_OUTPN
+L1  80  50   6.87NH
+L2  60  90   6.87NH
+L3   2  20   5.97NH
+L4  30   3   5.97NH
+C1  50  90   1.5P
+C2  60  90   1.5P
+C3  20  90   1.5P
+C4  3   90   1.5P
+.ENDS
+*
+.SUBCKT 74HC_INP0N  2  3  50  60
+*IN=2, OUT=3, VCC=50, GND=60
+R1  2  3  100
+MP1 3 50 50 50  MHCPEN W=20U L=2.4U AD=100P AS=100P PD=40U PS= 20U
+MN1 3 60 60 60  MHCNEN W=35U L=2.4U AD=260P AS=260P PD=70U PS= 20U
+.ENDS
+*
+.SUBCKT 74HC_OUTPN 2  3  50  60
+*IN=2, OUT=3, VCC=50, GND=60
+R1  2 4 100
+MP1 3 4 50 50  MHCPEN W=360U L=2.4U AD=400P AS=400P PD=10U PS=180U
+MN1 3 4 60 60  MHCNEN W=140U L=2.4U AD=200P AS=300P PD=10U PS=130U
+R2  4 5 50
+MP2 3 5 50 50  MHCPEN W=360U L=2.4U AD=400P AS=400P PD=10U PS=180U
+MN2 3 5 60 60  MHCNEN W=140U L=2.4U AD=200P AS=200P PD=10U PS=130U
+R3  5 6 50
+MP3 3 6 50 50  MHCPEN W=360U L=2.4U AD=400P AS=400P PD=10U PS=180U
+MN3 3 6 60 60  MHCNEN W=140U L=2.4U AD=200P AS=200P PD=10U PS=130U
+.ENDS
+************************************************
+*         NOMINAL N-Channel Transistor         *
+*            UCB-3 Parameter Set               *
+*         HIGH-SPEED CMOS Logic Family         *
+*                10-Jan.-1995                  *
+************************************************
+.Model MHCNEN NMOS (
++LEVEL = 3
++KP    = 45.3E-6
++VTO   = 0.72
++TOX   = 51.5E-9
++NSUB  = 2.8E15
++GAMMA = 0.94
++PHI   = 0.65
++VMAX  = 150E3
++RS    = 40
++RD    = 40
++XJ    = 0.11E-6
++LD    = 0.52E-6
++DELTA = 0.315
++THETA = 0.054
++ETA   = 0.025
++KAPPA = 0.0
++WD    = 0.0 )
+
+***********************************************
+*        NOMINAL P-Channel transistor         *
+*           UCB-3 Parameter Set               *
+*         HIGH-SPEED CMOS Logic Family        *
+*               10-Jan.-1995                  *
+***********************************************
+.Model MHCPEN PMOS (
++LEVEL = 3
++KP    = 22.1E-6
++VTO   = -0.71
++TOX   = 51.5E-9
++NSUB  = 3.3E16
++GAMMA = 0.92
++PHI   = 0.65
++VMAX  = 970E3
++RS    = 80
++RD    = 80
++XJ    = 0.63E-6
++LD    = 0.23E-6
++DELTA = 2.24
++THETA = 0.108
++ETA   = 0.322
++KAPPA = 0.0
++WD    = 0.0 )
+
+
+

paranoia_parallel/examples/digital/adder-comparison.txt

@@ -0,0 +1,23 @@
+Compare four different 4-bit full adders,
+made of NAND gates
+Simulating for 6400ns
+
+adder_bib
+The old spice bipolar NAND gate full adder
+Simulation time 14.0s
+
+adder_mos
+A MOS NAND gate inverter, using BSIM3 and OpenMP
+Simulation time 10.5s
+
+adder_behav
+NAND gates made with XSPICE digital devices,
+but each has an analog interface, the interconnect
+is analog, gate library is 74HCng_short_2.lib
+Simulation time 1.9s
+
+adder_Xspice
+Fully digital, event node based NAND gates
+digital plotting into vcd file, display with gtkwave
+Simulation time 0.27s
+

paranoia_parallel/examples/digital/adder_Xspice.cir

@@ -0,0 +1,85 @@
+  ADDER - 4 BIT ALL-NAND-GATE BINARY ADDER
+
+*** SUBCIRCUIT DEFINITIONS
+.SUBCKT NAND in1 in2 out
+*   NODES:  INPUT(2), OUTPUT
+a6 [in1 in2] out nand1
+.ENDS NAND
+
+.model nand1 d_nand(rise_delay = 0.7e-9 fall_delay = 0.7e-9
++ input_load = 0.5e-12)
+
+.SUBCKT ONEBIT 1 2 3 4 5
+*   NODES:  INPUT(2), CARRY-IN, OUTPUT, CARRY-OUT
+X1   1  2  7   NAND
+X2   1  7  8   NAND
+X3   2  7  9   NAND
+X4   8  9 10   NAND
+X5   3 10 11   NAND
+X6   3 11 12   NAND
+X7  10 11 13   NAND
+X8  12 13  4   NAND
+X9  11  7  5   NAND
+.ENDS ONEBIT
+
+.SUBCKT TWOBIT 1 2 3 4 5 6 7 8
+*   NODES:  INPUT - BIT0(2) / BIT1(2), OUTPUT - BIT0 / BIT1,
+*           CARRY-IN, CARRY-OUT
+X1   1  2  7  5 10   ONEBIT
+X2   3  4 10  6  8   ONEBIT
+.ENDS TWOBIT
+
+.SUBCKT FOURBIT 1 2 3 4 5 6 7 8 9 10 11 12 13 14
+*   NODES:  INPUT - BIT0(2) / BIT1(2) / BIT2(2) / BIT3(2),
+*           OUTPUT - BIT0 / BIT1 / BIT2 / BIT3, CARRY-IN, CARRY-OUT
+X1   1  2  3  4  9 10 13 16  TWOBIT
+X2   5  6  7  8 11 12 16 14  TWOBIT
+.ENDS FOURBIT
+
+
+*** ALL INPUTS (analog)
+VIN1A  a1  0   DC 0 PULSE(0 3 0 0.5NS 0.5NS   20NS   50NS)
+VIN1B  a2  0   DC 0 PULSE(0 3 0 0.5NS 0.5NS   30NS  100NS)
+VIN2A  a3  0   DC 0 PULSE(0 3 0 0.5NS 0.5NS   50NS  200NS)
+VIN2B  a4  0   DC 0 PULSE(0 3 0 0.5NS 0.5NS   90NS  400NS)
+VIN3A  a5  0   DC 0 PULSE(0 3 0 0.5NS 0.5NS  170NS  800NS)
+VIN3B  a6  0   DC 0 PULSE(0 3 0 0.5NS 0.5NS  330NS 1600NS)
+VIN4A  a7  0   DC 0 PULSE(0 3 0 0.5NS 0.5NS  650NS 3200NS)
+VIN4B  a8  0   DC 0 PULSE(0 3 0 0.5NS 0.5NS 1290NS 6400NS)
+
+*** analog to digital 
+abridge2 [a1 a2 a3 a4 a5 a6 a7 a8] [1 2 3 4 5 6 7 8] adc_buff
+.model adc_buff adc_bridge(in_low = 1 in_high = 2)
+
+*** digital 0
+V0 a0 0 0
+abridge0 [a0] [d0] adc_buff
+
+*** DEFINE NOMINAL CIRCUIT
+X1     1  2  3  4  5  6  7  8  s0 s1 s2 s3  d0 c3 FOURBIT
+
+*.TRAN 500p 6400NS
+* save inputs
+*.save V(a1) V(a2) V(a3) V(a4) V(a5) V(a6) V(a7) V(a8) 
+
+*.save v(1)
+
+
+.control
+*save v(1)
+TRAN 500p 100NS
+rusage
+display
+edisplay
+* save data to input directory
+cd $inputdir 
+eprvcd 1 2 3 4 5 6 7 8 s0 s1 s2 s3 c3 > adder_x.vcd
+* plotting the vcd file (e.g. with GTKWave)
+* For Windows: returns control to ngspice
+*shell start gtkwave adder_x.vcd --script nggtk.tcl
+* Others
+shell gtkwave adder_x.vcd --script nggtk.tcl &
+quit
+.endc
+
+.END

paranoia_parallel/examples/digital/adder_behav.cir

@@ -0,0 +1,70 @@
+  ADDER - 4 BIT ALL-74HC00-GATE BINARY ADDER
+  * behavioral gate description
+
+*** SUBCIRCUIT DEFINITIONS
+.include 74HCng_short_2.lib
+.param vcc=3 tripdt=6n
+
+.SUBCKT ONEBIT 1 2 3 4 5 6
+*   NODES:  INPUT(2), CARRY-IN, OUTPUT, CARRY-OUT, VCC
+X1   1  2  7  6  0 74HC00
+X2   1  7  8  6  0 74HC00
+X3   2  7  9  6  0 74HC00
+X4   8  9 10  6  0 74HC00
+X5   3 10 11  6  0 74HC00
+X6   3 11 12  6  0 74HC00
+X7  10 11 13  6  0 74HC00
+X8  12 13  4  6  0 74HC00
+X9  11  7  5  6  0 74HC00
+.ENDS ONEBIT
+
+.SUBCKT TWOBIT 1 2 3 4 5 6 7 8 9
+*   NODES:  INPUT - BIT0(2) / BIT1(2), OUTPUT - BIT0 / BIT1,
+*           CARRY-IN, CARRY-OUT, VCC
+X1   1  2  7  5 10  9   ONEBIT
+X2   3  4 10  6  8  9   ONEBIT
+.ENDS TWOBIT
+
+.SUBCKT FOURBIT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
+*   NODES:  INPUT - BIT0(2) / BIT1(2) / BIT2(2) / BIT3(2),
+*           OUTPUT - BIT0 / BIT1 / BIT2 / BIT3, CARRY-IN, CARRY-OUT, VCC
+X1   1  2  3  4  9 10 13 16 15   TWOBIT
+X2   5  6  7  8 11 12 16 14 15   TWOBIT
+.ENDS FOURBIT
+
+*** POWER
+VCC   99  0   DC 3.3V
+
+*** ALL INPUTS
+VIN1A  1  0   DC 0 PULSE(0 3 0 5NS 5NS   20NS   50NS)
+VIN1B  2  0   DC 0 PULSE(0 3 0 5NS 5NS   30NS  100NS)
+VIN2A  3  0   DC 0 PULSE(0 3 0 5NS 5NS   50NS  200NS)
+VIN2B  4  0   DC 0 PULSE(0 3 0 5NS 5NS   90NS  400NS)
+VIN3A  5  0   DC 0 PULSE(0 3 0 5NS 5NS  170NS  800NS)
+VIN3B  6  0   DC 0 PULSE(0 3 0 5NS 5NS  330NS 1600NS)
+VIN4A  7  0   DC 0 PULSE(0 3 0 5NS 5NS  650NS 3200NS)
+VIN4B  8  0   DC 0 PULSE(0 3 0 5NS 5NS 1290NS 6400NS)
+
+*** DEFINE NOMINAL CIRCUIT
+X1     1  2  3  4  5  6  7  8  9 10 11 12  0 13 99 FOURBIT
+
+.option noinit acct
+.TRAN 500p 100NS
+* save inputs
+.save V(1) V(2) V(3) V(4) V(5) V(6) V(7) V(8) 
+
+.control
+pre_set strict_errorhandling
+unset ngdebug
+*save outputs and specials
+save x1.x1.x1.7 V(9) V(10) V(11) V(12) V(13)
+run
+rusage
+* plot the inputs, use offset to plot on top of each other
+plot  v(1) v(2)+4 v(3)+8 v(4)+12 v(5)+16 v(6)+20 v(7)+24 v(8)+28 
+* plot the outputs, use offset to plot on top of each other
+plot  v(9) v(10)+4 v(11)+8 v(12)+12 v(13)+16
+quit
+.endc
+
+.END

paranoia_parallel/examples/digital/adder_bip.cir

@@ -0,0 +1,89 @@
+  ADDER - 4 BIT ALL-NAND-GATE BINARY ADDER
+
+*** SUBCIRCUIT DEFINITIONS
+.SUBCKT NAND 1 2 3 4
+*   NODES:  INPUT(2), OUTPUT, VCC
+Q1        9  5  1 QMOD
+D1CLAMP   0  1    DMOD
+Q2        9  5  2 QMOD
+D2CLAMP   0  2    DMOD
+RB        4  5    4K
+R1        4  6    1.6K
+Q3        6  9  8 QMOD
+R2        8  0    1K
+RC        4  7    130
+Q4        7  6 10 QMOD
+DVBEDROP 10  3    DMOD
+Q5        3  8  0 QMOD
+.ENDS NAND
+
+.SUBCKT ONEBIT 1 2 3 4 5 6
+*   NODES:  INPUT(2), CARRY-IN, OUTPUT, CARRY-OUT, VCC
+X1   1  2  7  6   NAND
+X2   1  7  8  6   NAND
+X3   2  7  9  6   NAND
+X4   8  9 10  6   NAND
+X5   3 10 11  6   NAND
+X6   3 11 12  6   NAND
+X7  10 11 13  6   NAND
+X8  12 13  4  6   NAND
+X9  11  7  5  6   NAND
+.ENDS ONEBIT
+
+.SUBCKT TWOBIT 1 2 3 4 5 6 7 8 9
+*   NODES:  INPUT - BIT0(2) / BIT1(2), OUTPUT - BIT0 / BIT1,
+*           CARRY-IN, CARRY-OUT, VCC
+X1   1  2  7  5 10  9   ONEBIT
+X2   3  4 10  6  8  9   ONEBIT
+.ENDS TWOBIT
+
+.SUBCKT FOURBIT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
+*   NODES:  INPUT - BIT0(2) / BIT1(2) / BIT2(2) / BIT3(2),
+*           OUTPUT - BIT0 / BIT1 / BIT2 / BIT3, CARRY-IN, CARRY-OUT, VCC
+X1   1  2  3  4  9 10 13 16 15   TWOBIT
+X2   5  6  7  8 11 12 16 14 15   TWOBIT
+.ENDS FOURBIT
+
+*** DEFINE NOMINAL CIRCUIT
+.MODEL DMOD D
+.MODEL QMOD NPN(BF=75 RB=100 CJE=1PF CJC=3PF)
+VCC   99  0   DC 5V
+VIN1A  1  0   PULSE(0 3 0 10NS 10NS   10NS   50NS)
+VIN1B  2  0   PULSE(0 3 0 10NS 10NS   20NS  100NS)
+VIN2A  3  0   PULSE(0 3 0 10NS 10NS   40NS  200NS)
+VIN2B  4  0   PULSE(0 3 0 10NS 10NS   80NS  400NS)
+VIN3A  5  0   PULSE(0 3 0 10NS 10NS  160NS  800NS)
+VIN3B  6  0   PULSE(0 3 0 10NS 10NS  320NS 1600NS)
+VIN4A  7  0   PULSE(0 3 0 10NS 10NS  640NS 3200NS)
+VIN4B  8  0   PULSE(0 3 0 10NS 10NS 1280NS 6400NS)
+X1     1  2  3  4  5  6  7  8  9 10 11 12  0 13 99 FOURBIT
+RBIT0  9  0   1K
+RBIT1 10  0   1K
+RBIT2 11  0   1K
+RBIT3 12  0   1K
+RCOUT 13  0   1K
+
+*** (FOR THOSE WITH MONEY (AND MEMORY) TO BURN)
+.option noinit acct
+.TRAN 1NS 100NS
+*.save VIN1A VIN1B VIN2A VIN2B VIN3A VIN3B VIN4A VIN4B
+* save inputs
+.save V(1) V(2) V(3) V(4) V(5) V(6) V(7) V(8)
+* save outputs
+.save V(9) V(10) V(11) V(12) V(13)
+*.options savecurrents
+*.save alli
+
+.control
+run
+rusage
+* plot the inputs, use offset to plot on top of each other
+plot  v(1) v(2)+4 v(3)+8 v(4)+12 v(5)+16 v(6)+20 v(7)+24 v(8)+28 
+* plot the outputs, use offset to plot on top of each other
+plot  v(9) v(10)+4 v(11)+8 v(12)+12 v(13)+16
+quit
+.endc
+
+.END
+
+

paranoia_parallel/examples/digital/adder_cshunt.cir

@@ -0,0 +1,81 @@
+  ADDER - 4 BIT ALL-NAND-GATE BINARY ADDER
+
+*** SUBCIRCUIT DEFINITIONS
+.SUBCKT NAND in1 in2 out VDD
+*   NODES:  INPUT(2), OUTPUT, VCC
+M1 out in2 Vdd Vdd p1 W=7.5u L=0.35u pd=13.5u ad=22.5p ps=13.5u as=22.5p
+M2 net.1 in2 0 0 n1   W=3u   L=0.35u pd=9u    ad=9p    ps=9u    as=9p
+M3 out in1 Vdd Vdd p1 W=7.5u L=0.35u pd=13.5u ad=22.5p ps=13.5u as=22.5p
+M4 out in1 net.1 0 n1 W=3u   L=0.35u pd=9u    ad=9p    ps=9u    as=9p
+.ENDS NAND
+
+.SUBCKT ONEBIT 1 2 3 4 5 6
+*   NODES:  INPUT(2), CARRY-IN, OUTPUT, CARRY-OUT, VCC
+X1   1  2  7  6   NAND
+X2   1  7  8  6   NAND
+X3   2  7  9  6   NAND
+X4   8  9 10  6   NAND
+X5   3 10 11  6   NAND
+X6   3 11 12  6   NAND
+X7  10 11 13  6   NAND
+X8  12 13  4  6   NAND
+X9  11  7  5  6   NAND
+.ENDS ONEBIT
+
+.SUBCKT TWOBIT 1 2 3 4 5 6 7 8 9
+*   NODES:  INPUT - BIT0(2) / BIT1(2), OUTPUT - BIT0 / BIT1,
+*           CARRY-IN, CARRY-OUT, VCC
+X1   1  2  7  5 10  9   ONEBIT
+X2   3  4 10  6  8  9   ONEBIT
+.ENDS TWOBIT
+
+.SUBCKT FOURBIT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
+*   NODES:  INPUT - BIT0(2) / BIT1(2) / BIT2(2) / BIT3(2),
+*           OUTPUT - BIT0 / BIT1 / BIT2 / BIT3, CARRY-IN, CARRY-OUT, VCC
+X1   1  2  3  4  9 10 13 16 15   TWOBIT
+X2   5  6  7  8 11 12 16 14 15   TWOBIT
+.ENDS FOURBIT
+
+*** POWER
+VCC   99  0   DC 3.3V
+
+*** ALL INPUTS
+VIN1A  1  0   DC 0 PULSE(0 3 0 5NS 5NS   20NS   50NS)
+VIN1B  2  0   DC 0 PULSE(0 3 0 5NS 5NS   30NS  100NS)
+VIN2A  3  0   DC 0 PULSE(0 3 0 5NS 5NS   50NS  200NS)
+VIN2B  4  0   DC 0 PULSE(0 3 0 5NS 5NS   90NS  400NS)
+VIN3A  5  0   DC 0 PULSE(0 3 0 5NS 5NS  170NS  800NS)
+VIN3B  6  0   DC 0 PULSE(0 3 0 5NS 5NS  330NS 1600NS)
+VIN4A  7  0   DC 0 PULSE(0 3 0 5NS 5NS  650NS 3200NS)
+VIN4B  8  0   DC 0 PULSE(0 3 0 5NS 5NS 1290NS 6400NS)
+
+*** DEFINE NOMINAL CIRCUIT
+X1     1  2  3  4  5  6  7  8  9 10 11 12  0 13 99 FOURBIT
+
+.option noinit acct
+.option cshunt=100f
+.TRAN 500p 100NS
+* save inputs
+.save V(1) V(2) V(3) V(4) V(5) V(6) V(7) V(8) 
+
+* use BSIM3 model with default parameters
+.model n1 nmos level=49 version=3.3.0
+.model p1 pmos level=49 version=3.3.0
+*.include ./Modelcards/modelcard32.nmos
+*.include ./Modelcards/modelcard32.pmos
+
+.control
+pre_set strict_errorhandling
+unset ngdebug
+*save outputs and specials
+save x1.x1.x1.7 V(9) V(10) V(11) V(12) V(13)
+run
+rusage
+* plot the inputs, use offset to plot on top of each other
+plot  v(1) v(2)+4 v(3)+8 v(4)+12 v(5)+16 v(6)+20 v(7)+24 v(8)+28 
+* plot the outputs, use offset to plot on top of each other
+plot  v(9) v(10)+4 v(11)+8 v(12)+12 v(13)+16
+quit
+.endc
+
+.END

paranoia_parallel/examples/digital/adder_mos.cir

@@ -0,0 +1,81 @@
+  ADDER - 4 BIT ALL-NAND-GATE BINARY ADDER
+
+*** SUBCIRCUIT DEFINITIONS
+.SUBCKT NAND in1 in2 out VDD
+*   NODES:  INPUT(2), OUTPUT, VCC
+M1 out in2 Vdd Vdd p1 W=7.5u L=0.35u pd=13.5u ad=22.5p ps=13.5u as=22.5p
+M2 net.1 in2 0 0 n1   W=3u   L=0.35u pd=9u    ad=9p    ps=9u    as=9p
+M3 out in1 Vdd Vdd p1 W=7.5u L=0.35u pd=13.5u ad=22.5p ps=13.5u as=22.5p
+M4 out in1 net.1 0 n1 W=3u   L=0.35u pd=9u    ad=9p    ps=9u    as=9p
+.ENDS NAND
+
+.SUBCKT ONEBIT 1 2 3 4 5 6
+*   NODES:  INPUT(2), CARRY-IN, OUTPUT, CARRY-OUT, VCC
+X1   1  2  7  6   NAND
+X2   1  7  8  6   NAND
+X3   2  7  9  6   NAND
+X4   8  9 10  6   NAND
+X5   3 10 11  6   NAND
+X6   3 11 12  6   NAND
+X7  10 11 13  6   NAND
+X8  12 13  4  6   NAND
+X9  11  7  5  6   NAND
+.ENDS ONEBIT
+
+.SUBCKT TWOBIT 1 2 3 4 5 6 7 8 9
+*   NODES:  INPUT - BIT0(2) / BIT1(2), OUTPUT - BIT0 / BIT1,
+*           CARRY-IN, CARRY-OUT, VCC
+X1   1  2  7  5 10  9   ONEBIT
+X2   3  4 10  6  8  9   ONEBIT
+.ENDS TWOBIT
+
+.SUBCKT FOURBIT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
+*   NODES:  INPUT - BIT0(2) / BIT1(2) / BIT2(2) / BIT3(2),
+*           OUTPUT - BIT0 / BIT1 / BIT2 / BIT3, CARRY-IN, CARRY-OUT, VCC
+X1   1  2  3  4  9 10 13 16 15   TWOBIT
+X2   5  6  7  8 11 12 16 14 15   TWOBIT
+.ENDS FOURBIT
+
+*** POWER
+VCC   99  0   DC 3.3V
+
+*** ALL INPUTS
+VIN1A  1  0   DC 0 PULSE(0 3 0 5NS 5NS   20NS   50NS)
+VIN1B  2  0   DC 0 PULSE(0 3 0 5NS 5NS   30NS  100NS)
+VIN2A  3  0   DC 0 PULSE(0 3 0 5NS 5NS   50NS  200NS)
+VIN2B  4  0   DC 0 PULSE(0 3 0 5NS 5NS   90NS  400NS)
+VIN3A  5  0   DC 0 PULSE(0 3 0 5NS 5NS  170NS  800NS)
+VIN3B  6  0   DC 0 PULSE(0 3 0 5NS 5NS  330NS 1600NS)
+VIN4A  7  0   DC 0 PULSE(0 3 0 5NS 5NS  650NS 3200NS)
+VIN4B  8  0   DC 0 PULSE(0 3 0 5NS 5NS 1290NS 6400NS)
+
+*** DEFINE NOMINAL CIRCUIT
+X1     1  2  3  4  5  6  7  8  9 10 11 12  0 13 99 FOURBIT
+
+.option noinit acct
+
+.TRAN 500p 100NS
+* save inputs
+.save V(1) V(2) V(3) V(4) V(5) V(6) V(7) V(8) 
+
+* use BSIM3 model with default parameters
+.model n1 nmos level=49 version=3.3.0
+.model p1 pmos level=49 version=3.3.0
+*.include ./Modelcards/modelcard32.nmos
+*.include ./Modelcards/modelcard32.pmos
+
+.control
+pre_set strict_errorhandling
+unset ngdebug
+*save outputs and specials
+save x1.x1.x1.7 V(9) V(10) V(11) V(12) V(13)
+run
+rusage
+* plot the inputs, use offset to plot on top of each other
+plot  v(1) v(2)+4 v(3)+8 v(4)+12 v(5)+16 v(6)+20 v(7)+24 v(8)+28 
+* plot the outputs, use offset to plot on top of each other
+plot  v(9) v(10)+4 v(11)+8 v(12)+12 v(13)+16
+quit
+.endc
+
+.END

paranoia_parallel/examples/digital/nggtk.tcl

@@ -0,0 +1,10 @@
+# tcl script for gtkwave: show vcd file data created by ngspice
+set nfacs [ gtkwave::getNumFacs ]
+
+for {set i 0} {$i < $nfacs } {incr i} {
+    set facname [ gtkwave::getFacName $i ]
+    set num_added [ gtkwave::addSignalsFromList $facname ]
+}
+
+gtkwave::/Edit/UnHighlight_All
+gtkwave::/Time/Zoom/Zoom_Full

paranoia_parallel/examples/digital_devices/.spiceinit

@@ -0,0 +1 @@
+set ngbehavior=ltpsa

paranoia_parallel/examples/digital_devices/behav-568.cir

@@ -0,0 +1,464 @@
+behav-568  74ALS568a  74F568  74LS568
+
+* ----------------------------------------------------------- 74ALS568A ------
+*  Synchronous 4-Bit Up/Down Binary Counters With 3-State Outputs
+*
+*  The ALS/AS Logic Data Book, 1986, TI Pages 2-425 to 2-433
+*  bss    5/3/94
+*
+.SUBCKT 74ALS568A GBAR U/DB CLK ENTBAR ENPBAR SCLRBAR LOADBAR ACLRBAR 
++     A B C D CCOBAR RCOBAR QA QB QC QD
++     optional:  DPWR=$G_DPWR DGND=$G_DGND
++     params:  MNTYMXDLY=0 IO_LEVEL=0
+
+U1 dff(4) DPWR DGND
++     $D_HI ACLRBAR CLK
++     DA DB DC DD
++     QA_O QB_O QC_O QD_O
++     QABAR QBBAR QCBAR QDBAR
++     D0_EFF IO_ALS00 MNTYMXDLY={MNTYMXDLY} IO_LEVEL={IO_LEVEL}
+
+U2LOG LOGICEXP(18,6) DPWR DGND
++     U/DB CLK ENTBAR ENPBAR SCLRBAR LOADBAR A B C D
++     QA_O QB_O QC_O QD_O QABAR QBBAR QCBAR QDBAR
++     DA DB DC DD RCOBAR_O CCOBAR_O
++     D0_GATE IO_ALS00 MNTYMXDLY={MNTYMXDLY} IO_LEVEL={IO_LEVEL}
++
++  LOGIC:
++     clkbar = {~CLK}
++     sclr = {~SCLRBAR}
++     ub/d = {~U/DB}
++     ent = {~ENTBAR}
++     count = {~(ENTBAR | ENPBAR)}
++     sync2 = {~(sclr | LOADBAR)}
++     sync1 = {~(ENTBAR | ENPBAR | sclr | sync2)}
++     sync3 = {(SCLRBAR & LOADBAR)}
++     fba = {~((QABAR & U/DB) | (QA_O & ub/d))}
++     fbb = {~((QBBAR & U/DB) | (QB_O & ub/d))}
++     fbc = {~((QCBAR & U/DB) | (QC_O & ub/d))}
++     fbd = {~((QDBAR & U/DB) | (QD_O & ub/d))}
++     nand1 = {~(U/DB & fbd)}
++     nand2 = {~(QCBAR & ub/d & QDBAR)}
++     and1a = {(A & sync2)}
++     and2a = {((~sync1) & sync3 & QA_O)}
++     and3a = {((~(QA_O & sync3)) & sync1)}
++     DA = {and1a | and2a | and3a}
++     and1b = {(B & sync2)}
++     and2b = {((~(fba & sync1)) & sync3 & QB_O)}
++     and3b = {(fba & sync1 & nand2 & nand1 & QBBAR)}
++     DB = {and1b | and2b | and3b}
++     and1c = {(C & sync2)}
++     and2c = {((~(fba & fbb & sync1)) & sync3 & QC_O)}
++     and3c = {((~(QC_O & sync3)) & fbb & fba & sync1 & nand2)}
++     DC = {and1c | and2c | and3c}
++     and1d = {(D & sync2)}
++     and2d = {((~(fba & sync1)) & sync3 & QD_O)}
++     and3d = {((~(QD_O & sync3)) & fbc & fbb & fba & sync1)}
++     DD = {and1d | and2d | and3d}
++     RCOBAR_O = {~((U/DB & fbd & fba & ent) | (ent & fba & fbb & fbc & fbd & ub/d))}
++     rco = {~RCOBAR_O}
++     CCOBAR_O = {~(clkbar & count & rco)}
+
+U3DLY PINDLY(6,1,5) DPWR DGND
++     QA_O QB_O QC_O QD_O RCOBAR_O CCOBAR_O
++     GBAR
++     CLK U/DB ENTBAR ENPBAR ACLRBAR
++     QA QB QC QD RCOBAR CCOBAR
++     IO_ALS00 MNTYMXDLY={MNTYMXDLY} IO_LEVEL={IO_LEVEL}
++
++  BOOLEAN:
++     CLOCK = {CHANGED_LH(CLK,0)}
++     CCK1 = {CHANGED(CLK,0)}
++     UPDOWN = {CHANGED(U/DB,0)}
++     ENABT = {CHANGED(ENTBAR,0)}
++     ENABP = {CHANGED(ENPBAR,0)}
++     CLEAR = {CHANGED_HL(ACLRBAR,0)}
++
++  TRISTATE:
++     ENABLE LO=GBAR
++     QA QB QC QD = {
++       CASE(
++         CLEAR & TRN_HL, DELAY(9ns,-1,20ns),
++         CLOCK & TRN_LH, DELAY(4ns,-1,13ns),
++         CLOCK & TRN_HL, DELAY(7ns,-1,16ns),
++         TRN_ZH, DELAY(6ns,-1,18ns),
++         TRN_ZL, DELAY(6ns,-1,24ns),
++         TRN_HZ, DELAY(1ns,-1,10ns),
++         TRN_LZ, DELAY(3ns,-1,13ns),
++         DELAY(10ns,-1,25ns))}
++
++  PINDLY:
++     RCOBAR = {
++       CASE(
++         CLOCK & TRN_LH, DELAY(12ns,-1,28ns),
++         CLOCK & TRN_HL, DELAY(10ns,-1,19ns),
++         UPDOWN & TRN_LH, DELAY(9ns,-1,23ns),
++         UPDOWN & TRN_HL, DELAY(9ns,-1,19ns),
++         ENABT & TRN_LH, DELAY(6ns,-1,15ns),
++         ENABT & TRN_HL, DELAY(4ns,-1,13ns),
++         DELAY(13ns,-1,29ns))}
++
++     CCOBAR = {
++        CASE(
++         ENABT & TRN_LH, DELAY(5ns,-1,13ns),
++         ENABT & TRN_HL, DELAY(9ns,-1,23ns),
++         CCK1 & TRN_LH, DELAY(5ns,-1,13ns),
++         CCK1 & TRN_HL, DELAY(6ns,-1,25ns),
++         ENABP & TRN_LH, DELAY(4ns,-1,12ns),
++         ENABP & TRN_HL, DELAY(5ns,-1,14ns),
++         DELAY(10ns,-1,26ns))}
+
+U4CON CONSTRAINT(11) DPWR DGND
++     ACLRBAR LOADBAR CLK A B C D ENPBAR ENTBAR SCLRBAR U/DB
++     IO_ALS00 IO_LEVEL={IO_LEVEL}
++
++  FREQ:
++     NODE=CLK
++     MAXFREQ=20MEG
++
++  WIDTH:
++     NODE=CLK
++     MIN_HI=25ns
++     MIN_LO=25ns
++
++  WIDTH:
++     NODE=ACLRBAR
++     MIN_LO=15ns
++
++  WIDTH:
++     NODE=LOADBAR
++     MIN_LO=15ns
++
++  SETUP_HOLD:
++     CLOCK LH=CLK
++     DATA(4)=A B C D
++     SETUPTIME=20ns
++     WHEN={SCLRBAR!='0 | ACLRBAR!='0}
++
++  SETUP_HOLD:
++     CLOCK LH=CLK
++     DATA(2)=ENPBAR ENTBAR
++     SETUPTIME_HI=30ns
++     SETUPTIME_LO=20ns
++
++  SETUP_HOLD:
++     CLOCK LH=CLK
++     DATA(2)=SCLRBAR LOADBAR
++     SETUPTIME_LO=15ns
++     SETUPTIME_HI=30ns
++
++  SETUP_HOLD:
++     CLOCK LH=CLK
++     DATA(1)=U/DB
++     SETUPTIME=30ns
++
++  SETUP_HOLD:
++     CLOCK LH=CLK
++     DATA(1)=ACLRBAR
++     SETUPTIME_HI=10ns
+
+.ENDS 74ALS568A
+*
+*
+* ----------------------------------------------------------- 74F568 ------
+*  4-Bit Bidirectional Decade Counters With 3-State Outputs
+*
+*  The FAST TTL Logic Data Book, 1992, Philips Pages 562 to 572
+*  bss    5/3/94
+*	Left out the top AND gate in the feedback for the 2nd D flip-flop
+*	or the logic would be wrong
+*
+.SUBCKT 74F568 OEBAR U/DB CP CETBAR CEPBAR SRBAR PEBAR MRBAR 
++     D0 D1 D2 D3 CCBAR TCBAR Q0 Q1 Q2 Q3
++     optional:  DPWR=$G_DPWR DGND=$G_DGND
++     params:  MNTYMXDLY=0 IO_LEVEL=0
+
+U1 dff(4) DPWR DGND
++     $D_HI MRBAR CP
++     DA DB DC DD
++     Q0_O Q1_O Q2_O Q3_O
++     Q0BAR Q1BAR Q2BAR Q3BAR
++     D0_EFF IO_F MNTYMXDLY={MNTYMXDLY} IO_LEVEL={IO_LEVEL}
+
+U2LOG LOGICEXP(18,6) DPWR DGND
++     U/DB CP CETBAR CEPBAR SRBAR PEBAR D0 D1 D2 D3
++     Q0_O Q1_O Q2_O Q3_O Q0BAR Q1BAR Q2BAR Q3BAR
++     DA DB DC DD TCBAR_O CCBAR_O
++     D0_GATE IO_F MNTYMXDLY={MNTYMXDLY} IO_LEVEL={IO_LEVEL}
++
++  LOGIC:
++     clkbar = {~CP}
++     ub/d = {~U/DB}
++     ent = {~CETBAR}
++     cnt = {~(SRBAR & PEBAR)}
++     cntbar = {~cnt}
++     count = {~(CETBAR | CEPBAR | cnt)}
++     nand0 = {~(D0 & SRBAR)}
++     nand1 = {~(D1 & SRBAR)}
++     nand2 = {~(D2 & SRBAR)}
++     nand3 = {~(D3 & SRBAR)}
++     fb1 = {(U/DB | ub/d)}
+*	Logic added to fb2 and fb3 so C would go to 5 on a count down
++     fb2 = {((Q3BAR & Q0_O & U/DB) | (Q3_O & Q2BAR & Q1BAR & Q0BAR & ub/d) |
++             (Q0BAR & Q1BAR & Q3BAR & Q2_O & ub/d) | (Q1_O & Q0BAR & ub/d))}
++     fb3 = {((Q1_O & Q0_O & U/DB) | (Q2BAR & Q1BAR & Q0BAR & Q3_O & ub/d) | 
++             (Q0BAR & Q1BAR & Q2_O & Q3BAR & ub/d))}
++     fb4 = {((Q0_O & Q3_O & U/DB) | (Q2_O & Q1_O & Q0_O & U/DB) |
++             (Q2BAR & Q1BAR & Q0BAR & ub/d) | (Q0BAR & ub/d & Q3_O))}
++     TCBAR_O = {~((Q3_O & Q2BAR & Q1BAR & U/DB & Q0_O & ent) |
++             (ent & Q0BAR & Q1BAR & Q2BAR & Q3BAR & ub/d))}
++     tc = {~TCBAR_O}
++     CCBAR_O = {~(tc & clkbar & count)}
++     xor0 = {(~(fb1 & count)) ^ Q0_O}
++     xor1 = {(~(fb2 & count)) ^ Q1_O}
++     xor2 = {(~(fb3 & count)) ^ Q2_O}
++     xor3 = {(~(fb4 & count)) ^ Q3_O}
++     DA = {~((xor0 & cntbar) | (nand0 & cnt))}
++     DB = {~((xor1 & cntbar) | (nand1 & cnt))}
++     DC = {~((xor2 & cntbar) | (nand2 & cnt))}
++     DD = {~((xor3 & cntbar) | (nand3 & cnt))}
+
+U3DLY PINDLY(6,1,7) DPWR DGND
++     Q0_O Q1_O Q2_O Q3_O TCBAR_O CCBAR_O
++     OEBAR
++     CP U/DB CETBAR CEPBAR MRBAR SRBAR PEBAR
++     Q0 Q1 Q2 Q3 TCBAR CCBAR
++     IO_F MNTYMXDLY={MNTYMXDLY} IO_LEVEL={IO_LEVEL}
++
++  BOOLEAN:
++     CLOCK = {CHANGED_LH(CP,0)}
++     CCK1 = {CHANGED(CP,0)}
++     UPDOWN = {CHANGED(U/DB,0)}
++     ENABT = {CHANGED(CETBAR,0)}
++     ENABP = {CHANGED(CEPBAR,0)}
++     CLEAR = {CHANGED_HL(MRBAR,0)}
++     SYCLR = {CHANGED(SRBAR,0)}
++     LOAD = {CHANGED(PEBAR,0)}
++
++  TRISTATE:
++     ENABLE LO=OEBAR
++     Q0 Q1 Q2 Q3 = {
++       CASE(
++         CLEAR & TRN_HL, DELAY(6ns,8ns,11ns),
++         CLOCK & TRN_LH, DELAY(3ns,6ns,9.5ns),
++         CLOCK & TRN_HL, DELAY(4ns,7.5ns,11ns),
++         TRN_ZH, DELAY(2ns,4ns,7ns),
++         TRN_ZL, DELAY(4.5ns,6.5ns,9.5ns),
++         TRN_HZ, DELAY(1.5ns,3.5ns,6.5ns),
++         TRN_LZ, DELAY(1.5ns,3.5ns,6ns),
++         DELAY(7ns,9ns,12ns))}
++
++  PINDLY:
++     TCBAR = {
++       CASE(
++         CLEAR, DELAY(8ns,11ns,15ns),
++         CLOCK & TRN_LH, DELAY(5.5ns,10ns,15ns),
++         CLOCK & TRN_HL, DELAY(4ns,7.5ns,11ns),
++         UPDOWN & TRN_LH, DELAY(2.5ns,5ns,9ns),
++         UPDOWN & TRN_HL, DELAY(5ns,10ns,15ns),
++         ENABT & TRN_LH, DELAY(1.5ns,3ns,6ns),
++         ENABT & TRN_HL, DELAY(2.5ns,5ns,8ns),
++         DELAY(9ns,12ns,16ns))}
++
++     CCBAR = {
++        CASE(
++         CLEAR, DELAY(8ns,11ns,15ns),
++         UPDOWN & TRN_LH, DELAY(4.5ns,9ns,12ns),
++         UPDOWN & TRN_HL, DELAY(5ns,11ns,16ns),
++         (ENABT | ENABP) & TRN_LH, DELAY(2ns,4ns,7ns),
++         (ENABT | ENABP) & TRN_HL, DELAY(3.5ns,5.5ns,9ns),
++         CCK1 & TRN_LH, DELAY(2.5ns,4.5ns,7.5ns),
++         CCK1 & TRN_HL, DELAY(2ns,4ns,6.5ns),
++         SYCLR & TRN_LH, DELAY(5.5ns,8ns,11ns),
++         SYCLR & TRN_HL, DELAY(7.5ns,9.5ns,12ns),
++         LOAD & TRN_LH, DELAY(3ns,5ns,8ns),
++         LOAD & TRN_HL, DELAY(4ns,6ns,8.5ns),
++         DELAY(9ns,12ns,16ns))}
+
+U4CON CONSTRAINT(11) DPWR DGND
++     MRBAR PEBAR CP D0 D1 D2 D3 CEPBAR CETBAR SRBAR U/DB
++     IO_F IO_LEVEL={IO_LEVEL}
++
++  WIDTH:
++     NODE=CP
++     MIN_HI=8ns
++     MIN_LO=6ns
++
++  WIDTH:
++     NODE=MRBAR
++     MIN_LO=5ns
++
++  SETUP_HOLD:
++     CLOCK LH=CP
++     DATA(4)=D0 D1 D2 D3
++     SETUPTIME=4.5ns
++     HOLDTIME=2.5ns
++     WHEN={SRBAR!='0 | MRBAR!='0}
++
++  SETUP_HOLD:
++     CLOCK LH=CP
++     DATA(2)=CEPBAR CETBAR
++     SETUPTIME=6ns
++
++  SETUP_HOLD:
++     CLOCK LH=CP
++     DATA(2)=SRBAR PEBAR
++     SETUPTIME=9ns
++
++  SETUP_HOLD:
++     CLOCK LH=CP
++     DATA(1)=U/DB
++     SETUPTIME_HI=12.5ns
++     SETUPTIME_LO=17.5ns
++
++  SETUP_HOLD:
++     CLOCK LH=CP
++     DATA(1)=MRBAR
++     SETUPTIME_HI=7ns
+
+.ENDS 74F568
+
+*-----------------------------------------------------------74LS568------
+
+* Four-Bit Up/Down Counters with Tri-State Outputs
+* Motorola Schottky TTL Data, 1983, pages 4-321 to 4-325
+* jat 8/14/96
+
+.SUBCKT 74LS568 LOADBAR A B C D CEPBAR CETBAR U/DBAR CP YA YB YC YD RCOBAR
++ ACLRBAR SCLRBAR OEBAR CCO
++ OPTIONAL: DPWR=$G_DPWR DGND=$G_DGND
++ PARAMS: MNTYMXDLY=0 IO_LEVEL=0
+
+U1 LOGICEXP(18,6) DPWR DGND
++ A B C D SCLRBAR LOADBAR CEPBAR CETBAR CP U/DBAR Q0 Q1 Q2 Q3 Q0BAR Q1BAR
++ Q2BAR Q3BAR
++ D0 D1 D2 D3 RCOBARO CCOO
++ D0_GATE IO_LS MNTYMXDLY={MNTYMXDLY} IO_LEVEL={IO_LEVEL}
++ LOGIC:
++  CE = {~(CETBAR | CEPBAR)}
++  X1 = {~(Q0BAR & CE)}
++  X2 = {~(Q2BAR & Q3BAR)}
++  X3 = {~(Q0 & CE)}
++  X4 = {~(Q1 & Q0 & CE)}
++  X5 = {~(Q1BAR & Q0BAR & CE)}
++  X6 = {~(Q0BAR & CE)}
++  X7 = {~(Q0 & CE)}
++  D0 = {SCLRBAR & ((LOADBAR & ~CE & Q0) | (A & ~LOADBAR) | (CE & LOADBAR & Q0BAR))}
++  D1 = {SCLRBAR & ((X1 & LOADBAR & Q1 & ~U/DBAR) | (Q1BAR & X2 & ~U/DBAR & LOADBAR & Q0BAR & CE)
++      | (B & ~LOADBAR) | (Q1 & X3 & LOADBAR & U/DBAR) |
++        (Q1BAR & LOADBAR & U/DBAR & CE & Q0 & Q3BAR))}
++  D2 = {SCLRBAR & ((X4 & LOADBAR & U/DBAR & Q2) | (U/DBAR & LOADBAR & Q2BAR & Q1 & Q0 & CE) |
++        (C & ~LOADBAR) | (Q2 & X5 & LOADBAR & ~U/DBAR) |
++        (Q2BAR & ~U/DBAR & CE & LOADBAR & Q1BAR & Q0BAR & Q3))}
++  D3 = {SCLRBAR & ((X6 & LOADBAR & ~U/DBAR & Q3) | (~U/DBAR & LOADBAR & Q3BAR & Q2BAR & Q1BAR & Q0BAR & CE) |
++        (D & ~LOADBAR) | (Q3 & X7 & LOADBAR & U/DBAR) |
++        (Q3BAR & U/DBAR & CE & LOADBAR & Q0 & Q1 & Q2))}
++  RCOBARO = {~((~U/DBAR & ~CETBAR & Q0BAR & Q1BAR & Q2BAR & Q3BAR) |
++               (U/DBAR & ~CETBAR & Q0 & Q3))}
++  CCOO = {~(CE & ~RCOBARO & ~CP)}
+
+U2 DFF(4) DPWR DGND
++ $D_HI ACLRBAR CP
++ D0 D1 D2 D3
++ Q0 Q1 Q2 Q3
++ Q0BAR Q1BAR Q2BAR Q3BAR
++ D0_EFF IO_LS MNTYMXDLY={MNTYMXDLY} IO_LEVEL={IO_LEVEL}
+
+U3 PINDLY(6,1,5) DPWR DGND
++ Q0 Q1 Q2 Q3 RCOBARO CCOO
++ OEBAR
++ CP CETBAR U/DBAR CEPBAR ACLRBAR
++ YA YB YC YD RCOBAR CCO
++ IO_LS MNTYMXDLY={MNTYMXDLY} IO_LEVEL={IO_LEVEL}
++ BOOLEAN:
++  EDGE = {CHANGED_LH(CP,0)}
++  DOWNEDGE = {CHANGED_HL(CP,0)}
++  T = {CHANGED(CETBAR,0)}
++  P = {CHANGED(CEPBAR,0)}
++  UPDOWN = {CHANGED(U/DBAR,0)}
++  ACLEAR = {CHANGED(ACLRBAR,0)}
++ TRISTATE:
++ ENABLE LO = OEBAR
++  YA YB YC YD = {
++    CASE(
++      TRN_ZH, DELAY(-1,10NS,16NS),
++      TRN_ZL, DELAY(-1,17NS,24NS),
++      TRN_HZ, DELAY(-1,20NS,25NS),
++      TRN_LZ, DELAY(-1,17NS,27NS),
++      ACLEAR & (TRN_LH | TRN_HL), DELAY(-1,21NS,32NS),
++      EDGE & TRN_LH, DELAY(-1,15NS,24NS),
++      EDGE & TRN_HL, DELAY(-1,23NS,35NS),
++      DELAY(-1,24NS,36NS))}
++ PINDLY:
++  RCOBAR = {
++    CASE(
++      T & TRN_LH, DELAY(-1,14NS,24NS),
++      T & TRN_HL, DELAY(-1,14NS,24NS),
++      UPDOWN & TRN_LH, DELAY(-1,20NS,30NS),
++      UPDOWN & TRN_HL, DELAY(-1,15NS,24NS),
++      EDGE & TRN_LH, DELAY(-1,25NS,40NS),
++      EDGE & TRN_HL, DELAY(-1,26NS,40NS),
++      DELAY(-1,27NS,41NS))}
++  CCO = {
++    CASE(
++      (T | P) & TRN_LH, DELAY(-1,12NS,20NS),
++      (T | P) & TRN_HL, DELAY(-1,20NS,30NS),
++      DOWNEDGE & TRN_LH, DELAY(-1,17NS,27NS),
++      DOWNEDGE & TRN_HL, DELAY(-1,26NS,40NS),
++      DELAY(-1,27NS,41NS))}
+
+U4 CONSTRAINT(10) DPWR DGND
++ CP A B C D SCLRBAR LOADBAR U/DBAR CETBAR CEPBAR
++ IO_LS IO_LEVEL={IO_LEVEL}
++ FREQ:
++  NODE = CP
++  MAXFREQ = 25MEG
++ WIDTH:
++  NODE  = CP
++  MIN_LO = 30NS
++  MIN_HI = 30NS
++ SETUP_HOLD:
++  CLOCK LH = CP
++  DATA(5) = A B C D SCLRBAR
++  SETUPTIME = 20NS
++ SETUP_HOLD:
++  CLOCK LH = CP
++  DATA(1) = LOADBAR
++  SETUPTIME = 30NS
++ SETUP_HOLD:
++  CLOCK LH = CP
++  DATA(1) = U/DBAR
++  SETUPTIME = 50NS
++ SETUP_HOLD:
++  CLOCK LH = CP
++  DATA(2) = CETBAR CEPBAR
++  SETUPTIME = 32NS
+
+.ENDS 74LS568
+
+
+* .SUBCKT 74ALS568A GBAR U/DB CLK ENTBAR ENPBAR SCLRBAR LOADBAR ACLRBAR 
+* +     A B C D CCOBAR RCOBAR QA QB QC QD
+x1 gb ub clk etbar epbar sclrb loadb mclrb d0 d1 d2 d3 ccobar rcobar qa qb qc qd 74als568a
+
+* .SUBCKT 74F568 OEBAR U/DB CP CETBAR CEPBAR SRBAR PEBAR MRBAR 
+* +     D0 D1 D2 D3 CCBAR TCBAR Q0 Q1 Q2 Q3
+x2 gb ub clk etbar epbar sclrb loadb mclrb d0 d1 d2 d3 ccbar tcbar q0 q1 q2 q3 74f568
+
+* .SUBCKT 74LS568 LOADBAR A B C D CEPBAR CETBAR U/DBAR CP YA YB YC YD RCOBAR
+* + ACLRBAR SCLRBAR OEBAR CCO
+x3 loadb d0 d1 d2 d3 epbar etbar ub clk ya yb yc yd rbar mclrb sclrb gb cco 74ls568
+
+a_1 [ loadb sclrb mclrb clk gb ub d0 d1 d2 d3 epbar etbar ] input_vec1
+.model input_vec1 d_source(input_file = "behav-568.stim")
+
+.tran 0.1ns 8us
+.control
+run
+listing r
+* edisplay
+eprint qd qc qb qa q3 q2 q1 q0 ya yb yc yd
+quit
+.endc
+.end
+

paranoia_parallel/examples/digital_devices/behav-568.stim

@@ -0,0 +1,83 @@
+* t       l    s    m    c    g    u    d    d    d    d    e    e
+* i       o    c    c    l    b    b    0    1    2    3    p    t
+* m       a    l    l    k                                  b    b
+* e       d    r    r
+*         b    b    b
+
+0ns       1s   1s   0s   0s   0s   0s   1s   0s   0s   1s   0s   0s
+100ns     1s   1s   1s   0s   0s   0s   1s   0s   0s   1s   0s   0s
+200ns     1s   1s   1s   1s   0s   0s   1s   0s   0s   1s   0s   0s
+300ns     1s   1s   1s   0s   0s   0s   1s   0s   0s   1s   0s   0s
+400ns     1s   1s   1s   1s   0s   0s   1s   0s   0s   1s   0s   0s
+500ns     1s   1s   1s   0s   0s   0s   1s   0s   0s   1s   0s   0s
+600ns     1s   1s   1s   1s   0s   0s   1s   0s   0s   1s   0s   0s
+700ns     1s   1s   1s   0s   0s   0s   1s   0s   0s   0s   0s   0s
+800ns     1s   1s   1s   1s   0s   0s   1s   0s   0s   0s   0s   0s
+900ns     1s   1s   1s   0s   0s   0s   1s   0s   0s   0s   0s   0s
+1.0us     1s   1s   1s   1s   0s   0s   1s   0s   0s   0s   0s   0s
+1.1us     1s   1s   1s   0s   0s   0s   1s   0s   0s   0s   0s   0s
+1.2us     1s   1s   1s   1s   0s   0s   1s   0s   0s   0s   0s   0s
+1.3us     1s   1s   1s   0s   0s   0s   1s   0s   0s   0s   0s   0s
+1.4us     1s   1s   1s   1s   0s   0s   1s   0s   0s   0s   0s   0s
+1.5us     1s   1s   1s   0s   0s   0s   1s   0s   0s   0s   0s   0s
+1.6us     1s   1s   1s   1s   0s   0s   1s   0s   0s   0s   0s   0s
+1.7us     1s   1s   1s   0s   0s   0s   1s   0s   0s   0s   0s   0s
+1.8us     1s   1s   1s   1s   0s   0s   1s   0s   0s   0s   0s   0s
+1.9us     1s   1s   1s   0s   0s   0s   1s   0s   0s   0s   0s   0s
+2.0us     1s   1s   1s   1s   0s   0s   1s   0s   0s   0s   0s   0s
+2.1us     1s   1s   1s   0s   0s   0s   1s   0s   0s   0s   0s   0s
+2.2us     1s   1s   1s   1s   0s   0s   1s   0s   0s   0s   0s   0s
+2.3us     1s   1s   1s   0s   0s   0s   1s   0s   0s   0s   0s   0s
+2.4us     1s   1s   1s   1s   0s   0s   1s   0s   0s   0s   0s   0s
+2.5us     1s   1s   1s   0s   0s   0s   1s   0s   0s   0s   0s   0s
+2.6us     1s   1s   1s   1s   0s   0s   1s   0s   0s   0s   0s   0s
+2.7us     1s   1s   1s   0s   0s   0s   1s   0s   0s   0s   0s   0s
+2.8us     1s   1s   1s   1s   0s   0s   1s   0s   0s   0s   0s   0s
+2.9us     1s   1s   1s   0s   0s   0s   1s   0s   0s   0s   0s   0s
+3.0us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+3.1us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+3.2us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+3.3us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+3.4us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+3.5us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+3.6us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+3.7us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+3.8us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+3.9us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+4.0us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+4.1us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+4.2us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+4.3us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+4.4us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+4.5us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+4.6us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+4.7us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+4.8us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+4.9us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+5.0us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+5.1us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+5.2us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+5.3us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+5.4us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+5.5us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+5.6us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+5.7us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+5.8us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+5.9us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+6.0us     0s   1s   1s   0s   0s   1s   1s   0s   1s   0s   0s   0s
+6.1us     0s   1s   1s   1s   0s   1s   1s   0s   1s   0s   0s   0s
+6.2us     1s   1s   1s   0s   0s   1s   1s   0s   1s   0s   0s   0s
+6.3us     1s   1s   1s   1s   0s   1s   0s   0s   0s   1s   0s   0s
+6.4us     1s   1s   1s   0s   0s   1s   0s   0s   0s   1s   0s   0s
+6.5us     1s   1s   1s   1s   0s   1s   0s   0s   0s   1s   0s   0s
+6.6us     1s   1s   1s   0s   0s   1s   0s   0s   0s   1s   0s   0s
+6.7us     1s   1s   1s   1s   0s   1s   0s   0s   0s   1s   0s   0s
+6.8us     1s   1s   1s   0s   0s   1s   0s   0s   0s   1s   0s   0s
+6.9us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+7.0us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+7.1us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+7.2us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+7.3us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+7.4us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s
+7.5us     1s   1s   1s   1s   0s   1s   1s   0s   0s   0s   0s   0s
+7.6us     1s   1s   1s   0s   0s   1s   1s   0s   0s   0s   0s   0s

paranoia_parallel/examples/digital_devices/counter.cir

@@ -0,0 +1,49 @@
+Conversion of Pspice counter
+
+.subckt counter high clear clk qa qb qc qd 5 7 9 11
+U1 JKFF(1) $G_DPWR $G_DGND  HIGH CLEAR CLK HIGH HIGH QA 5
++ D0_EFF IO_STD IO_LEVEL=0 MNTYMXDLY=2
+U2 JKFF(1) $G_DPWR $G_DGND  HIGH CLEAR QA HIGH HIGH QB 7
++ D0_EFF IO_STD IO_LEVEL=0 MNTYMXDLY=2
+U3 JKFF(1) $G_DPWR $G_DGND  HIGH CLEAR QB HIGH HIGH QC 9
++ D0_EFF IO_STD IO_LEVEL=0 MNTYMXDLY=2
+U4 JKFF(1) $G_DPWR $G_DGND  HIGH CLEAR QC HIGH HIGH QD 11
++ D0_EFF IO_STD IO_LEVEL=0 MNTYMXDLY=2
+.MODEL D0_EFF UEFF ()
+.ends counter
+
+*** input sources ***
+vclk 100 0 pulse( 0.0 1.0 50ns 0ns 0ns 50ns 100ns )
+vreset 200 0  pulse( 1.0 0.0 10ns 0ns 0ns 50ns ) 
+vhigh 300 0 DC 1.0
+
+*** adc_bridge blocks ***
+aconverter [100 200 300] [clock clr hi] adc_bridge1
+.model adc_bridge1 adc_bridge (in_low=0.1 in_high=0.9 
++                              rise_delay=1.0e-12 fall_delay=1.0e-12)
+
+*** resistors to ground ***
+r1 100 0 1k
+r2 200 0 1k
+r3 300 0 1k
+r4 q1b 0 1k
+r5 q2b 0 1k
+r6 q3b 0 1k
+r7 q4b 0 1k
+
+x1 hi clr clock q1 q2 q3 q4 q1b q2b q3b q4b counter
+
+.TRAN 1e-008 1u 0 
+.save all
+
+.control
+*TRAN 1e-008 1u 0 
+run
+listing r
+display
+edisplay
+print q2b q3b q4b
+eprint hi clr clock q1 q2 q3 q4
+quit
+.endc
+.END

paranoia_parallel/examples/digital_devices/ex4.cir

@@ -0,0 +1,85 @@
+Conversion of Pspice full adder
+
+* ----------------------------------------------------------- 74LV86A ------
+*  Quad 2-Input Exclusive-Or Gate
+*
+*  TI PDF File
+*  bss    2/24/03
+*
+.SUBCKT 74LV86A  1A 1B 1Y
++     optional: DPWR_3V=$G_DPWR_3V DGND_3V=$G_DGND_3V
++     params: MNTYMXDLY=0 IO_LEVEL=0
+
+U1 xor DPWR_3V DGND_3V
++     1A 1B 1Y
++     DLY_LV86 IO_LV-A MNTYMXDLY={MNTYMXDLY} IO_LEVEL={IO_LEVEL}
+
+.model DLY_LV86 ugate (tplhTY=7.4ns tplhMX=14.5ns tphlTY=7.4ns tphlMX=14.5ns)
+
+.ENDS  74LV86A
+
+* ----------------------------------------------------------- 74LV08A ------
+*  Quad 2-Input And Gate
+*
+*  TI PDF File
+*  bss    2/21/03
+*
+.SUBCKT 74LV08A  1A 1B 1Y
++     optional: DPWR_3V=$G_DPWR_3V DGND_3V=$G_DGND_3V
++     params: MNTYMXDLY=0 IO_LEVEL=0
+
+U1 and(2) DPWR_3V DGND_3V
++     1A 1B 1Y
++     DLY_LV08 IO_LV-A MNTYMXDLY={MNTYMXDLY} IO_LEVEL={IO_LEVEL}
+
+.model DLY_LV08 ugate (tplhTY=7.5ns tplhMX=12.3ns tphlTY=7.5ns tphlMX=12.3ns)
+
+.ENDS  74LV08A
+
+* ----------------------------------------------------------- 74LV32A ------
+*  Quad 2-Input Or Gate
+*
+*  TI PDF File
+*  bss    2/24/03
+*
+.SUBCKT 74LV32A  1A 1B 1Y
++     optional: DPWR_3V=$G_DPWR_3V DGND_3V=$G_DGND_3V
++     params: MNTYMXDLY=0 IO_LEVEL=0
+
+U1 or(2) DPWR_3V DGND_3V
++     1A 1B 1Y
++     DLY_LV32 IO_LV-A MNTYMXDLY={MNTYMXDLY} IO_LEVEL={IO_LEVEL}
+
+.model DLY_LV32 ugate (
++  tplhTY=6.9ns tplhMX=11.4ns tphlTY=6.9ns tphlMX=11.4ns)
+
+.ENDS  74LV32A
+
+.subckt hadd a b sum carry
+x1_xor a b sum 74lv86a
+x2_and a b carry 74lv08a
+.ends hadd
+
+.subckt fadd a b cin sum cout
+x1_ha a b 1 2 hadd
+x2_ha 1 cin sum 3 hadd
+x3_or 3 2 cout 74lv32a
+.ends fadd
+
+x1 a b cin sum cout fadd
+a2  [a b cin] input_vec1
+.model input_vec1 d_source(input_file = "ex4.stim")
+
+.tran 0.5ns 1650ns 0
+.save all
+.control
+listing r
+run
+display
+edisplay
+eprint a b cin sum cout
+*set xbrushwidth=3
+*plot a b cin cout sum digitop
+quit
+.endc
+.end

paranoia_parallel/examples/digital_devices/ex4.stim

@@ -0,0 +1,13 @@
+* T       a   b   C
+* i               i
+* m               n
+* e
+0.000     0s  0s  0s
+2.0e-7    0s  0s  1s
+4.0e-7    0s  1s  0s
+6.0e-7    0s  1s  1s
+8.0e-7    1s  0s  0s
+10.0e-7   1s  0s  1s
+12.0e-7   1s  1s  0s
+14.0e-7   1s  1s  1s
+16.0e-7   0s  0s  0s

paranoia_parallel/examples/inductive-systems/positive-definite-1.cir

@@ -0,0 +1,32 @@
+* indentify non-viable inductive systems (2x2 case)
+
+* (compile (concat "../../../w32/src/ngspice " buffer-file-name) t)
+* (compile (concat "valgrind --track-origins=yes --leak-check=full --show-reachable=yes ../../../w32/src/ngspice " buffer-file-name) t)
+
+.subckt ind2 a1 a2 b1 b2 L11=0 L22=0 L12=0
+R1 a1 n1 1k
+L1 n1 a2 {L11}
+L2 n2 b2 {L22}
+R2 n2 a2 1k
+K12 L1 L2 {L12/sqrt(abs(L11*L22))}
+.ends
+
+v1 a 0  dc 1
+R1 a 0  1k
+R2 b 0  1k
+
+Xgood1 a 0 b 0 ind2 L11=1u L22=4u L12=1.98u
+Xbad2  a 0 b 0 ind2 L11=1u L22=4u L12=2.01u
+Xgood3 a 0 b 0 ind2 L11=1u L22=4u L12=-1.98u
+Xbad4  a 0 b 0 ind2 L11=1u L22=4u L12=-2.01u
+
+Xbad5 a 0 b 0 ind2 L11=1u L22=-4u L12=1n
+Xbad6 a 0 b 0 ind2 L11=-1u L22=4u L12=1n
+
+.control
+op
+remcirc
+quit 0
+.endc
+
+.end

paranoia_parallel/examples/inductive-systems/positive-definite-2.cir

@@ -0,0 +1,31 @@
+* indentify non-viable inductive systems (3xx case)
+
+* (compile (concat "../../../w32/src/ngspice " buffer-file-name) t)
+* (compile (concat "valgrind --track-origins=yes --leak-check=full --show-reachable=yes ../../../w32/src/ngspice " buffer-file-name) t)
+
+.subckt ind3 a b c L11=10u L22=11u L33=10u K12=0 K13=0 K23=0
+R1 a n1 1k
+R2 b n2 1k
+R4 c n3 1k
+L1 n1 0 {L11}
+L2 n2 0 {L22}
+L3 n3 0 {L33}
+K12 L1 L2 {K12}
+K13 L1 L3 {K13}
+K23 L2 L3 {K23}
+.ends
+
+Xgood1 a b c ind3
+Xgood2 a b c ind3 K12=0.96 K23=0.99 K13=0.98
+Xgood3 a b c ind3 K12=0.96 K23=0.99 K13=0.9898988607
+Xbad4  a b c ind3 K12=0.96 K23=0.99 K13=0.9898988608
+Xborder5  a b c ind3 K12=1 K23=1 K13=1
+Xbad6  a b c ind3 K12=1.01 K23=1 K13=1
+
+.control
+op
+remcirc
+quit 0
+.endc
+
+.end

paranoia_parallel/examples/inductive-systems/positive-definite-3.cir

@@ -0,0 +1,33 @@
+* indentify non-viable inductive systems (4x4 case)
+
+* this excersices the "merging" case in muttemp.c
+
+* (compile (concat "../../../w32/src/ngspice " buffer-file-name) t)
+* (compile (concat "valgrind --track-origins=yes --leak-check=full --show-reachable=yes ../../../w32/src/ngspice " buffer-file-name) t)
+
+.subckt ind4 a b c d L11=0 L22=0 L33=0 L44=0 L12=0 L13=0 L14=0 L23=0 L24=0 L34=0
+R1 a 1 1k
+R2 b 2 1k
+R3 c 3 1k
+R4 d 4 1k
+L1 a 0 {L11}
+L2 b 0 {L22}
+L3 c 0 {L33}
+L4 d 0 {L44}
+K13 L1 L3 {L13/sqrt(abs(L11*L33))}
+K14 L1 L4 {L14/sqrt(abs(L11*L44))}
+K23 L2 L3 {L23/sqrt(abs(L22*L33))}
+K24 L2 L4 {L24/sqrt(abs(L22*L44))}
+K12 L1 L2 {L12/sqrt(abs(L11*L22))}
+K34 L3 L4 {L34/sqrt(abs(L33*L44))}
+.ends
+
+Xgood1 a b c d ind4 L11=1u L22=4u L33=3u L44=5u L12=1n L13=1n L14=1n L23=1n L24=1n L34=1n
+
+.control
+op
+remcirc
+quit 0
+.endc
+
+.end

paranoia_parallel/examples/inductive-systems/positive-definite-4.cir

@@ -0,0 +1,80 @@
+* indentify non-viable inductive systems ("altering" case)
+
+* exercise "alter" and "indverbosity"
+
+* (compile (concat "../../../w32/src/ngspice " buffer-file-name) t)
+* (compile (concat "valgrind --track-origins=yes --leak-check=full --show-reachable=yes ../../../w32/src/ngspice " buffer-file-name) t)
+
+
+V1 x 0 dc=0 ac=1
+Rx x 1 1
+R1 2 0 1k
+R2 3 0 1k
+
+L1 1 0  10u
+L2 2 0  11u
+L3 3 0  10u
+
+k12 L1 L2 0
+k23 L2 L3 0
+k13 L1 L3 0
+
+R101 101 0 1k
+L101 101 0 1u
+L102 102 0 2u
+L103 103 0 3u
+K1012 L101 L102 0.1
+K1013 L101 L103 0.2
+
+.AC LIN 5k 1k 10MEG
+
+.control
+listing e
+
+echo coupling factors 0 0 0 -- ok
+op
+
+alter k12 0.96
+alter k23 0.99
+alter k13 0.98
+echo coupling factors 0.96 0.98 0.98 -- ok
+op
+
+alter k12 0.96
+alter k23 0.99
+alter k13 0.9898988607
+echo coupling factors 0.96 0.98 0.9898988607 -- ok
+op
+
+alter k12 0.96
+alter k23 0.99
+alter k13 0.9898988608
+echo coupling factors 0.96 0.98 0.9898988608 -- not ok
+op
+
+alter k12 1
+alter k23 1
+alter k13 1
+echo coupling factors 1 1 1 -- not ok
+op
+
+echo coupling factors 1.01 1 1 -- not ok
+alter k12 1.01
+set indverbosity = 2
+echo "op with indverbosity=2"
+op
+set indverbosity = 1
+echo "op with indverbosity=1"
+op
+set indverbosity = 0
+echo "op with indverbosity=0"
+op
+ 
+destroy all
+remcirc
+ 
+quit
+
+.endc
+
+.END

paranoia_parallel/examples/measure/func_cap.sp

@@ -0,0 +1,20 @@
+* func_cap.sp
+
+
+.func icap_calc(A,B,C,D) '2*A*sqrt(B*C*D)'
+
+.param cap_val = 'max(icap_calc(1,2,3,4))'
+VDD 1 0 DC 1
+C1 1 0 'cap_val'
+
+.measure tran capacitance param='cap_val'
+.measure tran capac2 param='max(icap_calc(1,2,3,4))'
+
+.tran 1ps 100ps
+
+.control
+run
+quit
+.endc
+
+.end

paranoia_parallel/examples/measure/inv-meas-tran-auto.sp

@@ -0,0 +1,103 @@
+Inverter example circuit
+* This netlist demonstrates the following:
+* global nodes (vdd, gnd)
+* autostop (.tran defines simulation end as 4ns but simulation stops at
+* 142.5ps when .measure statements are evaluated)
+* scale (all device units are in microns)
+* model binning (look in device.values file for which bin chosen)
+*
+*     m.x1.mn:
+*     model              = nch.2
+*
+*     m.x1.mp:
+*     model              = pch.2
+*
+* parameters
+* parameterized subckt
+* vsrc with repeat
+* .measure statements for delay and an example ternary operator
+* device listing and parameter listing
+* You can run the example circuit with this command:
+*
+* ngspice inverter3.sp
+
+
+* global nodes
+.global vdd gnd
+
+* autostop -- stop simulation early if .measure statements done
+* scale    -- define scale factor for mosfet device parameters (l,w,area,perimeter)
+.option autostop
+.option scale = 1e-6
+
+* model binning
+.model nch.1 nmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u  )
+.model nch.2 nmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=10u  wmax=100u )
+.model pch.1 pmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u  )
+.model pch.2 pmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=10u  wmax=100u )
+
+* parameters
+.param vp     = 1.0v
+.param lmin   = 0.10
+.param wmin   = 0.12
+.param plmin  = 'lmin'
+.param nlmin  = 'lmin'
+.param wpmin  = 'wmin'
+.param wnmin  = 'wmin'
+.param drise  = 400ps
+.param dfall  = 100ps
+.param trise  = 100ps
+.param tfall  = 100ps
+.param period = 1ns
+.param skew_meas = 'vp/2'
+
+* parameterized subckt
+.subckt inv in out pw='wpmin' pl='plmin' nw='wnmin' nl='nlmin'
+mp out in vdd vdd pch w='pw' l='pl'
+mn out in gnd gnd nch w='nw' l='nl'
+.ends
+
+v0 vdd gnd 'vp'
+
+* vsrc with repeat
+v1 in gnd pwl
++ 0ns                       'vp'
++ 'dfall-0.8*tfall'         'vp'
++ 'dfall-0.4*tfall'         '0.9*vp'
++ 'dfall+0.4*tfall'         '0.1*vp'
++ 'dfall+0.8*tfall'         0v
++ 'drise-0.8*trise'         0v
++ 'drise-0.4*trise'         '0.1*vp'
++ 'drise+0.4*trise'         '0.9*vp'
++ 'drise+0.8*trise'         'vp'
++ 'period+dfall-0.8*tfall'  'vp'
++ r='dfall-0.8*tfall'
+
+x1 in out inv pw=60 nw=20
+c1 out gnd 220fF
+
+.tran 1ps 4ns
+
+.meas tran inv_delay trig v(in)  val='vp/2'   fall=1 targ v(out) val='vp/2'   rise=1
+.meas tran inv_delay2 trig v(in)  val='vp/2' td=1n   fall=1 targ v(out) val='vp/2'   rise=1
+.meas tran test_data1 trig AT = 1n targ v(out) val='vp/2'   rise=3
+.meas tran out_slew  trig v(out) val='0.2*vp' rise=2 targ v(out) val='0.8*vp' rise=2
+.meas tran delay_chk param='(inv_delay < 100ps) ? 1 : 0'
+.meas tran skew when v(out)=0.6
+.meas tran skew2 when v(out)=skew_meas
+.meas tran skew3 when v(out)=skew_meas fall=2
+.meas tran skew4 when v(out)=skew_meas fall=LAST
+.meas tran skew5 FIND v(out) AT=2n
+*.measure tran v0_min    min   i(v0) from='dfall' to='dfall+period'
+*.measure tran v0_avg    avg   i(v0) from='dfall' to='dfall+period'
+*.measure tran v0_integ  integ i(v0) from='dfall' to='dfall+period'
+*.measure tran v0_rms    rms   i(v0) from='dfall' to='dfall+period'
+
+.control
+run
+rusage all
+plot v(in) v(out)
+.endc
+
+.end
+

paranoia_parallel/examples/measure/inv-meas-tran-control.sp

@@ -0,0 +1,113 @@
+Inverter example circuit
+* This netlist demonstrates the following:
+* global nodes (vdd, gnd)
+* autostop (.tran defines simulation end as 4ns but simulation stops at
+* 142.5ps when .measure statements are evaluated)
+* scale (all device units are in microns)
+* model binning (look in device.values file for which bin chosen)
+*
+*     m.x1.mn:
+*     model              = nch.2
+*
+*     m.x1.mp:
+*     model              = pch.2
+*
+* parameters
+* parameterized subckt
+* vsrc with repeat
+* .measure statements for delay and an example ternary operator
+* device listing and parameter listing
+* You can run the example circuit with this command:
+*
+* ngspice inverter3.sp
+
+
+* global nodes
+.global vdd gnd
+
+* autostop -- stop simulation early if .measure statements done
+* scale    -- define scale factor for mosfet device parameters (l,w,area,perimeter)
+*.option autostop
+.option scale = 1e-6
+
+* model binning
+.model nch.1 nmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u  )
+.model nch.2 nmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=10u  wmax=100u )
+.model pch.1 pmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u  )
+.model pch.2 pmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=10u  wmax=100u )
+
+* parameters
+.param vp     = 1.0v
+.param lmin   = 0.10
+.param wmin   = 0.12
+.param plmin  = 'lmin'
+.param nlmin  = 'lmin'
+.param wpmin  = 'wmin'
+.param wnmin  = 'wmin'
+.param drise  = 400ps
+.param dfall  = 100ps
+.param trise  = 100ps
+.param tfall  = 100ps
+.param period = 1ns
+.param skew_meas = 'vp/2'
+
+* parameterized subckt
+.subckt inv in out pw='wpmin' pl='plmin' nw='wnmin' nl='nlmin'
+mp out in vdd vdd pch w='pw' l='pl'
+mn out in gnd gnd nch w='nw' l='nl'
+.ends
+
+v0 vdd gnd 'vp'
+
+* vsrc with repeat
+v1 in gnd pwl
++ 0ns                       'vp'
++ 'dfall-0.8*tfall'         'vp'
++ 'dfall-0.4*tfall'         '0.9*vp'
++ 'dfall+0.4*tfall'         '0.1*vp'
++ 'dfall+0.8*tfall'         0v
++ 'drise-0.8*trise'         0v
++ 'drise-0.4*trise'         '0.1*vp'
++ 'drise+0.4*trise'         '0.9*vp'
++ 'drise+0.8*trise'         'vp'
++ 'period+dfall-0.8*tfall'  'vp'
++ r='dfall-0.8*tfall'
+
+x1 in out inv pw=60 nw=20
+c1 out gnd 220fF
+
+.control
+tran 1ps 4ns
+meas tran inv_delay trig v(in)  val=0.5   fall=1 targ v(out) val=0.5    rise=1
+meas tran inv_delay2 trig v(in)  val=0.5  td=1n   fall=1 targ v(out) val=0.5    rise=1
+meas tran test_data1 trig AT = 1n targ v(out) val=0.5    rise=3
+meas tran out_slew  trig v(out) val=0.2 rise=2 targ v(out) val=0.8 rise=2
+
+*.meas tran delay_chk param='(inv_delay < 100ps) ? 1 : 0'
+if ( inv_delay < 100ps )
+   let delay_chk = 1
+else
+   let delay_chk = 0
+end  
+echo delay_chk = "$&delay_chk"    
+
+meas tran skew when v(out)=0.6
+let skew_meas = 0.5
+meas tran skew2 when v(out)=skew_meas
+meas tran skew3 when v(out)=skew_meas fall=2
+meas tran skew4 when v(out)=skew_meas fall=LAST
+meas tran skew5 FIND v(out) AT=2n
+let dfall = 100p
+let period = 1n
+let delta = dfall+period
+meas tran v0_min    min   i(v0) from=dfall to=delta
+meas tran i_v0_min  min_at i(v0) from=dfall to=delta
+meas tran v0_avg    avg   i(v0) from = dfall to = delta
+meas tran v0_integ  integ i(v0) from=dfall to=delta
+meas tran v0_rms    rms   i(v0) from=dfall to=delta
+rusage all
+plot v(in) v(out)
+.endc
+
+.end
+

paranoia_parallel/examples/measure/inv-meas-tran.sp

@@ -0,0 +1,105 @@
+Inverter example circuit
+* This netlist demonstrates the following:
+* global nodes (vdd, gnd)
+* autostop (.tran defines simulation end as 4ns but simulation stops at
+* 142.5ps when .measure statements are evaluated)
+* scale (all device units are in microns)
+* model binning (look in device.values file for which bin chosen)
+*
+*     m.x1.mn:
+*     model              = nch.2
+*
+*     m.x1.mp:
+*     model              = pch.2
+*
+* parameters
+* parameterized subckt
+* vsrc with repeat
+* .measure statements for delay and an example ternary operator
+* device listing and parameter listing
+* You can run the example circuit with this command:
+*
+* ngspice inverter3.sp
+
+
+* global nodes
+.global vdd gnd
+
+* autostop -- stop simulation early if .measure statements done
+* scale    -- define scale factor for mosfet device parameters (l,w,area,perimeter)
+*.option autostop
+*.option scale = 1e-6
+
+* model binning
+.model nch.1 nmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u  )
+.model nch.2 nmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=10u  wmax=100u )
+.model pch.1 pmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u  )
+.model pch.2 pmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=10u  wmax=100u )
+
+* parameters
+.param vp     = 1.0v
+.param lmin   = 0.10u
+.param wmin   = 0.12u
+.param plmin  = 'lmin'
+.param nlmin  = 'lmin'
+.param wpmin  = 'wmin'
+.param wnmin  = 'wmin'
+.param drise  = 400ps
+.param dfall  = 100ps
+.param trise  = 100ps
+.param tfall  = 100ps
+.param period = 1ns
+.param skew_meas = 'vp/2'
+
+* parameterized subckt
+.subckt inv in out pw='wpmin' pl='plmin' nw='wnmin' nl='nlmin'
+mp out in vdd vdd pch w='pw' l='pl'
+mn out in gnd gnd nch w='nw' l='nl'
+.ends
+
+v0 vdd gnd 'vp'
+
+* vsrc with repeat
+v1 in gnd pwl
++ 0ns                       'vp'
++ 'dfall-0.8*tfall'         'vp'
++ 'dfall-0.4*tfall'         '0.9*vp'
++ 'dfall+0.4*tfall'         '0.1*vp'
++ 'dfall+0.8*tfall'         0v
++ 'drise-0.8*trise'         0v
++ 'drise-0.4*trise'         '0.1*vp'
++ 'drise+0.4*trise'         '0.9*vp'
++ 'drise+0.8*trise'         'vp'
++ 'period+dfall-0.8*tfall'  'vp'
++ r='dfall-0.8*tfall'
+
+x1 in out inv pw=60u nw=20u
+c1 out gnd 220fF
+
+.tran 10ps 4ns
+
+.meas tran inv_delay trig v(in)  val='vp/2'   fall=1 targ v(out) val='vp/2'   rise=1
+.meas tran inv_delay2 trig v(in)  val='vp/2' td=1n   fall=1 targ v(out) val='vp/2'   rise=1
+.meas tran test_data1 trig AT = 1n targ v(out) val='vp/2'   rise=3
+.meas tran out_slew  trig v(out) val='0.2*vp' rise=2 targ v(out) val='0.8*vp' rise=2
+.meas tran delay_chk param='(inv_delay < 100ps) ? 1 : 0'
+.meas tran skew when v(out)=0.6
+.meas tran skew2 when v(out)=skew_meas
+.meas tran skew3 when v(out)=skew_meas fall=2
+.meas tran skew4 when v(out)=skew_meas fall=LAST
+.meas tran skew5 FIND v(out) AT=2n
+.meas tran v0_min    min   i(v0) from='dfall' to='dfall+period'
+.meas tran i_v0_min  min_at i(v0) from='dfall' to='dfall+period'
+.meas tran v0_avg    avg   i(v0) from='dfall' to='dfall+period'
+.meas tran v0_integ  integ i(v0) from='dfall' to='dfall+period'
+.meas tran v0_rms    rms   i(v0) from='dfall' to='dfall+period'
+
+.control
+run
+rusage all
+plot v(in) v(out)
+quit
+.endc
+
+.end
+

paranoia_parallel/examples/measure/mos-meas-dc-control.sp

@@ -0,0 +1,49 @@
+***** Single NMOS Transistor .measure (Id-Vd) ***
+* Altering device witdth leads to select new model due to binning limits.
+* New model has artificially thick gate oxide (changed from default 3n to 4n)
+* to demonstrate the effect.
+m1 d g s b nch L=0.6u W=9.99u  ; W is slightly below binning limit
+
+vgs g 0 3.5 
+vds d 0 3.5 
+vs s 0 dc 0
+vb b 0 dc 0
+
+* model binning
+* uses default parameters, except toxe
+.model nch.1 nmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u toxe=3n )
+.model nch.2 nmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=10u  wmax=100u toxe=4n)
+
+.control
+dc vds 0 3.5 0.05 vgs 3.5 0.5 -0.5
+meas dc is_at FIND i(vs) AT=1
+meas dc is_max max i(vs)
+meas dc vds_at2 when i(vs)=10m
+* starting with branches in descending order of vgs
+* trig ist the first branch which crosses 5mA
+* Targ is the first branch crossing 10mA
+meas dc vd_diff1 trig i(vs)  val=0.005   rise=1 targ i(vs) val=0.01  rise=1
+* trig ist the first branch which crosses 5mA
+* Targ is the second branch crossing 10mA
+meas dc vd_diff2 trig i(vs)  val=0.005   rise=2 targ i(vs) val=0.01  rise=2
+alter @m1[w]=10.01u   ; W is slightly above binning limit
+dc vds 0 3.5 0.05 vgs 3.5 0.5 -0.5
+meas dc is_at FIND i(vs) AT=1
+meas dc is_max max i(vs)
+meas dc vds_at2 when i(vs)=10m
+meas dc vd_diff1 trig i(vs)  val=0.005   rise=1 targ i(vs) val=0.01  rise=1
+* there is only one branch crossing 10mA, so this second meas fails with targ out of interval
+echo
+echo The next one will fail (no two branches crossing 10 mA):
+meas dc vd_diff2 trig i(vs)  val=0.005   rise=2 targ i(vs) val=0.01  rise=2
+*rusage all
+plot dc1.i(vs) i(vs)
+.endc
+
+
+.end
+
+
+
+
+

paranoia_parallel/examples/measure/mos-meas-dc.sp

@@ -0,0 +1,38 @@
+***** Single NMOS Transistor .measure (Id-Vd) ***
+m1 d g s b nch L=0.6u W=10.0u
+
+vgs g 0 3.5 
+vds d 0 3.5 
+vs s 0 dc 0
+vb b 0 dc 0
+
+.dc vds 0 3.5 0.05 vgs 0.5 3.5 0.5 
+
+.print dc v(1) i(vs)
+
+* model binning
+.model nch.1 nmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u  )
+.model nch.2 nmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=10u  wmax=100u )
+.model pch.1 pmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=0.1u wmax=10u  )
+.model pch.2 pmos ( version=4.7 level=54 lmin=0.1u lmax=20u wmin=10u  wmax=100u )
+
+.meas dc is_at FIND i(vs) AT=1
+.meas dc is_max max i(vs) from=0 to=3.5
+.meas dc vds_at2 when i(vs)=10m
+.meas dc vd_diff1 trig i(vs)  val=0.005   rise=1 targ i(vs) val=0.01  rise=1
+.meas dc vd_diff2 trig i(vs)  val=0.005   rise=1 targ i(vs) val=0.01  rise=2
+
+.control
+run
+*rusage all
+plot i(vs)
+quit
+.endc
+
+
+.end
+
+
+
+
+

paranoia_parallel/examples/measure/rc-meas-ac-control.sp

@@ -0,0 +1,64 @@
+RC band pass example circuit
+* This netlist demonstrates the following:
+* global nodes (vdd, gnd)
+
+* .measure statements for delay and an example ternary operator
+
+* You can run the example circuit with this command:
+*
+* ngspice rc-meas-ac.sp
+
+
+* global nodes
+.global vdd gnd
+
+* autostop -- stop simulation early if .measure statements done
+*.option autostop
+
+vin in gnd  dc 0 ac 1
+
+R1 in mid1 1k
+c1 mid1 gnd 1n
+C2 mid1 out 500p
+R2 out gnd 1k
+
+
+.control
+ac DEC 10 1k 10MEG
+meas ac vout_at FIND v(out) AT=1MEG
+meas ac vout_atr FIND vr(out) AT=1MEG
+meas ac vout_ati FIND vi(out) AT=1MEG
+meas ac vout_atm FIND vm(out) AT=1MEG
+meas ac vout_atp FIND vp(out) AT=1MEG
+meas ac vout_atd FIND vdb(out) AT=1MEG
+meas ac vout_max max v(out) from=1k to=10MEG
+meas ac freq_at when v(out)=0.1
+meas ac vout_diff trig v(out)  val=0.1   rise=1 targ v(out) val=0.1   fall=1
+meas ac fixed_diff trig AT = 10k targ v(out) val=0.1   rise=1
+meas ac vout_avg  avg   v(out)  from=10k to=1MEG
+meas ac vout_integ integ v(out) from=20k to=500k
+meas ac freq_at2 when v(out)=0.1 fall=LAST
+*meas ac bw_chk param='(vout_diff < 100k) ? 1 : 0'
+if (vout_diff < 100k)
+   let bw_chk = 1
+else
+   let bw_chk = 0
+end  
+echo bw_chk = "$&bw_chk" 
+*meas ac bw_chk2 param='(vout_diff > 500k) ? 1 : 0'
+if (vout_diff > 500k)
+   let bw_chk2 = 1
+else
+   let bw_chk2 = 0
+end 
+echo bw_chk2 = "$&bw_chk2" 
+meas ac vout_rms rms v(out) from=10 to=1G
+*rusage all
+plot v(out)
+plot ph(v(out))
+plot mag(v(out))
+plot db(v(out))
+.endc
+
+.end
+

paranoia_parallel/examples/measure/rc-meas-ac.sp

@@ -0,0 +1,55 @@
+RC band pass example circuit
+* This netlist demonstrates the following:
+* global nodes (vdd, gnd)
+
+* .measure statements for delay and an example ternary operator
+
+* You can run the example circuit with this command:
+*
+* ngspice rc-meas-ac.sp
+
+
+* global nodes
+.global vdd gnd
+
+* autostop -- stop simulation early if .measure statements done
+*.option autostop
+
+vin in gnd  dc 0 ac 1
+
+R1 in mid1 1k
+c1 mid1 gnd 1n
+C2 mid1 out 500p
+R2 out gnd 1k
+
+.ac DEC 10 1k 10MEG
+
+.meas ac vout_at FIND v(out) AT=1MEG
+.meas ac vout_atr FIND vr(out) AT=1MEG
+.meas ac vout_ati FIND vi(out) AT=1MEG
+.meas ac vout_atm FIND vm(out) AT=1MEG
+.meas ac vout_atp FIND vp(out) AT=1MEG
+.meas ac vout_atd FIND vdb(out) AT=1MEG
+.meas ac vout_max max v(out) from=1k to=10MEG
+.meas ac freq_at when v(out)=0.1
+.meas ac vout_diff trig v(out)  val=0.1   rise=1 targ v(out) val=0.1   fall=1
+.meas ac fixed_diff trig AT = 10k targ v(out) val=0.1   rise=1
+.meas ac vout_avg  avg   v(out)  from=10k to=1MEG
+.meas ac vout_integ integ v(out) from=20k to=500k
+.meas ac freq_at2 when v(out)=0.1 fall=LAST
+.meas ac bw_chk param='(vout_diff < 100k) ? 1 : 0'
+.meas ac bw_chk2 param='(vout_diff > 500k) ? 1 : 0'
+.meas ac vout_rms rms v(out) from=10 to=1G
+
+.control
+run
+*rusage all
+plot v(out)
+plot ph(v(out))
+plot mag(v(out))
+plot db(v(out))
+quit
+.endc
+
+.end
+

paranoia_parallel/examples/measure/simple-meas-tran.sp

@@ -0,0 +1,57 @@
+File: simple-meas-tran.sp
+* Simple .measurement examples
+* transient simulation of two sine signals with different frequencies
+vac1 1 0 DC 0 sin(0 1 1k 0 0)
+R1 1 0 100k
+vac2 2 0 DC 0 sin(0 1.2 0.9k 0 0)
+.tran 10u 5m
+*
+.measure tran tdiff TRIG v(1) VAL=0.5 RISE=1 TARG v(1) VAL=0.5 RISE=2
+.measure tran tdiff TRIG v(1) VAL=0.5 RISE=1 TARG v(1) VAL=0.5 RISE=3
+.measure tran tdiff TRIG v(1) VAL=0.5 RISE=1 TARG v(1) VAL=0.5 FALL=1
+.measure tran tdiff TRIG v(1) VAL=0 FALL=3 TARG v(2) VAL=0 FALL=3
+.measure tran tdiff TRIG v(1) VAL=-0.6 CROSS=1 TARG v(2) VAL=-0.8 CROSS=1
+.measure tran tdiff TRIG AT=1m TARG v(2) VAL=-0.8 CROSS=3
+.measure tran teval WHEN v(2)=0.7 CROSS=LAST
+.measure tran teval WHEN v(2)=v(1) FALL=LAST
+.measure tran teval WHEN v(1)=v(2) CROSS=LAST
+.measure tran yeval FIND v(2) WHEN v(1)=0.2 FALL=2
+.measure tran yeval FIND v(2) AT=2m
+.measure tran ymax MAX v(2) from=2m to=3m
+.measure tran tymax MAX_AT v(2) from=2m to=3m
+.measure tran ypp PP v(1) from=2m to=4m
+.measure tran yrms RMS v(1) from=2m to=3.5m
+.measure tran yavg AVG v(1) from=2m to=4m
+.measure tran yint INTEG v(2) from=2m to=3m
+.param fval=5
+.measure tran yadd param='fval + 7'
+.param vout_diff=50k
+.meas tran bw_chk param='(vout_diff < 100k) ? 1 : 0'
+.measure tran vtest find par('v(2)*v(1)') AT=2.3m
+*
+.control
+run
+plot v(1) v(2)
+gnuplot ttt i(vac1)
+meas tran tdiff TRIG v(1) VAL=0.5 RISE=1 TARG v(1) VAL=0.5 RISE=2
+meas tran tdiff TRIG v(1) VAL=0.5 RISE=1 TARG v(1) VAL=0.5 RISE=3
+meas tran tdiff TRIG v(1) VAL=0.5 RISE=1 TARG v(1) VAL=0.5 FALL=1
+meas tran tdiff TRIG v(1) VAL=0 FALL=3 TARG v(2) VAL=0 FALL=3
+meas tran tdiff TRIG v(1) VAL=-0.6 CROSS=1 TARG v(2) VAL=-0.8 CROSS=1
+meas tran tdiff TRIG AT=1m TARG v(2) VAL=-0.8 CROSS=3
+meas tran teval WHEN v(2)=0.7 CROSS=LAST
+meas tran teval WHEN v(2)=v(1) FALL=LAST
+meas tran teval WHEN v(1)=v(2) CROSS=LAST
+meas tran yeval FIND v(2) WHEN v(1)=0.2 FALL=2
+meas tran yeval FIND v(2) AT=2m
+meas tran ymax MAX v(2) from=2m to=3m
+meas tran tymax MAX_AT v(2) from=2m to=3m
+meas tran ypp PP v(1) from=2m to=4m
+meas tran yrms RMS v(1) from=2m to=3.5m
+meas tran yavg AVG v(1) from=2m to=4m
+meas tran yint INTEG v(2) from=2m to=3m
+meas tran ymax MAX v(2) from=2m to=3m
+meas tran tmax WHEN v(2)=YMAX from=1m to=2m  ; from..to.. not recognized!
+quit
+.endc
+.end

paranoia_parallel/examples/memristor/memristor.sp

@@ -0,0 +1,66 @@
+Memristor with threshold
+* Y. V. Pershin, M. Di Ventra: "SPICE model of memristive devices with threshold", 
+* arXiv:1204.2600v1 [physics.comp-ph] 12 Apr 2012, 
+* http://arxiv.org/pdf/1204.2600.pdf
+
+* Parameter selection and plotting by
+* Holger Vogt 2012
+
+.param stime=10n
+.param vmax = 3
+
+* send parameters to the .control section
+.csparam stime={stime}
+.csparam vmax={vmax}
+
+Xmem 1 0 memristor
+* triangular sweep (you have to adapt the parameters to 'alter' command in the .control section)
+*V1 1 0 DC 0 PWL(0 0 '0.25*stime' 'vmax' '0.5*stime' 0 '0.75*stime' '-vmax' 'stime' 0)
+* sinusoidal sweep
+V1 0 1 DC 0 sin(0 'vmax' '1/stime')
+
+* memristor model with limits and threshold
+* "artificial" parameters alpha, beta, and vtt. beta and vtt adapted to basic programming frequency 
+* just to obtain nice results!
+* You have to care for the physics and set real values! 
+.subckt memristor plus minus PARAMS: Ron=1K Roff=10K Rinit=7.0K alpha=0 beta=20e3/stime Vtt=1.6 
+Bx 0 x I='((f1(V(plus)-V(minus))> 0) && (V(x) < Roff)) ? {f1(V(plus)-V(minus))}: ((((f1(V(plus)-V(minus)) < 0) && (V(x)>Ron)) ? {f1(V(plus)-V(minus))}: 0)) '
+Vx x x1 dc 0
+Cx x1 0 1 IC={Rinit} 
+Rmem plus minus r={V(x)} 
+.func f1(y)={beta*y+0.5*(alpha-beta)*(abs(y+Vtt)-abs(y-Vtt))} 
+.ends
+
+* transient simulation same programming voltage but rising frequencies
+.control
+*** first simulation ***
+* approx. 100 simulation points
+let deltime = stime/100
+tran $&deltime $&stime uic
+* plot i(v1) vs v(1)
+*** you may just stop here ***
+* raise the frequency
+let newfreq = 1.1/stime
+let newstime = stime/1.1
+let deltime = newstime/100
+alter @V1[sin] [ 0 $&vmax $&newfreq ]
+tran $&deltime $&newstime uic
+* raise the frequency even more
+let newfreq = 1.4/stime
+let newstime = stime/1.4
+let deltime = newstime/100
+alter @V1[sin] [ 0 $&vmax $&newfreq ]
+tran $&deltime $&newstime uic
+* the 'programming' currents
+plot tran1.alli tran2.alli alli title 'Memristor with threshold: Internal Programming currents'
+* resistance versus time plot
+settype impedance xmem.x1 tran1.xmem.x1 tran2.xmem.x1
+plot xmem.x1 tran1.xmem.x1 tran2.xmem.x1 title 'Memristor with threshold: resistance'
+* resistance versus voltage (change occurs only above threshold!)
+plot xmem.x1 vs v(1) tran1.xmem.x1 vs tran1.v(1) tran2.xmem.x1 vs tran2.v(1) title 'Memristor with threshold: resistance'
+* current through resistor for all plots versus voltage
+plot i(v1) vs v(1) tran1.i(v1) vs tran1.v(1) tran2.i(v1) vs tran2.v(1) title 'Memristor with threshold: external current loops'
+quit
+.endc
+
+.end

paranoia_parallel/examples/memristor/memristor_x.sp

@@ -0,0 +1,84 @@
+Memristor with threshold as XSPICE code model
+* Y. V. Pershin, M. Di Ventra: "SPICE model of memristive devices with threshold", 
+* arXiv:1204.2600v1 [physics.comp-ph] 12 Apr 2012, 
+* http://arxiv.org/pdf/1204.2600.pdf
+
+* XSPICE code model, parameter selection and plotting by
+* Holger Vogt 2012
+
+* ac and op (dc) simulation just use start resistance rinit!
+
+.param stime=10n
+.param vmax = 4.2
+
+* send parameters to the .control section
+.csparam stime={stime}
+.csparam vmax={vmax}
+
+*Xmem 1 0 memristor
+* triangular sweep (you have to adapt the parameters to 'alter' command in the .control section)
+*V1 1 0 DC 0 PWL(0 0 '0.25*stime' 'vmax' '0.5*stime' 0 '0.75*stime' '-vmax' 'stime' 0)
+* sinusoidal sweep for transient, dc for op, ac
+V1 0 1 DC 0.1 ac 1 sin(0 'vmax' '1/stime')
+
+Rl 1 11 1k
+
+* memristor model with limits and threshold
+* "artificial" parameters alpha, beta, and vt. beta and vt adapted to basic programming frequency 
+* just to obtain nice results!
+* You have to care for the physics and set real values! 
+amen 11 2 memr
+.model memr memristor (rmin=1k rmax=10k rinit=7k alpha=0 beta='20e3/stime' vt=1.6)
+
+vgnd 2 0 dc 0
+
+* This is the original subcircuit model
+.subckt memristor plus minus PARAMS: Ron=1K Roff=10K Rinit=7.0K alpha=0 beta=20e3/stime Vt=1.6 
+Bx 0 x I='((f1(V(plus)-V(minus))> 0) && (V(x) < Roff)) ? {f1(V(plus)-V(minus))}: ((((f1(V(plus)-V(minus)) < 0) && (V(x)>Ron)) ? {f1(V(plus)-V(minus))}: 0)) '
+Vx x x1 dc 0
+Cx x1 0 1 IC={Rinit} 
+Rmem plus minus r={V(x)} 
+.func f1(y)={beta*y+0.5*(alpha-beta)*(abs(y+Vt)-abs(y-Vt))} 
+.ends
+
+* transient simulation same programming voltage but rising frequencies
+.control
+*** first simulation ***
+op 
+print all
+ac lin 101 1 100k
+plot v(11)
+* approx. 100 simulation points
+let deltime = stime/100
+tran $&deltime $&stime uic
+* plot i(v1) vs v(1)
+*** you may just stop here ***
+* raise the frequency
+let newfreq = 1.2/stime
+let newstime = stime/1.2
+let deltime = newstime/100
+alter @V1[sin] [ 0 $&vmax $&newfreq ]
+tran $&deltime $&newstime uic
+* raise the frequency even more
+let newfreq = 1.4/stime
+let newstime = stime/1.4
+let deltime = newstime/100
+alter @V1[sin] [ 0 $&vmax $&newfreq ]
+tran $&deltime $&newstime uic
+* the resistor currents
+plot tran1.alli tran2.alli alli title 'Memristor with threshold: currents'
+* calculate resistance (avoid dividing by zero)
+let res = v(1)/(I(v1) + 1e-16)
+let res1 = tran1.v(1)/(tran1.I(v1) + 1e-16)
+let res2 = tran2.v(1)/(tran2.I(v1) + 1e-16)
+* resistance versus time plot
+settype impedance res res1 res2
+plot res vs time res1 vs tran1.time res2 vs tran2.time  title 'Memristor with threshold: resistance'
+* resistance versus voltage (change occurs only above threshold!)
+plot res vs v(1) res1 vs tran1.v(1) res2 vs tran2.v(1) title 'Memristor with threshold: resistance'
+* current through resistor for all plots versus voltage
+plot i(v1) vs v(1) tran1.i(v1) vs tran1.v(1) tran2.i(v1) vs tran2.v(1) title 'Memristor with threshold: external current loops'
+quit
+.endc
+
+.end

paranoia_parallel/examples/optran/.spiceinit

@@ -0,0 +1,5 @@
+set ngbehavior=ps
+* Standard ngspice init file
+alias exit quit
+* step size is limited to TSTEP in tansient simulation
+set stepsizelimit

paranoia_parallel/examples/optran/F5TurboV2thermal-ic-in.cir

@@ -0,0 +1,92 @@
+.title KiCad schematic
+.include "F5models.lib"
+.include "c:\Spice64\bin\F5interm.inc"
+R2 in 0 47.5k
+R1 Net-_Q1-Pad2_ in 1k
+R5 +32 Net-_P1-Pad1_ 1k
+R3 Net-_P3-Pad1_ 0 10
+R4 0 Net-_P3-Pad3_ 10
+R6 Net-_P2-Pad1_ -32 1k
+R7 out Net-_P3-Pad1_ 220
+R8 out Net-_P3-Pad1_ 220
+R9 out Net-_P3-Pad3_ 220
+R10 out Net-_P3-Pad3_ 220
+R11 Net-_R11-Pad1_ Net-_P1-Pad1_ 2.2k
+R13 Net-_Q3-Pad2_ Net-_P1-Pad1_ 47.5
+R15 Net-_Q5-Pad2_ Net-_P2-Pad1_ 47.5
+R12 Net-_R12-Pad1_ Net-_P2-Pad1_ 2.2k
+R17 +32 Net-_D3a1-Pad1_ 1
+R21 Net-_D1a1-Pad2_ -32 1
+R18 +32 Net-_D3a1-Pad1_ 1
+R22 Net-_D1a1-Pad2_ -32 1
+R16 Net-_Q6-Pad2_ Net-_P2-Pad1_ 47.5
+R14 Net-_Q4-Pad2_ Net-_P1-Pad1_ 47.5
+R19 +32 Net-_D4a1-Pad1_ 1
+R23 Net-_D2a1-Pad2_ -32 1
+R20 +32 Net-_D4a1-Pad1_ 1
+R24 Net-_D2a1-Pad2_ -32 1
+Ra2 Net-_Ra1-Pad2_ 0 4
+D3a1 +32 Net-_D3a1-Pad1_ DMOD
+D1a1 Net-_D1a1-Pad2_ -32 DMOD
+D3b1 +32 Net-_D3a1-Pad1_ DMOD
+D1b1 Net-_D1a1-Pad2_ -32 DMOD
+D4a1 +32 Net-_D4a1-Pad1_ DMOD
+D2a1 Net-_D2a1-Pad2_ -32 DMOD
+D4b1 +32 Net-_D4a1-Pad1_ DMOD
+D2b1 Net-_D2a1-Pad2_ -32 DMOD
+XP3 Net-_P3-Pad1_ 0 Net-_P3-Pad3_ RPOT value=200 ratio={rp3}
+XP1 Net-_P1-Pad1_ +32 +32 RPOT value=5k ratio={rp1}
+XP2 Net-_P2-Pad1_ -32 -32 RPOT value=5k ratio={rp2}
+V3 in 0 dc 0 ac 1 sin(0 2 1k 5m)
+JQ1 Net-_P1-Pad1_ Net-_Q1-Pad2_ Net-_P3-Pad1_ 2SK170
+JQ2 Net-_P2-Pad1_ Net-_Q1-Pad2_ Net-_P3-Pad3_ 2SJ74
+MQ5 out Net-_Q5-Pad2_ Net-_D1a1-Pad2_ Q5tj Q5tc IRFP240 thermal
+MQ4 out Net-_Q4-Pad2_ Net-_D4a1-Pad1_ Q4tj Q4tc IRFP9240 thermal
+MQ6 out Net-_Q6-Pad2_ Net-_D2a1-Pad2_ Q6tj Q6tc IRFP240 thermal
+Rj1 Q3tj 0 1G
+Rj2 Q4tj 0 1G
+Rj3 Q5tj 0 1G
+Rj4 Q6tj 0 1G
+Rc2 Q3hs Net-_Rc2-Pad2_ {hs}
+Rc4 Q4hs Net-_Rc2-Pad2_ {hs}
+Rc6 Q5hs Net-_Rc2-Pad2_ {hs}
+Rc8 Q6hs Net-_Rc2-Pad2_ {hs}
+Rc1 Q3tc Q3hs {chs}
+Rc3 Q4tc Q4hs {chs}
+Rc5 Q5tc Q5hs {chs}
+Rc7 Q6tc Q6hs {chs}
+Vt1 Net-_Rc2-Pad2_ 0 {envtemp}
+Cc1 Q3hs 0 {hscc}
+Cc3 Q5hs 0 {hscc}
+Cc4 Q6hs 0 {hscc}
+V1 +32 0 dc 32 ; pulse(0 32 0.4m 2m 2m 100 200)
+V2 -32 0 dc -32 ; pulse(0 -32 0.4m 2m 2m 100 200)
+XTH2 Net-_D1a1-Pad2_ Q5hs Net-_R12-Pad1_ th R25=4.7k
+XTH1 Net-_D3a1-Pad1_ Q3hs Net-_R11-Pad1_ th R25=4.7k
+MQ3 out Net-_Q3-Pad2_ Net-_D3a1-Pad1_ Q3tj Q3tc IRFP9240 thermal
+Vs1 Net-_S1-Pad3_ 0 dc 0 pulse(0 5 6 1m 1m 20 20)
+XS1 Net-_Ra1-Pad2_ 0 Net-_S1-Pad3_ 0 genrelay
+Cc2 Q4hs 0 {hscc}
+Ra1 out Net-_Ra1-Pad2_ 4
+
+.param envtemp=40
+.param chs=1
+.param hs=1.2
+.param hscc=1
+.param rp2=0.21
+.param rp1=0.36
+.param rp3=0.505
+
+.control
+tran 20u 5 uic
+* temperature transistor Q6
+set xbrushwidth=4
+settype temperature q6tj q6tc q6hs
+plot q6tj q6tc q6hs q3tj q3tc q3hs ylimit 0 160
+set xbrushwidth=2
+* input and output voltages
+plot in out
+.endc
+
+
+.end

paranoia_parallel/examples/optran/F5TurboV2thermal-ic-out.cir

@@ -0,0 +1,79 @@
+.title KiCad schematic
+.include "F5models.lib"
+.include "script-icout.txt"
+R2 in 0 47.5k
+R1 Net-_Q1-Pad2_ in 1k
+R5 +32 Net-_P1-Pad1_ 1k
+R3 Net-_P3-Pad1_ 0 10
+R4 0 Net-_P3-Pad3_ 10
+R6 Net-_P2-Pad1_ -32 1k
+R7 out Net-_P3-Pad1_ 220
+R8 out Net-_P3-Pad1_ 220
+R9 out Net-_P3-Pad3_ 220
+R10 out Net-_P3-Pad3_ 220
+R11 Net-_R11-Pad1_ Net-_P1-Pad1_ 2.2k
+R13 Net-_Q3-Pad2_ Net-_P1-Pad1_ 47.5
+R15 Net-_Q5-Pad2_ Net-_P2-Pad1_ 47.5
+R12 Net-_R12-Pad1_ Net-_P2-Pad1_ 2.2k
+R17 +32 Net-_D3a1-Pad1_ 1
+R21 Net-_D1a1-Pad2_ -32 1
+R18 +32 Net-_D3a1-Pad1_ 1
+R22 Net-_D1a1-Pad2_ -32 1
+R16 Net-_Q6-Pad2_ Net-_P2-Pad1_ 47.5
+R14 Net-_Q4-Pad2_ Net-_P1-Pad1_ 47.5
+R19 +32 Net-_D4a1-Pad1_ 1
+R23 Net-_D2a1-Pad2_ -32 1
+R20 +32 Net-_D4a1-Pad1_ 1
+R24 Net-_D2a1-Pad2_ -32 1
+Ra2 Net-_Ra1-Pad2_ 0 4
+D3a1 +32 Net-_D3a1-Pad1_ DMOD
+D1a1 Net-_D1a1-Pad2_ -32 DMOD
+D3b1 +32 Net-_D3a1-Pad1_ DMOD
+D1b1 Net-_D1a1-Pad2_ -32 DMOD
+D4a1 +32 Net-_D4a1-Pad1_ DMOD
+D2a1 Net-_D2a1-Pad2_ -32 DMOD
+D4b1 +32 Net-_D4a1-Pad1_ DMOD
+D2b1 Net-_D2a1-Pad2_ -32 DMOD
+XP3 Net-_P3-Pad1_ 0 Net-_P3-Pad3_ RPOT value=200 ratio={rp3}
+XP1 Net-_P1-Pad1_ +32 +32 RPOT value=5k ratio={rp1}
+XP2 Net-_P2-Pad1_ -32 -32 RPOT value=5k ratio={rp2}
+V3 in 0 dc 0 ac 1 sin(0 2 1k 5m)
+JQ1 Net-_P1-Pad1_ Net-_Q1-Pad2_ Net-_P3-Pad1_ 2SK170
+JQ2 Net-_P2-Pad1_ Net-_Q1-Pad2_ Net-_P3-Pad3_ 2SJ74
+MQ5 out Net-_Q5-Pad2_ Net-_D1a1-Pad2_ Q5tj Q5tc IRFP240 thermal
+MQ4 out Net-_Q4-Pad2_ Net-_D4a1-Pad1_ Q4tj Q4tc IRFP9240 thermal
+MQ6 out Net-_Q6-Pad2_ Net-_D2a1-Pad2_ Q6tj Q6tc IRFP240 thermal
+Rj1 Q3tj 0 1G
+Rj2 Q4tj 0 1G
+Rj3 Q5tj 0 1G
+Rj4 Q6tj 0 1G
+Rc2 Q3hs Net-_Rc2-Pad2_ {hs}
+Rc4 Q4hs Net-_Rc2-Pad2_ {hs}
+Rc6 Q5hs Net-_Rc2-Pad2_ {hs}
+Rc8 Q6hs Net-_Rc2-Pad2_ {hs}
+Rc1 Q3tc Q3hs {chs}
+Rc3 Q4tc Q4hs {chs}
+Rc5 Q5tc Q5hs {chs}
+Rc7 Q6tc Q6hs {chs}
+Vt1 Net-_Rc2-Pad2_ 0 {envtemp}
+Cc1 Q3hs 0 {hscc}
+Cc3 Q5hs 0 {hscc}
+Cc4 Q6hs 0 {hscc}
+V1 +32 0 dc 32 ; pulse(0 32 0.4m 2m 2m 100 200)
+V2 -32 0 dc -32 ; pulse(0 -32 0.4m 2m 2m 100 200)
+XTH2 Net-_D1a1-Pad2_ Q5hs Net-_R12-Pad1_ th R25=4.7k
+XTH1 Net-_D3a1-Pad1_ Q3hs Net-_R11-Pad1_ th R25=4.7k
+MQ3 out Net-_Q3-Pad2_ Net-_D3a1-Pad1_ Q3tj Q3tc IRFP9240 thermal
+Vs1 Net-_S1-Pad3_ 0 dc 0 pulse(0 5 6 1m 1m 20 20)
+XS1 Net-_Ra1-Pad2_ 0 Net-_S1-Pad3_ 0 genrelay
+Cc2 Q4hs 0 {hscc}
+Ra1 out Net-_Ra1-Pad2_ 4
+.tran 20u 5
+.param envtemp=40
+.param chs=1
+.param hs=1.2
+.param hscc=1
+.param rp2=0.21
+.param rp1=0.36
+.param rp3=0.505
+.end

paranoia_parallel/examples/optran/F5TurboV2thermal-optran.cir

@@ -0,0 +1,79 @@
+.title KiCad schematic
+.include "F5models.lib"
+.include "script-optran.txt"
+R2 in 0 47.5k
+R1 Net-_Q1-Pad2_ in 1k
+R5 +32 Net-_P1-Pad1_ 1k
+R3 Net-_P3-Pad1_ 0 10
+R4 0 Net-_P3-Pad3_ 10
+R6 Net-_P2-Pad1_ -32 1k
+R7 out Net-_P3-Pad1_ 220
+R8 out Net-_P3-Pad1_ 220
+R9 out Net-_P3-Pad3_ 220
+R10 out Net-_P3-Pad3_ 220
+R11 Net-_R11-Pad1_ Net-_P1-Pad1_ 2.2k
+R13 Net-_Q3-Pad2_ Net-_P1-Pad1_ 47.5
+R15 Net-_Q5-Pad2_ Net-_P2-Pad1_ 47.5
+R12 Net-_R12-Pad1_ Net-_P2-Pad1_ 2.2k
+R17 +32 Net-_D3a1-Pad1_ 1
+R21 Net-_D1a1-Pad2_ -32 1
+R18 +32 Net-_D3a1-Pad1_ 1
+R22 Net-_D1a1-Pad2_ -32 1
+R16 Net-_Q6-Pad2_ Net-_P2-Pad1_ 47.5
+R14 Net-_Q4-Pad2_ Net-_P1-Pad1_ 47.5
+R19 +32 Net-_D4a1-Pad1_ 1
+R23 Net-_D2a1-Pad2_ -32 1
+R20 +32 Net-_D4a1-Pad1_ 1
+R24 Net-_D2a1-Pad2_ -32 1
+Ra2 Net-_Ra1-Pad2_ 0 4
+D3a1 +32 Net-_D3a1-Pad1_ DMOD
+D1a1 Net-_D1a1-Pad2_ -32 DMOD
+D3b1 +32 Net-_D3a1-Pad1_ DMOD
+D1b1 Net-_D1a1-Pad2_ -32 DMOD
+D4a1 +32 Net-_D4a1-Pad1_ DMOD
+D2a1 Net-_D2a1-Pad2_ -32 DMOD
+D4b1 +32 Net-_D4a1-Pad1_ DMOD
+D2b1 Net-_D2a1-Pad2_ -32 DMOD
+XP3 Net-_P3-Pad1_ 0 Net-_P3-Pad3_ RPOT value=200 ratio={rp3}
+XP1 Net-_P1-Pad1_ +32 +32 RPOT value=5k ratio={rp1}
+XP2 Net-_P2-Pad1_ -32 -32 RPOT value=5k ratio={rp2}
+V3 in 0 dc 0 ac 1 sin(0 2 1k 5m)
+JQ1 Net-_P1-Pad1_ Net-_Q1-Pad2_ Net-_P3-Pad1_ 2SK170
+JQ2 Net-_P2-Pad1_ Net-_Q1-Pad2_ Net-_P3-Pad3_ 2SJ74
+MQ5 out Net-_Q5-Pad2_ Net-_D1a1-Pad2_ Q5tj Q5tc IRFP240 thermal
+MQ4 out Net-_Q4-Pad2_ Net-_D4a1-Pad1_ Q4tj Q4tc IRFP9240 thermal
+MQ6 out Net-_Q6-Pad2_ Net-_D2a1-Pad2_ Q6tj Q6tc IRFP240 thermal
+Rj1 Q3tj 0 1G
+Rj2 Q4tj 0 1G
+Rj3 Q5tj 0 1G
+Rj4 Q6tj 0 1G
+Rc2 Q3hs Net-_Rc2-Pad2_ {hs}
+Rc4 Q4hs Net-_Rc2-Pad2_ {hs}
+Rc6 Q5hs Net-_Rc2-Pad2_ {hs}
+Rc8 Q6hs Net-_Rc2-Pad2_ {hs}
+Rc1 Q3tc Q3hs {chs}
+Rc3 Q4tc Q4hs {chs}
+Rc5 Q5tc Q5hs {chs}
+Rc7 Q6tc Q6hs {chs}
+Vt1 Net-_Rc2-Pad2_ 0 {envtemp}
+Cc1 Q3hs 0 {hscc}
+Cc3 Q5hs 0 {hscc}
+Cc4 Q6hs 0 {hscc}
+V1 +32 0 dc 32 ; pulse(0 32 0.4m 2m 2m 100 200)
+V2 -32 0 dc -32 ; pulse(0 -32 0.4m 2m 2m 100 200)
+XTH2 Net-_D1a1-Pad2_ Q5hs Net-_R12-Pad1_ th R25=4.7k
+XTH1 Net-_D3a1-Pad1_ Q3hs Net-_R11-Pad1_ th R25=4.7k
+MQ3 out Net-_Q3-Pad2_ Net-_D3a1-Pad1_ Q3tj Q3tc IRFP9240 thermal
+Vs1 Net-_S1-Pad3_ 0 dc 0 pulse(0 5 6 1m 1m 20 20)
+XS1 Net-_Ra1-Pad2_ 0 Net-_S1-Pad3_ 0 genrelay
+Cc2 Q4hs 0 {hscc}
+Ra1 out Net-_Ra1-Pad2_ 4
+*.tran 20u 5m
+.param envtemp=40
+.param chs=1
+.param hs=1.2
+.param hscc=1
+.param rp2=0.21
+.param rp1=0.36
+.param rp3=0.505
+.end