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obsolete - merged with bsim3v0

This commit is contained in:
dwarning 2011-04-13 19:20:13 +00:00
parent e55f9c7fab
commit 696601ca21
24 changed files with 0 additions and 9590 deletions
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6
src/spicelib/devices/bsim3v1a/.cvsignore
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Makefile.in
Makefile
.deps
.libs
*.lo
*.la

33
src/spicelib/devices/bsim3v1a/Makefile.am
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## Process this file with automake to produce Makefile.in
noinst_LTLIBRARIES = libbsim3v1a.la
libbsim3v1a_la_SOURCES = \
b3v1a.c \
b3v1aacld.c \
b3v1aask.c \
b3v1acvtest.c \
b3v1adel.c \
b3v1adest.c \
b3v1agetic.c \
b3v1ald.c \
b3v1amask.c \
b3v1amdel.c \
b3v1ampar.c \
b3v1anoi.c \
b3v1apar.c \
b3v1apzld.c \
b3v1aset.c \
b3v1atemp.c \
b3v1atrunc.c \
bsim3v1adef.h \
bsim3v1aext.h \
bsim3v1ainit.c \
bsim3v1ainit.h \
bsim3v1aitf.h
AM_CPPFLAGS = -I$(top_srcdir)/src/include
MAINTAINERCLEANFILES = Makefile.in

434
src/spicelib/devices/bsim3v1a/b3v1a.c
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/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1995 Min-Chie Jeng and Mansun Chan.
Modified by Paolo Nenzi 2002
File: b3v1a.c
**********/
#include "ngspice.h"
#include "devdefs.h"
#include "bsim3v1adef.h"
#include "suffix.h"
IFparm BSIM3v1ApTable[] = { /* parameters */
IOP( "l", BSIM3v1A_L, IF_REAL , "Length"),
IOP( "w", BSIM3v1A_W, IF_REAL , "Width"),
IOP( "m", BSIM3v1A_M, IF_REAL , "Parallel multiplier"),
IOP( "ad", BSIM3v1A_AD, IF_REAL , "Drain area"),
IOP( "as", BSIM3v1A_AS, IF_REAL , "Source area"),
IOP( "pd", BSIM3v1A_PD, IF_REAL , "Drain perimeter"),
IOP( "ps", BSIM3v1A_PS, IF_REAL , "Source perimeter"),
IOP( "nrd", BSIM3v1A_NRD, IF_REAL , "Number of squares in drain"),
IOP( "nrs", BSIM3v1A_NRS, IF_REAL , "Number of squares in source"),
IOP( "off", BSIM3v1A_OFF, IF_FLAG , "Device is initially off"),
IOP( "nqsmod", BSIM3v1A_NQSMOD, IF_INTEGER, "Non-quasi-static model selector"),
IP( "ic", BSIM3v1A_IC, IF_REALVEC , "Vector of DS,GS,BS initial voltages"),
OP( "gmbs", BSIM3v1A_GMBS, IF_REAL, "Gmb"),
OP( "gm", BSIM3v1A_GM, IF_REAL, "Gm"),
OP( "gds", BSIM3v1A_GDS, IF_REAL, "Gds"),
OP( "vdsat", BSIM3v1A_VDSAT, IF_REAL, "Vdsat"),
OP( "vth", BSIM3v1A_VON, IF_REAL, "Vth"),
OP( "id", BSIM3v1A_CD, IF_REAL, "Ids"),
OP( "vbs", BSIM3v1A_VBS, IF_REAL, "Vbs"),
OP( "vgs", BSIM3v1A_VGS, IF_REAL, "Vgs"),
OP( "vds", BSIM3v1A_VDS, IF_REAL, "Vds"),
OP( "gbd", BSIM3v1A_GBD, IF_REAL, "Gbd"),
OP( "gbs", BSIM3v1A_GBS, IF_REAL, "Gbs"),
OP( "ibd", BSIM3v1A_CBD, IF_REAL, "Ibd"),
OP( "ibs", BSIM3v1A_CBS, IF_REAL, "Ibs"),
};
IFparm BSIM3v1AmPTable[] = { /* model parameters */
IOP( "capmod", BSIM3v1A_MOD_CAPMOD, IF_INTEGER, "Capacitance model selector"),
IOP( "nqsmod", BSIM3v1A_MOD_NQSMOD, IF_INTEGER, "Non-quasi-static model selector"),
IOP( "mobmod", BSIM3v1A_MOD_MOBMOD, IF_INTEGER, "Mobility model selector"),
IOP( "noimod", BSIM3v1A_MOD_NOIMOD, IF_INTEGER, "Noise model selector"),
IOP( "binunit", BSIM3v1A_MOD_BINUNIT, IF_INTEGER, "Bin unit selector"),
IOP( "tox", BSIM3v1A_MOD_TOX, IF_REAL, "Gate oxide thickness in meters"),
IOP( "cdsc", BSIM3v1A_MOD_CDSC, IF_REAL, "Drain/Source and channel coupling capacitance"),
IOP( "cdscb", BSIM3v1A_MOD_CDSCB, IF_REAL, "Body-bias dependence of cdsc"),
IOP( "cdscd", BSIM3v1A_MOD_CDSCD, IF_REAL, "Drain-bias dependence of cdsc"),
IOP( "cit", BSIM3v1A_MOD_CIT, IF_REAL, "Interface state capacitance"),
IOP( "nfactor", BSIM3v1A_MOD_NFACTOR, IF_REAL, "Subthreshold swing Coefficient"),
IOP( "xj", BSIM3v1A_MOD_XJ, IF_REAL, "Junction depth in meters"),
IOP( "vsat", BSIM3v1A_MOD_VSAT, IF_REAL, "Saturation velocity at tnom"),
IOP( "at", BSIM3v1A_MOD_AT, IF_REAL, "Temperature coefficient of vsat"),
IOP( "a0", BSIM3v1A_MOD_A0, IF_REAL, "Non-uniform depletion width effect coefficient."),
IOP( "ags", BSIM3v1A_MOD_AGS, IF_REAL, "Gate bias coefficient of Abulk."),
IOP( "a1", BSIM3v1A_MOD_A1, IF_REAL, "Non-saturation effect coefficient"),
IOP( "a2", BSIM3v1A_MOD_A2, IF_REAL, "Non-saturation effect coefficient"),
IOP( "keta", BSIM3v1A_MOD_KETA, IF_REAL, "Body-bias coefficient of non-uniform depletion width effect."),
IOP( "nsub", BSIM3v1A_MOD_NSUB, IF_REAL, "Substrate doping concentration"),
IOP( "nch", BSIM3v1A_MOD_NPEAK, IF_REAL, "Channel doping concentration"),
IOP( "ngate", BSIM3v1A_MOD_NGATE, IF_REAL, "Poly-gate doping concentration"),
IOP( "gamma1", BSIM3v1A_MOD_GAMMA1, IF_REAL, "Vth body coefficient"),
IOP( "gamma2", BSIM3v1A_MOD_GAMMA2, IF_REAL, "Vth body coefficient"),
IOP( "vbx", BSIM3v1A_MOD_VBX, IF_REAL, "Vth transition body Voltage"),
IOP( "vbm", BSIM3v1A_MOD_VBM, IF_REAL, "Maximum body voltage"),
IOP( "xt", BSIM3v1A_MOD_XT, IF_REAL, "Doping depth"),
IOP( "k1", BSIM3v1A_MOD_K1, IF_REAL, "Bulk effect coefficient 1"),
IOP( "kt1", BSIM3v1A_MOD_KT1, IF_REAL, "Temperature coefficient of Vth"),
IOP( "kt1l", BSIM3v1A_MOD_KT1L, IF_REAL, "Temperature coefficient of Vth"),
IOP( "kt2", BSIM3v1A_MOD_KT2, IF_REAL, "Body-coefficient of kt1"),
IOP( "k2", BSIM3v1A_MOD_K2, IF_REAL, "Bulk effect coefficient 2"),
IOP( "k3", BSIM3v1A_MOD_K3, IF_REAL, "Narrow width effect coefficient"),
IOP( "k3b", BSIM3v1A_MOD_K3B, IF_REAL, "Body effect coefficient of k3"),
IOP( "w0", BSIM3v1A_MOD_W0, IF_REAL, "Narrow width effect parameter"),
IOP( "nlx", BSIM3v1A_MOD_NLX, IF_REAL, "Lateral non-uniform doping effect"),
IOP( "dvt0", BSIM3v1A_MOD_DVT0, IF_REAL, "Short channel effect coeff. 0"),
IOP( "dvt1", BSIM3v1A_MOD_DVT1, IF_REAL, "Short channel effect coeff. 1"),
IOP( "dvt2", BSIM3v1A_MOD_DVT2, IF_REAL, "Short channel effect coeff. 2"),
IOP( "dvt0w", BSIM3v1A_MOD_DVT0W, IF_REAL, "Narrow Width coeff. 0"),
IOP( "dvt1w", BSIM3v1A_MOD_DVT1W, IF_REAL, "Narrow Width effect coeff. 1"),
IOP( "dvt2w", BSIM3v1A_MOD_DVT2W, IF_REAL, "Narrow Width effect coeff. 2"),
IOP( "drout", BSIM3v1A_MOD_DROUT, IF_REAL, "DIBL coefficient of output resistance"),
IOP( "dsub", BSIM3v1A_MOD_DSUB, IF_REAL, "DIBL coefficient in the subthreshold region"),
IOP( "vth0", BSIM3v1A_MOD_VTH0, IF_REAL,"Threshold voltage"),
IOP( "vtho", BSIM3v1A_MOD_VTH0, IF_REAL,"Threshold voltage"),
IOP( "ua", BSIM3v1A_MOD_UA, IF_REAL, "Linear gate dependence of mobility"),
IOP( "ua1", BSIM3v1A_MOD_UA1, IF_REAL, "Temperature coefficient of ua"),
IOP( "ub", BSIM3v1A_MOD_UB, IF_REAL, "Quadratic gate dependence of mobility"),
IOP( "ub1", BSIM3v1A_MOD_UB1, IF_REAL, "Temperature coefficient of ub"),
IOP( "uc", BSIM3v1A_MOD_UC, IF_REAL, "Body-bias dependence of mobility"),
IOP( "uc1", BSIM3v1A_MOD_UC1, IF_REAL, "Temperature coefficient of uc"),
IOP( "u0", BSIM3v1A_MOD_U0, IF_REAL, "Low-field mobility at Tnom"),
IOP( "ute", BSIM3v1A_MOD_UTE, IF_REAL, "Temperature coefficient of mobility"),
IOP( "voff", BSIM3v1A_MOD_VOFF, IF_REAL, "Threshold voltage offset"),
IOP( "tnom", BSIM3v1A_MOD_TNOM, IF_REAL, "Parameter measurement temperature"),
IOP( "cgso", BSIM3v1A_MOD_CGSO, IF_REAL, "Gate-source overlap capacitance per width"),
IOP( "cgdo", BSIM3v1A_MOD_CGDO, IF_REAL, "Gate-drain overlap capacitance per width"),
IOP( "cgbo", BSIM3v1A_MOD_CGBO, IF_REAL, "Gate-bulk overlap capacitance per length"),
IOP( "xpart", BSIM3v1A_MOD_XPART, IF_REAL, "Channel charge partitioning"),
IOP( "elm", BSIM3v1A_MOD_ELM, IF_REAL, "Non-quasi-static Elmore Constant Parameter"),
IOP( "delta", BSIM3v1A_MOD_DELTA, IF_REAL, "Effective Vds parameter"),
IOP( "rsh", BSIM3v1A_MOD_RSH, IF_REAL, "Source-drain sheet resistance"),
IOP( "rdsw", BSIM3v1A_MOD_RDSW, IF_REAL, "Source-drain resistance per width"),
IOP( "prwg", BSIM3v1A_MOD_PRWG, IF_REAL, "Gate-bias effect on parasitic resistance "),
IOP( "prwb", BSIM3v1A_MOD_PRWB, IF_REAL, "Body-effect on parasitic resistance "),
IOP( "prt", BSIM3v1A_MOD_PRT, IF_REAL, "Temperature coefficient of parasitic resistance "),
IOP( "eta0", BSIM3v1A_MOD_ETA0, IF_REAL, "Subthreshold region DIBL coefficient"),
IOP( "etab", BSIM3v1A_MOD_ETAB, IF_REAL, "Subthreshold region DIBL coefficient"),
IOP( "pclm", BSIM3v1A_MOD_PCLM, IF_REAL, "Channel length modulation Coefficient"),
IOP( "pdiblc1", BSIM3v1A_MOD_PDIBL1, IF_REAL, "Drain-induced barrier lowering coefficient"),
IOP( "pdiblc2", BSIM3v1A_MOD_PDIBL2, IF_REAL, "Drain-induced barrier lowering coefficient"),
IOP( "pdiblcb", BSIM3v1A_MOD_PDIBLB, IF_REAL, "Body-effect on drain-induced barrier lowering"),
IOP( "pscbe1", BSIM3v1A_MOD_PSCBE1, IF_REAL, "Substrate current body-effect coefficient"),
IOP( "pscbe2", BSIM3v1A_MOD_PSCBE2, IF_REAL, "Substrate current body-effect coefficient"),
IOP( "pvag", BSIM3v1A_MOD_PVAG, IF_REAL, "Gate dependence of output resistance parameter"),
IOP( "js", BSIM3v1A_MOD_JS, IF_REAL, "Source/drain junction reverse saturation current density"),
IOP( "pb", BSIM3v1A_MOD_PB, IF_REAL, "Source/drain junction built-in potential"),
IOP( "mj", BSIM3v1A_MOD_MJ, IF_REAL, "Source/drain bottom junction capacitance grading coefficient"),
IOP( "pbsw", BSIM3v1A_MOD_PBSW, IF_REAL, "Source/drain sidewall junction capacitance built in potential"),
IOP( "mjsw", BSIM3v1A_MOD_MJSW, IF_REAL, "Source/drain sidewall junction capacitance grading coefficient"),
IOP( "cj", BSIM3v1A_MOD_CJ, IF_REAL, "Source/drain bottom junction capacitance per unit area"),
IOP( "cjsw", BSIM3v1A_MOD_CJSW, IF_REAL, "Source/drain sidewall junction capacitance per unit area"),
IOP( "lint", BSIM3v1A_MOD_LINT, IF_REAL, "Length reduction parameter"),
IOP( "ll", BSIM3v1A_MOD_LL, IF_REAL, "Length reduction parameter"),
IOP( "lln", BSIM3v1A_MOD_LLN, IF_REAL, "Length reduction parameter"),
IOP( "lw", BSIM3v1A_MOD_LW, IF_REAL, "Length reduction parameter"),
IOP( "lwn", BSIM3v1A_MOD_LWN, IF_REAL, "Length reduction parameter"),
IOP( "lwl", BSIM3v1A_MOD_LWL, IF_REAL, "Length reduction parameter"),
IOP( "lmin", BSIM3v1A_MOD_LMIN, IF_REAL, "Minimum length for the model"),
IOP( "lmax", BSIM3v1A_MOD_LMAX, IF_REAL, "Maximum length for the model"),
IOP( "wr", BSIM3v1A_MOD_WR, IF_REAL, "Width dependence of rds"),
IOP( "wint", BSIM3v1A_MOD_WINT, IF_REAL, "Width reduction parameter"),
IOP( "dwg", BSIM3v1A_MOD_DWG, IF_REAL, "Width reduction parameter"),
IOP( "dwb", BSIM3v1A_MOD_DWB, IF_REAL, "Width reduction parameter"),
IOP( "wl", BSIM3v1A_MOD_WL, IF_REAL, "Width reduction parameter"),
IOP( "wln", BSIM3v1A_MOD_WLN, IF_REAL, "Width reduction parameter"),
IOP( "ww", BSIM3v1A_MOD_WW, IF_REAL, "Width reduction parameter"),
IOP( "wwn", BSIM3v1A_MOD_WWN, IF_REAL, "Width reduction parameter"),
IOP( "wwl", BSIM3v1A_MOD_WWL, IF_REAL, "Width reduction parameter"),
IOP( "wmin", BSIM3v1A_MOD_WMIN, IF_REAL, "Minimum width for the model"),
IOP( "wmax", BSIM3v1A_MOD_WMAX, IF_REAL, "Maximum width for the model"),
IOP( "b0", BSIM3v1A_MOD_B0, IF_REAL, "Abulk narrow width parameter"),
IOP( "b1", BSIM3v1A_MOD_B1, IF_REAL, "Abulk narrow width parameter"),
IOP( "cgsl", BSIM3v1A_MOD_CGSL, IF_REAL, "New C-V model parameter"),
IOP( "cgdl", BSIM3v1A_MOD_CGDL, IF_REAL, "New C-V model parameter"),
IOP( "ckappa", BSIM3v1A_MOD_CKAPPA, IF_REAL, "New C-V model parameter"),
IOP( "cf", BSIM3v1A_MOD_CF, IF_REAL, "Fringe capacitance parameter"),
IOP( "clc", BSIM3v1A_MOD_CLC, IF_REAL, "Vdsat parameter for C-V model"),
IOP( "cle", BSIM3v1A_MOD_CLE, IF_REAL, "Vdsat parameter for C-V model"),
IOP( "dwc", BSIM3v1A_MOD_DWC, IF_REAL, "Delta W for C-V model"),
IOP( "dlc", BSIM3v1A_MOD_DLC, IF_REAL, "Delta L for C-V model"),
IOP( "alpha0", BSIM3v1A_MOD_ALPHA0, IF_REAL, "substrate current model parameter"),
IOP( "beta0", BSIM3v1A_MOD_BETA0, IF_REAL, "substrate current model parameter"),
IOP( "lcdsc", BSIM3v1A_MOD_LCDSC, IF_REAL, "Length dependence of cdsc"),
IOP( "lcdscb", BSIM3v1A_MOD_LCDSCB, IF_REAL, "Length dependence of cdscb"),
IOP( "lcdscd", BSIM3v1A_MOD_LCDSCD, IF_REAL, "Length dependence of cdscd"),
IOP( "lcit", BSIM3v1A_MOD_LCIT, IF_REAL, "Length dependence of cit"),
IOP( "lnfactor", BSIM3v1A_MOD_LNFACTOR, IF_REAL, "Length dependence of nfactor"),
IOP( "lxj", BSIM3v1A_MOD_LXJ, IF_REAL, "Length dependence of xj"),
IOP( "lvsat", BSIM3v1A_MOD_LVSAT, IF_REAL, "Length dependence of vsat"),
IOP( "lat", BSIM3v1A_MOD_LAT, IF_REAL, "Length dependence of at"),
IOP( "la0", BSIM3v1A_MOD_LA0, IF_REAL, "Length dependence of a0"),
IOP( "lags", BSIM3v1A_MOD_LAGS, IF_REAL, "Length dependence of ags"),
IOP( "la1", BSIM3v1A_MOD_LA1, IF_REAL, "Length dependence of a1"),
IOP( "la2", BSIM3v1A_MOD_LA2, IF_REAL, "Length dependence of a2"),
IOP( "lketa", BSIM3v1A_MOD_LKETA, IF_REAL, "Length dependence of keta"),
IOP( "lnsub", BSIM3v1A_MOD_LNSUB, IF_REAL, "Length dependence of nsub"),
IOP( "lnch", BSIM3v1A_MOD_LNPEAK, IF_REAL, "Length dependence of nch"),
IOP( "lngate", BSIM3v1A_MOD_LNGATE, IF_REAL, "Length dependence of ngate"),
IOP( "lgamma1", BSIM3v1A_MOD_LGAMMA1, IF_REAL, "Length dependence of gamma1"),
IOP( "lgamma2", BSIM3v1A_MOD_LGAMMA2, IF_REAL, "Length dependence of gamma2"),
IOP( "lvbx", BSIM3v1A_MOD_LVBX, IF_REAL, "Length dependence of vbx"),
IOP( "lvbm", BSIM3v1A_MOD_LVBM, IF_REAL, "Length dependence of vbm"),
IOP( "lxt", BSIM3v1A_MOD_LXT, IF_REAL, "Length dependence of xt"),
IOP( "lk1", BSIM3v1A_MOD_LK1, IF_REAL, "Length dependence of k1"),
IOP( "lkt1", BSIM3v1A_MOD_LKT1, IF_REAL, "Length dependence of kt1"),
IOP( "lkt1l", BSIM3v1A_MOD_LKT1L, IF_REAL, "Length dependence of kt1l"),
IOP( "lkt2", BSIM3v1A_MOD_LKT2, IF_REAL, "Length dependence of kt2"),
IOP( "lk2", BSIM3v1A_MOD_LK2, IF_REAL, "Length dependence of k2"),
IOP( "lk3", BSIM3v1A_MOD_LK3, IF_REAL, "Length dependence of k3"),
IOP( "lk3b", BSIM3v1A_MOD_LK3B, IF_REAL, "Length dependence of k3b"),
IOP( "lw0", BSIM3v1A_MOD_LW0, IF_REAL, "Length dependence of w0"),
IOP( "lnlx", BSIM3v1A_MOD_LNLX, IF_REAL, "Length dependence of nlx"),
IOP( "ldvt0", BSIM3v1A_MOD_LDVT0, IF_REAL, "Length dependence of dvt0"),
IOP( "ldvt1", BSIM3v1A_MOD_LDVT1, IF_REAL, "Length dependence of dvt1"),
IOP( "ldvt2", BSIM3v1A_MOD_LDVT2, IF_REAL, "Length dependence of dvt2"),
IOP( "ldvt0w", BSIM3v1A_MOD_LDVT0W, IF_REAL, "Length dependence of dvt0w"),
IOP( "ldvt1w", BSIM3v1A_MOD_LDVT1W, IF_REAL, "Length dependence of dvt1w"),
IOP( "ldvt2w", BSIM3v1A_MOD_LDVT2W, IF_REAL, "Length dependence of dvt2w"),
IOP( "ldrout", BSIM3v1A_MOD_LDROUT, IF_REAL, "Length dependence of drout"),
IOP( "ldsub", BSIM3v1A_MOD_LDSUB, IF_REAL, "Length dependence of dsub"),
IOP( "lvth0", BSIM3v1A_MOD_LVTH0, IF_REAL,"Length dependence of vto"),
IOP( "lvtho", BSIM3v1A_MOD_LVTH0, IF_REAL,"Length dependence of vto"),
IOP( "lua", BSIM3v1A_MOD_LUA, IF_REAL, "Length dependence of ua"),
IOP( "lua1", BSIM3v1A_MOD_LUA1, IF_REAL, "Length dependence of ua1"),
IOP( "lub", BSIM3v1A_MOD_LUB, IF_REAL, "Length dependence of ub"),
IOP( "lub1", BSIM3v1A_MOD_LUB1, IF_REAL, "Length dependence of ub1"),
IOP( "luc", BSIM3v1A_MOD_LUC, IF_REAL, "Length dependence of uc"),
IOP( "luc1", BSIM3v1A_MOD_LUC1, IF_REAL, "Length dependence of uc1"),
IOP( "lu0", BSIM3v1A_MOD_LU0, IF_REAL, "Length dependence of u0"),
IOP( "lute", BSIM3v1A_MOD_LUTE, IF_REAL, "Length dependence of ute"),
IOP( "lvoff", BSIM3v1A_MOD_LVOFF, IF_REAL, "Length dependence of voff"),
IOP( "lelm", BSIM3v1A_MOD_LELM, IF_REAL, "Length dependence of elm"),
IOP( "ldelta", BSIM3v1A_MOD_LDELTA, IF_REAL, "Length dependence of delta"),
IOP( "lrdsw", BSIM3v1A_MOD_LRDSW, IF_REAL, "Length dependence of rdsw "),
IOP( "lprwg", BSIM3v1A_MOD_LPRWG, IF_REAL, "Length dependence of prwg "),
IOP( "lprwb", BSIM3v1A_MOD_LPRWB, IF_REAL, "Length dependence of prwb "),
IOP( "lprt", BSIM3v1A_MOD_LPRT, IF_REAL, "Length dependence of prt "),
IOP( "leta0", BSIM3v1A_MOD_LETA0, IF_REAL, "Length dependence of eta0"),
IOP( "letab", BSIM3v1A_MOD_LETAB, IF_REAL, "Length dependence of etab"),
IOP( "lpclm", BSIM3v1A_MOD_LPCLM, IF_REAL, "Length dependence of pclm"),
IOP( "lpdiblc1", BSIM3v1A_MOD_LPDIBL1, IF_REAL, "Length dependence of pdiblc1"),
IOP( "lpdiblc2", BSIM3v1A_MOD_LPDIBL2, IF_REAL, "Length dependence of pdiblc2"),
IOP( "lpdiblcb", BSIM3v1A_MOD_LPDIBLB, IF_REAL, "Length dependence of pdiblcb"),
IOP( "lpscbe1", BSIM3v1A_MOD_LPSCBE1, IF_REAL, "Length dependence of pscbe1"),
IOP( "lpscbe2", BSIM3v1A_MOD_LPSCBE2, IF_REAL, "Length dependence of pscbe2"),
IOP( "lpvag", BSIM3v1A_MOD_LPVAG, IF_REAL, "Length dependence of pvag"),
IOP( "lwr", BSIM3v1A_MOD_LWR, IF_REAL, "Length dependence of wr"),
IOP( "ldwg", BSIM3v1A_MOD_LDWG, IF_REAL, "Length dependence of dwg"),
IOP( "ldwb", BSIM3v1A_MOD_LDWB, IF_REAL, "Length dependence of dwb"),
IOP( "lb0", BSIM3v1A_MOD_LB0, IF_REAL, "Length dependence of b0"),
IOP( "lb1", BSIM3v1A_MOD_LB1, IF_REAL, "Length dependence of b1"),
IOP( "lcgsl", BSIM3v1A_MOD_LCGSL, IF_REAL, "Length dependence of cgsl"),
IOP( "lcgdl", BSIM3v1A_MOD_LCGDL, IF_REAL, "Length dependence of cgdl"),
IOP( "lckappa", BSIM3v1A_MOD_LCKAPPA, IF_REAL, "Length dependence of ckappa"),
IOP( "lcf", BSIM3v1A_MOD_LCF, IF_REAL, "Length dependence of cf"),
IOP( "lclc", BSIM3v1A_MOD_LCLC, IF_REAL, "Length dependence of clc"),
IOP( "lcle", BSIM3v1A_MOD_LCLE, IF_REAL, "Length dependence of cle"),
IOP( "lalpha0", BSIM3v1A_MOD_LALPHA0, IF_REAL, "Length dependence of alpha0"),
IOP( "lbeta0", BSIM3v1A_MOD_LBETA0, IF_REAL, "Length dependence of beta0"),
IOP( "wcdsc", BSIM3v1A_MOD_WCDSC, IF_REAL, "Width dependence of cdsc"),
IOP( "wcdscb", BSIM3v1A_MOD_WCDSCB, IF_REAL, "Width dependence of cdscb"),
IOP( "wcdscd", BSIM3v1A_MOD_WCDSCD, IF_REAL, "Width dependence of cdscd"),
IOP( "wcit", BSIM3v1A_MOD_WCIT, IF_REAL, "Width dependence of cit"),
IOP( "wnfactor", BSIM3v1A_MOD_WNFACTOR, IF_REAL, "Width dependence of nfactor"),
IOP( "wxj", BSIM3v1A_MOD_WXJ, IF_REAL, "Width dependence of xj"),
IOP( "wvsat", BSIM3v1A_MOD_WVSAT, IF_REAL, "Width dependence of vsat"),
IOP( "wat", BSIM3v1A_MOD_WAT, IF_REAL, "Width dependence of at"),
IOP( "wa0", BSIM3v1A_MOD_WA0, IF_REAL, "Width dependence of a0"),
IOP( "wags", BSIM3v1A_MOD_WAGS, IF_REAL, "Width dependence of ags"),
IOP( "wa1", BSIM3v1A_MOD_WA1, IF_REAL, "Width dependence of a1"),
IOP( "wa2", BSIM3v1A_MOD_WA2, IF_REAL, "Width dependence of a2"),
IOP( "wketa", BSIM3v1A_MOD_WKETA, IF_REAL, "Width dependence of keta"),
IOP( "wnsub", BSIM3v1A_MOD_WNSUB, IF_REAL, "Width dependence of nsub"),
IOP( "wnch", BSIM3v1A_MOD_WNPEAK, IF_REAL, "Width dependence of nch"),
IOP( "wngate", BSIM3v1A_MOD_WNGATE, IF_REAL, "Width dependence of ngate"),
IOP( "wgamma1", BSIM3v1A_MOD_WGAMMA1, IF_REAL, "Width dependence of gamma1"),
IOP( "wgamma2", BSIM3v1A_MOD_WGAMMA2, IF_REAL, "Width dependence of gamma2"),
IOP( "wvbx", BSIM3v1A_MOD_WVBX, IF_REAL, "Width dependence of vbx"),
IOP( "wvbm", BSIM3v1A_MOD_WVBM, IF_REAL, "Width dependence of vbm"),
IOP( "wxt", BSIM3v1A_MOD_WXT, IF_REAL, "Width dependence of xt"),
IOP( "wk1", BSIM3v1A_MOD_WK1, IF_REAL, "Width dependence of k1"),
IOP( "wkt1", BSIM3v1A_MOD_WKT1, IF_REAL, "Width dependence of kt1"),
IOP( "wkt1l", BSIM3v1A_MOD_WKT1L, IF_REAL, "Width dependence of kt1l"),
IOP( "wkt2", BSIM3v1A_MOD_WKT2, IF_REAL, "Width dependence of kt2"),
IOP( "wk2", BSIM3v1A_MOD_WK2, IF_REAL, "Width dependence of k2"),
IOP( "wk3", BSIM3v1A_MOD_WK3, IF_REAL, "Width dependence of k3"),
IOP( "wk3b", BSIM3v1A_MOD_WK3B, IF_REAL, "Width dependence of k3b"),
IOP( "ww0", BSIM3v1A_MOD_WW0, IF_REAL, "Width dependence of w0"),
IOP( "wnlx", BSIM3v1A_MOD_WNLX, IF_REAL, "Width dependence of nlx"),
IOP( "wdvt0", BSIM3v1A_MOD_WDVT0, IF_REAL, "Width dependence of dvt0"),
IOP( "wdvt1", BSIM3v1A_MOD_WDVT1, IF_REAL, "Width dependence of dvt1"),
IOP( "wdvt2", BSIM3v1A_MOD_WDVT2, IF_REAL, "Width dependence of dvt2"),
IOP( "wdvt0w", BSIM3v1A_MOD_WDVT0W, IF_REAL, "Width dependence of dvt0w"),
IOP( "wdvt1w", BSIM3v1A_MOD_WDVT1W, IF_REAL, "Width dependence of dvt1w"),
IOP( "wdvt2w", BSIM3v1A_MOD_WDVT2W, IF_REAL, "Width dependence of dvt2w"),
IOP( "wdrout", BSIM3v1A_MOD_WDROUT, IF_REAL, "Width dependence of drout"),
IOP( "wdsub", BSIM3v1A_MOD_WDSUB, IF_REAL, "Width dependence of dsub"),
IOP( "wvth0", BSIM3v1A_MOD_WVTH0, IF_REAL,"Width dependence of vto"),
IOP( "wvtho", BSIM3v1A_MOD_WVTH0, IF_REAL,"Width dependence of vto"),
IOP( "wua", BSIM3v1A_MOD_WUA, IF_REAL, "Width dependence of ua"),
IOP( "wua1", BSIM3v1A_MOD_WUA1, IF_REAL, "Width dependence of ua1"),
IOP( "wub", BSIM3v1A_MOD_WUB, IF_REAL, "Width dependence of ub"),
IOP( "wub1", BSIM3v1A_MOD_WUB1, IF_REAL, "Width dependence of ub1"),
IOP( "wuc", BSIM3v1A_MOD_WUC, IF_REAL, "Width dependence of uc"),
IOP( "wuc1", BSIM3v1A_MOD_WUC1, IF_REAL, "Width dependence of uc1"),
IOP( "wu0", BSIM3v1A_MOD_WU0, IF_REAL, "Width dependence of u0"),
IOP( "wute", BSIM3v1A_MOD_WUTE, IF_REAL, "Width dependence of ute"),
IOP( "wvoff", BSIM3v1A_MOD_WVOFF, IF_REAL, "Width dependence of voff"),
IOP( "welm", BSIM3v1A_MOD_WELM, IF_REAL, "Width dependence of elm"),
IOP( "wdelta", BSIM3v1A_MOD_WDELTA, IF_REAL, "Width dependence of delta"),
IOP( "wrdsw", BSIM3v1A_MOD_WRDSW, IF_REAL, "Width dependence of rdsw "),
IOP( "wprwg", BSIM3v1A_MOD_WPRWG, IF_REAL, "Width dependence of prwg "),
IOP( "wprwb", BSIM3v1A_MOD_WPRWB, IF_REAL, "Width dependence of prwb "),
IOP( "wprt", BSIM3v1A_MOD_WPRT, IF_REAL, "Width dependence of prt"),
IOP( "weta0", BSIM3v1A_MOD_WETA0, IF_REAL, "Width dependence of eta0"),
IOP( "wetab", BSIM3v1A_MOD_WETAB, IF_REAL, "Width dependence of etab"),
IOP( "wpclm", BSIM3v1A_MOD_WPCLM, IF_REAL, "Width dependence of pclm"),
IOP( "wpdiblc1", BSIM3v1A_MOD_WPDIBL1, IF_REAL, "Width dependence of pdiblc1"),
IOP( "wpdiblc2", BSIM3v1A_MOD_WPDIBL2, IF_REAL, "Width dependence of pdiblc2"),
IOP( "wpdiblcb", BSIM3v1A_MOD_WPDIBLB, IF_REAL, "Width dependence of pdiblcb"),
IOP( "wpscbe1", BSIM3v1A_MOD_WPSCBE1, IF_REAL, "Width dependence of pscbe1"),
IOP( "wpscbe2", BSIM3v1A_MOD_WPSCBE2, IF_REAL, "Width dependence of pscbe2"),
IOP( "wpvag", BSIM3v1A_MOD_WPVAG, IF_REAL, "Width dependence of pvag"),
IOP( "wwr", BSIM3v1A_MOD_WWR, IF_REAL, "Width dependence of wr"),
IOP( "wdwg", BSIM3v1A_MOD_WDWG, IF_REAL, "Width dependence of dwg"),
IOP( "wdwb", BSIM3v1A_MOD_WDWB, IF_REAL, "Width dependence of dwb"),
IOP( "wb0", BSIM3v1A_MOD_WB0, IF_REAL, "Width dependence of b0"),
IOP( "wb1", BSIM3v1A_MOD_WB1, IF_REAL, "Width dependence of b1"),
IOP( "wcgsl", BSIM3v1A_MOD_WCGSL, IF_REAL, "Width dependence of cgsl"),
IOP( "wcgdl", BSIM3v1A_MOD_WCGDL, IF_REAL, "Width dependence of cgdl"),
IOP( "wckappa", BSIM3v1A_MOD_WCKAPPA, IF_REAL, "Width dependence of ckappa"),
IOP( "wcf", BSIM3v1A_MOD_WCF, IF_REAL, "Width dependence of cf"),
IOP( "wclc", BSIM3v1A_MOD_WCLC, IF_REAL, "Width dependence of clc"),
IOP( "wcle", BSIM3v1A_MOD_WCLE, IF_REAL, "Width dependence of cle"),
IOP( "walpha0", BSIM3v1A_MOD_WALPHA0, IF_REAL, "Width dependence of alpha0"),
IOP( "wbeta0", BSIM3v1A_MOD_WBETA0, IF_REAL, "Width dependence of beta0"),
IOP( "pcdsc", BSIM3v1A_MOD_PCDSC, IF_REAL, "Cross-term dependence of cdsc"),
IOP( "pcdscb", BSIM3v1A_MOD_PCDSCB, IF_REAL, "Cross-term dependence of cdscb"),
IOP( "pcdscd", BSIM3v1A_MOD_PCDSCD, IF_REAL, "Cross-term dependence of cdscd"),
IOP( "pcit", BSIM3v1A_MOD_PCIT, IF_REAL, "Cross-term dependence of cit"),
IOP( "pnfactor", BSIM3v1A_MOD_PNFACTOR, IF_REAL, "Cross-term dependence of nfactor"),
IOP( "pxj", BSIM3v1A_MOD_PXJ, IF_REAL, "Cross-term dependence of xj"),
IOP( "pvsat", BSIM3v1A_MOD_PVSAT, IF_REAL, "Cross-term dependence of vsat"),
IOP( "pat", BSIM3v1A_MOD_PAT, IF_REAL, "Cross-term dependence of at"),
IOP( "pa0", BSIM3v1A_MOD_PA0, IF_REAL, "Cross-term dependence of a0"),
IOP( "pags", BSIM3v1A_MOD_PAGS, IF_REAL, "Cross-term dependence of ags"),
IOP( "pa1", BSIM3v1A_MOD_PA1, IF_REAL, "Cross-term dependence of a1"),
IOP( "pa2", BSIM3v1A_MOD_PA2, IF_REAL, "Cross-term dependence of a2"),
IOP( "pketa", BSIM3v1A_MOD_PKETA, IF_REAL, "Cross-term dependence of keta"),
IOP( "pnsub", BSIM3v1A_MOD_PNSUB, IF_REAL, "Cross-term dependence of nsub"),
IOP( "pnch", BSIM3v1A_MOD_PNPEAK, IF_REAL, "Cross-term dependence of nch"),
IOP( "pngate", BSIM3v1A_MOD_PNGATE, IF_REAL, "Cross-term dependence of ngate"),
IOP( "pgamma1", BSIM3v1A_MOD_PGAMMA1, IF_REAL, "Cross-term dependence of gamma1"),
IOP( "pgamma2", BSIM3v1A_MOD_PGAMMA2, IF_REAL, "Cross-term dependence of gamma2"),
IOP( "pvbx", BSIM3v1A_MOD_PVBX, IF_REAL, "Cross-term dependence of vbx"),
IOP( "pvbm", BSIM3v1A_MOD_PVBM, IF_REAL, "Cross-term dependence of vbm"),
IOP( "pxt", BSIM3v1A_MOD_PXT, IF_REAL, "Cross-term dependence of xt"),
IOP( "pk1", BSIM3v1A_MOD_PK1, IF_REAL, "Cross-term dependence of k1"),
IOP( "pkt1", BSIM3v1A_MOD_PKT1, IF_REAL, "Cross-term dependence of kt1"),
IOP( "pkt1l", BSIM3v1A_MOD_PKT1L, IF_REAL, "Cross-term dependence of kt1l"),
IOP( "pkt2", BSIM3v1A_MOD_PKT2, IF_REAL, "Cross-term dependence of kt2"),
IOP( "pk2", BSIM3v1A_MOD_PK2, IF_REAL, "Cross-term dependence of k2"),
IOP( "pk3", BSIM3v1A_MOD_PK3, IF_REAL, "Cross-term dependence of k3"),
IOP( "pk3b", BSIM3v1A_MOD_PK3B, IF_REAL, "Cross-term dependence of k3b"),
IOP( "pw0", BSIM3v1A_MOD_PW0, IF_REAL, "Cross-term dependence of w0"),
IOP( "pnlx", BSIM3v1A_MOD_PNLX, IF_REAL, "Cross-term dependence of nlx"),
IOP( "pdvt0", BSIM3v1A_MOD_PDVT0, IF_REAL, "Cross-term dependence of dvt0"),
IOP( "pdvt1", BSIM3v1A_MOD_PDVT1, IF_REAL, "Cross-term dependence of dvt1"),
IOP( "pdvt2", BSIM3v1A_MOD_PDVT2, IF_REAL, "Cross-term dependence of dvt2"),
IOP( "pdvt0w", BSIM3v1A_MOD_PDVT0W, IF_REAL, "Cross-term dependence of dvt0w"),
IOP( "pdvt1w", BSIM3v1A_MOD_PDVT1W, IF_REAL, "Cross-term dependence of dvt1w"),
IOP( "pdvt2w", BSIM3v1A_MOD_PDVT2W, IF_REAL, "Cross-term dependence of dvt2w"),
IOP( "pdrout", BSIM3v1A_MOD_PDROUT, IF_REAL, "Cross-term dependence of drout"),
IOP( "pdsub", BSIM3v1A_MOD_PDSUB, IF_REAL, "Cross-term dependence of dsub"),
IOP( "pvth0", BSIM3v1A_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"),
IOP( "pvtho", BSIM3v1A_MOD_PVTH0, IF_REAL,"Cross-term dependence of vto"),
IOP( "pua", BSIM3v1A_MOD_PUA, IF_REAL, "Cross-term dependence of ua"),
IOP( "pua1", BSIM3v1A_MOD_PUA1, IF_REAL, "Cross-term dependence of ua1"),
IOP( "pub", BSIM3v1A_MOD_PUB, IF_REAL, "Cross-term dependence of ub"),
IOP( "pub1", BSIM3v1A_MOD_PUB1, IF_REAL, "Cross-term dependence of ub1"),
IOP( "puc", BSIM3v1A_MOD_PUC, IF_REAL, "Cross-term dependence of uc"),
IOP( "puc1", BSIM3v1A_MOD_PUC1, IF_REAL, "Cross-term dependence of uc1"),
IOP( "pu0", BSIM3v1A_MOD_PU0, IF_REAL, "Cross-term dependence of u0"),
IOP( "pute", BSIM3v1A_MOD_PUTE, IF_REAL, "Cross-term dependence of ute"),
IOP( "pvoff", BSIM3v1A_MOD_PVOFF, IF_REAL, "Cross-term dependence of voff"),
IOP( "pelm", BSIM3v1A_MOD_PELM, IF_REAL, "Cross-term dependence of elm"),
IOP( "pdelta", BSIM3v1A_MOD_PDELTA, IF_REAL, "Cross-term dependence of delta"),
IOP( "prdsw", BSIM3v1A_MOD_PRDSW, IF_REAL, "Cross-term dependence of rdsw "),
IOP( "pprwg", BSIM3v1A_MOD_PPRWG, IF_REAL, "Cross-term dependence of prwg "),
IOP( "pprwb", BSIM3v1A_MOD_PPRWB, IF_REAL, "Cross-term dependence of prwb "),
IOP( "pprt", BSIM3v1A_MOD_PPRT, IF_REAL, "Cross-term dependence of prt "),
IOP( "peta0", BSIM3v1A_MOD_PETA0, IF_REAL, "Cross-term dependence of eta0"),
IOP( "petab", BSIM3v1A_MOD_PETAB, IF_REAL, "Cross-term dependence of etab"),
IOP( "ppclm", BSIM3v1A_MOD_PPCLM, IF_REAL, "Cross-term dependence of pclm"),
IOP( "ppdiblc1", BSIM3v1A_MOD_PPDIBL1, IF_REAL, "Cross-term dependence of pdiblc1"),
IOP( "ppdiblc2", BSIM3v1A_MOD_PPDIBL2, IF_REAL, "Cross-term dependence of pdiblc2"),
IOP( "ppdiblcb", BSIM3v1A_MOD_PPDIBLB, IF_REAL, "Cross-term dependence of pdiblcb"),
IOP( "ppscbe1", BSIM3v1A_MOD_PPSCBE1, IF_REAL, "Cross-term dependence of pscbe1"),
IOP( "ppscbe2", BSIM3v1A_MOD_PPSCBE2, IF_REAL, "Cross-term dependence of pscbe2"),
IOP( "ppvag", BSIM3v1A_MOD_PPVAG, IF_REAL, "Cross-term dependence of pvag"),
IOP( "pwr", BSIM3v1A_MOD_PWR, IF_REAL, "Cross-term dependence of wr"),
IOP( "pdwg", BSIM3v1A_MOD_PDWG, IF_REAL, "Cross-term dependence of dwg"),
IOP( "pdwb", BSIM3v1A_MOD_PDWB, IF_REAL, "Cross-term dependence of dwb"),
IOP( "pb0", BSIM3v1A_MOD_PB0, IF_REAL, "Cross-term dependence of b0"),
IOP( "pb1", BSIM3v1A_MOD_PB1, IF_REAL, "Cross-term dependence of b1"),
IOP( "pcgsl", BSIM3v1A_MOD_PCGSL, IF_REAL, "Cross-term dependence of cgsl"),
IOP( "pcgdl", BSIM3v1A_MOD_PCGDL, IF_REAL, "Cross-term dependence of cgdl"),
IOP( "pckappa", BSIM3v1A_MOD_PCKAPPA, IF_REAL, "Cross-term dependence of ckappa"),
IOP( "pcf", BSIM3v1A_MOD_PCF, IF_REAL, "Cross-term dependence of cf"),
IOP( "pclc", BSIM3v1A_MOD_PCLC, IF_REAL, "Cross-term dependence of clc"),
IOP( "pcle", BSIM3v1A_MOD_PCLE, IF_REAL, "Cross-term dependence of cle"),
IOP( "palpha0", BSIM3v1A_MOD_PALPHA0, IF_REAL, "Cross-term dependence of alpha0"),
IOP( "pbeta0", BSIM3v1A_MOD_PBETA0, IF_REAL, "Cross-term dependence of beta0"),
IOP( "noia", BSIM3v1A_MOD_NOIA, IF_REAL, "Flicker noise parameter"),
IOP( "noib", BSIM3v1A_MOD_NOIB, IF_REAL, "Flicker noise parameter"),
IOP( "noic", BSIM3v1A_MOD_NOIC, IF_REAL, "Flicker noise parameter"),
IOP( "em", BSIM3v1A_MOD_EM, IF_REAL, "Flicker noise parameter"),
IOP( "ef", BSIM3v1A_MOD_EF, IF_REAL, "Flicker noise frequency exponent"),
IOP( "af", BSIM3v1A_MOD_AF, IF_REAL, "Flicker noise exponent"),
IOP( "kf", BSIM3v1A_MOD_KF, IF_REAL, "Flicker noise coefficient"),
IP( "nmos", BSIM3v1A_MOD_NMOS, IF_FLAG, "Flag to indicate NMOS"),
IP( "pmos", BSIM3v1A_MOD_PMOS, IF_FLAG, "Flag to indicate PMOS"),
};
char *BSIM3v1Anames[] = {
"Drain",
"Gate",
"Source",
"Bulk",
"Charge"
};
int BSIM3v1AnSize = NUMELEMS(BSIM3v1Anames);
int BSIM3v1ApTSize = NUMELEMS(BSIM3v1ApTable);
int BSIM3v1AmPTSize = NUMELEMS(BSIM3v1AmPTable);
int BSIM3v1AiSize = sizeof(BSIM3v1Ainstance);
int BSIM3v1AmSize = sizeof(BSIM3v1Amodel);

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src/spicelib/devices/bsim3v1a/b3v1aacld.c
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@ -1,184 +0,0 @@
/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1995 Min-Chie Jeng and Mansun Chan.
Modified by Paolo Nenzi 2002
File: b3v1aacld.c
**********/
#include "ngspice.h"
#include "cktdefs.h"
#include "bsim3v1adef.h"
#include "sperror.h"
#include "suffix.h"
int
BSIM3v1AacLoad(GENmodel *inModel, CKTcircuit *ckt)
{
BSIM3v1Amodel *model = (BSIM3v1Amodel*)inModel;
BSIM3v1Ainstance *here;
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb, omega;
double GSoverlapCap, GDoverlapCap, GBoverlapCap, FwdSum, RevSum, Gm, Gmbs;
double dxpart, sxpart, cqgb, cqdb, cqsb, cqbb, xcqgb, xcqdb, xcqsb, xcqbb;
double m;
omega = ckt->CKTomega;
for (; model != NULL; model = model->BSIM3v1AnextModel)
{
for (here = model->BSIM3v1Ainstances; here!= NULL;
here = here->BSIM3v1AnextInstance)
{
if (here->BSIM3v1Aowner != ARCHme)
continue;
if (here->BSIM3v1Amode >= 0)
{ Gm = here->BSIM3v1Agm;
Gmbs = here->BSIM3v1Agmbs;
FwdSum = Gm + Gmbs;
RevSum = 0.0;
cggb = here->BSIM3v1Acggb;
cgsb = here->BSIM3v1Acgsb;
cgdb = here->BSIM3v1Acgdb;
cbgb = here->BSIM3v1Acbgb;
cbsb = here->BSIM3v1Acbsb;
cbdb = here->BSIM3v1Acbdb;
cdgb = here->BSIM3v1Acdgb;
cdsb = here->BSIM3v1Acdsb;
cddb = here->BSIM3v1Acddb;
cqgb = here->BSIM3v1Acqgb;
cqdb = here->BSIM3v1Acqdb;
cqsb = here->BSIM3v1Acqsb;
cqbb = here->BSIM3v1Acqbb;
sxpart = 0.6;
dxpart = 0.4;
}
else
{ Gm = -here->BSIM3v1Agm;
Gmbs = -here->BSIM3v1Agmbs;
FwdSum = 0.0;
RevSum = -Gm - Gmbs;
cggb = here->BSIM3v1Acggb;
cgsb = here->BSIM3v1Acgdb;
cgdb = here->BSIM3v1Acgsb;
cbgb = here->BSIM3v1Acbgb;
cbsb = here->BSIM3v1Acbdb;
cbdb = here->BSIM3v1Acbsb;
cdgb = -(here->BSIM3v1Acdgb + cggb + cbgb);
cdsb = -(here->BSIM3v1Acddb + cgsb + cbsb);
cddb = -(here->BSIM3v1Acdsb + cgdb + cbdb);
cqgb = here->BSIM3v1Acqgb;
cqdb = here->BSIM3v1Acqsb;
cqsb = here->BSIM3v1Acqdb;
cqbb = here->BSIM3v1Acqbb;
sxpart = 0.4;
dxpart = 0.6;
}
gdpr=here->BSIM3v1AdrainConductance;
gspr=here->BSIM3v1AsourceConductance;
gds= here->BSIM3v1Agds;
gbd= here->BSIM3v1Agbd;
gbs= here->BSIM3v1Agbs;
capbd= here->BSIM3v1Acapbd;
capbs= here->BSIM3v1Acapbs;
GSoverlapCap = here->BSIM3v1Acgso;
GDoverlapCap = here->BSIM3v1Acgdo;
GBoverlapCap = here->pParam->BSIM3v1Acgbo;
xcdgb = (cdgb - GDoverlapCap) * omega;
xcddb = (cddb + capbd + GDoverlapCap) * omega;
xcdsb = cdsb * omega;
xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap) * omega;
xcsdb = -(cgdb + cbdb + cddb) * omega;
xcssb = (capbs + GSoverlapCap - (cgsb + cbsb + cdsb)) * omega;
xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap)
* omega;
xcgdb = (cgdb - GDoverlapCap ) * omega;
xcgsb = (cgsb - GSoverlapCap) * omega;
xcbgb = (cbgb - GBoverlapCap) * omega;
xcbdb = (cbdb - capbd ) * omega;
xcbsb = (cbsb - capbs ) * omega;
xcqgb = cqgb * omega;
xcqdb = cqdb * omega;
xcqsb = cqsb * omega;
xcqbb = cqbb * omega;
m = here->BSIM3v1Am;
*(here->BSIM3v1AGgPtr +1) += m * xcggb;
*(here->BSIM3v1ABbPtr +1) -= m * (xcbgb + xcbdb + xcbsb);
*(here->BSIM3v1ADPdpPtr +1) += m * xcddb;
*(here->BSIM3v1ASPspPtr +1) += m * xcssb;
*(here->BSIM3v1AGbPtr +1) -= m * (xcggb + xcgdb + xcgsb);
*(here->BSIM3v1AGdpPtr +1) += m * xcgdb;
*(here->BSIM3v1AGspPtr +1) += m * xcgsb;
*(here->BSIM3v1ABgPtr +1) += m * xcbgb;
*(here->BSIM3v1ABdpPtr +1) += m * xcbdb;
*(here->BSIM3v1ABspPtr +1) += m * xcbsb;
*(here->BSIM3v1ADPgPtr +1) += m * xcdgb;
*(here->BSIM3v1ADPbPtr +1) -= m * (xcdgb + xcddb + xcdsb);
*(here->BSIM3v1ADPspPtr +1) += m * xcdsb;
*(here->BSIM3v1ASPgPtr +1) += m * xcsgb;
*(here->BSIM3v1ASPbPtr +1) -= m * (xcsgb + xcsdb + xcssb);
*(here->BSIM3v1ASPdpPtr +1) += m * xcsdb;
*(here->BSIM3v1AQqPtr +1) += m * omega;
*(here->BSIM3v1AQgPtr +1) -= m * xcqgb;
*(here->BSIM3v1AQdpPtr +1) -= m * xcqdb;
*(here->BSIM3v1AQspPtr +1) -= m * xcqsb;
*(here->BSIM3v1AQbPtr +1) -= m * xcqbb;
*(here->BSIM3v1ADdPtr) += m * gdpr;
*(here->BSIM3v1ASsPtr) += m * gspr;
*(here->BSIM3v1ABbPtr) += m * (gbd + gbs);
*(here->BSIM3v1ADPdpPtr) += m*(gdpr+gds+gbd+RevSum+dxpart*here->BSIM3v1Agtd);
*(here->BSIM3v1ASPspPtr) += m*(gspr+gds+gbs+FwdSum+sxpart*here->BSIM3v1Agts);
*(here->BSIM3v1ADdpPtr) -= m * gdpr;
*(here->BSIM3v1ASspPtr) -= m * gspr;
*(here->BSIM3v1ABdpPtr) -= m * gbd;
*(here->BSIM3v1ABspPtr) -= m * gbs;
*(here->BSIM3v1ADPdPtr) -= m * gdpr;
*(here->BSIM3v1ADPgPtr) += m * (Gm + dxpart * here->BSIM3v1Agtg);
*(here->BSIM3v1ADPbPtr) -= m * (gbd-Gmbs - dxpart * here->BSIM3v1Agtb);
*(here->BSIM3v1ADPspPtr) -= m * (gds+FwdSum-dxpart * here->BSIM3v1Agts);
*(here->BSIM3v1ASPgPtr) -= m * (Gm - sxpart * here->BSIM3v1Agtg);
*(here->BSIM3v1ASPsPtr) -= m * gspr;
*(here->BSIM3v1ASPbPtr) -= m * (gbs+Gmbs - sxpart * here->BSIM3v1Agtg);
*(here->BSIM3v1ASPdpPtr) -= m * (gds+RevSum-sxpart * here->BSIM3v1Agtd);
*(here->BSIM3v1AGgPtr) -= m * here->BSIM3v1Agtg;
*(here->BSIM3v1AGbPtr) -= m * here->BSIM3v1Agtb;
*(here->BSIM3v1AGdpPtr) -= m * here->BSIM3v1Agtd;
*(here->BSIM3v1AGspPtr) -= m * here->BSIM3v1Agts;
*(here->BSIM3v1AQqPtr) += m * here->BSIM3v1Agtau;
*(here->BSIM3v1ADPqPtr) += m * dxpart * here->BSIM3v1Agtau;
*(here->BSIM3v1ASPqPtr) += m * sxpart * here->BSIM3v1Agtau;
*(here->BSIM3v1AGqPtr) -= m * here->BSIM3v1Agtau;
*(here->BSIM3v1AQgPtr) += m * here->BSIM3v1Agtg;
*(here->BSIM3v1AQdpPtr) += m * here->BSIM3v1Agtd;
*(here->BSIM3v1AQspPtr) += m * here->BSIM3v1Agts;
*(here->BSIM3v1AQbPtr) += m * here->BSIM3v1Agtb;
}
}
return(OK);
}

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@ -1,225 +0,0 @@
/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1995 Min-Chie Jeng and Mansun Chan.
Modified by Paolo Nenzi 2002
File: b3v1aask.c
**********/
#include "ngspice.h"
#include "ifsim.h"
#include "cktdefs.h"
#include "devdefs.h"
#include "bsim3v1adef.h"
#include "sperror.h"
#include "suffix.h"
int
BSIM3v1Aask(CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value,
IFvalue *select)
{
BSIM3v1Ainstance *here = (BSIM3v1Ainstance*)inst;
NG_IGNORE(select);
switch(which)
{ case BSIM3v1A_L:
value->rValue = here->BSIM3v1Al;
return(OK);
case BSIM3v1A_W:
value->rValue = here->BSIM3v1Aw;
return(OK);
case BSIM3v1A_M:
value->rValue = here->BSIM3v1Am;
return(OK);
case BSIM3v1A_AS:
value->rValue = here->BSIM3v1AsourceArea;
return(OK);
case BSIM3v1A_AD:
value->rValue = here->BSIM3v1AdrainArea;
return(OK);
case BSIM3v1A_PS:
value->rValue = here->BSIM3v1AsourcePerimeter;
return(OK);
case BSIM3v1A_PD:
value->rValue = here->BSIM3v1AdrainPerimeter;
return(OK);
case BSIM3v1A_NRS:
value->rValue = here->BSIM3v1AsourceSquares;
return(OK);
case BSIM3v1A_NRD:
value->rValue = here->BSIM3v1AdrainSquares;
return(OK);
case BSIM3v1A_OFF:
value->rValue = here->BSIM3v1Aoff;
return(OK);
case BSIM3v1A_NQSMOD:
value->iValue = here->BSIM3v1AnqsMod;
return(OK);
case BSIM3v1A_IC_VBS:
value->rValue = here->BSIM3v1AicVBS;
return(OK);
case BSIM3v1A_IC_VDS:
value->rValue = here->BSIM3v1AicVDS;
return(OK);
case BSIM3v1A_IC_VGS:
value->rValue = here->BSIM3v1AicVGS;
return(OK);
case BSIM3v1A_DNODE:
value->iValue = here->BSIM3v1AdNode;
return(OK);
case BSIM3v1A_GNODE:
value->iValue = here->BSIM3v1AgNode;
return(OK);
case BSIM3v1A_SNODE:
value->iValue = here->BSIM3v1AsNode;
return(OK);
case BSIM3v1A_BNODE:
value->iValue = here->BSIM3v1AbNode;
return(OK);
case BSIM3v1A_DNODEPRIME:
value->iValue = here->BSIM3v1AdNodePrime;
return(OK);
case BSIM3v1A_SNODEPRIME:
value->iValue = here->BSIM3v1AsNodePrime;
return(OK);
case BSIM3v1A_SOURCECONDUCT:
value->rValue = here->BSIM3v1AsourceConductance;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_DRAINCONDUCT:
value->rValue = here->BSIM3v1AdrainConductance;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_VBD:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Avbd);
return(OK);
case BSIM3v1A_VBS:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Avbs);
return(OK);
case BSIM3v1A_VGS:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Avgs);
return(OK);
case BSIM3v1A_VDS:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Avds);
return(OK);
case BSIM3v1A_CD:
value->rValue = here->BSIM3v1Acd;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CBS:
value->rValue = here->BSIM3v1Acbs;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CBD:
value->rValue = here->BSIM3v1Acbd;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_GM:
value->rValue = here->BSIM3v1Agm;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_GDS:
value->rValue = here->BSIM3v1Agds;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_GMBS:
value->rValue = here->BSIM3v1Agmbs;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_GBD:
value->rValue = here->BSIM3v1Agbd;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_GBS:
value->rValue = here->BSIM3v1Agbs;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_QB:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Aqb);
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CQB:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Acqb);
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_QG:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Aqg);
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CQG:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Acqg);
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_QD:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Aqd);
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CQD:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Acqd);
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CGG:
value->rValue = here->BSIM3v1Acggb;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CGD:
value->rValue = here->BSIM3v1Acgdb;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CGS:
value->rValue = here->BSIM3v1Acgsb;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CDG:
value->rValue = here->BSIM3v1Acdgb;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CDD:
value->rValue = here->BSIM3v1Acddb;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CDS:
value->rValue = here->BSIM3v1Acdsb;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CBG:
value->rValue = here->BSIM3v1Acbgb;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CBDB:
value->rValue = here->BSIM3v1Acbdb;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CBSB:
value->rValue = here->BSIM3v1Acbsb;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CAPBD:
value->rValue = here->BSIM3v1Acapbd;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_CAPBS:
value->rValue = here->BSIM3v1Acapbs;
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_VON:
value->rValue = here->BSIM3v1Avon;
return(OK);
case BSIM3v1A_VDSAT:
value->rValue = here->BSIM3v1Avdsat;
return(OK);
case BSIM3v1A_QBS:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Aqbs);
value->rValue *= here->BSIM3v1Am;
return(OK);
case BSIM3v1A_QBD:
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1Aqbd);
value->rValue *= here->BSIM3v1Am;
return(OK);
default:
return(E_BADPARM);
}
/* NOTREACHED */
}

91
src/spicelib/devices/bsim3v1a/b3v1acvtest.c
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@ -1,91 +0,0 @@
/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1995 Min-Chie Jeng and Mansun Chan.
Modified by Paolo Nenzi 2002
File: b3v1acvtest.c
**********/
#include "ngspice.h"
#include "cktdefs.h"
#include "bsim3v1adef.h"
#include "trandefs.h"
#include "const.h"
#include "devdefs.h"
#include "sperror.h"
#include "suffix.h"
int
BSIM3v1AconvTest(GENmodel *inModel, CKTcircuit *ckt)
{
BSIM3v1Amodel *model = (BSIM3v1Amodel*)inModel;
BSIM3v1Ainstance *here;
double delvbd, delvbs, delvds, delvgd, delvgs, vbd, vbs, vds;
double cbd, cbhat, cbs, cd, cdhat, tol, vgd, vgdo, vgs;
/* loop through all the BSIM3v1A device models */
for (; model != NULL; model = model->BSIM3v1AnextModel)
{ /* loop through all the instances of the model */
for (here = model->BSIM3v1Ainstances; here != NULL ;
here=here->BSIM3v1AnextInstance)
{
if (here->BSIM3v1Aowner != ARCHme)
continue;
vbs = model->BSIM3v1Atype
* (*(ckt->CKTrhsOld+here->BSIM3v1AbNode)
- *(ckt->CKTrhsOld+here->BSIM3v1AsNodePrime));
vgs = model->BSIM3v1Atype
* (*(ckt->CKTrhsOld+here->BSIM3v1AgNode)
- *(ckt->CKTrhsOld+here->BSIM3v1AsNodePrime));
vds = model->BSIM3v1Atype
* (*(ckt->CKTrhsOld+here->BSIM3v1AdNodePrime)
- *(ckt->CKTrhsOld+here->BSIM3v1AsNodePrime));
vbd = vbs - vds;
vgd = vgs - vds;
vgdo = *(ckt->CKTstate0 + here->BSIM3v1Avgs)
- *(ckt->CKTstate0 + here->BSIM3v1Avds);
delvbs = vbs - *(ckt->CKTstate0 + here->BSIM3v1Avbs);
delvbd = vbd - *(ckt->CKTstate0 + here->BSIM3v1Avbd);
delvgs = vgs - *(ckt->CKTstate0 + here->BSIM3v1Avgs);
delvds = vds - *(ckt->CKTstate0 + here->BSIM3v1Avds);
delvgd = vgd-vgdo;
cd = here->BSIM3v1Acd;
if (here->BSIM3v1Amode >= 0)
{ cdhat = cd - here->BSIM3v1Agbd * delvbd
+ here->BSIM3v1Agmbs * delvbs + here->BSIM3v1Agm * delvgs
+ here->BSIM3v1Agds * delvds;
}
else
{ cdhat = cd - (here->BSIM3v1Agbd - here->BSIM3v1Agmbs) * delvbd
- here->BSIM3v1Agm * delvgd + here->BSIM3v1Agds * delvds;
}
/*
* check convergence
*/
if ((here->BSIM3v1Aoff == 0) || (!(ckt->CKTmode & MODEINITFIX)))
{ tol = ckt->CKTreltol * MAX(fabs(cdhat), fabs(cd))
+ ckt->CKTabstol;
if (fabs(cdhat - cd) >= tol)
{ ckt->CKTnoncon++;
return(OK);
}
cbs = here->BSIM3v1Acbs;
cbd = here->BSIM3v1Acbd;
cbhat = cbs + cbd + here->BSIM3v1Agbd * delvbd
+ here->BSIM3v1Agbs * delvbs;
tol = ckt->CKTreltol * MAX(fabs(cbhat), fabs(cbs + cbd))
+ ckt->CKTabstol;
if (fabs(cbhat - (cbs + cbd)) > tol)
{ ckt->CKTnoncon++;
return(OK);
}
}
}
}
return(OK);
}

39
src/spicelib/devices/bsim3v1a/b3v1adel.c
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@ -1,39 +0,0 @@
/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1995 Min-Chie Jeng and Mansun Chan.
Modified by Paolo Nenzi 2002
File: b3v1adel.c
**********/
/*
*/
#include "ngspice.h"
#include "bsim3v1adef.h"
#include "sperror.h"
#include "gendefs.h"
#include "suffix.h"
int
BSIM3v1Adelete(GENmodel *inModel, IFuid name, GENinstance **inInst)
{
BSIM3v1Ainstance **fast = (BSIM3v1Ainstance**)inInst;
BSIM3v1Amodel *model = (BSIM3v1Amodel*)inModel;
BSIM3v1Ainstance **prev = NULL;
BSIM3v1Ainstance *here;
for (; model ; model = model->BSIM3v1AnextModel)
{ prev = &(model->BSIM3v1Ainstances);
for (here = *prev; here ; here = *prev)
{ if (here->BSIM3v1Aname == name || (fast && here==*fast))
{ *prev= here->BSIM3v1AnextInstance;
FREE(here);
return(OK);
}
prev = &(here->BSIM3v1AnextInstance);
}
}
return(E_NODEV);
}

37
src/spicelib/devices/bsim3v1a/b3v1adest.c
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@ -1,37 +0,0 @@
/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1995 Min-Chie Jeng and Mansun Chan.
Modified by Paolo Nenzi 2002
File: b3v1adest.c
**********/
#include "ngspice.h"
#include "bsim3v1adef.h"
#include "suffix.h"
void
BSIM3v1Adestroy(GENmodel **inModel)
{
BSIM3v1Amodel **model = (BSIM3v1Amodel**)inModel;
BSIM3v1Ainstance *here;
BSIM3v1Ainstance *prev = NULL;
BSIM3v1Amodel *mod = *model;
BSIM3v1Amodel *oldmod = NULL;
for (; mod ; mod = mod->BSIM3v1AnextModel)
{ if(oldmod) FREE(oldmod);
oldmod = mod;
prev = (BSIM3v1Ainstance *)NULL;
for (here = mod->BSIM3v1Ainstances; here; here = here->BSIM3v1AnextInstance)
{ if(prev) FREE(prev);
prev = here;
}
if(prev) FREE(prev);
}
if(oldmod) FREE(oldmod);
*model = NULL;
return;
}

45
src/spicelib/devices/bsim3v1a/b3v1agetic.c
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@ -1,45 +0,0 @@
/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1995 Min-Chie Jeng and Mansun Chan.
Modified by Paolo Nenzi 2002
File: b3v1agetic.c
**********/
#include "ngspice.h"
#include "cktdefs.h"
#include "bsim3v1adef.h"
#include "sperror.h"
#include "suffix.h"
int
BSIM3v1Agetic(GENmodel *inModel, CKTcircuit *ckt)
{
BSIM3v1Amodel *model = (BSIM3v1Amodel*)inModel;
BSIM3v1Ainstance *here;
for (; model ; model = model->BSIM3v1AnextModel)
{ for (here = model->BSIM3v1Ainstances; here; here = here->BSIM3v1AnextInstance)
{
if (here->BSIM3v1Aowner != ARCHme)
continue;
if(!here->BSIM3v1AicVBSGiven)
{ here->BSIM3v1AicVBS = *(ckt->CKTrhs + here->BSIM3v1AbNode)
- *(ckt->CKTrhs + here->BSIM3v1AsNode);
}
if (!here->BSIM3v1AicVDSGiven)
{ here->BSIM3v1AicVDS = *(ckt->CKTrhs + here->BSIM3v1AdNode)
- *(ckt->CKTrhs + here->BSIM3v1AsNode);
}
if (!here->BSIM3v1AicVGSGiven)
{ here->BSIM3v1AicVGS = *(ckt->CKTrhs + here->BSIM3v1AgNode)
- *(ckt->CKTrhs + here->BSIM3v1AsNode);
}
}
}
return(OK);
}

1947
src/spicelib/devices/bsim3v1a/b3v1ald.c
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File diff suppressed because it is too large Load Diff

1090
src/spicelib/devices/bsim3v1a/b3v1amask.c
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File diff suppressed because it is too large Load Diff

43
src/spicelib/devices/bsim3v1a/b3v1amdel.c
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@ -1,43 +0,0 @@
/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1995 Min-Chie Jeng and Mansun Chan.
Modified by Paolo Nenzi 2002
File: b3v1amdel.c
**********/
#include "ngspice.h"
#include "bsim3v1adef.h"
#include "sperror.h"
#include "suffix.h"
int
BSIM3v1AmDelete(GENmodel **inModel, IFuid modname, GENmodel *kill)
{
BSIM3v1Amodel **model = (BSIM3v1Amodel**)inModel;
BSIM3v1Amodel *modfast = (BSIM3v1Amodel*)kill;
BSIM3v1Ainstance *here;
BSIM3v1Ainstance *prev = NULL;
BSIM3v1Amodel **oldmod;
oldmod = model;
for (; *model ; model = &((*model)->BSIM3v1AnextModel))
{ if ((*model)->BSIM3v1AmodName == modname ||
(modfast && *model == modfast))
goto delgot;
oldmod = model;
}
return(E_NOMOD);
delgot:
*oldmod = (*model)->BSIM3v1AnextModel; /* cut deleted device out of list */
for (here = (*model)->BSIM3v1Ainstances; here; here = here->BSIM3v1AnextInstance)
{ if(prev) FREE(prev);
prev = here;
}
if(prev) FREE(prev);
FREE(*model);
return(OK);
}

1483
src/spicelib/devices/bsim3v1a/b3v1ampar.c
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344
src/spicelib/devices/bsim3v1a/b3v1anoi.c
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@ -1,344 +0,0 @@
/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1995 Gary W. Ng and Min-Chie Jeng.
Modified by Paolo Nenzi 2002
File: b3v1anoi.c
**********/
#include "ngspice.h"
#include "bsim3v1adef.h"
#include "cktdefs.h"
#include "iferrmsg.h"
#include "noisedef.h"
#include "suffix.h"
#include "const.h" /* jwan */
/*
* BSIM3v1Anoise (mode, operation, firstModel, ckt, data, OnDens)
* This routine names and evaluates all of the noise sources
* associated with MOSFET's. It starts with the model *firstModel and
* traverses all of its insts. It then proceeds to any other models
* on the linked list. The total output noise density generated by
* all of the MOSFET's is summed with the variable "OnDens".
*/
static double
StrongInversionNoiseEval_b3v1a(double vgs, double vds, BSIM3v1Amodel *model,
BSIM3v1Ainstance *here, double freq, double temp)
{
struct bsim3v1aSizeDependParam *pParam;
double cd, esat, DelClm, EffFreq, N0, Nl, Vgst;
double T0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi;
pParam = here->pParam;
cd = fabs(here->BSIM3v1Acd) * here->BSIM3v1Am;
if (vds > here->BSIM3v1Avdsat)
{ esat = 2.0 * pParam->BSIM3v1Avsattemp / here->BSIM3v1Aueff;
T0 = ((((vds - here->BSIM3v1Avdsat) / pParam->BSIM3v1Alitl) + model->BSIM3v1Aem)
/ esat);
DelClm = pParam->BSIM3v1Alitl * log (MAX(T0, N_MINLOG));
}
else
DelClm = 0.0;
EffFreq = pow(freq, model->BSIM3v1Aef);
T1 = CHARGE * CHARGE * 8.62e-5 * cd * (temp + CONSTCtoK) * here->BSIM3v1Aueff;
T2 = 1.0e8 * EffFreq * model->BSIM3v1Acox
* pParam->BSIM3v1Aleff * pParam->BSIM3v1Aleff;
Vgst = vgs - here->BSIM3v1Avon;
N0 = model->BSIM3v1Acox * Vgst / CHARGE;
if (N0 < 0.0)
N0 = 0.0;
Nl = model->BSIM3v1Acox * (Vgst - MIN(vds, here->BSIM3v1Avdsat)) / CHARGE;
if (Nl < 0.0)
Nl = 0.0;
T3 = model->BSIM3v1AoxideTrapDensityA
* log(MAX(((N0 + 2.0e14) / (Nl + 2.0e14)), N_MINLOG));
T4 = model->BSIM3v1AoxideTrapDensityB * (N0 - Nl);
T5 = model->BSIM3v1AoxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl);
T6 = 8.62e-5 * (temp + CONSTCtoK) * cd * cd;
T7 = 1.0e8 * EffFreq * pParam->BSIM3v1Aleff
* pParam->BSIM3v1Aleff * pParam->BSIM3v1Aweff * here->BSIM3v1Am;
T8 = model->BSIM3v1AoxideTrapDensityA + model->BSIM3v1AoxideTrapDensityB * Nl
+ model->BSIM3v1AoxideTrapDensityC * Nl * Nl;
T9 = (Nl + 2.0e14) * (Nl + 2.0e14);
Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9;
return Ssi;
}
int
BSIM3v1Anoise (int mode, int operation, GENmodel *inModel, CKTcircuit *ckt,
Ndata *data, double *OnDens)
{
BSIM3v1Amodel *model = (BSIM3v1Amodel *)inModel;
BSIM3v1Ainstance *here;
struct bsim3v1aSizeDependParam *pParam;
char name[N_MXVLNTH];
double tempOnoise;
double tempInoise;
double noizDens[BSIM3v1ANSRCS];
double lnNdens[BSIM3v1ANSRCS];
double vgs, vds, Slimit;
double T1, T10, T11;
double Ssi, Swi;
int i;
/* define the names of the noise sources */
static char *BSIM3v1AnNames[BSIM3v1ANSRCS] =
{ /* Note that we have to keep the order */
".rd", /* noise due to rd */
/* consistent with the index definitions */
".rs", /* noise due to rs */
/* in BSIM3v1Adefs.h */
".id", /* noise due to id */
".1overf", /* flicker (1/f) noise */
"" /* total transistor noise */
};
for (; model != NULL; model = model->BSIM3v1AnextModel)
{ for (here = model->BSIM3v1Ainstances; here != NULL;
here = here->BSIM3v1AnextInstance)
{
if (here->BSIM3v1Aowner != ARCHme)
continue;
pParam = here->pParam;
switch (operation)
{ case N_OPEN:
/* see if we have to to produce a summary report */
/* if so, name all the noise generators */
if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0)
{ switch (mode)
{ case N_DENS:
for (i = 0; i < BSIM3v1ANSRCS; i++)
{ (void) sprintf(name, "onoise.%s%s",
here->BSIM3v1Aname,
BSIM3v1AnNames[i]);
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
if (!data->namelist)
return(E_NOMEM);
(*(SPfrontEnd->IFnewUid)) (ckt,
&(data->namelist[data->numPlots++]),
(IFuid) NULL, name, UID_OTHER,
NULL);
/* we've added one more plot */
}
break;
case INT_NOIZ:
for (i = 0; i < BSIM3v1ANSRCS; i++)
{ (void) sprintf(name, "onoise_total.%s%s",
here->BSIM3v1Aname,
BSIM3v1AnNames[i]);
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
if (!data->namelist)
return(E_NOMEM);
(*(SPfrontEnd->IFnewUid)) (ckt,
&(data->namelist[data->numPlots++]),
(IFuid) NULL, name, UID_OTHER,
NULL);
/* we've added one more plot */
(void) sprintf(name, "inoise_total.%s%s",
here->BSIM3v1Aname,
BSIM3v1AnNames[i]);
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
if (!data->namelist)
return(E_NOMEM);
(*(SPfrontEnd->IFnewUid)) (ckt,
&(data->namelist[data->numPlots++]),
(IFuid) NULL, name, UID_OTHER,
NULL);
/* we've added one more plot */
}
break;
}
}
break;
case N_CALC:
switch (mode)
{ case N_DENS:
NevalSrc(&noizDens[BSIM3v1ARDNOIZ],
&lnNdens[BSIM3v1ARDNOIZ], ckt, THERMNOISE,
here->BSIM3v1AdNodePrime, here->BSIM3v1AdNode,
here->BSIM3v1AdrainConductance * here->BSIM3v1Am);
NevalSrc(&noizDens[BSIM3v1ARSNOIZ],
&lnNdens[BSIM3v1ARSNOIZ], ckt, THERMNOISE,
here->BSIM3v1AsNodePrime, here->BSIM3v1AsNode,
here->BSIM3v1AsourceConductance * here->BSIM3v1Am);
if (model->BSIM3v1AnoiMod == 2)
{ NevalSrc(&noizDens[BSIM3v1AIDNOIZ],
&lnNdens[BSIM3v1AIDNOIZ], ckt, THERMNOISE,
here->BSIM3v1AdNodePrime,
here->BSIM3v1AsNodePrime, (here->BSIM3v1Aueff
* fabs((here->BSIM3v1Aqinv * here->BSIM3v1Am)
/ (pParam->BSIM3v1Aleff
* pParam->BSIM3v1Aleff))));
}
else
{ NevalSrc(&noizDens[BSIM3v1AIDNOIZ],
&lnNdens[BSIM3v1AIDNOIZ], ckt, THERMNOISE,
here->BSIM3v1AdNodePrime,
here->BSIM3v1AsNodePrime,
(2.0 / 3.0 * fabs(here->BSIM3v1Agm
+ here->BSIM3v1Agds)));
}
NevalSrc(&noizDens[BSIM3v1AFLNOIZ], (double*) NULL,
ckt, N_GAIN, here->BSIM3v1AdNodePrime,
here->BSIM3v1AsNodePrime, (double) 0.0);
if (model->BSIM3v1AnoiMod == 2)
{ vgs = *(ckt->CKTstates[0] + here->BSIM3v1Avgs);
vds = *(ckt->CKTstates[0] + here->BSIM3v1Avds);
if (vds < 0.0)
{ vds = -vds;
vgs = vgs + vds;
}
if (vgs >= here->BSIM3v1Avon + 0.1)
{ Ssi = StrongInversionNoiseEval_b3v1a(vgs, vds,
model, here, data->freq,
ckt->CKTtemp);
noizDens[BSIM3v1AFLNOIZ] *= Ssi;
}
else
{ pParam = here->pParam;
T10 = model->BSIM3v1AoxideTrapDensityA
* 8.62e-5 * (ckt->CKTtemp + CONSTCtoK);
T11 = pParam->BSIM3v1Aweff * pParam->BSIM3v1Aleff
* pow(data->freq, model->BSIM3v1Aef)
* 4.0e36;
Swi = T10 / T11 * here->BSIM3v1Acd * here->BSIM3v1Am
* here->BSIM3v1Acd * here->BSIM3v1Am;
Slimit = StrongInversionNoiseEval_b3v1a(
here->BSIM3v1Avon + 0.1,
vds, model, here,
data->freq, ckt->CKTtemp);
T1 = Swi + Slimit;
if (T1 > 0.0)
noizDens[BSIM3v1AFLNOIZ] *= (Slimit * Swi)
/ T1;
else
noizDens[BSIM3v1AFLNOIZ] *= 0.0;
}
}
else
{ noizDens[BSIM3v1AFLNOIZ] *= model->BSIM3v1Akf *
exp(model->BSIM3v1Aaf
* log(MAX(fabs(here->BSIM3v1Acd * here->BSIM3v1Am),
N_MINLOG)))
/ (pow(data->freq, model->BSIM3v1Aef)
* pParam->BSIM3v1Aleff
* pParam->BSIM3v1Aleff
* model->BSIM3v1Acox);
}
lnNdens[BSIM3v1AFLNOIZ] =
log(MAX(noizDens[BSIM3v1AFLNOIZ], N_MINLOG));
noizDens[BSIM3v1ATOTNOIZ] = noizDens[BSIM3v1ARDNOIZ]
+ noizDens[BSIM3v1ARSNOIZ]
+ noizDens[BSIM3v1AIDNOIZ]
+ noizDens[BSIM3v1AFLNOIZ];
lnNdens[BSIM3v1ATOTNOIZ] =
log(MAX(noizDens[BSIM3v1ATOTNOIZ], N_MINLOG));
*OnDens += noizDens[BSIM3v1ATOTNOIZ];
if (data->delFreq == 0.0)
{ /* if we haven't done any previous
integration, we need to initialize our
"history" variables.
*/
for (i = 0; i < BSIM3v1ANSRCS; i++)
{ here->BSIM3v1AnVar[LNLSTDENS][i] =
lnNdens[i];
}
/* clear out our integration variables
if it's the first pass
*/
if (data->freq ==
((NOISEAN*) ckt->CKTcurJob)->NstartFreq)
{ for (i = 0; i < BSIM3v1ANSRCS; i++)
{ here->BSIM3v1AnVar[OUTNOIZ][i] = 0.0;
here->BSIM3v1AnVar[INNOIZ][i] = 0.0;
}
}
}
else
{ /* data->delFreq != 0.0,
we have to integrate.
*/
for (i = 0; i < BSIM3v1ANSRCS; i++)
{ if (i != BSIM3v1ATOTNOIZ)
{ tempOnoise = Nintegrate(noizDens[i],
lnNdens[i],
here->BSIM3v1AnVar[LNLSTDENS][i],
data);
tempInoise = Nintegrate(noizDens[i]
* data->GainSqInv, lnNdens[i]
+ data->lnGainInv,
here->BSIM3v1AnVar[LNLSTDENS][i]
+ data->lnGainInv, data);
here->BSIM3v1AnVar[LNLSTDENS][i] =
lnNdens[i];
data->outNoiz += tempOnoise;
data->inNoise += tempInoise;
if (((NOISEAN*)
ckt->CKTcurJob)->NStpsSm != 0)
{ here->BSIM3v1AnVar[OUTNOIZ][i]
+= tempOnoise;
here->BSIM3v1AnVar[OUTNOIZ][BSIM3v1ATOTNOIZ]
+= tempOnoise;
here->BSIM3v1AnVar[INNOIZ][i]
+= tempInoise;
here->BSIM3v1AnVar[INNOIZ][BSIM3v1ATOTNOIZ]
+= tempInoise;
}
}
}
}
if (data->prtSummary)
{ for (i = 0; i < BSIM3v1ANSRCS; i++)
{ /* print a summary report */
data->outpVector[data->outNumber++]
= noizDens[i];
}
}
break;
case INT_NOIZ:
/* already calculated, just output */
if (((NOISEAN*)ckt->CKTcurJob)->NStpsSm != 0)
{ for (i = 0; i < BSIM3v1ANSRCS; i++)
{ data->outpVector[data->outNumber++]
= here->BSIM3v1AnVar[OUTNOIZ][i];
data->outpVector[data->outNumber++]
= here->BSIM3v1AnVar[INNOIZ][i];
}
}
break;
}
break;
case N_CLOSE:
/* do nothing, the main calling routine will close */
return (OK);
break; /* the plots */
} /* switch (operation) */
} /* for here */
} /* for model */
return(OK);
}

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/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1995 Min-Chie Jeng and Mansun Chan.
Modified by Paolo Nenzi 2002
File: b3v1apar.c
**********/
#include "ngspice.h"
#include "ifsim.h"
#include "bsim3v1adef.h"
#include "sperror.h"
#include "suffix.h"
#include "fteext.h"
int
BSIM3v1Aparam(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
{
double scale;
BSIM3v1Ainstance *here = (BSIM3v1Ainstance*)inst;
NG_IGNORE(select);
if ( !cp_getvar( "scale", CP_REAL, (double*) &scale ) ) scale = 1;
switch(param)
{ case BSIM3v1A_W:
here->BSIM3v1Aw = value->rValue*scale;
here->BSIM3v1AwGiven = TRUE;
break;
case BSIM3v1A_L:
here->BSIM3v1Al = value->rValue*scale;
here->BSIM3v1AlGiven = TRUE;
break;
case BSIM3v1A_M:
here->BSIM3v1Am = value->rValue;
here->BSIM3v1AmGiven = TRUE;
break;
case BSIM3v1A_AS:
here->BSIM3v1AsourceArea = value->rValue*scale*scale;
here->BSIM3v1AsourceAreaGiven = TRUE;
break;
case BSIM3v1A_AD:
here->BSIM3v1AdrainArea = value->rValue*scale*scale;
here->BSIM3v1AdrainAreaGiven = TRUE;
break;
case BSIM3v1A_PS:
here->BSIM3v1AsourcePerimeter = value->rValue*scale;
here->BSIM3v1AsourcePerimeterGiven = TRUE;
break;
case BSIM3v1A_PD:
here->BSIM3v1AdrainPerimeter = value->rValue*scale;
here->BSIM3v1AdrainPerimeterGiven = TRUE;
break;
case BSIM3v1A_NRS:
here->BSIM3v1AsourceSquares = value->rValue;
here->BSIM3v1AsourceSquaresGiven = TRUE;
break;
case BSIM3v1A_NRD:
here->BSIM3v1AdrainSquares = value->rValue;
here->BSIM3v1AdrainSquaresGiven = TRUE;
break;
case BSIM3v1A_OFF:
here->BSIM3v1Aoff = value->iValue;
break;
case BSIM3v1A_IC_VBS:
here->BSIM3v1AicVBS = value->rValue;
here->BSIM3v1AicVBSGiven = TRUE;
break;
case BSIM3v1A_IC_VDS:
here->BSIM3v1AicVDS = value->rValue;
here->BSIM3v1AicVDSGiven = TRUE;
break;
case BSIM3v1A_IC_VGS:
here->BSIM3v1AicVGS = value->rValue;
here->BSIM3v1AicVGSGiven = TRUE;
break;
case BSIM3v1A_NQSMOD:
here->BSIM3v1AnqsMod = value->iValue;
here->BSIM3v1AnqsModGiven = TRUE;
break;
case BSIM3v1A_IC:
switch(value->v.numValue){
case 3:
here->BSIM3v1AicVBS = *(value->v.vec.rVec+2);
here->BSIM3v1AicVBSGiven = TRUE;
case 2:
here->BSIM3v1AicVGS = *(value->v.vec.rVec+1);
here->BSIM3v1AicVGSGiven = TRUE;
case 1:
here->BSIM3v1AicVDS = *(value->v.vec.rVec);
here->BSIM3v1AicVDSGiven = TRUE;
break;
default:
return(E_BADPARM);
}
break;
default:
return(E_BADPARM);
}
return(OK);
}

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/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1995 Min-Chie Jeng and Mansun Chan.
Modified by Paolo Nenzi 2002
File: b3v1apzld.c
**********/
#include "ngspice.h"
#include "cktdefs.h"
#include "complex.h"
#include "sperror.h"
#include "bsim3v1adef.h"
#include "suffix.h"
int
BSIM3v1ApzLoad(GENmodel *inModel, CKTcircuit *ckt, SPcomplex *s)
{
BSIM3v1Amodel *model = (BSIM3v1Amodel*)inModel;
BSIM3v1Ainstance *here;
double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb;
double GSoverlapCap, GDoverlapCap, GBoverlapCap;
double FwdSum, RevSum, Gm, Gmbs;
double m;
NG_IGNORE(ckt);
for (; model != NULL; model = model->BSIM3v1AnextModel)
{ for (here = model->BSIM3v1Ainstances; here!= NULL;
here = here->BSIM3v1AnextInstance)
{
if (here->BSIM3v1Aowner != ARCHme)
continue;
if (here->BSIM3v1Amode >= 0)
{ Gm = here->BSIM3v1Agm;
Gmbs = here->BSIM3v1Agmbs;
FwdSum = Gm + Gmbs;
RevSum = 0.0;
cggb = here->BSIM3v1Acggb;
cgsb = here->BSIM3v1Acgsb;
cgdb = here->BSIM3v1Acgdb;
cbgb = here->BSIM3v1Acbgb;
cbsb = here->BSIM3v1Acbsb;
cbdb = here->BSIM3v1Acbdb;
cdgb = here->BSIM3v1Acdgb;
cdsb = here->BSIM3v1Acdsb;
cddb = here->BSIM3v1Acddb;
}
else
{ Gm = -here->BSIM3v1Agm;
Gmbs = -here->BSIM3v1Agmbs;
FwdSum = 0.0;
RevSum = -Gm - Gmbs;
cggb = here->BSIM3v1Acggb;
cgsb = here->BSIM3v1Acgdb;
cgdb = here->BSIM3v1Acgsb;
cbgb = here->BSIM3v1Acbgb;
cbsb = here->BSIM3v1Acbdb;
cbdb = here->BSIM3v1Acbsb;
cdgb = -(here->BSIM3v1Acdgb + cggb + cbgb);
cdsb = -(here->BSIM3v1Acddb + cgsb + cbsb);
cddb = -(here->BSIM3v1Acdsb + cgdb + cbdb);
}
gdpr=here->BSIM3v1AdrainConductance;
gspr=here->BSIM3v1AsourceConductance;
gds= here->BSIM3v1Agds;
gbd= here->BSIM3v1Agbd;
gbs= here->BSIM3v1Agbs;
capbd= here->BSIM3v1Acapbd;
capbs= here->BSIM3v1Acapbs;
GSoverlapCap = here->BSIM3v1Acgso;
GDoverlapCap = here->BSIM3v1Acgdo;
GBoverlapCap = here->pParam->BSIM3v1Acgbo;
xcdgb = (cdgb - GDoverlapCap);
xcddb = (cddb + capbd + GDoverlapCap);
xcdsb = cdsb;
xcsgb = -(cggb + cbgb + cdgb + GSoverlapCap);
xcsdb = -(cgdb + cbdb + cddb);
xcssb = (capbs + GSoverlapCap - (cgsb+cbsb+cdsb));
xcggb = (cggb + GDoverlapCap + GSoverlapCap + GBoverlapCap);
xcgdb = (cgdb - GDoverlapCap);
xcgsb = (cgsb - GSoverlapCap);
xcbgb = (cbgb - GBoverlapCap);
xcbdb = (cbdb - capbd);
xcbsb = (cbsb - capbs);
m = here->BSIM3v1Am;
*(here->BSIM3v1AGgPtr ) += m * (xcggb * s->real);
*(here->BSIM3v1AGgPtr +1) += m * (xcggb * s->imag);
*(here->BSIM3v1ABbPtr ) += m * ((-xcbgb-xcbdb-xcbsb) * s->real);
*(here->BSIM3v1ABbPtr +1) += m * ((-xcbgb-xcbdb-xcbsb) * s->imag);
*(here->BSIM3v1ADPdpPtr ) += m * (xcddb * s->real);
*(here->BSIM3v1ADPdpPtr +1) += m * (xcddb * s->imag);
*(here->BSIM3v1ASPspPtr ) += m * (xcssb * s->real);
*(here->BSIM3v1ASPspPtr +1) += m * (xcssb * s->imag);
*(here->BSIM3v1AGbPtr ) += m * ((-xcggb-xcgdb-xcgsb) * s->real);
*(here->BSIM3v1AGbPtr +1) += m * ((-xcggb-xcgdb-xcgsb) * s->imag);
*(here->BSIM3v1AGdpPtr ) += m * (xcgdb * s->real);
*(here->BSIM3v1AGdpPtr +1) += m * (xcgdb * s->imag);
*(here->BSIM3v1AGspPtr ) += m * (xcgsb * s->real);
*(here->BSIM3v1AGspPtr +1) += m * (xcgsb * s->imag);
*(here->BSIM3v1ABgPtr ) += m * (xcbgb * s->real);
*(here->BSIM3v1ABgPtr +1) += m * (xcbgb * s->imag);
*(here->BSIM3v1ABdpPtr ) += m * (xcbdb * s->real);
*(here->BSIM3v1ABdpPtr +1) += m * (xcbdb * s->imag);
*(here->BSIM3v1ABspPtr ) += m * (xcbsb * s->real);
*(here->BSIM3v1ABspPtr +1) += m * (xcbsb * s->imag);
*(here->BSIM3v1ADPgPtr ) += m * (xcdgb * s->real);
*(here->BSIM3v1ADPgPtr +1) += m * (xcdgb * s->imag);
*(here->BSIM3v1ADPbPtr ) += m * ((-xcdgb-xcddb-xcdsb) * s->real);
*(here->BSIM3v1ADPbPtr +1) += m * ((-xcdgb-xcddb-xcdsb) * s->imag);
*(here->BSIM3v1ADPspPtr ) += m * (xcdsb * s->real);
*(here->BSIM3v1ADPspPtr +1) += m * (xcdsb * s->imag);
*(here->BSIM3v1ASPgPtr ) += m * (xcsgb * s->real);
*(here->BSIM3v1ASPgPtr +1) += m * (xcsgb * s->imag);
*(here->BSIM3v1ASPbPtr ) += m * ((-xcsgb-xcsdb-xcssb) * s->real);
*(here->BSIM3v1ASPbPtr +1) += m * ((-xcsgb-xcsdb-xcssb) * s->imag);
*(here->BSIM3v1ASPdpPtr ) += m * (xcsdb * s->real);
*(here->BSIM3v1ASPdpPtr +1) += m * (xcsdb * s->imag);
*(here->BSIM3v1ADdPtr) += m * gdpr;
*(here->BSIM3v1ASsPtr) += m * gspr;
*(here->BSIM3v1ABbPtr) += m * (gbd + gbs);
*(here->BSIM3v1ADPdpPtr) += m * (gdpr + gds + gbd + RevSum);
*(here->BSIM3v1ASPspPtr) += m * (gspr + gds + gbs + FwdSum);
*(here->BSIM3v1ADdpPtr) -= m * gdpr;
*(here->BSIM3v1ASspPtr) -= m * gspr;
*(here->BSIM3v1ABdpPtr) -= m * gbd;
*(here->BSIM3v1ABspPtr) -= m * gbs;
*(here->BSIM3v1ADPdPtr) -= m * gdpr;
*(here->BSIM3v1ADPgPtr) += m * Gm;
*(here->BSIM3v1ADPbPtr) -= m * (gbd - Gmbs);
*(here->BSIM3v1ADPspPtr) -= m * (gds + FwdSum);
*(here->BSIM3v1ASPgPtr) -= m * Gm;
*(here->BSIM3v1ASPsPtr) -= m * gspr;
*(here->BSIM3v1ASPbPtr) -= m * (gbs + Gmbs);
*(here->BSIM3v1ASPdpPtr) -= m * (gds + RevSum);
}
}
return(OK);
}

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/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1995 Min-Chie Jeng and Mansun Chan.
Modified by Paolo Nenzi 2002
File: b3v1aset.c
**********/
#include "ngspice.h"
#include "smpdefs.h"
#include "cktdefs.h"
#include "bsim3v1adef.h"
#include "const.h"
#include "sperror.h"
#include "suffix.h"
#define MAX_EXP 5.834617425e14
#define MIN_EXP 1.713908431e-15
#define EXP_THRESHOLD 34.0
#define SMOOTHFACTOR 0.1
#define EPSOX 3.453133e-11
#define EPSSI 1.03594e-10
#define PI 3.141592654
#define Charge_q 1.60219e-19
#define Meter2Micron 1.0e6
int
BSIM3v1Asetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
int *states)
{
BSIM3v1Amodel *model = (BSIM3v1Amodel*)inModel;
BSIM3v1Ainstance *here;
int error;
CKTnode *tmp;
CKTnode *tmpNode;
IFuid tmpName;
/* loop through all the BSIM3v1A device models */
for( ; model != NULL; model = model->BSIM3v1AnextModel )
{
/* Default value Processing for BSIM3v1A MOSFET Models */
if (!model->BSIM3v1AtypeGiven)
model->BSIM3v1Atype = NMOS;
if (!model->BSIM3v1AmobModGiven)
model->BSIM3v1AmobMod = 1;
if (!model->BSIM3v1AbinUnitGiven)
model->BSIM3v1AbinUnit = 1;
if (!model->BSIM3v1AcapModGiven)
model->BSIM3v1AcapMod = 1;
if (!model->BSIM3v1AnqsModGiven)
model->BSIM3v1AnqsMod = 0;
if (!model->BSIM3v1AnoiModGiven)
model->BSIM3v1AnoiMod = 1;
if (!model->BSIM3v1AtoxGiven)
model->BSIM3v1Atox = 150.0e-10;
model->BSIM3v1Acox = 3.453133e-11 / model->BSIM3v1Atox;
if (!model->BSIM3v1AcdscGiven)
model->BSIM3v1Acdsc = 2.4e-4; /* unit Q/V/m^2 */
if (!model->BSIM3v1AcdscbGiven)
model->BSIM3v1Acdscb = 0.0; /* unit Q/V/m^2 */
if (!model->BSIM3v1AcdscdGiven)
model->BSIM3v1Acdscd = 0.0; /* unit Q/V/m^2 */
if (!model->BSIM3v1AcitGiven)
model->BSIM3v1Acit = 0.0; /* unit Q/V/m^2 */
if (!model->BSIM3v1AnfactorGiven)
model->BSIM3v1Anfactor = 1;
if (!model->BSIM3v1AxjGiven)
model->BSIM3v1Axj = .15e-6;
if (!model->BSIM3v1AvsatGiven)
model->BSIM3v1Avsat = 8.0e4; /* unit m/s */
if (!model->BSIM3v1AatGiven)
model->BSIM3v1Aat = 3.3e4; /* unit m/s */
if (!model->BSIM3v1Aa0Given)
model->BSIM3v1Aa0 = 1.0;
if (!model->BSIM3v1AagsGiven)
model->BSIM3v1Aags = 0.0;
if (!model->BSIM3v1Aa1Given)
model->BSIM3v1Aa1 = 0.0;
if (!model->BSIM3v1Aa2Given)
model->BSIM3v1Aa2 = 1.0;
if (!model->BSIM3v1AketaGiven)
model->BSIM3v1Aketa = -0.047; /* unit / V */
if (!model->BSIM3v1AnsubGiven)
model->BSIM3v1Ansub = 6.0e16; /* unit 1/cm3 */
if (!model->BSIM3v1AnpeakGiven)
model->BSIM3v1Anpeak = 1.7e17; /* unit 1/cm3 */
if (!model->BSIM3v1AvbmGiven)
model->BSIM3v1Avbm = -5.0;
if (!model->BSIM3v1AxtGiven)
model->BSIM3v1Axt = 1.55e-7;
if (!model->BSIM3v1Akt1Given)
model->BSIM3v1Akt1 = -0.11; /* unit V */
if (!model->BSIM3v1Akt1lGiven)
model->BSIM3v1Akt1l = 0.0; /* unit V*m */
if (!model->BSIM3v1Akt2Given)
model->BSIM3v1Akt2 = 0.022; /* No unit */
if (!model->BSIM3v1Ak3Given)
model->BSIM3v1Ak3 = 80.0;
if (!model->BSIM3v1Ak3bGiven)
model->BSIM3v1Ak3b = 0.0;
if (!model->BSIM3v1Aw0Given)
model->BSIM3v1Aw0 = 2.5e-6;
if (!model->BSIM3v1AnlxGiven)
model->BSIM3v1Anlx = 1.74e-7;
if (!model->BSIM3v1Advt0Given)
model->BSIM3v1Advt0 = 2.2;
if (!model->BSIM3v1Advt1Given)
model->BSIM3v1Advt1 = 0.53;
if (!model->BSIM3v1Advt2Given)
model->BSIM3v1Advt2 = -0.032; /* unit 1 / V */
if (!model->BSIM3v1Advt0wGiven)
model->BSIM3v1Advt0w = 0.0;
if (!model->BSIM3v1Advt1wGiven)
model->BSIM3v1Advt1w = 5.3e6;
if (!model->BSIM3v1Advt2wGiven)
model->BSIM3v1Advt2w = -0.032;
if (!model->BSIM3v1AdroutGiven)
model->BSIM3v1Adrout = 0.56;
if (!model->BSIM3v1AdsubGiven)
model->BSIM3v1Adsub = model->BSIM3v1Adrout;
if (!model->BSIM3v1Avth0Given)
model->BSIM3v1Avth0 = (model->BSIM3v1Atype == NMOS) ? 0.7 : -0.7;
if (!model->BSIM3v1AuaGiven)
model->BSIM3v1Aua = 2.25e-9; /* unit m/V */
if (!model->BSIM3v1Aua1Given)
model->BSIM3v1Aua1 = 4.31e-9; /* unit m/V */
if (!model->BSIM3v1AubGiven)
model->BSIM3v1Aub = 5.87e-19; /* unit (m/V)**2 */
if (!model->BSIM3v1Aub1Given)
model->BSIM3v1Aub1 = -7.61e-18; /* unit (m/V)**2 */
if (!model->BSIM3v1AucGiven)
model->BSIM3v1Auc = (model->BSIM3v1AmobMod == 3) ? -0.0465 : -0.0465e-9;
if (!model->BSIM3v1Auc1Given)
model->BSIM3v1Auc1 = (model->BSIM3v1AmobMod == 3) ? -0.056 : -0.056e-9;
if (!model->BSIM3v1Au0Given)
model->BSIM3v1Au0 = (model->BSIM3v1Atype == NMOS) ? 0.067 : 0.025;
else if (model->BSIM3v1Au0 > 1.0)
model->BSIM3v1Au0 = model->BSIM3v1Au0 / 1.0e4;
/* if u0 > 1.0, cm.g.sec unit system is used. If should be
converted into SI unit system. */
if (!model->BSIM3v1AuteGiven)
model->BSIM3v1Aute = -1.5;
if (!model->BSIM3v1AvoffGiven)
model->BSIM3v1Avoff = -0.08;
if (!model->BSIM3v1AdeltaGiven)
model->BSIM3v1Adelta = 0.01;
if (!model->BSIM3v1ArdswGiven)
model->BSIM3v1Ardsw = 0;
if (!model->BSIM3v1AprwgGiven)
model->BSIM3v1Aprwg = 0.0; /* unit 1/V */
if (!model->BSIM3v1AprwbGiven)
model->BSIM3v1Aprwb = 0.0;
if (!model->BSIM3v1AprtGiven)
if (!model->BSIM3v1AprtGiven)
model->BSIM3v1Aprt = 0.0;
if (!model->BSIM3v1Aeta0Given)
model->BSIM3v1Aeta0 = 0.08; /* no unit */
if (!model->BSIM3v1AetabGiven)
model->BSIM3v1Aetab = -0.07; /* unit 1/V */
if (!model->BSIM3v1ApclmGiven)
model->BSIM3v1Apclm = 1.3; /* no unit */
if (!model->BSIM3v1Apdibl1Given)
model->BSIM3v1Apdibl1 = .39; /* no unit */
if (!model->BSIM3v1Apdibl2Given)
model->BSIM3v1Apdibl2 = 0.0086; /* no unit */
if (!model->BSIM3v1ApdiblbGiven)
model->BSIM3v1Apdiblb = 0.0; /* 1/V */
if (!model->BSIM3v1Apscbe1Given)
model->BSIM3v1Apscbe1 = 4.24e8;
if (!model->BSIM3v1Apscbe2Given)
model->BSIM3v1Apscbe2 = 1.0e-5;
if (!model->BSIM3v1ApvagGiven)
model->BSIM3v1Apvag = 0.0;
if (!model->BSIM3v1AwrGiven)
model->BSIM3v1Awr = 1.0;
if (!model->BSIM3v1AdwgGiven)
model->BSIM3v1Adwg = 0.0;
if (!model->BSIM3v1AdwbGiven)
model->BSIM3v1Adwb = 0.0;
if (!model->BSIM3v1Ab0Given)
model->BSIM3v1Ab0 = 0.0;
if (!model->BSIM3v1Ab1Given)
model->BSIM3v1Ab1 = 0.0;
if (!model->BSIM3v1Aalpha0Given)
model->BSIM3v1Aalpha0 = 0.0;
if (!model->BSIM3v1Abeta0Given)
model->BSIM3v1Abeta0 = 30.0;
if (!model->BSIM3v1AelmGiven)
model->BSIM3v1Aelm = 5.0;
if (!model->BSIM3v1AcgslGiven)
model->BSIM3v1Acgsl = 0.0;
if (!model->BSIM3v1AcgdlGiven)
model->BSIM3v1Acgdl = 0.0;
if (!model->BSIM3v1AckappaGiven)
model->BSIM3v1Ackappa = 0.6;
if (!model->BSIM3v1AclcGiven)
model->BSIM3v1Aclc = 0.1e-6;
if (!model->BSIM3v1AcleGiven)
model->BSIM3v1Acle = 0.6;
/* Length dependence */
if (!model->BSIM3v1AlcdscGiven)
model->BSIM3v1Alcdsc = 0.0;
if (!model->BSIM3v1AlcdscbGiven)
model->BSIM3v1Alcdscb = 0.0;
if (!model->BSIM3v1AlcdscdGiven)
model->BSIM3v1Alcdscd = 0.0;
if (!model->BSIM3v1AlcitGiven)
model->BSIM3v1Alcit = 0.0;
if (!model->BSIM3v1AlnfactorGiven)
model->BSIM3v1Alnfactor = 0.0;
if (!model->BSIM3v1AlxjGiven)
model->BSIM3v1Alxj = 0.0;
if (!model->BSIM3v1AlvsatGiven)
model->BSIM3v1Alvsat = 0.0;
if (!model->BSIM3v1AlatGiven)
model->BSIM3v1Alat = 0.0;
if (!model->BSIM3v1Ala0Given)
model->BSIM3v1Ala0 = 0.0;
if (!model->BSIM3v1AlagsGiven)
model->BSIM3v1Alags = 0.0;
if (!model->BSIM3v1Ala1Given)
model->BSIM3v1Ala1 = 0.0;
if (!model->BSIM3v1Ala2Given)
model->BSIM3v1Ala2 = 0.0;
if (!model->BSIM3v1AlketaGiven)
model->BSIM3v1Alketa = 0.0;
if (!model->BSIM3v1AlnsubGiven)
model->BSIM3v1Alnsub = 0.0;
if (!model->BSIM3v1AlnpeakGiven)
model->BSIM3v1Alnpeak = 0.0;
if (!model->BSIM3v1AlvbmGiven)
model->BSIM3v1Alvbm = 0.0;
if (!model->BSIM3v1AlxtGiven)
model->BSIM3v1Alxt = 0.0;
if (!model->BSIM3v1Alkt1Given)
model->BSIM3v1Alkt1 = 0.0;
if (!model->BSIM3v1Alkt1lGiven)
model->BSIM3v1Alkt1l = 0.0;
if (!model->BSIM3v1Alkt2Given)
model->BSIM3v1Alkt2 = 0.0;
if (!model->BSIM3v1Alk3Given)
model->BSIM3v1Alk3 = 0.0;
if (!model->BSIM3v1Alk3bGiven)
model->BSIM3v1Alk3b = 0.0;
if (!model->BSIM3v1Alw0Given)
model->BSIM3v1Alw0 = 0.0;
if (!model->BSIM3v1AlnlxGiven)
model->BSIM3v1Alnlx = 0.0;
if (!model->BSIM3v1Aldvt0Given)
model->BSIM3v1Aldvt0 = 0.0;
if (!model->BSIM3v1Aldvt1Given)
model->BSIM3v1Aldvt1 = 0.0;
if (!model->BSIM3v1Aldvt2Given)
model->BSIM3v1Aldvt2 = 0.0;
if (!model->BSIM3v1Aldvt0wGiven)
model->BSIM3v1Aldvt0w = 0.0;
if (!model->BSIM3v1Aldvt1wGiven)
model->BSIM3v1Aldvt1w = 0.0;
if (!model->BSIM3v1Aldvt2wGiven)
model->BSIM3v1Aldvt2w = 0.0;
if (!model->BSIM3v1AldroutGiven)
model->BSIM3v1Aldrout = 0.0;
if (!model->BSIM3v1AldsubGiven)
model->BSIM3v1Aldsub = 0.0;
if (!model->BSIM3v1Alvth0Given)
model->BSIM3v1Alvth0 = 0.0;
if (!model->BSIM3v1AluaGiven)
model->BSIM3v1Alua = 0.0;
if (!model->BSIM3v1Alua1Given)
model->BSIM3v1Alua1 = 0.0;
if (!model->BSIM3v1AlubGiven)
model->BSIM3v1Alub = 0.0;
if (!model->BSIM3v1Alub1Given)
model->BSIM3v1Alub1 = 0.0;
if (!model->BSIM3v1AlucGiven)
model->BSIM3v1Aluc = 0.0;
if (!model->BSIM3v1Aluc1Given)
model->BSIM3v1Aluc1 = 0.0;
if (!model->BSIM3v1Alu0Given)
model->BSIM3v1Alu0 = 0.0;
else if (model->BSIM3v1Au0 > 1.0)
model->BSIM3v1Alu0 = model->BSIM3v1Alu0 / 1.0e4;
if (!model->BSIM3v1AluteGiven)
model->BSIM3v1Alute = 0.0;
if (!model->BSIM3v1AlvoffGiven)
model->BSIM3v1Alvoff = 0.0;
if (!model->BSIM3v1AldeltaGiven)
model->BSIM3v1Aldelta = 0.0;
if (!model->BSIM3v1AlrdswGiven)
model->BSIM3v1Alrdsw = 0.0;
if (!model->BSIM3v1AlprwbGiven)
model->BSIM3v1Alprwb = 0.0;
if (!model->BSIM3v1AlprwgGiven)
model->BSIM3v1Alprwg = 0.0;
if (!model->BSIM3v1AlprtGiven)
if (!model->BSIM3v1AlprtGiven)
model->BSIM3v1Alprt = 0.0;
if (!model->BSIM3v1Aleta0Given)
model->BSIM3v1Aleta0 = 0.0;
if (!model->BSIM3v1AletabGiven)
model->BSIM3v1Aletab = -0.0;
if (!model->BSIM3v1AlpclmGiven)
model->BSIM3v1Alpclm = 0.0;
if (!model->BSIM3v1Alpdibl1Given)
model->BSIM3v1Alpdibl1 = 0.0;
if (!model->BSIM3v1Alpdibl2Given)
model->BSIM3v1Alpdibl2 = 0.0;
if (!model->BSIM3v1AlpdiblbGiven)
model->BSIM3v1Alpdiblb = 0.0;
if (!model->BSIM3v1Alpscbe1Given)
model->BSIM3v1Alpscbe1 = 0.0;
if (!model->BSIM3v1Alpscbe2Given)
model->BSIM3v1Alpscbe2 = 0.0;
if (!model->BSIM3v1AlpvagGiven)
model->BSIM3v1Alpvag = 0.0;
if (!model->BSIM3v1AlwrGiven)
model->BSIM3v1Alwr = 0.0;
if (!model->BSIM3v1AldwgGiven)
model->BSIM3v1Aldwg = 0.0;
if (!model->BSIM3v1AldwbGiven)
model->BSIM3v1Aldwb = 0.0;
if (!model->BSIM3v1Alb0Given)
model->BSIM3v1Alb0 = 0.0;
if (!model->BSIM3v1Alb1Given)
model->BSIM3v1Alb1 = 0.0;
if (!model->BSIM3v1Alalpha0Given)
model->BSIM3v1Alalpha0 = 0.0;
if (!model->BSIM3v1Albeta0Given)
model->BSIM3v1Albeta0 = 0.0;
if (!model->BSIM3v1AlelmGiven)
model->BSIM3v1Alelm = 0.0;
if (!model->BSIM3v1AlcgslGiven)
model->BSIM3v1Alcgsl = 0.0;
if (!model->BSIM3v1AlcgdlGiven)
model->BSIM3v1Alcgdl = 0.0;
if (!model->BSIM3v1AlckappaGiven)
model->BSIM3v1Alckappa = 0.0;
if (!model->BSIM3v1AlcfGiven)
model->BSIM3v1Alcf = 0.0;
if (!model->BSIM3v1AlclcGiven)
model->BSIM3v1Alclc = 0.0;
if (!model->BSIM3v1AlcleGiven)
model->BSIM3v1Alcle = 0.0;
/* Width dependence */
if (!model->BSIM3v1AwcdscGiven)
model->BSIM3v1Awcdsc = 0.0;
if (!model->BSIM3v1AwcdscbGiven)
model->BSIM3v1Awcdscb = 0.0;
if (!model->BSIM3v1AwcdscdGiven)
model->BSIM3v1Awcdscd = 0.0;
if (!model->BSIM3v1AwcitGiven)
model->BSIM3v1Awcit = 0.0;
if (!model->BSIM3v1AwnfactorGiven)
model->BSIM3v1Awnfactor = 0.0;
if (!model->BSIM3v1AwxjGiven)
model->BSIM3v1Awxj = 0.0;
if (!model->BSIM3v1AwvsatGiven)
model->BSIM3v1Awvsat = 0.0;
if (!model->BSIM3v1AwatGiven)
model->BSIM3v1Awat = 0.0;
if (!model->BSIM3v1Awa0Given)
model->BSIM3v1Awa0 = 0.0;
if (!model->BSIM3v1AwagsGiven)
model->BSIM3v1Awags = 0.0;
if (!model->BSIM3v1Awa1Given)
model->BSIM3v1Awa1 = 0.0;
if (!model->BSIM3v1Awa2Given)
model->BSIM3v1Awa2 = 0.0;
if (!model->BSIM3v1AwketaGiven)
model->BSIM3v1Awketa = 0.0;
if (!model->BSIM3v1AwnsubGiven)
model->BSIM3v1Awnsub = 0.0;
if (!model->BSIM3v1AwnpeakGiven)
model->BSIM3v1Awnpeak = 0.0;
if (!model->BSIM3v1AwvbmGiven)
model->BSIM3v1Awvbm = 0.0;
if (!model->BSIM3v1AwxtGiven)
model->BSIM3v1Awxt = 0.0;
if (!model->BSIM3v1Awkt1Given)
model->BSIM3v1Awkt1 = 0.0;
if (!model->BSIM3v1Awkt1lGiven)
model->BSIM3v1Awkt1l = 0.0;
if (!model->BSIM3v1Awkt2Given)
model->BSIM3v1Awkt2 = 0.0;
if (!model->BSIM3v1Awk3Given)
model->BSIM3v1Awk3 = 0.0;
if (!model->BSIM3v1Awk3bGiven)
model->BSIM3v1Awk3b = 0.0;
if (!model->BSIM3v1Aww0Given)
model->BSIM3v1Aww0 = 0.0;
if (!model->BSIM3v1AwnlxGiven)
model->BSIM3v1Awnlx = 0.0;
if (!model->BSIM3v1Awdvt0Given)
model->BSIM3v1Awdvt0 = 0.0;
if (!model->BSIM3v1Awdvt1Given)
model->BSIM3v1Awdvt1 = 0.0;
if (!model->BSIM3v1Awdvt2Given)
model->BSIM3v1Awdvt2 = 0.0;
if (!model->BSIM3v1Awdvt0wGiven)
model->BSIM3v1Awdvt0w = 0.0;
if (!model->BSIM3v1Awdvt1wGiven)
model->BSIM3v1Awdvt1w = 0.0;
if (!model->BSIM3v1Awdvt2wGiven)
model->BSIM3v1Awdvt2w = 0.0;
if (!model->BSIM3v1AwdroutGiven)
model->BSIM3v1Awdrout = 0.0;
if (!model->BSIM3v1AwdsubGiven)
model->BSIM3v1Awdsub = 0.0;
if (!model->BSIM3v1Awvth0Given)
model->BSIM3v1Awvth0 = 0.0;
if (!model->BSIM3v1AwuaGiven)
model->BSIM3v1Awua = 0.0;
if (!model->BSIM3v1Awua1Given)
model->BSIM3v1Awua1 = 0.0;
if (!model->BSIM3v1AwubGiven)
model->BSIM3v1Awub = 0.0;
if (!model->BSIM3v1Awub1Given)
model->BSIM3v1Awub1 = 0.0;
if (!model->BSIM3v1AwucGiven)
model->BSIM3v1Awuc = 0.0;
if (!model->BSIM3v1Awuc1Given)
model->BSIM3v1Awuc1 = 0.0;
if (!model->BSIM3v1Awu0Given)
model->BSIM3v1Awu0 = 0.0;
else if (model->BSIM3v1Au0 > 1.0)
model->BSIM3v1Awu0 = model->BSIM3v1Awu0 / 1.0e4;
if (!model->BSIM3v1AwuteGiven)
model->BSIM3v1Awute = 0.0;
if (!model->BSIM3v1AwvoffGiven)
model->BSIM3v1Awvoff = 0.0;
if (!model->BSIM3v1AwdeltaGiven)
model->BSIM3v1Awdelta = 0.0;
if (!model->BSIM3v1AwrdswGiven)
model->BSIM3v1Awrdsw = 0.0;
if (!model->BSIM3v1AwprwbGiven)
model->BSIM3v1Awprwb = 0.0;
if (!model->BSIM3v1AwprwgGiven)
model->BSIM3v1Awprwg = 0.0;
if (!model->BSIM3v1AwprtGiven)
model->BSIM3v1Awprt = 0.0;
if (!model->BSIM3v1Aweta0Given)
model->BSIM3v1Aweta0 = 0.0;
if (!model->BSIM3v1AwetabGiven)
model->BSIM3v1Awetab = 0.0;
if (!model->BSIM3v1AwpclmGiven)
model->BSIM3v1Awpclm = 0.0;
if (!model->BSIM3v1Awpdibl1Given)
model->BSIM3v1Awpdibl1 = 0.0;
if (!model->BSIM3v1Awpdibl2Given)
model->BSIM3v1Awpdibl2 = 0.0;
if (!model->BSIM3v1AwpdiblbGiven)
model->BSIM3v1Awpdiblb = 0.0;
if (!model->BSIM3v1Awpscbe1Given)
model->BSIM3v1Awpscbe1 = 0.0;
if (!model->BSIM3v1Awpscbe2Given)
model->BSIM3v1Awpscbe2 = 0.0;
if (!model->BSIM3v1AwpvagGiven)
model->BSIM3v1Awpvag = 0.0;
if (!model->BSIM3v1AwwrGiven)
model->BSIM3v1Awwr = 0.0;
if (!model->BSIM3v1AwdwgGiven)
model->BSIM3v1Awdwg = 0.0;
if (!model->BSIM3v1AwdwbGiven)
model->BSIM3v1Awdwb = 0.0;
if (!model->BSIM3v1Awb0Given)
model->BSIM3v1Awb0 = 0.0;
if (!model->BSIM3v1Awb1Given)
model->BSIM3v1Awb1 = 0.0;
if (!model->BSIM3v1Awalpha0Given)
model->BSIM3v1Awalpha0 = 0.0;
if (!model->BSIM3v1Awbeta0Given)
model->BSIM3v1Awbeta0 = 0.0;
if (!model->BSIM3v1AwelmGiven)
model->BSIM3v1Awelm = 0.0;
if (!model->BSIM3v1AwcgslGiven)
model->BSIM3v1Awcgsl = 0.0;
if (!model->BSIM3v1AwcgdlGiven)
model->BSIM3v1Awcgdl = 0.0;
if (!model->BSIM3v1AwckappaGiven)
model->BSIM3v1Awckappa = 0.0;
if (!model->BSIM3v1AwcfGiven)
model->BSIM3v1Awcf = 0.0;
if (!model->BSIM3v1AwclcGiven)
model->BSIM3v1Awclc = 0.0;
if (!model->BSIM3v1AwcleGiven)
model->BSIM3v1Awcle = 0.0;
/* Cross-term dependence */
if (!model->BSIM3v1ApcdscGiven)
model->BSIM3v1Apcdsc = 0.0;
if (!model->BSIM3v1ApcdscbGiven)
model->BSIM3v1Apcdscb = 0.0;
if (!model->BSIM3v1ApcdscdGiven)
model->BSIM3v1Apcdscd = 0.0;
if (!model->BSIM3v1ApcitGiven)
model->BSIM3v1Apcit = 0.0;
if (!model->BSIM3v1ApnfactorGiven)
model->BSIM3v1Apnfactor = 0.0;
if (!model->BSIM3v1ApxjGiven)
model->BSIM3v1Apxj = 0.0;
if (!model->BSIM3v1ApvsatGiven)
model->BSIM3v1Apvsat = 0.0;
if (!model->BSIM3v1ApatGiven)
model->BSIM3v1Apat = 0.0;
if (!model->BSIM3v1Apa0Given)
model->BSIM3v1Apa0 = 0.0;
if (!model->BSIM3v1ApagsGiven)
model->BSIM3v1Apags = 0.0;
if (!model->BSIM3v1Apa1Given)
model->BSIM3v1Apa1 = 0.0;
if (!model->BSIM3v1Apa2Given)
model->BSIM3v1Apa2 = 0.0;
if (!model->BSIM3v1ApketaGiven)
model->BSIM3v1Apketa = 0.0;
if (!model->BSIM3v1ApnsubGiven)
model->BSIM3v1Apnsub = 0.0;
if (!model->BSIM3v1ApnpeakGiven)
model->BSIM3v1Apnpeak = 0.0;
if (!model->BSIM3v1ApvbmGiven)
model->BSIM3v1Apvbm = 0.0;
if (!model->BSIM3v1ApxtGiven)
model->BSIM3v1Apxt = 0.0;
if (!model->BSIM3v1Apkt1Given)
model->BSIM3v1Apkt1 = 0.0;
if (!model->BSIM3v1Apkt1lGiven)
model->BSIM3v1Apkt1l = 0.0;
if (!model->BSIM3v1Apkt2Given)
model->BSIM3v1Apkt2 = 0.0;
if (!model->BSIM3v1Apk3Given)
model->BSIM3v1Apk3 = 0.0;
if (!model->BSIM3v1Apk3bGiven)
model->BSIM3v1Apk3b = 0.0;
if (!model->BSIM3v1Apw0Given)
model->BSIM3v1Apw0 = 0.0;
if (!model->BSIM3v1ApnlxGiven)
model->BSIM3v1Apnlx = 0.0;
if (!model->BSIM3v1Apdvt0Given)
model->BSIM3v1Apdvt0 = 0.0;
if (!model->BSIM3v1Apdvt1Given)
model->BSIM3v1Apdvt1 = 0.0;
if (!model->BSIM3v1Apdvt2Given)
model->BSIM3v1Apdvt2 = 0.0;
if (!model->BSIM3v1Apdvt0wGiven)
model->BSIM3v1Apdvt0w = 0.0;
if (!model->BSIM3v1Apdvt1wGiven)
model->BSIM3v1Apdvt1w = 0.0;
if (!model->BSIM3v1Apdvt2wGiven)
model->BSIM3v1Apdvt2w = 0.0;
if (!model->BSIM3v1ApdroutGiven)
model->BSIM3v1Apdrout = 0.0;
if (!model->BSIM3v1ApdsubGiven)
model->BSIM3v1Apdsub = 0.0;
if (!model->BSIM3v1Apvth0Given)
model->BSIM3v1Apvth0 = 0.0;
if (!model->BSIM3v1ApuaGiven)
model->BSIM3v1Apua = 0.0;
if (!model->BSIM3v1Apua1Given)
model->BSIM3v1Apua1 = 0.0;
if (!model->BSIM3v1ApubGiven)
model->BSIM3v1Apub = 0.0;
if (!model->BSIM3v1Apub1Given)
model->BSIM3v1Apub1 = 0.0;
if (!model->BSIM3v1ApucGiven)
model->BSIM3v1Apuc = 0.0;
if (!model->BSIM3v1Apuc1Given)
model->BSIM3v1Apuc1 = 0.0;
if (!model->BSIM3v1Apu0Given)
model->BSIM3v1Apu0 = 0.0;
else if (model->BSIM3v1Au0 > 1.0)
model->BSIM3v1Apu0 = model->BSIM3v1Apu0 / 1.0e4;
if (!model->BSIM3v1AputeGiven)
model->BSIM3v1Apute = 0.0;
if (!model->BSIM3v1ApvoffGiven)
model->BSIM3v1Apvoff = 0.0;
if (!model->BSIM3v1ApdeltaGiven)
model->BSIM3v1Apdelta = 0.0;
if (!model->BSIM3v1AprdswGiven)
model->BSIM3v1Aprdsw = 0.0;
if (!model->BSIM3v1ApprwbGiven)
model->BSIM3v1Apprwb = 0.0;
if (!model->BSIM3v1ApprwgGiven)
model->BSIM3v1Apprwg = 0.0;
if (!model->BSIM3v1ApprtGiven)
model->BSIM3v1Apprt = 0.0;
if (!model->BSIM3v1Apeta0Given)
model->BSIM3v1Apeta0 = 0.0;
if (!model->BSIM3v1ApetabGiven)
model->BSIM3v1Apetab = 0.0;
if (!model->BSIM3v1AppclmGiven)
model->BSIM3v1Appclm = 0.0;
if (!model->BSIM3v1Appdibl1Given)
model->BSIM3v1Appdibl1 = 0.0;
if (!model->BSIM3v1Appdibl2Given)
model->BSIM3v1Appdibl2 = 0.0;
if (!model->BSIM3v1AppdiblbGiven)
model->BSIM3v1Appdiblb = 0.0;
if (!model->BSIM3v1Appscbe1Given)
model->BSIM3v1Appscbe1 = 0.0;
if (!model->BSIM3v1Appscbe2Given)
model->BSIM3v1Appscbe2 = 0.0;
if (!model->BSIM3v1AppvagGiven)
model->BSIM3v1Appvag = 0.0;
if (!model->BSIM3v1ApwrGiven)
model->BSIM3v1Apwr = 0.0;
if (!model->BSIM3v1ApdwgGiven)
model->BSIM3v1Apdwg = 0.0;
if (!model->BSIM3v1ApdwbGiven)
model->BSIM3v1Apdwb = 0.0;
if (!model->BSIM3v1Apb0Given)
model->BSIM3v1Apb0 = 0.0;
if (!model->BSIM3v1Apb1Given)
model->BSIM3v1Apb1 = 0.0;
if (!model->BSIM3v1Apalpha0Given)
model->BSIM3v1Apalpha0 = 0.0;
if (!model->BSIM3v1Apbeta0Given)
model->BSIM3v1Apbeta0 = 0.0;
if (!model->BSIM3v1ApelmGiven)
model->BSIM3v1Apelm = 0.0;
if (!model->BSIM3v1ApcgslGiven)
model->BSIM3v1Apcgsl = 0.0;
if (!model->BSIM3v1ApcgdlGiven)
model->BSIM3v1Apcgdl = 0.0;
if (!model->BSIM3v1ApckappaGiven)
model->BSIM3v1Apckappa = 0.0;
if (!model->BSIM3v1ApcfGiven)
model->BSIM3v1Apcf = 0.0;
if (!model->BSIM3v1ApclcGiven)
model->BSIM3v1Apclc = 0.0;
if (!model->BSIM3v1ApcleGiven)
model->BSIM3v1Apcle = 0.0;
/* unit degree celcius */
if (!model->BSIM3v1AtnomGiven)
model->BSIM3v1Atnom = ckt->CKTnomTemp;
if (!model->BSIM3v1ALintGiven)
model->BSIM3v1ALint = 0.0;
if (!model->BSIM3v1ALlGiven)
model->BSIM3v1ALl = 0.0;
if (!model->BSIM3v1ALlnGiven)
model->BSIM3v1ALln = 1.0;
if (!model->BSIM3v1ALwGiven)
model->BSIM3v1ALw = 0.0;
if (!model->BSIM3v1ALwnGiven)
model->BSIM3v1ALwn = 1.0;
if (!model->BSIM3v1ALwlGiven)
model->BSIM3v1ALwl = 0.0;
if (!model->BSIM3v1ALminGiven)
model->BSIM3v1ALmin = 0.0;
if (!model->BSIM3v1ALmaxGiven)
model->BSIM3v1ALmax = 1.0;
if (!model->BSIM3v1AWintGiven)
model->BSIM3v1AWint = 0.0;
if (!model->BSIM3v1AWlGiven)
model->BSIM3v1AWl = 0.0;
if (!model->BSIM3v1AWlnGiven)
model->BSIM3v1AWln = 1.0;
if (!model->BSIM3v1AWwGiven)
model->BSIM3v1AWw = 0.0;
if (!model->BSIM3v1AWwnGiven)
model->BSIM3v1AWwn = 1.0;
if (!model->BSIM3v1AWwlGiven)
model->BSIM3v1AWwl = 0.0;
if (!model->BSIM3v1AWminGiven)
model->BSIM3v1AWmin = 0.0;
if (!model->BSIM3v1AWmaxGiven)
model->BSIM3v1AWmax = 1.0;
if (!model->BSIM3v1AdwcGiven)
model->BSIM3v1Adwc = model->BSIM3v1AWint;
if (!model->BSIM3v1AdlcGiven)
model->BSIM3v1Adlc = model->BSIM3v1ALint;
if (!model->BSIM3v1AcfGiven)
model->BSIM3v1Acf = 2.0 * EPSOX / PI
* log(1.0 + 0.4e-6 / model->BSIM3v1Atox);
if (!model->BSIM3v1AcgdoGiven)
{ if (model->BSIM3v1AdlcGiven && (model->BSIM3v1Adlc > 0.0))
{ model->BSIM3v1Acgdo = model->BSIM3v1Adlc * model->BSIM3v1Acox
- model->BSIM3v1Acgdl ;
if (model->BSIM3v1Acgdo < 0.0)
model->BSIM3v1Acgdo = 0.0;
}
else
model->BSIM3v1Acgdo = 0.6 * model->BSIM3v1Axj * model->BSIM3v1Acox;
}
if (!model->BSIM3v1AcgsoGiven)
{ if (model->BSIM3v1AdlcGiven && (model->BSIM3v1Adlc > 0.0))
{ model->BSIM3v1Acgso = model->BSIM3v1Adlc * model->BSIM3v1Acox
- model->BSIM3v1Acgsl ;
if (model->BSIM3v1Acgso < 0.0)
model->BSIM3v1Acgso = 0.0;
}
else
model->BSIM3v1Acgso = 0.6 * model->BSIM3v1Axj * model->BSIM3v1Acox;
}
if (!model->BSIM3v1AcgboGiven)
model->BSIM3v1Acgbo = 0.0;
if (!model->BSIM3v1AxpartGiven)
model->BSIM3v1Axpart = 0.0;
if (!model->BSIM3v1AsheetResistanceGiven)
model->BSIM3v1AsheetResistance = 0.0;
if (!model->BSIM3v1AunitAreaJctCapGiven)
model->BSIM3v1AunitAreaJctCap = 5.0E-4;
if (!model->BSIM3v1AunitLengthSidewallJctCapGiven)
model->BSIM3v1AunitLengthSidewallJctCap = 5.0E-10;
if (!model->BSIM3v1AjctSatCurDensityGiven)
model->BSIM3v1AjctSatCurDensity = 1.0E-4;
if (!model->BSIM3v1AbulkJctPotentialGiven)
model->BSIM3v1AbulkJctPotential = 1.0;
if (!model->BSIM3v1AsidewallJctPotentialGiven)
model->BSIM3v1AsidewallJctPotential = 1.0;
if (!model->BSIM3v1AbulkJctBotGradingCoeffGiven)
model->BSIM3v1AbulkJctBotGradingCoeff = 0.5;
if (!model->BSIM3v1AbulkJctSideGradingCoeffGiven)
model->BSIM3v1AbulkJctSideGradingCoeff = 0.33;
if (!model->BSIM3v1AoxideTrapDensityAGiven)
{ if (model->BSIM3v1Atype == NMOS)
model->BSIM3v1AoxideTrapDensityA = 1e20;
else
model->BSIM3v1AoxideTrapDensityA=9.9e18;
}
if (!model->BSIM3v1AoxideTrapDensityBGiven)
{ if (model->BSIM3v1Atype == NMOS)
model->BSIM3v1AoxideTrapDensityB = 5e4;
else
model->BSIM3v1AoxideTrapDensityB = 2.4e3;
}
if (!model->BSIM3v1AoxideTrapDensityCGiven)
{ if (model->BSIM3v1Atype == NMOS)
model->BSIM3v1AoxideTrapDensityC = -1.4e-12;
else
model->BSIM3v1AoxideTrapDensityC = 1.4e-12;
}
if (!model->BSIM3v1AemGiven)
model->BSIM3v1Aem = 4.1e7; /* V/m */
if (!model->BSIM3v1AefGiven)
model->BSIM3v1Aef = 1.0;
if (!model->BSIM3v1AafGiven)
model->BSIM3v1Aaf = 1.0;
if (!model->BSIM3v1AkfGiven)
model->BSIM3v1Akf = 0.0;
/* loop through all the instances of the model */
for (here = model->BSIM3v1Ainstances; here != NULL ;
here=here->BSIM3v1AnextInstance)
{
if (here->BSIM3v1Aowner == ARCHme)
{
/* allocate a chunk of the state vector */
here->BSIM3v1Astates = *states;
*states += BSIM3v1AnumStates;
}
/* perform the parameter defaulting */
if (!here->BSIM3v1AdrainAreaGiven)
here->BSIM3v1AdrainArea = 0.0;
if (!here->BSIM3v1AdrainPerimeterGiven)
here->BSIM3v1AdrainPerimeter = 0.0;
if (!here->BSIM3v1AdrainSquaresGiven)
here->BSIM3v1AdrainSquares = 1.0;
if (!here->BSIM3v1AicVBSGiven)
here->BSIM3v1AicVBS = 0;
if (!here->BSIM3v1AicVDSGiven)
here->BSIM3v1AicVDS = 0;
if (!here->BSIM3v1AicVGSGiven)
here->BSIM3v1AicVGS = 0;
if (!here->BSIM3v1AlGiven)
here->BSIM3v1Al = 5e-6;
if (!here->BSIM3v1AsourceAreaGiven)
here->BSIM3v1AsourceArea = 0;
if (!here->BSIM3v1AsourcePerimeterGiven)
here->BSIM3v1AsourcePerimeter = 0;
if (!here->BSIM3v1AsourceSquaresGiven)
here->BSIM3v1AsourceSquares = 1;
if (!here->BSIM3v1AwGiven)
here->BSIM3v1Aw = 5e-6;
if (!here->BSIM3v1AmGiven)
here->BSIM3v1Am = 1;
if (!here->BSIM3v1AnqsModGiven)
here->BSIM3v1AnqsMod = model->BSIM3v1AnqsMod;
/* process drain series resistance */
if ((model->BSIM3v1AsheetResistance > 0.0) &&
(here->BSIM3v1AdrainSquares > 0.0 ) &&
(here->BSIM3v1AdNodePrime == 0))
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1Aname,"drain");
if(error) return(error);
here->BSIM3v1AdNodePrime = tmp->number;
if (ckt->CKTcopyNodesets) {
if (CKTinst2Node(ckt,here,1,&tmpNode,&tmpName)==OK) {
if (tmpNode->nsGiven) {
tmp->nodeset=tmpNode->nodeset;
tmp->nsGiven=tmpNode->nsGiven;
}
}
}
}
else
{ here->BSIM3v1AdNodePrime = here->BSIM3v1AdNode;
}
/* process source series resistance */
if ((model->BSIM3v1AsheetResistance > 0.0) &&
(here->BSIM3v1AsourceSquares > 0.0 ) &&
(here->BSIM3v1AsNodePrime == 0))
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1Aname,"source");
if(error) return(error);
here->BSIM3v1AsNodePrime = tmp->number;
if (ckt->CKTcopyNodesets) {
if (CKTinst2Node(ckt,here,3,&tmpNode,&tmpName)==OK) {
if (tmpNode->nsGiven) {
tmp->nodeset=tmpNode->nodeset;
tmp->nsGiven=tmpNode->nsGiven;
}
}
}
}
else
{ here->BSIM3v1AsNodePrime = here->BSIM3v1AsNode;
}
/* internal charge node */
if ((here->BSIM3v1AnqsMod) && (here->BSIM3v1AqNode == 0))
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1Aname,"charge");
if(error) return(error);
here->BSIM3v1AqNode = tmp->number;
}
else
{ here->BSIM3v1AqNode = 0;
}
/* set Sparse Matrix Pointers */
/* macro to make elements with built in test for out of memory */
#define TSTALLOC(ptr,first,second) \
if((here->ptr = SMPmakeElt(matrix,here->first,here->second))==(double *)NULL){\
return(E_NOMEM);\
}
TSTALLOC(BSIM3v1ADdPtr, BSIM3v1AdNode, BSIM3v1AdNode)
TSTALLOC(BSIM3v1AGgPtr, BSIM3v1AgNode, BSIM3v1AgNode)
TSTALLOC(BSIM3v1ASsPtr, BSIM3v1AsNode, BSIM3v1AsNode)
TSTALLOC(BSIM3v1ABbPtr, BSIM3v1AbNode, BSIM3v1AbNode)
TSTALLOC(BSIM3v1ADPdpPtr, BSIM3v1AdNodePrime, BSIM3v1AdNodePrime)
TSTALLOC(BSIM3v1ASPspPtr, BSIM3v1AsNodePrime, BSIM3v1AsNodePrime)
TSTALLOC(BSIM3v1ADdpPtr, BSIM3v1AdNode, BSIM3v1AdNodePrime)
TSTALLOC(BSIM3v1AGbPtr, BSIM3v1AgNode, BSIM3v1AbNode)
TSTALLOC(BSIM3v1AGdpPtr, BSIM3v1AgNode, BSIM3v1AdNodePrime)
TSTALLOC(BSIM3v1AGspPtr, BSIM3v1AgNode, BSIM3v1AsNodePrime)
TSTALLOC(BSIM3v1ASspPtr, BSIM3v1AsNode, BSIM3v1AsNodePrime)
TSTALLOC(BSIM3v1ABdpPtr, BSIM3v1AbNode, BSIM3v1AdNodePrime)
TSTALLOC(BSIM3v1ABspPtr, BSIM3v1AbNode, BSIM3v1AsNodePrime)
TSTALLOC(BSIM3v1ADPspPtr, BSIM3v1AdNodePrime, BSIM3v1AsNodePrime)
TSTALLOC(BSIM3v1ADPdPtr, BSIM3v1AdNodePrime, BSIM3v1AdNode)
TSTALLOC(BSIM3v1ABgPtr, BSIM3v1AbNode, BSIM3v1AgNode)
TSTALLOC(BSIM3v1ADPgPtr, BSIM3v1AdNodePrime, BSIM3v1AgNode)
TSTALLOC(BSIM3v1ASPgPtr, BSIM3v1AsNodePrime, BSIM3v1AgNode)
TSTALLOC(BSIM3v1ASPsPtr, BSIM3v1AsNodePrime, BSIM3v1AsNode)
TSTALLOC(BSIM3v1ADPbPtr, BSIM3v1AdNodePrime, BSIM3v1AbNode)
TSTALLOC(BSIM3v1ASPbPtr, BSIM3v1AsNodePrime, BSIM3v1AbNode)
TSTALLOC(BSIM3v1ASPdpPtr, BSIM3v1AsNodePrime, BSIM3v1AdNodePrime)
TSTALLOC(BSIM3v1AQqPtr, BSIM3v1AqNode, BSIM3v1AqNode)
TSTALLOC(BSIM3v1AQdpPtr, BSIM3v1AqNode, BSIM3v1AdNodePrime)
TSTALLOC(BSIM3v1AQspPtr, BSIM3v1AqNode, BSIM3v1AsNodePrime)
TSTALLOC(BSIM3v1AQgPtr, BSIM3v1AqNode, BSIM3v1AgNode)
TSTALLOC(BSIM3v1AQbPtr, BSIM3v1AqNode, BSIM3v1AbNode)
TSTALLOC(BSIM3v1ADPqPtr, BSIM3v1AdNodePrime, BSIM3v1AqNode)
TSTALLOC(BSIM3v1ASPqPtr, BSIM3v1AsNodePrime, BSIM3v1AqNode)
TSTALLOC(BSIM3v1AGqPtr, BSIM3v1AgNode, BSIM3v1AqNode)
TSTALLOC(BSIM3v1ABqPtr, BSIM3v1AbNode, BSIM3v1AqNode)
}
}
return(OK);
}
int
BSIM3v1Aunsetup(GENmodel *inModel, CKTcircuit *ckt)
{
BSIM3v1Amodel *model;
BSIM3v1Ainstance *here;
for (model = (BSIM3v1Amodel *)inModel; model != NULL;
model = model->BSIM3v1AnextModel)
{
for (here = model->BSIM3v1Ainstances; here != NULL;
here=here->BSIM3v1AnextInstance)
{
if (here->BSIM3v1AdNodePrime
&& here->BSIM3v1AdNodePrime != here->BSIM3v1AdNode)
{
CKTdltNNum(ckt, here->BSIM3v1AdNodePrime);
here->BSIM3v1AdNodePrime = 0;
}
if (here->BSIM3v1AsNodePrime
&& here->BSIM3v1AsNodePrime != here->BSIM3v1AsNode)
{
CKTdltNNum(ckt, here->BSIM3v1AsNodePrime);
here->BSIM3v1AsNodePrime = 0;
}
}
}
return OK;
}

631
src/spicelib/devices/bsim3v1a/b3v1atemp.c
View File

@ -1,631 +0,0 @@
/***********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1995 Min-Chie Jeng and Mansun Chan.
Modified by Paolo Nenzi 2002
File: b3v1atemp.c
**********/
/* Lmin, Lmax, Wmin, Wmax */
#include "ngspice.h"
#include "smpdefs.h"
#include "cktdefs.h"
#include "bsim3v1adef.h"
#include "const.h"
#include "sperror.h"
#include "suffix.h"
#define Kb 1.3806226e-23
#define KboQ 8.617087e-5 /* Kb / q where q = 1.60219e-19 */
#define EPSOX 3.453133e-11
#define EPSSI 1.03594e-10
#define PI 3.141592654
#define MAX_EXP 5.834617425e14
#define MIN_EXP 1.713908431e-15
#define EXP_THRESHOLD 34.0
#define Charge_q 1.60219e-19
/* ARGSUSED */
int
BSIM3v1Atemp(GENmodel *inModel, CKTcircuit *ckt)
{
BSIM3v1Amodel *model = (BSIM3v1Amodel*) inModel;
BSIM3v1Ainstance *here;
struct bsim3v1aSizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam = NULL;
double tmp1, tmp2, Eg, ni, T0, T1, T2, T3, Ldrn, Wdrn;
double Temp, TRatio, Inv_L, Inv_W, Inv_LW, Vtm0, Tnom;
int Size_Not_Found;
/* loop through all the BSIM3v1A device models */
for (; model != NULL; model = model->BSIM3v1AnextModel)
{ Temp = ckt->CKTtemp;
if (model->BSIM3v1AbulkJctPotential < 0.1)
model->BSIM3v1AbulkJctPotential = 0.1;
if (model->BSIM3v1AsidewallJctPotential < 0.1)
model->BSIM3v1AsidewallJctPotential = 0.1;
model->pSizeDependParamKnot = NULL;
pLastKnot = NULL;
Tnom = model->BSIM3v1Atnom;
TRatio = Temp / Tnom;
/* loop through all the instances of the model */
for (here = model->BSIM3v1Ainstances; here != NULL;
here=here->BSIM3v1AnextInstance)
{
if (here->BSIM3v1Aowner != ARCHme)
continue;
pSizeDependParamKnot = model->pSizeDependParamKnot;
Size_Not_Found = 1;
while ((pSizeDependParamKnot != NULL) && Size_Not_Found)
{ if ((here->BSIM3v1Al == pSizeDependParamKnot->Length)
&& (here->BSIM3v1Aw == pSizeDependParamKnot->Width))
{ Size_Not_Found = 0;
here->pParam = pSizeDependParamKnot;
}
else
{ pLastKnot = pSizeDependParamKnot;
pSizeDependParamKnot = pSizeDependParamKnot->pNext;
}
}
if (Size_Not_Found)
{ pParam = TMALLOC(struct bsim3v1aSizeDependParam, 1);
if (pLastKnot == NULL)
model->pSizeDependParamKnot = pParam;
else
pLastKnot->pNext = pParam;
pParam->pNext = NULL;
here->pParam = pParam;
Ldrn = here->BSIM3v1Al;
Wdrn = here->BSIM3v1Aw;
T0 = pow(Ldrn, model->BSIM3v1ALln);
T1 = pow(Wdrn, model->BSIM3v1ALwn);
tmp1 = model->BSIM3v1ALl / T0 + model->BSIM3v1ALw / T1
+ model->BSIM3v1ALwl / (T0 * T1);
pParam->BSIM3v1Adl = model->BSIM3v1ALint + tmp1;
pParam->BSIM3v1Adlc = model->BSIM3v1Adlc + tmp1;
T2 = pow(Ldrn, model->BSIM3v1AWln);
T3 = pow(Wdrn, model->BSIM3v1AWwn);
tmp2 = model->BSIM3v1AWl / T2 + model->BSIM3v1AWw / T3
+ model->BSIM3v1AWwl / (T2 * T3);
pParam->BSIM3v1Adw = model->BSIM3v1AWint + tmp2;
pParam->BSIM3v1Adwc = model->BSIM3v1Adwc + tmp2;
pParam->BSIM3v1Aleff = here->BSIM3v1Al - 2.0 * pParam->BSIM3v1Adl;
if (pParam->BSIM3v1Aleff <= 0.0)
{ IFuid namarray[2];
namarray[0] = model->BSIM3v1AmodName;
namarray[1] = here->BSIM3v1Aname;
(*(SPfrontEnd->IFerror))(ERR_FATAL,
"BSIM3v1A: mosfet %s, model %s: Effective channel length <= 0",
namarray);
return(E_BADPARM);
}
pParam->BSIM3v1Aweff = here->BSIM3v1Aw - 2.0 * pParam->BSIM3v1Adw;
if (pParam->BSIM3v1Aweff <= 0.0)
{ IFuid namarray[2];
namarray[0] = model->BSIM3v1AmodName;
namarray[1] = here->BSIM3v1Aname;
(*(SPfrontEnd->IFerror))(ERR_FATAL,
"BSIM3v1A: mosfet %s, model %s: Effective channel width <= 0",
namarray);
return(E_BADPARM);
}
pParam->BSIM3v1AleffCV = here->BSIM3v1Al - 2.0 * pParam->BSIM3v1Adlc;
if (pParam->BSIM3v1AleffCV <= 0.0)
{ IFuid namarray[2];
namarray[0] = model->BSIM3v1AmodName;
namarray[1] = here->BSIM3v1Aname;
(*(SPfrontEnd->IFerror))(ERR_FATAL,
"BSIM3v1A: mosfet %s, model %s: Effective channel length for C-V <= 0",
namarray);
return(E_BADPARM);
}
pParam->BSIM3v1AweffCV = here->BSIM3v1Aw - 2.0 * pParam->BSIM3v1Adwc;
if (pParam->BSIM3v1AweffCV <= 0.0)
{ IFuid namarray[2];
namarray[0] = model->BSIM3v1AmodName;
namarray[1] = here->BSIM3v1Aname;
(*(SPfrontEnd->IFerror))(ERR_FATAL,
"BSIM3v1A: mosfet %s, model %s: Effective channel width for C-V <= 0",
namarray);
return(E_BADPARM);
}
model->BSIM3v1Avcrit = CONSTvt0 * log(CONSTvt0
/ (CONSTroot2 * 1.0e-14));
model->BSIM3v1Afactor1 = sqrt(EPSSI / EPSOX * model->BSIM3v1Atox);
if (model->BSIM3v1AbinUnit == 1)
{ Inv_L = 1.0e-6 / pParam->BSIM3v1Aleff;
Inv_W = 1.0e-6 / pParam->BSIM3v1Aweff;
Inv_LW = 1.0e-12 / (pParam->BSIM3v1Aleff
* pParam->BSIM3v1Aweff);
}
else
{ Inv_L = 1.0 / pParam->BSIM3v1Aleff;
Inv_W = 1.0 / pParam->BSIM3v1Aweff;
Inv_LW = 1.0 / (pParam->BSIM3v1Aleff
* pParam->BSIM3v1Aweff);
}
pParam->BSIM3v1Acdsc = model->BSIM3v1Acdsc
+ model->BSIM3v1Alcdsc * Inv_L
+ model->BSIM3v1Awcdsc * Inv_W
+ model->BSIM3v1Apcdsc * Inv_LW;
pParam->BSIM3v1Acdscb = model->BSIM3v1Acdscb
+ model->BSIM3v1Alcdscb * Inv_L
+ model->BSIM3v1Awcdscb * Inv_W
+ model->BSIM3v1Apcdscb * Inv_LW;
pParam->BSIM3v1Acdscd = model->BSIM3v1Acdscd
+ model->BSIM3v1Alcdscd * Inv_L
+ model->BSIM3v1Awcdscd * Inv_W
+ model->BSIM3v1Apcdscd * Inv_LW;
pParam->BSIM3v1Acit = model->BSIM3v1Acit
+ model->BSIM3v1Alcit * Inv_L
+ model->BSIM3v1Awcit * Inv_W
+ model->BSIM3v1Apcit * Inv_LW;
pParam->BSIM3v1Anfactor = model->BSIM3v1Anfactor
+ model->BSIM3v1Alnfactor * Inv_L
+ model->BSIM3v1Awnfactor * Inv_W
+ model->BSIM3v1Apnfactor * Inv_LW;
pParam->BSIM3v1Axj = model->BSIM3v1Axj
+ model->BSIM3v1Alxj * Inv_L
+ model->BSIM3v1Awxj * Inv_W
+ model->BSIM3v1Apxj * Inv_LW;
pParam->BSIM3v1Avsat = model->BSIM3v1Avsat
+ model->BSIM3v1Alvsat * Inv_L
+ model->BSIM3v1Awvsat * Inv_W
+ model->BSIM3v1Apvsat * Inv_LW;
pParam->BSIM3v1Aat = model->BSIM3v1Aat
+ model->BSIM3v1Alat * Inv_L
+ model->BSIM3v1Awat * Inv_W
+ model->BSIM3v1Apat * Inv_LW;
pParam->BSIM3v1Aa0 = model->BSIM3v1Aa0
+ model->BSIM3v1Ala0 * Inv_L
+ model->BSIM3v1Awa0 * Inv_W
+ model->BSIM3v1Apa0 * Inv_LW;
pParam->BSIM3v1Aags = model->BSIM3v1Aags
+ model->BSIM3v1Alags * Inv_L
+ model->BSIM3v1Awags * Inv_W
+ model->BSIM3v1Apags * Inv_LW;
pParam->BSIM3v1Aa1 = model->BSIM3v1Aa1
+ model->BSIM3v1Ala1 * Inv_L
+ model->BSIM3v1Awa1 * Inv_W
+ model->BSIM3v1Apa1 * Inv_LW;
pParam->BSIM3v1Aa2 = model->BSIM3v1Aa2
+ model->BSIM3v1Ala2 * Inv_L
+ model->BSIM3v1Awa2 * Inv_W
+ model->BSIM3v1Apa2 * Inv_LW;
pParam->BSIM3v1Aketa = model->BSIM3v1Aketa
+ model->BSIM3v1Alketa * Inv_L
+ model->BSIM3v1Awketa * Inv_W
+ model->BSIM3v1Apketa * Inv_LW;
pParam->BSIM3v1Ansub = model->BSIM3v1Ansub
+ model->BSIM3v1Alnsub * Inv_L
+ model->BSIM3v1Awnsub * Inv_W
+ model->BSIM3v1Apnsub * Inv_LW;
pParam->BSIM3v1Anpeak = model->BSIM3v1Anpeak
+ model->BSIM3v1Alnpeak * Inv_L
+ model->BSIM3v1Awnpeak * Inv_W
+ model->BSIM3v1Apnpeak * Inv_LW;
pParam->BSIM3v1Angate = model->BSIM3v1Angate
+ model->BSIM3v1Alngate * Inv_L
+ model->BSIM3v1Awngate * Inv_W
+ model->BSIM3v1Apngate * Inv_LW;
pParam->BSIM3v1Agamma1 = model->BSIM3v1Agamma1
+ model->BSIM3v1Algamma1 * Inv_L
+ model->BSIM3v1Awgamma1 * Inv_W
+ model->BSIM3v1Apgamma1 * Inv_LW;
pParam->BSIM3v1Agamma2 = model->BSIM3v1Agamma2
+ model->BSIM3v1Algamma2 * Inv_L
+ model->BSIM3v1Awgamma2 * Inv_W
+ model->BSIM3v1Apgamma2 * Inv_LW;
pParam->BSIM3v1Avbx = model->BSIM3v1Avbx
+ model->BSIM3v1Alvbx * Inv_L
+ model->BSIM3v1Awvbx * Inv_W
+ model->BSIM3v1Apvbx * Inv_LW;
pParam->BSIM3v1Avbm = model->BSIM3v1Avbm
+ model->BSIM3v1Alvbm * Inv_L
+ model->BSIM3v1Awvbm * Inv_W
+ model->BSIM3v1Apvbm * Inv_LW;
pParam->BSIM3v1Axt = model->BSIM3v1Axt
+ model->BSIM3v1Alxt * Inv_L
+ model->BSIM3v1Awxt * Inv_W
+ model->BSIM3v1Apxt * Inv_LW;
pParam->BSIM3v1Ak1 = model->BSIM3v1Ak1
+ model->BSIM3v1Alk1 * Inv_L
+ model->BSIM3v1Awk1 * Inv_W
+ model->BSIM3v1Apk1 * Inv_LW;
pParam->BSIM3v1Akt1 = model->BSIM3v1Akt1
+ model->BSIM3v1Alkt1 * Inv_L
+ model->BSIM3v1Awkt1 * Inv_W
+ model->BSIM3v1Apkt1 * Inv_LW;
pParam->BSIM3v1Akt1l = model->BSIM3v1Akt1l
+ model->BSIM3v1Alkt1l * Inv_L
+ model->BSIM3v1Awkt1l * Inv_W
+ model->BSIM3v1Apkt1l * Inv_LW;
pParam->BSIM3v1Ak2 = model->BSIM3v1Ak2
+ model->BSIM3v1Alk2 * Inv_L
+ model->BSIM3v1Awk2 * Inv_W
+ model->BSIM3v1Apk2 * Inv_LW;
pParam->BSIM3v1Akt2 = model->BSIM3v1Akt2
+ model->BSIM3v1Alkt2 * Inv_L
+ model->BSIM3v1Awkt2 * Inv_W
+ model->BSIM3v1Apkt2 * Inv_LW;
pParam->BSIM3v1Ak3 = model->BSIM3v1Ak3
+ model->BSIM3v1Alk3 * Inv_L
+ model->BSIM3v1Awk3 * Inv_W
+ model->BSIM3v1Apk3 * Inv_LW;
pParam->BSIM3v1Ak3b = model->BSIM3v1Ak3b
+ model->BSIM3v1Alk3b * Inv_L
+ model->BSIM3v1Awk3b * Inv_W
+ model->BSIM3v1Apk3b * Inv_LW;
pParam->BSIM3v1Aw0 = model->BSIM3v1Aw0
+ model->BSIM3v1Alw0 * Inv_L
+ model->BSIM3v1Aww0 * Inv_W
+ model->BSIM3v1Apw0 * Inv_LW;
pParam->BSIM3v1Anlx = model->BSIM3v1Anlx
+ model->BSIM3v1Alnlx * Inv_L
+ model->BSIM3v1Awnlx * Inv_W
+ model->BSIM3v1Apnlx * Inv_LW;
pParam->BSIM3v1Advt0 = model->BSIM3v1Advt0
+ model->BSIM3v1Aldvt0 * Inv_L
+ model->BSIM3v1Awdvt0 * Inv_W
+ model->BSIM3v1Apdvt0 * Inv_LW;
pParam->BSIM3v1Advt1 = model->BSIM3v1Advt1
+ model->BSIM3v1Aldvt1 * Inv_L
+ model->BSIM3v1Awdvt1 * Inv_W
+ model->BSIM3v1Apdvt1 * Inv_LW;
pParam->BSIM3v1Advt2 = model->BSIM3v1Advt2
+ model->BSIM3v1Aldvt2 * Inv_L
+ model->BSIM3v1Awdvt2 * Inv_W
+ model->BSIM3v1Apdvt2 * Inv_LW;
pParam->BSIM3v1Advt0w = model->BSIM3v1Advt0w
+ model->BSIM3v1Aldvt0w * Inv_L
+ model->BSIM3v1Awdvt0w * Inv_W
+ model->BSIM3v1Apdvt0w * Inv_LW;
pParam->BSIM3v1Advt1w = model->BSIM3v1Advt1w
+ model->BSIM3v1Aldvt1w * Inv_L
+ model->BSIM3v1Awdvt1w * Inv_W
+ model->BSIM3v1Apdvt1w * Inv_LW;
pParam->BSIM3v1Advt2w = model->BSIM3v1Advt2w
+ model->BSIM3v1Aldvt2w * Inv_L
+ model->BSIM3v1Awdvt2w * Inv_W
+ model->BSIM3v1Apdvt2w * Inv_LW;
pParam->BSIM3v1Adrout = model->BSIM3v1Adrout
+ model->BSIM3v1Aldrout * Inv_L
+ model->BSIM3v1Awdrout * Inv_W
+ model->BSIM3v1Apdrout * Inv_LW;
pParam->BSIM3v1Adsub = model->BSIM3v1Adsub
+ model->BSIM3v1Aldsub * Inv_L
+ model->BSIM3v1Awdsub * Inv_W
+ model->BSIM3v1Apdsub * Inv_LW;
pParam->BSIM3v1Avth0 = model->BSIM3v1Avth0
+ model->BSIM3v1Alvth0 * Inv_L
+ model->BSIM3v1Awvth0 * Inv_W
+ model->BSIM3v1Apvth0 * Inv_LW;
pParam->BSIM3v1Aua = model->BSIM3v1Aua
+ model->BSIM3v1Alua * Inv_L
+ model->BSIM3v1Awua * Inv_W
+ model->BSIM3v1Apua * Inv_LW;
pParam->BSIM3v1Aua1 = model->BSIM3v1Aua1
+ model->BSIM3v1Alua1 * Inv_L
+ model->BSIM3v1Awua1 * Inv_W
+ model->BSIM3v1Apua1 * Inv_LW;
pParam->BSIM3v1Aub = model->BSIM3v1Aub
+ model->BSIM3v1Alub * Inv_L
+ model->BSIM3v1Awub * Inv_W
+ model->BSIM3v1Apub * Inv_LW;
pParam->BSIM3v1Aub1 = model->BSIM3v1Aub1
+ model->BSIM3v1Alub1 * Inv_L
+ model->BSIM3v1Awub1 * Inv_W
+ model->BSIM3v1Apub1 * Inv_LW;
pParam->BSIM3v1Auc = model->BSIM3v1Auc
+ model->BSIM3v1Aluc * Inv_L
+ model->BSIM3v1Awuc * Inv_W
+ model->BSIM3v1Apuc * Inv_LW;
pParam->BSIM3v1Auc1 = model->BSIM3v1Auc1
+ model->BSIM3v1Aluc1 * Inv_L
+ model->BSIM3v1Awuc1 * Inv_W
+ model->BSIM3v1Apuc1 * Inv_LW;
pParam->BSIM3v1Au0 = model->BSIM3v1Au0
+ model->BSIM3v1Alu0 * Inv_L
+ model->BSIM3v1Awu0 * Inv_W
+ model->BSIM3v1Apu0 * Inv_LW;
pParam->BSIM3v1Aute = model->BSIM3v1Aute
+ model->BSIM3v1Alute * Inv_L
+ model->BSIM3v1Awute * Inv_W
+ model->BSIM3v1Apute * Inv_LW;
pParam->BSIM3v1Avoff = model->BSIM3v1Avoff
+ model->BSIM3v1Alvoff * Inv_L
+ model->BSIM3v1Awvoff * Inv_W
+ model->BSIM3v1Apvoff * Inv_LW;
pParam->BSIM3v1Adelta = model->BSIM3v1Adelta
+ model->BSIM3v1Aldelta * Inv_L
+ model->BSIM3v1Awdelta * Inv_W
+ model->BSIM3v1Apdelta * Inv_LW;
pParam->BSIM3v1Ardsw = model->BSIM3v1Ardsw
+ model->BSIM3v1Alrdsw * Inv_L
+ model->BSIM3v1Awrdsw * Inv_W
+ model->BSIM3v1Aprdsw * Inv_LW;
pParam->BSIM3v1Aprwg = model->BSIM3v1Aprwg
+ model->BSIM3v1Alprwg * Inv_L
+ model->BSIM3v1Awprwg * Inv_W
+ model->BSIM3v1Apprwg * Inv_LW;
pParam->BSIM3v1Aprwb = model->BSIM3v1Aprwb
+ model->BSIM3v1Alprwb * Inv_L
+ model->BSIM3v1Awprwb * Inv_W
+ model->BSIM3v1Apprwb * Inv_LW;
pParam->BSIM3v1Aprt = model->BSIM3v1Aprt
+ model->BSIM3v1Alprt * Inv_L
+ model->BSIM3v1Awprt * Inv_W
+ model->BSIM3v1Apprt * Inv_LW;
pParam->BSIM3v1Aeta0 = model->BSIM3v1Aeta0
+ model->BSIM3v1Aleta0 * Inv_L
+ model->BSIM3v1Aweta0 * Inv_W
+ model->BSIM3v1Apeta0 * Inv_LW;
pParam->BSIM3v1Aetab = model->BSIM3v1Aetab
+ model->BSIM3v1Aletab * Inv_L
+ model->BSIM3v1Awetab * Inv_W
+ model->BSIM3v1Apetab * Inv_LW;
pParam->BSIM3v1Apclm = model->BSIM3v1Apclm
+ model->BSIM3v1Alpclm * Inv_L
+ model->BSIM3v1Awpclm * Inv_W
+ model->BSIM3v1Appclm * Inv_LW;
pParam->BSIM3v1Apdibl1 = model->BSIM3v1Apdibl1
+ model->BSIM3v1Alpdibl1 * Inv_L
+ model->BSIM3v1Awpdibl1 * Inv_W
+ model->BSIM3v1Appdibl1 * Inv_LW;
pParam->BSIM3v1Apdibl2 = model->BSIM3v1Apdibl2
+ model->BSIM3v1Alpdibl2 * Inv_L
+ model->BSIM3v1Awpdibl2 * Inv_W
+ model->BSIM3v1Appdibl2 * Inv_LW;
pParam->BSIM3v1Apdiblb = model->BSIM3v1Apdiblb
+ model->BSIM3v1Alpdiblb * Inv_L
+ model->BSIM3v1Awpdiblb * Inv_W
+ model->BSIM3v1Appdiblb * Inv_LW;
pParam->BSIM3v1Apscbe1 = model->BSIM3v1Apscbe1
+ model->BSIM3v1Alpscbe1 * Inv_L
+ model->BSIM3v1Awpscbe1 * Inv_W
+ model->BSIM3v1Appscbe1 * Inv_LW;
pParam->BSIM3v1Apscbe2 = model->BSIM3v1Apscbe2
+ model->BSIM3v1Alpscbe2 * Inv_L
+ model->BSIM3v1Awpscbe2 * Inv_W
+ model->BSIM3v1Appscbe2 * Inv_LW;
pParam->BSIM3v1Apvag = model->BSIM3v1Apvag
+ model->BSIM3v1Alpvag * Inv_L
+ model->BSIM3v1Awpvag * Inv_W
+ model->BSIM3v1Appvag * Inv_LW;
pParam->BSIM3v1Awr = model->BSIM3v1Awr
+ model->BSIM3v1Alwr * Inv_L
+ model->BSIM3v1Awwr * Inv_W
+ model->BSIM3v1Apwr * Inv_LW;
pParam->BSIM3v1Adwg = model->BSIM3v1Adwg
+ model->BSIM3v1Aldwg * Inv_L
+ model->BSIM3v1Awdwg * Inv_W
+ model->BSIM3v1Apdwg * Inv_LW;
pParam->BSIM3v1Adwb = model->BSIM3v1Adwb
+ model->BSIM3v1Aldwb * Inv_L
+ model->BSIM3v1Awdwb * Inv_W
+ model->BSIM3v1Apdwb * Inv_LW;
pParam->BSIM3v1Ab0 = model->BSIM3v1Ab0
+ model->BSIM3v1Alb0 * Inv_L
+ model->BSIM3v1Awb0 * Inv_W
+ model->BSIM3v1Apb0 * Inv_LW;
pParam->BSIM3v1Ab1 = model->BSIM3v1Ab1
+ model->BSIM3v1Alb1 * Inv_L
+ model->BSIM3v1Awb1 * Inv_W
+ model->BSIM3v1Apb1 * Inv_LW;
pParam->BSIM3v1Aalpha0 = model->BSIM3v1Aalpha0
+ model->BSIM3v1Alalpha0 * Inv_L
+ model->BSIM3v1Awalpha0 * Inv_W
+ model->BSIM3v1Apalpha0 * Inv_LW;
pParam->BSIM3v1Abeta0 = model->BSIM3v1Abeta0
+ model->BSIM3v1Albeta0 * Inv_L
+ model->BSIM3v1Awbeta0 * Inv_W
+ model->BSIM3v1Apbeta0 * Inv_LW;
/* CV model */
pParam->BSIM3v1Aelm = model->BSIM3v1Aelm
+ model->BSIM3v1Alelm * Inv_L
+ model->BSIM3v1Awelm * Inv_W
+ model->BSIM3v1Apelm * Inv_LW;
pParam->BSIM3v1Acgsl = model->BSIM3v1Acgsl
+ model->BSIM3v1Alcgsl * Inv_L
+ model->BSIM3v1Awcgsl * Inv_W
+ model->BSIM3v1Apcgsl * Inv_LW;
pParam->BSIM3v1Acgdl = model->BSIM3v1Acgdl
+ model->BSIM3v1Alcgdl * Inv_L
+ model->BSIM3v1Awcgdl * Inv_W
+ model->BSIM3v1Apcgdl * Inv_LW;
pParam->BSIM3v1Ackappa = model->BSIM3v1Ackappa
+ model->BSIM3v1Alckappa * Inv_L
+ model->BSIM3v1Awckappa * Inv_W
+ model->BSIM3v1Apckappa * Inv_LW;
pParam->BSIM3v1Acf = model->BSIM3v1Acf
+ model->BSIM3v1Alcf * Inv_L
+ model->BSIM3v1Awcf * Inv_W
+ model->BSIM3v1Apcf * Inv_LW;
pParam->BSIM3v1Aclc = model->BSIM3v1Aclc
+ model->BSIM3v1Alclc * Inv_L
+ model->BSIM3v1Awclc * Inv_W
+ model->BSIM3v1Apclc * Inv_LW;
pParam->BSIM3v1Acle = model->BSIM3v1Acle
+ model->BSIM3v1Alcle * Inv_L
+ model->BSIM3v1Awcle * Inv_W
+ model->BSIM3v1Apcle * Inv_LW;
pParam->BSIM3v1AabulkCVfactor = 1.0 + pow((pParam->BSIM3v1Aclc
/ pParam->BSIM3v1Aleff),
pParam->BSIM3v1Acle);
pParam->BSIM3v1Acgdo = (model->BSIM3v1Acgdo + pParam->BSIM3v1Acf)
* pParam->BSIM3v1AweffCV;
pParam->BSIM3v1Acgso = (model->BSIM3v1Acgso + pParam->BSIM3v1Acf)
* pParam->BSIM3v1AweffCV;
pParam->BSIM3v1Acgbo = model->BSIM3v1Acgbo * pParam->BSIM3v1AleffCV;
T0 = (TRatio - 1.0);
pParam->BSIM3v1Aua = pParam->BSIM3v1Aua + pParam->BSIM3v1Aua1 * T0;
pParam->BSIM3v1Aub = pParam->BSIM3v1Aub + pParam->BSIM3v1Aub1 * T0;
pParam->BSIM3v1Auc = pParam->BSIM3v1Auc + pParam->BSIM3v1Auc1 * T0;
pParam->BSIM3v1Au0temp = pParam->BSIM3v1Au0
* pow(TRatio, pParam->BSIM3v1Aute);
pParam->BSIM3v1Avsattemp = pParam->BSIM3v1Avsat - pParam->BSIM3v1Aat
* T0;
pParam->BSIM3v1Ards0 = (pParam->BSIM3v1Ardsw + pParam->BSIM3v1Aprt * T0)
/ pow(pParam->BSIM3v1Aweff * 1E6, pParam->BSIM3v1Awr);
if (!model->BSIM3v1AnpeakGiven && model->BSIM3v1Agamma1Given)
{ T0 = pParam->BSIM3v1Agamma1 * model->BSIM3v1Acox;
pParam->BSIM3v1Anpeak = 3.021E22 * T0 * T0;
}
Vtm0 = KboQ * Tnom;
Eg = 1.16 - 7.02e-4 * Tnom * Tnom / (Tnom + 1108.0);
ni = 1.45e10 * (Tnom / 300.15) * sqrt(Tnom / 300.15)
* exp(21.5565981 - Eg / (2.0 * Vtm0));
pParam->BSIM3v1Aphi = 2.0 * Vtm0
* log(pParam->BSIM3v1Anpeak / ni);
pParam->BSIM3v1AsqrtPhi = sqrt(pParam->BSIM3v1Aphi);
pParam->BSIM3v1Aphis3 = pParam->BSIM3v1AsqrtPhi * pParam->BSIM3v1Aphi;
pParam->BSIM3v1AXdep0 = sqrt(2.0 * EPSSI / (Charge_q
* pParam->BSIM3v1Anpeak * 1.0e6))
* pParam->BSIM3v1AsqrtPhi;
pParam->BSIM3v1AsqrtXdep0 = sqrt(pParam->BSIM3v1AXdep0);
pParam->BSIM3v1Alitl = sqrt(3.0 * pParam->BSIM3v1Axj
* model->BSIM3v1Atox);
pParam->BSIM3v1Avbi = Vtm0 * log(1.0e20
* pParam->BSIM3v1Anpeak / (ni * ni));
pParam->BSIM3v1Acdep0 = sqrt(Charge_q * EPSSI
* pParam->BSIM3v1Anpeak * 1.0e6 / 2.0
/ pParam->BSIM3v1Aphi);
if (model->BSIM3v1Ak1Given || model->BSIM3v1Ak2Given)
{ if (!model->BSIM3v1Ak1Given)
{ fprintf(stdout, "Warning: k1 should be specified with k2.\n");
pParam->BSIM3v1Ak1 = 0.53;
}
if (!model->BSIM3v1Ak2Given)
{ fprintf(stdout, "Warning: k2 should be specified with k1.\n");
pParam->BSIM3v1Ak2 = -0.0186;
}
if (model->BSIM3v1AnsubGiven)
fprintf(stdout, "Warning: nsub is ignored because k1 or k2 is given.\n");
if (model->BSIM3v1AxtGiven)
fprintf(stdout, "Warning: xt is ignored because k1 or k2 is given.\n");
if (model->BSIM3v1AvbxGiven)
fprintf(stdout, "Warning: vbx is ignored because k1 or k2 is given.\n");
if (model->BSIM3v1AvbmGiven)
fprintf(stdout, "Warning: vbm is ignored because k1 or k2 is given.\n");
if (model->BSIM3v1Agamma1Given)
fprintf(stdout, "Warning: gamma1 is ignored because k1 or k2 is given.\n");
if (model->BSIM3v1Agamma2Given)
fprintf(stdout, "Warning: gamma2 is ignored because k1 or k2 is given.\n");
}
else
{ if (!model->BSIM3v1AvbxGiven)
pParam->BSIM3v1Avbx = pParam->BSIM3v1Aphi - 7.7348e-4
* pParam->BSIM3v1Anpeak
* pParam->BSIM3v1Axt * pParam->BSIM3v1Axt;
if (pParam->BSIM3v1Avbx > 0.0)
pParam->BSIM3v1Avbx = -pParam->BSIM3v1Avbx;
if (pParam->BSIM3v1Avbm > 0.0)
pParam->BSIM3v1Avbm = -pParam->BSIM3v1Avbm;
if (!model->BSIM3v1Agamma1Given)
pParam->BSIM3v1Agamma1 = 5.753e-12
* sqrt(pParam->BSIM3v1Anpeak)
/ model->BSIM3v1Acox;
if (!model->BSIM3v1Agamma2Given)
pParam->BSIM3v1Agamma2 = 5.753e-12
* sqrt(pParam->BSIM3v1Ansub)
/ model->BSIM3v1Acox;
T0 = pParam->BSIM3v1Agamma1 - pParam->BSIM3v1Agamma2;
T1 = sqrt(pParam->BSIM3v1Aphi - pParam->BSIM3v1Avbx)
- pParam->BSIM3v1AsqrtPhi;
T2 = sqrt(pParam->BSIM3v1Aphi * (pParam->BSIM3v1Aphi
- pParam->BSIM3v1Avbm)) - pParam->BSIM3v1Aphi;
pParam->BSIM3v1Ak2 = T0 * T1 / (2.0 * T2 + pParam->BSIM3v1Avbm);
pParam->BSIM3v1Ak1 = pParam->BSIM3v1Agamma2 - 2.0
* pParam->BSIM3v1Ak2 * sqrt(pParam->BSIM3v1Aphi
- pParam->BSIM3v1Avbm);
}
if (pParam->BSIM3v1Ak2 > 0.0)
{ T0 = 0.5 * pParam->BSIM3v1Ak1 / pParam->BSIM3v1Ak2;
pParam->BSIM3v1Avbsc = 0.9 * (pParam->BSIM3v1Aphi - T0 * T0);
if (pParam->BSIM3v1Avbsc > -3.0)
pParam->BSIM3v1Avbsc = -3.0;
else if (pParam->BSIM3v1Avbsc < -30.0)
pParam->BSIM3v1Avbsc = -30.0;
}
else
{ pParam->BSIM3v1Avbsc = -10.0;
}
model->BSIM3v1Avtm = KboQ * Temp;
if (model->BSIM3v1Avth0Given)
pParam->BSIM3v1Avfb = model->BSIM3v1Atype * pParam->BSIM3v1Avth0
- pParam->BSIM3v1Aphi - pParam->BSIM3v1Ak1
* pParam->BSIM3v1AsqrtPhi;
else
pParam->BSIM3v1Avth0 = model->BSIM3v1Atype * (-1.0
+ pParam->BSIM3v1Aphi + pParam->BSIM3v1Ak1
* pParam->BSIM3v1AsqrtPhi);
T1 = sqrt(EPSSI / EPSOX * model->BSIM3v1Atox
* pParam->BSIM3v1AXdep0);
T0 = exp(-0.5 * pParam->BSIM3v1Adsub * pParam->BSIM3v1Aleff / T1);
pParam->BSIM3v1Atheta0vb0 = (T0 + 2.0 * T0 * T0);
T0 = exp(-0.5 * pParam->BSIM3v1Adrout * pParam->BSIM3v1Aleff / T1);
T2 = (T0 + 2.0 * T0 * T0);
pParam->BSIM3v1AthetaRout = pParam->BSIM3v1Apdibl1 * T2
+ pParam->BSIM3v1Apdibl2;
/* process source/drain series resistance */
here->BSIM3v1AdrainConductance = model->BSIM3v1AsheetResistance
* here->BSIM3v1AdrainSquares;
if (here->BSIM3v1AdrainConductance > 0.0)
here->BSIM3v1AdrainConductance = 1.0
/ here->BSIM3v1AdrainConductance;
else
here->BSIM3v1AdrainConductance = 0.0;
here->BSIM3v1AsourceConductance = model->BSIM3v1AsheetResistance
* here->BSIM3v1AsourceSquares;
if (here->BSIM3v1AsourceConductance > 0.0)
here->BSIM3v1AsourceConductance = 1.0
/ here->BSIM3v1AsourceConductance;
else
here->BSIM3v1AsourceConductance = 0.0;
}
here->BSIM3v1Acgso = pParam->BSIM3v1Acgso;
here->BSIM3v1Acgdo = pParam->BSIM3v1Acgdo;
}
}
return(OK);
}

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src/spicelib/devices/bsim3v1a/b3v1atrunc.c
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@ -1,51 +0,0 @@
/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1995 Min-Chie Jeng and Mansun Chan.
Modified by Paolo Nenzi 2002
File: b3v1atrunc.c
**********/
#include "ngspice.h"
#include "cktdefs.h"
#include "bsim3v1adef.h"
#include "sperror.h"
#include "suffix.h"
int
BSIM3v1Atrunc(GENmodel *inModel, CKTcircuit *ckt, double *timeStep)
{
BSIM3v1Amodel *model = (BSIM3v1Amodel*)inModel;
BSIM3v1Ainstance *here;
#ifdef STEPDEBUG
double debugtemp;
#endif /* STEPDEBUG */
for (; model != NULL; model = model->BSIM3v1AnextModel)
{ for (here = model->BSIM3v1Ainstances; here != NULL;
here = here->BSIM3v1AnextInstance)
{
if (here->BSIM3v1Aowner != ARCHme)
continue;
#ifdef STEPDEBUG
debugtemp = *timeStep;
#endif /* STEPDEBUG */
CKTterr(here->BSIM3v1Aqb,ckt,timeStep);
CKTterr(here->BSIM3v1Aqg,ckt,timeStep);
CKTterr(here->BSIM3v1Aqd,ckt,timeStep);
#ifdef STEPDEBUG
if(debugtemp != *timeStep)
{ printf("device %s reduces step from %g to %g\n",
here->BSIM3v1Aname,debugtemp,*timeStep);
}
#endif /* STEPDEBUG */
}
}
return(OK);
}

1580
src/spicelib/devices/bsim3v1a/bsim3v1adef.h
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File diff suppressed because it is too large Load Diff

30
src/spicelib/devices/bsim3v1a/bsim3v1aext.h
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@ -1,30 +0,0 @@
/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1991 JianHui Huang and Min-Chie Jeng.
Modified by Paolo Nenzi 2002
File: bsim3v1aext.h
**********/
extern int BSIM3v1AacLoad(GENmodel *,CKTcircuit*);
extern int BSIM3v1Aask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*);
extern int BSIM3v1AconvTest(GENmodel *,CKTcircuit*);
extern int BSIM3v1Adelete(GENmodel*,IFuid,GENinstance**);
extern void BSIM3v1Adestroy(GENmodel**);
extern int BSIM3v1Agetic(GENmodel*,CKTcircuit*);
extern int BSIM3v1Aload(GENmodel*,CKTcircuit*);
extern int BSIM3v1AmAsk(CKTcircuit*,GENmodel *,int, IFvalue*);
extern int BSIM3v1AmDelete(GENmodel**,IFuid,GENmodel*);
extern int BSIM3v1AmParam(int,IFvalue*,GENmodel*);
extern void BSIM3v1AmosCap(CKTcircuit*, double, double, double, double,
double, double, double, double, double, double, double,
double, double, double, double, double, double, double*,
double*, double*, double*, double*, double*, double*, double*,
double*, double*, double*, double*, double*, double*, double*,
double*);
extern int BSIM3v1Aparam(int,IFvalue*,GENinstance*,IFvalue*);
extern int BSIM3v1ApzLoad(GENmodel*,CKTcircuit*,SPcomplex*);
extern int BSIM3v1Asetup(SMPmatrix*,GENmodel*,CKTcircuit*,int*);
extern int BSIM3v1Atemp(GENmodel*,CKTcircuit*);
extern int BSIM3v1Atrunc(GENmodel*,CKTcircuit*,double*);
extern int BSIM3v1Anoise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*);
extern int BSIM3v1Aunsetup(GENmodel *, CKTcircuit *);

85
src/spicelib/devices/bsim3v1a/bsim3v1ainit.c
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@ -1,85 +0,0 @@
#include "config.h"
#include "devdefs.h"
#include "bsim3v1aitf.h"
#include "bsim3v1aext.h"
#include "bsim3v1ainit.h"
SPICEdev B3v1Ainfo = {
{
"BSIM3v1A",
"Berkeley Short Channel IGFET Model Version-3 (3.1 Alan)",
&BSIM3v1AnSize,
&BSIM3v1AnSize,
BSIM3v1Anames,
&BSIM3v1ApTSize,
BSIM3v1ApTable,
&BSIM3v1AmPTSize,
BSIM3v1AmPTable,
#ifdef XSPICE
/*---- Fixed by SDB 5.2.2003 to enable XSPICE/tclspice integration -----*/
NULL, /* This is a SPICE device, it has no MIF info data */
0, /* This is a SPICE device, it has no MIF info data */
NULL, /* This is a SPICE device, it has no MIF info data */
0, /* This is a SPICE device, it has no MIF info data */
NULL, /* This is a SPICE device, it has no MIF info data */
0, /* This is a SPICE device, it has no MIF info data */
NULL, /* This is a SPICE device, it has no MIF info data */
/*--------------------------- End of SDB fix -------------------------*/
#endif
DEV_DEFAULT,
},
/* DEVparam */ BSIM3v1Aparam,
/* DEVmodParam */ BSIM3v1AmParam,
/* DEVload */ BSIM3v1Aload,
/* DEVsetup */ BSIM3v1Asetup,
/* DEVunsetup */ BSIM3v1Aunsetup,
/* DEVpzSetup */ BSIM3v1Asetup,
/* DEVtemperature*/ BSIM3v1Atemp,
/* DEVtrunc */ BSIM3v1Atrunc,
/* DEVfindBranch */ NULL,
/* DEVacLoad */ BSIM3v1AacLoad,
/* DEVaccept */ NULL,
/* DEVdestroy */ BSIM3v1Adestroy,
/* DEVmodDelete */ BSIM3v1AmDelete,
/* DEVdelete */ BSIM3v1Adelete,
/* DEVsetic */ BSIM3v1Agetic,
/* DEVask */ BSIM3v1Aask,
/* DEVmodAsk */ BSIM3v1AmAsk,
/* DEVpzLoad */ BSIM3v1ApzLoad,
/* DEVconvTest */ BSIM3v1AconvTest,
/* DEVsenSetup */ NULL,
/* DEVsenLoad */ NULL,
/* DEVsenUpdate */ NULL,
/* DEVsenAcLoad */ NULL,
/* DEVsenPrint */ NULL,
/* DEVsenTrunc */ NULL,
/* DEVdisto */ NULL,
/* DEVnoise */ BSIM3v1Anoise,
#ifdef CIDER
/* DEVdump */ NULL,
/* DEVacct */ NULL,
#endif
/* DEVinstSize */ &BSIM3v1AiSize,
/* DEVmodSize */ &BSIM3v1AmSize
};
SPICEdev *
get_bsim3v1a_info(void)
{
return &B3v1Ainfo;
}

13
src/spicelib/devices/bsim3v1a/bsim3v1ainit.h
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#ifndef _BSIM3v1AINIT_H
#define _BSIM3v1AINIT_H
extern IFparm BSIM3v1ApTable[ ];
extern IFparm BSIM3v1AmPTable[ ];
extern char *BSIM3v1Anames[ ];
extern int BSIM3v1ApTSize;
extern int BSIM3v1AmPTSize;
extern int BSIM3v1AnSize;
extern int BSIM3v1AiSize;
extern int BSIM3v1AmSize;
#endif

14
src/spicelib/devices/bsim3v1a/bsim3v1aitf.h
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@ -1,14 +0,0 @@
/**********
Copyright 1990 Regents of the University of California. All rights reserved.
Author: 1991 JianHui Huang and Min-Chie Jeng.
Modified by Paolo Nenzi 2002
File: bsim3itf.h
**********/
#ifndef DEV_BSIM3v1A
#define DEV_BSIM3v1A
SPICEdev *get_bsim3v1a_info(void);
#endif