fix 4v5 4v7 and 4 itself, FIXME completetly untested commit
This commit is contained in:
parent
2e7a677177
commit
6446858a6c
|
|
@ -2719,6 +2719,24 @@ CKTcircuit *ckt)
|
|||
CKTdltNNum(ckt, here->BSIM4sNodePrime);
|
||||
here->BSIM4sNodePrime = 0;
|
||||
}
|
||||
if (here->BSIM4sbNode
|
||||
&& here->BSIM4sbNode != here->BSIM4bNode)
|
||||
{
|
||||
CKTdltNNum(ckt, here->BSIM4sbNode);
|
||||
here->BSIM4sbNode = 0;
|
||||
}
|
||||
if (here->BSIM4bNodePrime
|
||||
&& here->BSIM4bNodePrime != here->BSIM4bNode)
|
||||
{
|
||||
CKTdltNNum(ckt, here->BSIM4bNodePrime);
|
||||
here->BSIM4bNodePrime = 0;
|
||||
}
|
||||
if (here->BSIM4dbNode
|
||||
&& here->BSIM4dbNode != here->BSIM4bNode)
|
||||
{
|
||||
CKTdltNNum(ckt, here->BSIM4dbNode);
|
||||
here->BSIM4dbNode = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -2145,6 +2145,24 @@ BSIM4v5unsetup(
|
|||
CKTdltNNum(ckt, here->BSIM4v5sNodePrime);
|
||||
here->BSIM4v5sNodePrime = 0;
|
||||
}
|
||||
if (here->BSIM4v5sbNode
|
||||
&& here->BSIM4v5sbNode != here->BSIM4v5bNode)
|
||||
{
|
||||
CKTdltNNum(ckt, here->BSIM4v5sbNode);
|
||||
here->BSIM4v5sbNode = 0;
|
||||
}
|
||||
if (here->BSIM4v5bNodePrime
|
||||
&& here->BSIM4v5bNodePrime != here->BSIM4v5bNode)
|
||||
{
|
||||
CKTdltNNum(ckt, here->BSIM4v5bNodePrime);
|
||||
here->BSIM4v5bNodePrime = 0;
|
||||
}
|
||||
if (here->BSIM4v5dbNode
|
||||
&& here->BSIM4v5dbNode != here->BSIM4v5bNode)
|
||||
{
|
||||
CKTdltNNum(ckt, here->BSIM4v5dbNode);
|
||||
here->BSIM4v5dbNode = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -2635,6 +2635,24 @@ CKTcircuit *ckt)
|
|||
CKTdltNNum(ckt, here->BSIM4v7sNodePrime);
|
||||
here->BSIM4v7sNodePrime = 0;
|
||||
}
|
||||
if (here->BSIM4v7sbNode
|
||||
&& here->BSIM4v7sbNode != here->BSIM4v7bNode)
|
||||
{
|
||||
CKTdltNNum(ckt, here->BSIM4v7sbNode);
|
||||
here->BSIM4v7sbNode = 0;
|
||||
}
|
||||
if (here->BSIM4v7bNodePrime
|
||||
&& here->BSIM4v7bNodePrime != here->BSIM4v7bNode)
|
||||
{
|
||||
CKTdltNNum(ckt, here->BSIM4v7bNodePrime);
|
||||
here->BSIM4v7bNodePrime = 0;
|
||||
}
|
||||
if (here->BSIM4v7dbNode
|
||||
&& here->BSIM4v7dbNode != here->BSIM4v7bNode)
|
||||
{
|
||||
CKTdltNNum(ckt, here->BSIM4v7dbNode);
|
||||
here->BSIM4v7dbNode = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue