Add a simple quasi saturation model according to V. d'Alessandro e.a., 2001

This commit is contained in:
Holger Vogt 2018-04-28 16:21:28 +02:00 committed by rlar
parent 72e03e7eab
commit 63be243f72
5 changed files with 46 additions and 1 deletions

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@ -79,6 +79,9 @@ IFparm VDMOSmPTable[] = { /* model parameters */
IOP("rs", VDMOS_MOD_RS, IF_REAL, "Source ohmic resistance"),
IOP("rg", VDMOS_MOD_RG, IF_REAL, "Gate ohmic resistance"),
/* quasi saturation */
IOP("rq", VDMOS_MOD_RQ, IF_REAL, "Quasi saturation resistance fitting parameter"),
IOP("vq", VDMOS_MOD_VQ, IF_REAL, "Quasi saturation voltage fitting parameter"),
IOP("mtriode", VDMOS_MOD_MTRIODE, IF_REAL, "Conductance multiplier in triode region"),
/* weak inversion */

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@ -319,7 +319,8 @@ typedef struct sVDMOSmodel { /* model structure for a resistor */
double VDMOSdrainResistance;
double VDMOSsourceResistance;
double VDMOSgateResistance;
double VDMOSsheetResistance;
double VDMOSqsResistance;
double VDMOSqsVoltage;
double VDMOStransconductance; /* input - use tTransconductance */
double VDMOSoxideCapFactor;
double VDMOSvt0; /* input - use tVto */
@ -363,6 +364,9 @@ typedef struct sVDMOSmodel { /* model structure for a resistor */
unsigned VDMOSdrainResistanceGiven :1;
unsigned VDMOSsourceResistanceGiven :1;
unsigned VDMOSgateResistanceGiven :1;
unsigned VDMOSqsResistanceGiven :1;
unsigned VDMOSqsVoltageGiven :1;
unsigned VDMOSqsGiven :1;
unsigned VDMOStransconductanceGiven :1;
unsigned VDMOSvt0Given :1;
unsigned VDIOgradCoeffGiven :1;
@ -426,6 +430,8 @@ enum {
VDMOS_MOD_RD,
VDMOS_MOD_RS,
VDMOS_MOD_RG,
VDMOS_MOD_RQ,
VDMOS_MOD_VQ,
VDMOS_MOD_IS,
VDMOS_MOD_VJ,
VDMOS_MOD_CJ,

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@ -590,6 +590,24 @@ bypass :
(ceqbd - cdreq + model->VDMOStype * ceqgd);
*(ckt->CKTrhs + here->VDMOSsNodePrime) +=
cdreq + ceqbs + model->VDMOStype * ceqgs;
/* quasi saturation
* according to Vincenzo d'Alessandro's Quasi-Saturation Model, simplified:
V. D'Alessandro, F. Frisina, N. Rinaldi: A New SPICE Model of VDMOS Transistors
Including Thermal and Quasi-saturation Effects, 9th European Conference on Power
Electronics and applications (EPE), Graz, Austria, August 2001, pp. P.1 P.10.
*/
if (model->VDMOSqsGiven && (here->VDMOSmode == 1)) {
double vdsn = model->VDMOStype * (
*(ckt->CKTrhsOld + here->VDMOSdNode) -
*(ckt->CKTrhsOld + here->VDMOSsNode));
double rd = model->VDMOSdrainResistance + model->VDMOSqsResistance *
(vdsn / (vdsn + fabs(model->VDMOSqsVoltage)));
here->VDMOSdrainConductance = 1 / rd;
}
/*
* load y matrix
*/

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@ -45,6 +45,12 @@ VDMOSmAsk(CKTcircuit *ckt, GENmodel *inst, int which, IFvalue *value)
case VDMOS_MOD_RG:
value->rValue = model->VDMOSgateResistance;
return(OK);
case VDMOS_MOD_RQ:
value->rValue = model->VDMOSqsResistance;
return(OK);
case VDMOS_MOD_VQ:
value->rValue = model->VDMOSqsVoltage;
return(OK);
case VDMOS_MOD_MTRIODE:
value->rValue = model->VDMOSmtr;
return(OK);

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@ -47,6 +47,18 @@ VDMOSmParam(int param, IFvalue *value, GENmodel *inModel)
model->VDMOSgateResistance = value->rValue;
model->VDMOSgateResistanceGiven = TRUE;
break;
case VDMOS_MOD_RQ:
model->VDMOSqsResistance = value->rValue;
model->VDMOSqsResistanceGiven = TRUE;
if (model->VDMOSqsVoltageGiven)
model->VDMOSqsGiven = TRUE;
break;
case VDMOS_MOD_VQ:
model->VDMOSqsVoltage = value->rValue;
model->VDMOSqsVoltageGiven = TRUE;
if (model->VDMOSqsResistanceGiven)
model->VDMOSqsGiven = TRUE;
break;
case VDMOS_MOD_RB:
model->VDIOresistance = value->rValue;
model->VDIOresistanceGiven = TRUE;