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BSIM4unsetup(), "gate" and "midgate"

This commit is contained in:
rlar 2017-01-05 18:20:04 +01:00
parent ce9422fb51
commit 5f690006fc
4 changed files with 50 additions and 0 deletions
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12
src/spicelib/devices/bsim4/b4set.c
View File

@ -2737,6 +2737,18 @@ CKTcircuit *ckt)
CKTdltNNum(ckt, here->BSIM4dbNode);
here->BSIM4dbNode = 0;
}
if (here->BSIM4gNodePrime
&& here->BSIM4gNodePrime != here->BSIM4gNodeExt)
{
CKTdltNNum(ckt, here->BSIM4gNodePrime);
here->BSIM4gNodePrime = 0;
}
if (here->BSIM4gNodeMid
&& here->BSIM4gNodeMid != here->BSIM4gNodeExt)
{
CKTdltNNum(ckt, here->BSIM4gNodeMid);
here->BSIM4gNodeMid = 0;
}
if (here->BSIM4qNode)
{
CKTdltNNum(ckt, here->BSIM4qNode);

12
src/spicelib/devices/bsim4v5/b4v5set.c
View File

@ -2163,6 +2163,18 @@ BSIM4v5unsetup(
CKTdltNNum(ckt, here->BSIM4v5dbNode);
here->BSIM4v5dbNode = 0;
}
if (here->BSIM4v5gNodePrime
&& here->BSIM4v5gNodePrime != here->BSIM4v5gNodeExt)
{
CKTdltNNum(ckt, here->BSIM4v5gNodePrime);
here->BSIM4v5gNodePrime = 0;
}
if (here->BSIM4v5gNodeMid
&& here->BSIM4v5gNodeMid != here->BSIM4v5gNodeExt)
{
CKTdltNNum(ckt, here->BSIM4v5gNodeMid);
here->BSIM4v5gNodeMid = 0;
}
if (here->BSIM4v5qNode)
{
CKTdltNNum(ckt, here->BSIM4v5qNode);

14
src/spicelib/devices/bsim4v6/b4v6set.c
View File

@ -2500,6 +2500,20 @@ BSIM4v6unsetup(GENmodel *inModel, CKTcircuit *ckt)
here->BSIM4v6dbNode = 0;
}
if (here->BSIM4v6gNodePrime
&& here->BSIM4v6gNodePrime != here->BSIM4v6gNodeExt)
{
CKTdltNNum(ckt, here->BSIM4v6gNodePrime);
here->BSIM4v6gNodePrime = 0;
}
if (here->BSIM4v6gNodeMid
&& here->BSIM4v6gNodeMid != here->BSIM4v6gNodeExt)
{
CKTdltNNum(ckt, here->BSIM4v6gNodeMid);
here->BSIM4v6gNodeMid = 0;
}
if (here->BSIM4v6qNode)
{
CKTdltNNum(ckt, here->BSIM4v6qNode);

12
src/spicelib/devices/bsim4v7/b4v7set.c
View File

@ -2653,6 +2653,18 @@ CKTcircuit *ckt)
CKTdltNNum(ckt, here->BSIM4v7dbNode);
here->BSIM4v7dbNode = 0;
}
if (here->BSIM4v7gNodePrime
&& here->BSIM4v7gNodePrime != here->BSIM4v7gNodeExt)
{
CKTdltNNum(ckt, here->BSIM4v7gNodePrime);
here->BSIM4v7gNodePrime = 0;
}
if (here->BSIM4v7gNodeMid
&& here->BSIM4v7gNodeMid != here->BSIM4v7gNodeExt)
{
CKTdltNNum(ckt, here->BSIM4v7gNodeMid);
here->BSIM4v7gNodeMid = 0;
}
if (here->BSIM4v7qNode)
{
CKTdltNNum(ckt, here->BSIM4v7qNode);