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Merge branch 'pre-master-46' into bt_dev

This commit is contained in:
Brian Taylor 2025-12-25 04:52:44 -08:00
parent e29452bdab a984a43b61
commit 5dd6059e83
10 changed files with 90 additions and 54 deletions
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2
examples/transient-noise/noi-ring51-demo.cir
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@ -1,5 +1,5 @@
* 51 stage Ring-Osc. BSIM3, transient noise
* will need 90 sec on a i7 860 with 4 threads
* will need 20 sec on a i9 9900K with 8 threads
* for better noise analysis simulation time may be made larger than 200n
* closes the loop between inverters xinv1 and xinv5

3
src/include/ngspice/cktdefs.h
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@ -161,8 +161,7 @@ struct CKTcircuit {
/* This define should be somewhere else ??? */
#define NODENAME(ckt,nodenum) CKTnodName(ckt,nodenum)
int CKTnumStates; /* Number of sates effectively valid
??? */
int CKTnumStates; /* Number of states summed up over all device instances */
long CKTmode; /* Mode of operation of the circuit
??? */

12
src/osdi/osdiparam.c
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@ -27,7 +27,7 @@ static int osdi_param_access(OsdiParamOpvar *param_info, bool write_value,
len = sizeof(double);
if (param_info->len) {
len *= param_info->len;
val_ptr = &value->v.vec.rVec;
val_ptr = value->v.vec.rVec;
} else {
val_ptr = &value->rValue;
}
@ -36,7 +36,7 @@ static int osdi_param_access(OsdiParamOpvar *param_info, bool write_value,
len = sizeof(int);
if (param_info->len) {
len *= param_info->len;
val_ptr = &value->v.vec.iVec;
val_ptr = value->v.vec.iVec;
} else {
val_ptr = &value->iValue;
}
@ -45,7 +45,7 @@ static int osdi_param_access(OsdiParamOpvar *param_info, bool write_value,
len = sizeof(char *);
if (param_info->len) {
len *= param_info->len;
val_ptr = &value->v.vec.cVec;
val_ptr = value->v.vec.cVec;
} else {
val_ptr = &value->cValue;
}
@ -64,7 +64,9 @@ static int osdi_param_access(OsdiParamOpvar *param_info, bool write_value,
static int osdi_write_param(void *dst, IFvalue *value, int param,
const OsdiDescriptor *descr) {
if (dst == NULL) {
// value may be NULL as a result of a bad parse from INPgetValue
// catch it before dereferencing it
if (dst == NULL || value == NULL) {
return (E_PANIC);
}
@ -127,7 +129,7 @@ extern int OSDImParam(int param, IFvalue *value, GENmodel *modelPtr) {
static int osdi_read_param(void *src, IFvalue *value, int id,
const OsdiDescriptor *descr) {
if (src == NULL) {
if (src == NULL || value == NULL) {
return (E_PANIC);
}

10
src/spicelib/devices/bjt/bjtdefs.h
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@ -380,12 +380,12 @@ typedef struct sBJTinstance {
#define BJTnumStates 33
#define BJTsensxpbe BJTstate+24 /* charge sensitivities and their
derivatives. +25 for the derivatives -
#define BJTsensxpbe BJTstate+33 /* charge sensitivities and their
derivatives. +34 for the derivatives -
pointer to the beginning of the array */
#define BJTsensxpbc BJTstate+26
#define BJTsensxpsub BJTstate+28
#define BJTsensxpbx BJTstate+30
#define BJTsensxpbc BJTstate+35
#define BJTsensxpsub BJTstate+37
#define BJTsensxpbx BJTstate+39
#define BJTnumSenStates 8

6
src/spicelib/devices/dev.c
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@ -583,10 +583,10 @@ static int osdi_add_device(int n, OsdiRegistryEntry *devs) {
DEVicesfl = TREALLOC(int, DEVicesfl, dnum);
#endif
for (i = 0; i < n; i++) {
#ifdef TRACE
printf("Added device: %s\n", devs[i]->DEVpublic.name);
#endif
DEVices[DEVNUM + i] = osdi_create_spicedev(&devs[i]);
#ifdef TRACE
printf("Added device: %s\n", DEVices[DEVNUM + i]->DEVpublic.name);
#endif
}
DEVNUM += n;
relink();

18
src/spicelib/devices/dio/dio.c
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@ -52,10 +52,10 @@ IFparm DIOmPTable[] = { /* model parameters */
IOP( "jsw", DIO_MOD_JSW, IF_REAL, "Sidewall Saturation current"),
IOPR( "isw", DIO_MOD_JSW, IF_REAL, "Sidewall Saturation current"),
IOPU( "tnom",DIO_MOD_TNOM,IF_REAL, "Parameter measurement temperature"),
IOPXU( "tnom",DIO_MOD_TNOM,IF_REAL, "Parameter measurement temperature"),
IOPUR("tref",DIO_MOD_TNOM,IF_REAL, "Parameter measurement temperature"),
IOP( "rs", DIO_MOD_RS, IF_REAL, "Ohmic resistance"),
IOP( "rsw", DIO_MOD_RSW, IF_REAL, "Ohmic resistance sidewall"),
IOPX( "rsw", DIO_MOD_RSW, IF_REAL, "Ohmic resistance sidewall"),
IOP( "trs", DIO_MOD_TRS, IF_REAL, "Ohmic resistance 1st order temp. coeff."),
IOPR( "trs1", DIO_MOD_TRS, IF_REAL, "Ohmic resistance 1st order temp. coeff."),
IOP( "trs2", DIO_MOD_TRS2, IF_REAL, "Ohmic resistance 2nd order temp. coeff."),
@ -124,15 +124,15 @@ IFparm DIOmPTable[] = { /* model parameters */
IOP( "nr", DIO_MOD_NR, IF_REAL, "Recombination current emission coefficient"),
/* SOA parameters */
IOP( "fv_max", DIO_MOD_FV_MAX, IF_REAL, "maximum voltage in forward direction"),
IOP( "bv_max", DIO_MOD_BV_MAX, IF_REAL, "maximum voltage in reverse direction"),
IOP( "id_max", DIO_MOD_ID_MAX, IF_REAL, "maximum current"),
IOP( "te_max", DIO_MOD_TE_MAX, IF_REAL, "temperature"),
IOP( "pd_max", DIO_MOD_PD_MAX, IF_REAL, "maximum power dissipation"),
IOPX( "fv_max", DIO_MOD_FV_MAX, IF_REAL, "maximum voltage in forward direction"),
IOPX( "bv_max", DIO_MOD_BV_MAX, IF_REAL, "maximum voltage in reverse direction"),
IOPX( "id_max", DIO_MOD_ID_MAX, IF_REAL, "maximum current"),
IOPX( "te_max", DIO_MOD_TE_MAX, IF_REAL, "temperature"),
IOPX( "pd_max", DIO_MOD_PD_MAX, IF_REAL, "maximum power dissipation"),
/* self heating */
IOP("rth0", DIO_MOD_RTH0, IF_REAL, "Self-heating thermal resistance"),
IOP("cth0", DIO_MOD_CTH0, IF_REAL, "Self-heating thermal capacitance"),
IOPX("rth0", DIO_MOD_RTH0, IF_REAL, "Self-heating thermal resistance"),
IOPX("cth0", DIO_MOD_CTH0, IF_REAL, "Self-heating thermal capacitance"),
/* scaled parasitic capacitances level 3 model */
IOP( "lm", DIO_MOD_LM, IF_REAL, "Length of metal capacitor (level=3)"),
IOP( "lp", DIO_MOD_LP, IF_REAL, "Length of polysilicon capacitor (level=3)"),

12
src/spicelib/devices/dio/dioask.c
View File

@ -48,6 +48,18 @@ DIOask (CKTcircuit *ckt, GENinstance *inst, int which, IFvalue *value,
case DIO_M:
value->rValue = here->DIOm;
return(OK);
case DIO_LM:
value->rValue = here->DIOlengthMetal;
return(OK);
case DIO_LP:
value->rValue = here->DIOlengthPoly;
return(OK);
case DIO_WM:
value->rValue = here->DIOwidthMetal;
return(OK);
case DIO_WP:
value->rValue = here->DIOwidthPoly;
return(OK);
case DIO_THERMAL:
value->iValue = here->DIOthermal;
return(OK);

66
src/spicelib/devices/dio/diobindCSC.c
View File

@ -32,12 +32,14 @@ DIObindCSC (GENmodel *inModel, CKTcircuit *ckt)
CREATE_KLU_BINDING_TABLE(DIOposPosPtr, DIOposPosBinding, DIOposNode, DIOposNode);
CREATE_KLU_BINDING_TABLE(DIOnegNegPtr, DIOnegNegBinding, DIOnegNode, DIOnegNode);
CREATE_KLU_BINDING_TABLE(DIOposPrimePosPrimePtr, DIOposPrimePosPrimeBinding, DIOposPrimeNode, DIOposPrimeNode);
/* separate sidewall */
CREATE_KLU_BINDING_TABLE(DIOposPosSwPrimePtr,DIOposPosSwPrimeBinding,DIOposNode,DIOposSwPrimeNode);
CREATE_KLU_BINDING_TABLE(DIOnegPosSwPrimePtr,DIOnegPosSwPrimeBinding,DIOnegNode,DIOposSwPrimeNode);
CREATE_KLU_BINDING_TABLE(DIOposSwPrimePosPtr,DIOposSwPrimePosBinding,DIOposSwPrimeNode,DIOposNode);
CREATE_KLU_BINDING_TABLE(DIOposSwPrimeNegPtr,DIOposSwPrimeNegBinding,DIOposSwPrimeNode,DIOnegNode);
CREATE_KLU_BINDING_TABLE(DIOposSwPrimePosSwPrimePtr,DIOposSwPrimePosSwPrimeBinding,DIOposSwPrimeNode,DIOposSwPrimeNode);
if(model->DIOresistSWGiven) {
/* separate sidewall */
CREATE_KLU_BINDING_TABLE(DIOposPosSwPrimePtr,DIOposPosSwPrimeBinding,DIOposNode,DIOposSwPrimeNode);
CREATE_KLU_BINDING_TABLE(DIOnegPosSwPrimePtr,DIOnegPosSwPrimeBinding,DIOnegNode,DIOposSwPrimeNode);
CREATE_KLU_BINDING_TABLE(DIOposSwPrimePosPtr,DIOposSwPrimePosBinding,DIOposSwPrimeNode,DIOposNode);
CREATE_KLU_BINDING_TABLE(DIOposSwPrimeNegPtr,DIOposSwPrimeNegBinding,DIOposSwPrimeNode,DIOnegNode);
CREATE_KLU_BINDING_TABLE(DIOposSwPrimePosSwPrimePtr,DIOposSwPrimePosSwPrimeBinding,DIOposSwPrimeNode,DIOposSwPrimeNode);
}
if ((here->DIOtempNode > 0) && (here->DIOthermal) && (model->DIOrth0Given)) {
CREATE_KLU_BINDING_TABLE(DIOtempPosPtr, DIOtempPosBinding, DIOtempNode, DIOposNode);
CREATE_KLU_BINDING_TABLE(DIOtempPosPrimePtr, DIOtempPosPrimeBinding, DIOtempNode, DIOposPrimeNode);
@ -46,9 +48,11 @@ DIObindCSC (GENmodel *inModel, CKTcircuit *ckt)
CREATE_KLU_BINDING_TABLE(DIOposTempPtr, DIOposTempBinding, DIOposNode, DIOtempNode);
CREATE_KLU_BINDING_TABLE(DIOposPrimeTempPtr, DIOposPrimeTempBinding, DIOposPrimeNode, DIOtempNode);
CREATE_KLU_BINDING_TABLE(DIOnegTempPtr, DIOnegTempBinding, DIOnegNode, DIOtempNode);
/* separate sidewall */
CREATE_KLU_BINDING_TABLE(DIOtempPosSwPrimePtr, DIOtempPosSwPrimeBinding, DIOtempNode, DIOposSwPrimeNode);
CREATE_KLU_BINDING_TABLE(DIOposSwPrimeTempPtr, DIOposSwPrimeTempBinding, DIOposSwPrimeNode, DIOtempNode);
if(model->DIOresistSWGiven) {
/* separate sidewall */
CREATE_KLU_BINDING_TABLE(DIOtempPosSwPrimePtr, DIOtempPosSwPrimeBinding, DIOtempNode, DIOposSwPrimeNode);
CREATE_KLU_BINDING_TABLE(DIOposSwPrimeTempPtr, DIOposSwPrimeTempBinding, DIOposSwPrimeNode, DIOtempNode);
}
}
}
}
@ -77,12 +81,14 @@ DIObindCSCComplex (GENmodel *inModel, CKTcircuit *ckt)
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOposPosPtr, DIOposPosBinding, DIOposNode, DIOposNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOnegNegPtr, DIOnegNegBinding, DIOnegNode, DIOnegNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOposPrimePosPrimePtr, DIOposPrimePosPrimeBinding, DIOposPrimeNode, DIOposPrimeNode);
/* separate sidewall */
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOposPosSwPrimePtr,DIOposPosSwPrimeBinding,DIOposNode,DIOposSwPrimeNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOnegPosSwPrimePtr,DIOnegPosSwPrimeBinding,DIOnegNode,DIOposSwPrimeNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOposSwPrimePosPtr,DIOposSwPrimePosBinding,DIOposSwPrimeNode,DIOposNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOposSwPrimeNegPtr,DIOposSwPrimeNegBinding,DIOposSwPrimeNode,DIOnegNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOposSwPrimePosSwPrimePtr,DIOposSwPrimePosSwPrimeBinding,DIOposSwPrimeNode,DIOposSwPrimeNode);
if(model->DIOresistSWGiven) {
/* separate sidewall */
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOposPosSwPrimePtr,DIOposPosSwPrimeBinding,DIOposNode,DIOposSwPrimeNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOnegPosSwPrimePtr,DIOnegPosSwPrimeBinding,DIOnegNode,DIOposSwPrimeNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOposSwPrimePosPtr,DIOposSwPrimePosBinding,DIOposSwPrimeNode,DIOposNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOposSwPrimeNegPtr,DIOposSwPrimeNegBinding,DIOposSwPrimeNode,DIOnegNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOposSwPrimePosSwPrimePtr,DIOposSwPrimePosSwPrimeBinding,DIOposSwPrimeNode,DIOposSwPrimeNode);
}
if ((here->DIOtempNode > 0) && (here->DIOthermal) && (model->DIOrth0Given)) {
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOtempPosPtr, DIOtempPosBinding, DIOtempNode, DIOposNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOtempPosPrimePtr, DIOtempPosPrimeBinding, DIOtempNode, DIOposPrimeNode);
@ -91,9 +97,11 @@ DIObindCSCComplex (GENmodel *inModel, CKTcircuit *ckt)
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOposTempPtr, DIOposTempBinding, DIOposNode, DIOtempNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOposPrimeTempPtr, DIOposPrimeTempBinding, DIOposPrimeNode, DIOtempNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOnegTempPtr, DIOnegTempBinding, DIOnegNode, DIOtempNode);
/* separate sidewall */
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOtempPosSwPrimePtr, DIOtempPosSwPrimeBinding, DIOtempNode, DIOposSwPrimeNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOposSwPrimeTempPtr, DIOposSwPrimeTempBinding, DIOposSwPrimeNode, DIOtempNode);
if(model->DIOresistSWGiven) {
/* separate sidewall */
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOtempPosSwPrimePtr, DIOtempPosSwPrimeBinding, DIOtempNode, DIOposSwPrimeNode);
CONVERT_KLU_BINDING_TABLE_TO_COMPLEX(DIOposSwPrimeTempPtr, DIOposSwPrimeTempBinding, DIOposSwPrimeNode, DIOtempNode);
}
}
}
}
@ -122,12 +130,14 @@ DIObindCSCComplexToReal (GENmodel *inModel, CKTcircuit *ckt)
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOposPosPtr, DIOposPosBinding, DIOposNode, DIOposNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOnegNegPtr, DIOnegNegBinding, DIOnegNode, DIOnegNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOposPrimePosPrimePtr, DIOposPrimePosPrimeBinding, DIOposPrimeNode, DIOposPrimeNode);
/* separate sidewall */
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOposPosSwPrimePtr,DIOposPosSwPrimeBinding,DIOposNode,DIOposSwPrimeNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOnegPosSwPrimePtr,DIOnegPosSwPrimeBinding,DIOnegNode,DIOposSwPrimeNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOposSwPrimePosPtr,DIOposSwPrimePosBinding,DIOposSwPrimeNode,DIOposNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOposSwPrimeNegPtr,DIOposSwPrimeNegBinding,DIOposSwPrimeNode,DIOnegNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOposSwPrimePosSwPrimePtr,DIOposSwPrimePosSwPrimeBinding,DIOposSwPrimeNode,DIOposSwPrimeNode);
if(model->DIOresistSWGiven) {
/* separate sidewall */
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOposPosSwPrimePtr,DIOposPosSwPrimeBinding,DIOposNode,DIOposSwPrimeNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOnegPosSwPrimePtr,DIOnegPosSwPrimeBinding,DIOnegNode,DIOposSwPrimeNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOposSwPrimePosPtr,DIOposSwPrimePosBinding,DIOposSwPrimeNode,DIOposNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOposSwPrimeNegPtr,DIOposSwPrimeNegBinding,DIOposSwPrimeNode,DIOnegNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOposSwPrimePosSwPrimePtr,DIOposSwPrimePosSwPrimeBinding,DIOposSwPrimeNode,DIOposSwPrimeNode);
}
if ((here->DIOtempNode > 0) && (here->DIOthermal) && (model->DIOrth0Given)) {
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOtempPosPtr, DIOtempPosBinding, DIOtempNode, DIOposNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOtempPosPrimePtr, DIOtempPosPrimeBinding, DIOtempNode, DIOposPrimeNode);
@ -136,9 +146,11 @@ DIObindCSCComplexToReal (GENmodel *inModel, CKTcircuit *ckt)
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOposTempPtr, DIOposTempBinding, DIOposNode, DIOtempNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOposPrimeTempPtr, DIOposPrimeTempBinding, DIOposPrimeNode, DIOtempNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOnegTempPtr, DIOnegTempBinding, DIOnegNode, DIOtempNode);
/* separate sidewall */
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOtempPosSwPrimePtr, DIOtempPosSwPrimeBinding, DIOtempNode, DIOposSwPrimeNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOposSwPrimeTempPtr, DIOposSwPrimeTempBinding, DIOposSwPrimeNode, DIOtempNode);
if(model->DIOresistSWGiven) {
/* separate sidewall */
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOtempPosSwPrimePtr, DIOtempPosSwPrimeBinding, DIOtempNode, DIOposSwPrimeNode);
CONVERT_KLU_BINDING_TABLE_TO_REAL(DIOposSwPrimeTempPtr, DIOposSwPrimeTempBinding, DIOposSwPrimeNode, DIOtempNode);
}
}
}
}

4
src/spicelib/devices/dio/diodefs.h
View File

@ -265,8 +265,8 @@ typedef struct sDIOinstance {
#define DIOnumStates 15
#define DIOsensxp DIOstate+12 /* charge sensitivities and their derivatives.
* +10 for the derivatives - pointer to the
#define DIOsensxp DIOstate+15 /* charge sensitivities and their derivatives.
* +16 for the derivatives - pointer to the
* beginning of the array */
#define DIOnumSenStates 2

11
src/spicelib/parser/inpgmod.c
View File

@ -117,9 +117,11 @@ create_model(CKTcircuit *ckt, INPmodel *modtmp, INPtables *tab)
#ifdef OSDI
/* osdi models don't accept their device type as an argument */
bool is_osdi = false;
if (device->registry_entry){
INPgetNetTok(&line, &parm, 1); /* throw away osdi */
tfree(parm);
is_osdi = true;
}
#endif
@ -133,6 +135,15 @@ create_model(CKTcircuit *ckt, INPmodel *modtmp, INPtables *tab)
IFparm *p = find_model_parameter(parm, device);
if (p) {
#ifdef OSDI
if (is_osdi && (p->dataType & IF_VECTOR)){
// we need to get rid if the leading [ in order to make sure
// that INPgetValue can parse the value properly
// This is because, unlike other SPICEDev, OSDI models receive
// array params in the syntax (param_name=[...])
++line;
}
#endif
IFvalue *val = INPgetValue(ckt, &line, p->dataType, tab);
error = ft_sim->setModelParm(ckt, modtmp->INPmodfast, p->id, val, NULL);
if (error)