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re-format for better readability, (whitespace only)

This commit is contained in:
Holger Vogt 2018-04-02 18:37:59 +02:00 committed by rlar
parent c0c3470dff
commit 5abe8a759b
4 changed files with 727 additions and 727 deletions
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2
src/spicelib/devices/vdmos/vdmosdefs.h
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@ -44,7 +44,7 @@ typedef struct sVDMOSinstance {
const int VDMOSbNode; /* number of the bulk node of the mosfet */
int VDMOSdNodePrime; /* number of the internal drain node of the mosfet */
int VDMOSsNodePrime; /* number of the internal source node of the mosfet */
double VDMOSm; /* parallel device multiplier */
double VDMOSl; /* the length of the channel region */

1216
src/spicelib/devices/vdmos/vdmosload.c
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File diff suppressed because it is too large Load Diff

228
src/spicelib/devices/vdmos/vdmosset.c
View File

@ -4,9 +4,9 @@ Author: 1985 Thomas L. Quarles
Modified: 2000 AlansFixes
**********/
/* load the VDMOS device structure with those pointers needed later
* for fast matrix loading
*/
/* load the VDMOS device structure with those pointers needed later
* for fast matrix loading
*/
#include "ngspice/ngspice.h"
#include "ngspice/smpdefs.h"
@ -17,7 +17,7 @@ Modified: 2000 AlansFixes
int
VDMOSsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
int *states)
int *states)
{
VDMOSmodel *model = (VDMOSmodel *)inModel;
VDMOSinstance *here;
@ -25,68 +25,68 @@ VDMOSsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
CKTnode *tmp;
/* loop through all the VDMOS device models */
for( ; model != NULL; model = VDMOSnextModel(model)) {
for (; model != NULL; model = VDMOSnextModel(model)) {
if(!model->VDMOStypeGiven) {
if (!model->VDMOStypeGiven) {
model->VDMOStype = NMOS;
}
if(!model->VDMOSlatDiffGiven) {
if (!model->VDMOSlatDiffGiven) {
model->VDMOSlatDiff = 0;
}
if(!model->VDMOSjctSatCurDensityGiven) {
if (!model->VDMOSjctSatCurDensityGiven) {
model->VDMOSjctSatCurDensity = 0;
}
if(!model->VDMOSjctSatCurGiven) {
if (!model->VDMOSjctSatCurGiven) {
model->VDMOSjctSatCur = 1e-14;
}
if(!model->VDMOStransconductanceGiven) {
if (!model->VDMOStransconductanceGiven) {
model->VDMOStransconductance = 2e-5;
}
if(!model->VDMOSgateSourceOverlapCapFactorGiven) {
if (!model->VDMOSgateSourceOverlapCapFactorGiven) {
model->VDMOSgateSourceOverlapCapFactor = 0;
}
if(!model->VDMOSgateDrainOverlapCapFactorGiven) {
if (!model->VDMOSgateDrainOverlapCapFactorGiven) {
model->VDMOSgateDrainOverlapCapFactor = 0;
}
if(!model->VDMOSgateBulkOverlapCapFactorGiven) {
if (!model->VDMOSgateBulkOverlapCapFactorGiven) {
model->VDMOSgateBulkOverlapCapFactor = 0;
}
if(!model->VDMOSvt0Given) {
if (!model->VDMOSvt0Given) {
model->VDMOSvt0 = 0;
}
if(!model->VDMOSbulkCapFactorGiven) {
if (!model->VDMOSbulkCapFactorGiven) {
model->VDMOSbulkCapFactor = 0;
}
if(!model->VDMOSsideWallCapFactorGiven) {
if (!model->VDMOSsideWallCapFactorGiven) {
model->VDMOSsideWallCapFactor = 0;
}
if(!model->VDMOSbulkJctPotentialGiven) {
if (!model->VDMOSbulkJctPotentialGiven) {
model->VDMOSbulkJctPotential = .8;
}
if(!model->VDMOSbulkJctBotGradingCoeffGiven) {
if (!model->VDMOSbulkJctBotGradingCoeffGiven) {
model->VDMOSbulkJctBotGradingCoeff = .5;
}
if(!model->VDMOSbulkJctSideGradingCoeffGiven) {
if (!model->VDMOSbulkJctSideGradingCoeffGiven) {
model->VDMOSbulkJctSideGradingCoeff = .5;
}
if(!model->VDMOSfwdCapDepCoeffGiven) {
if (!model->VDMOSfwdCapDepCoeffGiven) {
model->VDMOSfwdCapDepCoeff = .5;
}
if(!model->VDMOSphiGiven) {
if (!model->VDMOSphiGiven) {
model->VDMOSphi = .6;
}
if(!model->VDMOSlambdaGiven) {
if (!model->VDMOSlambdaGiven) {
model->VDMOSlambda = 0;
}
if(!model->VDMOSgammaGiven) {
if (!model->VDMOSgammaGiven) {
model->VDMOSgamma = 0;
}
if(!model->VDMOSfNcoefGiven) {
model->VDMOSfNcoef = 0;
}
if(!model->VDMOSfNexpGiven) {
model->VDMOSfNexp = 1;
}
if (!model->VDMOSfNcoefGiven) {
model->VDMOSfNcoef = 0;
}
if (!model->VDMOSfNexpGiven) {
model->VDMOSfNexp = 1;
}
if (!model->VDMOScgdminGiven) {
model->VDMOScgdmin = 0;
}
@ -101,118 +101,118 @@ VDMOSsetup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
}
/* loop through all the instances of the model */
for (here = VDMOSinstances(model); here != NULL ;
here=VDMOSnextInstance(here)) {
for (here = VDMOSinstances(model); here != NULL;
here = VDMOSnextInstance(here)) {
/* allocate a chunk of the state vector */
here->VDMOSstates = *states;
*states += VDMOSnumStates;
if(!here->VDMOSdrainPerimiterGiven) {
if (!here->VDMOSdrainPerimiterGiven) {
here->VDMOSdrainPerimiter = 0;
}
if(!here->VDMOSicVBSGiven) {
if (!here->VDMOSicVBSGiven) {
here->VDMOSicVBS = 0;
}
if(!here->VDMOSicVDSGiven) {
if (!here->VDMOSicVDSGiven) {
here->VDMOSicVDS = 0;
}
if(!here->VDMOSicVGSGiven) {
if (!here->VDMOSicVGSGiven) {
here->VDMOSicVGS = 0;
}
if(!here->VDMOSsourcePerimiterGiven) {
if (!here->VDMOSsourcePerimiterGiven) {
here->VDMOSsourcePerimiter = 0;
}
if(!here->VDMOSvdsatGiven) {
if (!here->VDMOSvdsatGiven) {
here->VDMOSvdsat = 0;
}
if(!here->VDMOSvonGiven) {
if (!here->VDMOSvonGiven) {
here->VDMOSvon = 0;
}
if(!here->VDMOSdrainSquaresGiven) {
here->VDMOSdrainSquares=1;
}
if(!here->VDMOSsourceSquaresGiven) {
here->VDMOSsourceSquares=1;
}
if (!here->VDMOSdrainSquaresGiven) {
here->VDMOSdrainSquares = 1;
}
if (!here->VDMOSsourceSquaresGiven) {
here->VDMOSsourceSquares = 1;
}
if ((model->VDMOSdrainResistance != 0
|| (model->VDMOSsheetResistance != 0
&& here->VDMOSdrainSquares != 0) )) {
|| (model->VDMOSsheetResistance != 0
&& here->VDMOSdrainSquares != 0))) {
if (here->VDMOSdNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->VDMOSname,"drain");
if(error) return(error);
here->VDMOSdNodePrime = tmp->number;
if (ckt->CKTcopyNodesets) {
CKTnode *tmpNode;
IFuid tmpName;
error = CKTmkVolt(ckt, &tmp, here->VDMOSname, "drain");
if (error) return(error);
here->VDMOSdNodePrime = tmp->number;
if (CKTinst2Node(ckt,here,1,&tmpNode,&tmpName)==OK) {
if (tmpNode->nsGiven) {
tmp->nodeset=tmpNode->nodeset;
tmp->nsGiven=tmpNode->nsGiven;
}
}
if (ckt->CKTcopyNodesets) {
CKTnode *tmpNode;
IFuid tmpName;
if (CKTinst2Node(ckt, here, 1, &tmpNode, &tmpName) == OK) {
if (tmpNode->nsGiven) {
tmp->nodeset = tmpNode->nodeset;
tmp->nsGiven = tmpNode->nsGiven;
}
}
}
}
}
} else {
here->VDMOSdNodePrime = here->VDMOSdNode;
}
if((model->VDMOSsourceResistance != 0 ||
(model->VDMOSsheetResistance != 0 &&
here->VDMOSsourceSquares != 0) )) {
if ((model->VDMOSsourceResistance != 0 ||
(model->VDMOSsheetResistance != 0 &&
here->VDMOSsourceSquares != 0))) {
if (here->VDMOSsNodePrime == 0) {
error = CKTmkVolt(ckt,&tmp,here->VDMOSname,"source");
if(error) return(error);
here->VDMOSsNodePrime = tmp->number;
if (ckt->CKTcopyNodesets) {
CKTnode *tmpNode;
IFuid tmpName;
error = CKTmkVolt(ckt, &tmp, here->VDMOSname, "source");
if (error) return(error);
here->VDMOSsNodePrime = tmp->number;
if (ckt->CKTcopyNodesets) {
CKTnode *tmpNode;
IFuid tmpName;
if (CKTinst2Node(ckt, here, 3, &tmpNode, &tmpName) == OK) {
if (tmpNode->nsGiven) {
tmp->nodeset = tmpNode->nodeset;
tmp->nsGiven = tmpNode->nsGiven;
}
}
}
if (CKTinst2Node(ckt,here,3,&tmpNode,&tmpName)==OK) {
if (tmpNode->nsGiven) {
tmp->nodeset=tmpNode->nodeset;
tmp->nsGiven=tmpNode->nsGiven;
}
}
}
}
} else {
here->VDMOSsNodePrime = here->VDMOSsNode;
}
/* macro to make elements with built in test for out of memory */
/* macro to make elements with built in test for out of memory */
#define TSTALLOC(ptr,first,second) \
do { if((here->ptr = SMPmakeElt(matrix, here->first, here->second)) == NULL){\
return(E_NOMEM);\
} } while(0)
TSTALLOC(VDMOSDdPtr,VDMOSdNode,VDMOSdNode);
TSTALLOC(VDMOSGgPtr,VDMOSgNode,VDMOSgNode);
TSTALLOC(VDMOSSsPtr,VDMOSsNode,VDMOSsNode);
TSTALLOC(VDMOSBbPtr,VDMOSbNode,VDMOSbNode);
TSTALLOC(VDMOSDPdpPtr,VDMOSdNodePrime,VDMOSdNodePrime);
TSTALLOC(VDMOSSPspPtr,VDMOSsNodePrime,VDMOSsNodePrime);
TSTALLOC(VDMOSDdpPtr,VDMOSdNode,VDMOSdNodePrime);
TSTALLOC(VDMOSGbPtr,VDMOSgNode,VDMOSbNode);
TSTALLOC(VDMOSGdpPtr,VDMOSgNode,VDMOSdNodePrime);
TSTALLOC(VDMOSGspPtr,VDMOSgNode,VDMOSsNodePrime);
TSTALLOC(VDMOSSspPtr,VDMOSsNode,VDMOSsNodePrime);
TSTALLOC(VDMOSBdpPtr,VDMOSbNode,VDMOSdNodePrime);
TSTALLOC(VDMOSBspPtr,VDMOSbNode,VDMOSsNodePrime);
TSTALLOC(VDMOSDPspPtr,VDMOSdNodePrime,VDMOSsNodePrime);
TSTALLOC(VDMOSDPdPtr,VDMOSdNodePrime,VDMOSdNode);
TSTALLOC(VDMOSBgPtr,VDMOSbNode,VDMOSgNode);
TSTALLOC(VDMOSDPgPtr,VDMOSdNodePrime,VDMOSgNode);
TSTALLOC(VDMOSSPgPtr,VDMOSsNodePrime,VDMOSgNode);
TSTALLOC(VDMOSSPsPtr,VDMOSsNodePrime,VDMOSsNode);
TSTALLOC(VDMOSDPbPtr,VDMOSdNodePrime,VDMOSbNode);
TSTALLOC(VDMOSSPbPtr,VDMOSsNodePrime,VDMOSbNode);
TSTALLOC(VDMOSSPdpPtr,VDMOSsNodePrime,VDMOSdNodePrime);
TSTALLOC(VDMOSDdPtr, VDMOSdNode, VDMOSdNode);
TSTALLOC(VDMOSGgPtr, VDMOSgNode, VDMOSgNode);
TSTALLOC(VDMOSSsPtr, VDMOSsNode, VDMOSsNode);
TSTALLOC(VDMOSBbPtr, VDMOSbNode, VDMOSbNode);
TSTALLOC(VDMOSDPdpPtr, VDMOSdNodePrime, VDMOSdNodePrime);
TSTALLOC(VDMOSSPspPtr, VDMOSsNodePrime, VDMOSsNodePrime);
TSTALLOC(VDMOSDdpPtr, VDMOSdNode, VDMOSdNodePrime);
TSTALLOC(VDMOSGbPtr, VDMOSgNode, VDMOSbNode);
TSTALLOC(VDMOSGdpPtr, VDMOSgNode, VDMOSdNodePrime);
TSTALLOC(VDMOSGspPtr, VDMOSgNode, VDMOSsNodePrime);
TSTALLOC(VDMOSSspPtr, VDMOSsNode, VDMOSsNodePrime);
TSTALLOC(VDMOSBdpPtr, VDMOSbNode, VDMOSdNodePrime);
TSTALLOC(VDMOSBspPtr, VDMOSbNode, VDMOSsNodePrime);
TSTALLOC(VDMOSDPspPtr, VDMOSdNodePrime, VDMOSsNodePrime);
TSTALLOC(VDMOSDPdPtr, VDMOSdNodePrime, VDMOSdNode);
TSTALLOC(VDMOSBgPtr, VDMOSbNode, VDMOSgNode);
TSTALLOC(VDMOSDPgPtr, VDMOSdNodePrime, VDMOSgNode);
TSTALLOC(VDMOSSPgPtr, VDMOSsNodePrime, VDMOSgNode);
TSTALLOC(VDMOSSPsPtr, VDMOSsNodePrime, VDMOSsNode);
TSTALLOC(VDMOSDPbPtr, VDMOSdNodePrime, VDMOSbNode);
TSTALLOC(VDMOSSPbPtr, VDMOSsNodePrime, VDMOSbNode);
TSTALLOC(VDMOSSPdpPtr, VDMOSsNodePrime, VDMOSdNodePrime);
}
}
@ -226,21 +226,21 @@ VDMOSunsetup(GENmodel *inModel, CKTcircuit *ckt)
VDMOSinstance *here;
for (model = (VDMOSmodel *)inModel; model != NULL;
model = VDMOSnextModel(model))
model = VDMOSnextModel(model))
{
for (here = VDMOSinstances(model); here != NULL;
here=VDMOSnextInstance(here))
{
if (here->VDMOSsNodePrime > 0
&& here->VDMOSsNodePrime != here->VDMOSsNode)
CKTdltNNum(ckt, here->VDMOSsNodePrime);
here->VDMOSsNodePrime= 0;
here = VDMOSnextInstance(here))
{
if (here->VDMOSsNodePrime > 0
&& here->VDMOSsNodePrime != here->VDMOSsNode)
CKTdltNNum(ckt, here->VDMOSsNodePrime);
here->VDMOSsNodePrime = 0;
if (here->VDMOSdNodePrime > 0
&& here->VDMOSdNodePrime != here->VDMOSdNode)
CKTdltNNum(ckt, here->VDMOSdNodePrime);
here->VDMOSdNodePrime= 0;
}
if (here->VDMOSdNodePrime > 0
&& here->VDMOSdNodePrime != here->VDMOSdNode)
CKTdltNNum(ckt, here->VDMOSdNodePrime);
here->VDMOSdNodePrime = 0;
}
}
return OK;
}

8
src/spicelib/devices/vdmos/vdmostemp.c
View File

@ -289,10 +289,10 @@ VDMOStemp(GENmodel *inModel, CKTcircuit *ckt)
-here->VDMOStDepCap * here->VDMOSf2s;
if(model->VDMOSdrainResistanceGiven) {
if(model->VDMOSdrainResistance != 0) {
here->VDMOSdrainConductance = here->VDMOSm /
model->VDMOSdrainResistance;
if (model->VDMOSdrainResistanceGiven) {
if (model->VDMOSdrainResistance != 0) {
here->VDMOSdrainConductance = here->VDMOSm /
model->VDMOSdrainResistance;
} else {
here->VDMOSdrainConductance = 0;
}