devices/bsim4v7, string substitution, bsim4 -> bsim4v7
This commit is contained in:
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7e4128c60a
commit
58122ce47b
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@ -1,33 +1,33 @@
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## Process this file with automake to produce Makefile.in
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noinst_LTLIBRARIES = libbsim4.la
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noinst_LTLIBRARIES = libbsim4v7.la
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libbsim4_la_SOURCES = \
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b4.c \
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b4acld.c \
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b4ask.c \
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b4check.c \
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b4cvtest.c \
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b4del.c \
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b4dest.c \
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b4geo.c \
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b4getic.c \
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b4ld.c \
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b4mask.c \
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b4mdel.c \
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b4mpar.c \
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b4noi.c \
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b4par.c \
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b4pzld.c \
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b4set.c \
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b4soachk.c \
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b4temp.c \
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b4trunc.c \
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bsim4def.h \
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bsim4ext.h \
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bsim4init.c \
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bsim4init.h \
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bsim4itf.h
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libbsim4v7_la_SOURCES = \
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b4v7.c \
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b4v7acld.c \
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b4v7ask.c \
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b4v7check.c \
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b4v7cvtest.c \
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b4v7del.c \
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b4v7dest.c \
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b4v7geo.c \
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b4v7getic.c \
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b4v7ld.c \
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b4v7mask.c \
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b4v7mdel.c \
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b4v7mpar.c \
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b4v7noi.c \
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b4v7par.c \
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b4v7pzld.c \
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b4v7set.c \
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b4v7soachk.c \
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b4v7temp.c \
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b4v7trunc.c \
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bsim4v7def.h \
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bsim4v7ext.h \
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bsim4v7init.c \
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bsim4v7init.h \
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bsim4v7itf.h
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File diff suppressed because it is too large
Load Diff
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@ -13,18 +13,18 @@
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#include "ngspice/ngspice.h"
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#include "ngspice/cktdefs.h"
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#include "bsim4def.h"
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#include "bsim4v7def.h"
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#include "ngspice/sperror.h"
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#include "ngspice/suffix.h"
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int
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BSIM4acLoad(
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BSIM4v7acLoad(
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GENmodel *inModel,
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CKTcircuit *ckt)
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{
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BSIM4model *model = (BSIM4model*)inModel;
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BSIM4instance *here;
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BSIM4v7model *model = (BSIM4v7model*)inModel;
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BSIM4v7instance *here;
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double gjbd, gjbs, geltd, gcrg, gcrgg, gcrgd, gcrgs, gcrgb;
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double xcbgb, xcbdb, xcbsb, xcbbb;
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@ -57,44 +57,44 @@ double ggidld, ggidlg, ggidlb, ggislg, ggislb, ggisls;
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double m;
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omega = ckt->CKTomega;
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for (; model != NULL; model = model->BSIM4nextModel)
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{ for (here = model->BSIM4instances; here!= NULL;
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here = here->BSIM4nextInstance)
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for (; model != NULL; model = model->BSIM4v7nextModel)
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{ for (here = model->BSIM4v7instances; here!= NULL;
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here = here->BSIM4v7nextInstance)
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{
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pParam = here->pParam;
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capbd = here->BSIM4capbd;
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capbs = here->BSIM4capbs;
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cgso = here->BSIM4cgso;
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cgdo = here->BSIM4cgdo;
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cgbo = pParam->BSIM4cgbo;
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capbd = here->BSIM4v7capbd;
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capbs = here->BSIM4v7capbs;
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cgso = here->BSIM4v7cgso;
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cgdo = here->BSIM4v7cgdo;
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cgbo = pParam->BSIM4v7cgbo;
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Csd = -(here->BSIM4cddb + here->BSIM4cgdb + here->BSIM4cbdb);
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Csg = -(here->BSIM4cdgb + here->BSIM4cggb + here->BSIM4cbgb);
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Css = -(here->BSIM4cdsb + here->BSIM4cgsb + here->BSIM4cbsb);
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Csd = -(here->BSIM4v7cddb + here->BSIM4v7cgdb + here->BSIM4v7cbdb);
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Csg = -(here->BSIM4v7cdgb + here->BSIM4v7cggb + here->BSIM4v7cbgb);
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Css = -(here->BSIM4v7cdsb + here->BSIM4v7cgsb + here->BSIM4v7cbsb);
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if (here->BSIM4acnqsMod)
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{ T0 = omega * here->BSIM4taunet;
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if (here->BSIM4v7acnqsMod)
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{ T0 = omega * here->BSIM4v7taunet;
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T1 = T0 * T0;
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T2 = 1.0 / (1.0 + T1);
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T3 = T0 * T2;
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gmr = here->BSIM4gm * T2;
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gmbsr = here->BSIM4gmbs * T2;
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gdsr = here->BSIM4gds * T2;
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gmr = here->BSIM4v7gm * T2;
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gmbsr = here->BSIM4v7gmbs * T2;
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gdsr = here->BSIM4v7gds * T2;
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gmi = -here->BSIM4gm * T3;
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gmbsi = -here->BSIM4gmbs * T3;
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gdsi = -here->BSIM4gds * T3;
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gmi = -here->BSIM4v7gm * T3;
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gmbsi = -here->BSIM4v7gmbs * T3;
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gdsi = -here->BSIM4v7gds * T3;
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Cddr = here->BSIM4cddb * T2;
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Cdgr = here->BSIM4cdgb * T2;
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Cdsr = here->BSIM4cdsb * T2;
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Cddr = here->BSIM4v7cddb * T2;
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Cdgr = here->BSIM4v7cdgb * T2;
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Cdsr = here->BSIM4v7cdsb * T2;
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Cdbr = -(Cddr + Cdgr + Cdsr);
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/* WDLiu: Cxyi mulitplied by jomega below, and actually to be of conductance */
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Cddi = here->BSIM4cddb * T3 * omega;
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Cdgi = here->BSIM4cdgb * T3 * omega;
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Cdsi = here->BSIM4cdsb * T3 * omega;
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Cddi = here->BSIM4v7cddb * T3 * omega;
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Cdgi = here->BSIM4v7cdgb * T3 * omega;
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Cdsi = here->BSIM4v7cdsb * T3 * omega;
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Cdbi = -(Cddi + Cdgi + Cdsi);
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Csdr = Csd * T2;
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@ -107,9 +107,9 @@ double m;
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Cssi = Css * T3 * omega;
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Csbi = -(Csdi + Csgi + Cssi);
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Cgdr = -(Cddr + Csdr + here->BSIM4cbdb);
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Cggr = -(Cdgr + Csgr + here->BSIM4cbgb);
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Cgsr = -(Cdsr + Cssr + here->BSIM4cbsb);
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Cgdr = -(Cddr + Csdr + here->BSIM4v7cbdb);
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Cggr = -(Cdgr + Csgr + here->BSIM4v7cbgb);
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Cgsr = -(Cdsr + Cssr + here->BSIM4v7cbsb);
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Cgbr = -(Cgdr + Cggr + Cgsr);
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Cgdi = -(Cddi + Csdi);
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@ -118,14 +118,14 @@ double m;
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Cgbi = -(Cgdi + Cggi + Cgsi);
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}
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else /* QS */
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{ gmr = here->BSIM4gm;
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gmbsr = here->BSIM4gmbs;
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gdsr = here->BSIM4gds;
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{ gmr = here->BSIM4v7gm;
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gmbsr = here->BSIM4v7gmbs;
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gdsr = here->BSIM4v7gds;
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gmi = gmbsi = gdsi = 0.0;
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Cddr = here->BSIM4cddb;
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Cdgr = here->BSIM4cdgb;
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Cdsr = here->BSIM4cdsb;
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Cddr = here->BSIM4v7cddb;
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Cdgr = here->BSIM4v7cdgb;
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Cdsr = here->BSIM4v7cdsb;
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Cdbr = -(Cddr + Cdgr + Cdsr);
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Cddi = Cdgi = Cdsi = Cdbi = 0.0;
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@ -135,15 +135,15 @@ double m;
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Csbr = -(Csdr + Csgr + Cssr);
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Csdi = Csgi = Cssi = Csbi = 0.0;
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Cgdr = here->BSIM4cgdb;
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Cggr = here->BSIM4cggb;
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Cgsr = here->BSIM4cgsb;
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Cgdr = here->BSIM4v7cgdb;
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Cggr = here->BSIM4v7cggb;
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Cgsr = here->BSIM4v7cgsb;
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Cgbr = -(Cgdr + Cggr + Cgsr);
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Cgdi = Cggi = Cgsi = Cgbi = 0.0;
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}
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if (here->BSIM4mode >= 0)
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if (here->BSIM4v7mode >= 0)
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{ Gmr = gmr;
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Gmbsr = gmbsr;
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FwdSumr = Gmr + Gmbsr;
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@ -153,11 +153,11 @@ double m;
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FwdSumi = Gmi + Gmbsi;
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RevSumi = 0.0;
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gbbdp = -(here->BSIM4gbds);
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gbbsp = here->BSIM4gbds + here->BSIM4gbgs + here->BSIM4gbbs;
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gbdpg = here->BSIM4gbgs;
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gbdpdp = here->BSIM4gbds;
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gbdpb = here->BSIM4gbbs;
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gbbdp = -(here->BSIM4v7gbds);
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gbbsp = here->BSIM4v7gbds + here->BSIM4v7gbgs + here->BSIM4v7gbbs;
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gbdpg = here->BSIM4v7gbgs;
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gbdpdp = here->BSIM4v7gbds;
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gbdpb = here->BSIM4v7gbbs;
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gbdpsp = -(gbdpg + gbdpdp + gbdpb);
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gbspdp = 0.0;
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@ -165,32 +165,32 @@ double m;
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gbspb = 0.0;
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gbspsp = 0.0;
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if (model->BSIM4igcMod)
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{ gIstotg = here->BSIM4gIgsg + here->BSIM4gIgcsg;
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gIstotd = here->BSIM4gIgcsd;
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gIstots = here->BSIM4gIgss + here->BSIM4gIgcss;
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gIstotb = here->BSIM4gIgcsb;
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if (model->BSIM4v7igcMod)
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{ gIstotg = here->BSIM4v7gIgsg + here->BSIM4v7gIgcsg;
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gIstotd = here->BSIM4v7gIgcsd;
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gIstots = here->BSIM4v7gIgss + here->BSIM4v7gIgcss;
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gIstotb = here->BSIM4v7gIgcsb;
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gIdtotg = here->BSIM4gIgdg + here->BSIM4gIgcdg;
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gIdtotd = here->BSIM4gIgdd + here->BSIM4gIgcdd;
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gIdtots = here->BSIM4gIgcds;
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gIdtotb = here->BSIM4gIgcdb;
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gIdtotg = here->BSIM4v7gIgdg + here->BSIM4v7gIgcdg;
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gIdtotd = here->BSIM4v7gIgdd + here->BSIM4v7gIgcdd;
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gIdtots = here->BSIM4v7gIgcds;
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gIdtotb = here->BSIM4v7gIgcdb;
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}
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else
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{ gIstotg = gIstotd = gIstots = gIstotb = 0.0;
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gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0;
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}
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if (model->BSIM4igbMod)
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{ gIbtotg = here->BSIM4gIgbg;
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gIbtotd = here->BSIM4gIgbd;
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gIbtots = here->BSIM4gIgbs;
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gIbtotb = here->BSIM4gIgbb;
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if (model->BSIM4v7igbMod)
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{ gIbtotg = here->BSIM4v7gIgbg;
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gIbtotd = here->BSIM4v7gIgbd;
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gIbtots = here->BSIM4v7gIgbs;
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gIbtotb = here->BSIM4v7gIgbb;
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}
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else
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gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0;
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if ((model->BSIM4igcMod != 0) || (model->BSIM4igbMod != 0))
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if ((model->BSIM4v7igcMod != 0) || (model->BSIM4v7igbMod != 0))
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{ gIgtotg = gIstotg + gIdtotg + gIbtotg;
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gIgtotd = gIstotd + gIdtotd + gIbtotd ;
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gIgtots = gIstots + gIdtots + gIbtots;
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@ -199,28 +199,28 @@ double m;
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else
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gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0;
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if (here->BSIM4rgateMod == 2)
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T0 = *(ckt->CKTstates[0] + here->BSIM4vges)
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- *(ckt->CKTstates[0] + here->BSIM4vgs);
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else if (here->BSIM4rgateMod == 3)
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T0 = *(ckt->CKTstates[0] + here->BSIM4vgms)
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- *(ckt->CKTstates[0] + here->BSIM4vgs);
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if (here->BSIM4rgateMod > 1)
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{ gcrgd = here->BSIM4gcrgd * T0;
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gcrgg = here->BSIM4gcrgg * T0;
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gcrgs = here->BSIM4gcrgs * T0;
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gcrgb = here->BSIM4gcrgb * T0;
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gcrgg -= here->BSIM4gcrg;
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gcrg = here->BSIM4gcrg;
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if (here->BSIM4v7rgateMod == 2)
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T0 = *(ckt->CKTstates[0] + here->BSIM4v7vges)
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- *(ckt->CKTstates[0] + here->BSIM4v7vgs);
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else if (here->BSIM4v7rgateMod == 3)
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T0 = *(ckt->CKTstates[0] + here->BSIM4v7vgms)
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- *(ckt->CKTstates[0] + here->BSIM4v7vgs);
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if (here->BSIM4v7rgateMod > 1)
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{ gcrgd = here->BSIM4v7gcrgd * T0;
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gcrgg = here->BSIM4v7gcrgg * T0;
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gcrgs = here->BSIM4v7gcrgs * T0;
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gcrgb = here->BSIM4v7gcrgb * T0;
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gcrgg -= here->BSIM4v7gcrg;
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gcrg = here->BSIM4v7gcrg;
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}
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else
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gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0;
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if (here->BSIM4rgateMod == 3)
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{ xcgmgmb = (cgdo + cgso + pParam->BSIM4cgbo) * omega;
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if (here->BSIM4v7rgateMod == 3)
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{ xcgmgmb = (cgdo + cgso + pParam->BSIM4v7cgbo) * omega;
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xcgmdb = -cgdo * omega;
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xcgmsb = -cgso * omega;
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xcgmbb = -pParam->BSIM4cgbo * omega;
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xcgmbb = -pParam->BSIM4v7cgbo * omega;
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xcdgmb = xcgmdb;
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xcsgmb = xcgmsb;
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@ -233,43 +233,43 @@ double m;
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xcdgbr = Cdgr * omega;
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xcsgbr = Csgr * omega;
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xcbgb = here->BSIM4cbgb * omega;
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xcbgb = here->BSIM4v7cbgb * omega;
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}
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else
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{ xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4cgbo ) * omega;
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{ xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4v7cgbo ) * omega;
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xcgdbr = (Cgdr - cgdo) * omega;
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xcgsbr = (Cgsr - cgso) * omega;
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xcgbbr = -(xcggbr + xcgdbr + xcgsbr);
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xcdgbr = (Cdgr - cgdo) * omega;
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xcsgbr = (Csgr - cgso) * omega;
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xcbgb = (here->BSIM4cbgb - pParam->BSIM4cgbo) * omega;
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xcbgb = (here->BSIM4v7cbgb - pParam->BSIM4v7cgbo) * omega;
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xcdgmb = xcsgmb = xcbgmb = 0.0;
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}
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xcddbr = (Cddr + here->BSIM4capbd + cgdo) * omega;
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xcddbr = (Cddr + here->BSIM4v7capbd + cgdo) * omega;
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xcdsbr = Cdsr * omega;
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xcsdbr = Csdr * omega;
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xcssbr = (here->BSIM4capbs + cgso + Cssr) * omega;
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xcssbr = (here->BSIM4v7capbs + cgso + Cssr) * omega;
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if (!here->BSIM4rbodyMod)
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if (!here->BSIM4v7rbodyMod)
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{ xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb);
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xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb);
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xcbdb = (here->BSIM4cbdb - here->BSIM4capbd) * omega;
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xcbsb = (here->BSIM4cbsb - here->BSIM4capbs) * omega;
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xcbdb = (here->BSIM4v7cbdb - here->BSIM4v7capbd) * omega;
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xcbsb = (here->BSIM4v7cbsb - here->BSIM4v7capbs) * omega;
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xcdbdb = 0.0;
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}
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else
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{ xcdbbr = Cdbr * omega;
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xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb)
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+ here->BSIM4capbs * omega;
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+ here->BSIM4v7capbs * omega;
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xcbdb = here->BSIM4cbdb * omega;
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xcbsb = here->BSIM4cbsb * omega;
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xcbdb = here->BSIM4v7cbdb * omega;
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xcbsb = here->BSIM4v7cbsb * omega;
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xcdbdb = -here->BSIM4capbd * omega;
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xcsbsb = -here->BSIM4capbs * omega;
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xcdbdb = -here->BSIM4v7capbd * omega;
|
||||
xcsbsb = -here->BSIM4v7capbs * omega;
|
||||
}
|
||||
xcbbb = -(xcbdb + xcbgb + xcbsb + xcbgmb);
|
||||
|
||||
|
|
@ -296,45 +296,45 @@ double m;
|
|||
FwdSumi = 0.0;
|
||||
RevSumi = -(Gmi + Gmbsi);
|
||||
|
||||
gbbsp = -(here->BSIM4gbds);
|
||||
gbbdp = here->BSIM4gbds + here->BSIM4gbgs + here->BSIM4gbbs;
|
||||
gbbsp = -(here->BSIM4v7gbds);
|
||||
gbbdp = here->BSIM4v7gbds + here->BSIM4v7gbgs + here->BSIM4v7gbbs;
|
||||
|
||||
gbdpg = 0.0;
|
||||
gbdpsp = 0.0;
|
||||
gbdpb = 0.0;
|
||||
gbdpdp = 0.0;
|
||||
|
||||
gbspg = here->BSIM4gbgs;
|
||||
gbspsp = here->BSIM4gbds;
|
||||
gbspb = here->BSIM4gbbs;
|
||||
gbspg = here->BSIM4v7gbgs;
|
||||
gbspsp = here->BSIM4v7gbds;
|
||||
gbspb = here->BSIM4v7gbbs;
|
||||
gbspdp = -(gbspg + gbspsp + gbspb);
|
||||
|
||||
if (model->BSIM4igcMod)
|
||||
{ gIstotg = here->BSIM4gIgsg + here->BSIM4gIgcdg;
|
||||
gIstotd = here->BSIM4gIgcds;
|
||||
gIstots = here->BSIM4gIgss + here->BSIM4gIgcdd;
|
||||
gIstotb = here->BSIM4gIgcdb;
|
||||
if (model->BSIM4v7igcMod)
|
||||
{ gIstotg = here->BSIM4v7gIgsg + here->BSIM4v7gIgcdg;
|
||||
gIstotd = here->BSIM4v7gIgcds;
|
||||
gIstots = here->BSIM4v7gIgss + here->BSIM4v7gIgcdd;
|
||||
gIstotb = here->BSIM4v7gIgcdb;
|
||||
|
||||
gIdtotg = here->BSIM4gIgdg + here->BSIM4gIgcsg;
|
||||
gIdtotd = here->BSIM4gIgdd + here->BSIM4gIgcss;
|
||||
gIdtots = here->BSIM4gIgcsd;
|
||||
gIdtotb = here->BSIM4gIgcsb;
|
||||
gIdtotg = here->BSIM4v7gIgdg + here->BSIM4v7gIgcsg;
|
||||
gIdtotd = here->BSIM4v7gIgdd + here->BSIM4v7gIgcss;
|
||||
gIdtots = here->BSIM4v7gIgcsd;
|
||||
gIdtotb = here->BSIM4v7gIgcsb;
|
||||
}
|
||||
else
|
||||
{ gIstotg = gIstotd = gIstots = gIstotb = 0.0;
|
||||
gIdtotg = gIdtotd = gIdtots = gIdtotb = 0.0;
|
||||
}
|
||||
|
||||
if (model->BSIM4igbMod)
|
||||
{ gIbtotg = here->BSIM4gIgbg;
|
||||
gIbtotd = here->BSIM4gIgbs;
|
||||
gIbtots = here->BSIM4gIgbd;
|
||||
gIbtotb = here->BSIM4gIgbb;
|
||||
if (model->BSIM4v7igbMod)
|
||||
{ gIbtotg = here->BSIM4v7gIgbg;
|
||||
gIbtotd = here->BSIM4v7gIgbs;
|
||||
gIbtots = here->BSIM4v7gIgbd;
|
||||
gIbtotb = here->BSIM4v7gIgbb;
|
||||
}
|
||||
else
|
||||
gIbtotg = gIbtotd = gIbtots = gIbtotb = 0.0;
|
||||
|
||||
if ((model->BSIM4igcMod != 0) || (model->BSIM4igbMod != 0))
|
||||
if ((model->BSIM4v7igcMod != 0) || (model->BSIM4v7igbMod != 0))
|
||||
{ gIgtotg = gIstotg + gIdtotg + gIbtotg;
|
||||
gIgtotd = gIstotd + gIdtotd + gIbtotd ;
|
||||
gIgtots = gIstots + gIdtots + gIbtots;
|
||||
|
|
@ -343,28 +343,28 @@ double m;
|
|||
else
|
||||
gIgtotg = gIgtotd = gIgtots = gIgtotb = 0.0;
|
||||
|
||||
if (here->BSIM4rgateMod == 2)
|
||||
T0 = *(ckt->CKTstates[0] + here->BSIM4vges)
|
||||
- *(ckt->CKTstates[0] + here->BSIM4vgs);
|
||||
else if (here->BSIM4rgateMod == 3)
|
||||
T0 = *(ckt->CKTstates[0] + here->BSIM4vgms)
|
||||
- *(ckt->CKTstates[0] + here->BSIM4vgs);
|
||||
if (here->BSIM4rgateMod > 1)
|
||||
{ gcrgd = here->BSIM4gcrgs * T0;
|
||||
gcrgg = here->BSIM4gcrgg * T0;
|
||||
gcrgs = here->BSIM4gcrgd * T0;
|
||||
gcrgb = here->BSIM4gcrgb * T0;
|
||||
gcrgg -= here->BSIM4gcrg;
|
||||
gcrg = here->BSIM4gcrg;
|
||||
if (here->BSIM4v7rgateMod == 2)
|
||||
T0 = *(ckt->CKTstates[0] + here->BSIM4v7vges)
|
||||
- *(ckt->CKTstates[0] + here->BSIM4v7vgs);
|
||||
else if (here->BSIM4v7rgateMod == 3)
|
||||
T0 = *(ckt->CKTstates[0] + here->BSIM4v7vgms)
|
||||
- *(ckt->CKTstates[0] + here->BSIM4v7vgs);
|
||||
if (here->BSIM4v7rgateMod > 1)
|
||||
{ gcrgd = here->BSIM4v7gcrgs * T0;
|
||||
gcrgg = here->BSIM4v7gcrgg * T0;
|
||||
gcrgs = here->BSIM4v7gcrgd * T0;
|
||||
gcrgb = here->BSIM4v7gcrgb * T0;
|
||||
gcrgg -= here->BSIM4v7gcrg;
|
||||
gcrg = here->BSIM4v7gcrg;
|
||||
}
|
||||
else
|
||||
gcrg = gcrgd = gcrgg = gcrgs = gcrgb = 0.0;
|
||||
|
||||
if (here->BSIM4rgateMod == 3)
|
||||
{ xcgmgmb = (cgdo + cgso + pParam->BSIM4cgbo) * omega;
|
||||
if (here->BSIM4v7rgateMod == 3)
|
||||
{ xcgmgmb = (cgdo + cgso + pParam->BSIM4v7cgbo) * omega;
|
||||
xcgmdb = -cgdo * omega;
|
||||
xcgmsb = -cgso * omega;
|
||||
xcgmbb = -pParam->BSIM4cgbo * omega;
|
||||
xcgmbb = -pParam->BSIM4v7cgbo * omega;
|
||||
|
||||
xcdgmb = xcgmdb;
|
||||
xcsgmb = xcgmsb;
|
||||
|
|
@ -377,42 +377,42 @@ double m;
|
|||
|
||||
xcdgbr = Csgr * omega;
|
||||
xcsgbr = Cdgr * omega;
|
||||
xcbgb = here->BSIM4cbgb * omega;
|
||||
xcbgb = here->BSIM4v7cbgb * omega;
|
||||
}
|
||||
else
|
||||
{ xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4cgbo ) * omega;
|
||||
{ xcggbr = (Cggr + cgdo + cgso + pParam->BSIM4v7cgbo ) * omega;
|
||||
xcgdbr = (Cgsr - cgdo) * omega;
|
||||
xcgsbr = (Cgdr - cgso) * omega;
|
||||
xcgbbr = -(xcggbr + xcgdbr + xcgsbr);
|
||||
|
||||
xcdgbr = (Csgr - cgdo) * omega;
|
||||
xcsgbr = (Cdgr - cgso) * omega;
|
||||
xcbgb = (here->BSIM4cbgb - pParam->BSIM4cgbo) * omega;
|
||||
xcbgb = (here->BSIM4v7cbgb - pParam->BSIM4v7cgbo) * omega;
|
||||
|
||||
xcdgmb = xcsgmb = xcbgmb = 0.0;
|
||||
}
|
||||
xcddbr = (here->BSIM4capbd + cgdo + Cssr) * omega;
|
||||
xcddbr = (here->BSIM4v7capbd + cgdo + Cssr) * omega;
|
||||
xcdsbr = Csdr * omega;
|
||||
xcsdbr = Cdsr * omega;
|
||||
xcssbr = (Cddr + here->BSIM4capbs + cgso) * omega;
|
||||
xcssbr = (Cddr + here->BSIM4v7capbs + cgso) * omega;
|
||||
|
||||
if (!here->BSIM4rbodyMod)
|
||||
if (!here->BSIM4v7rbodyMod)
|
||||
{ xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb);
|
||||
xcsbbr = -(xcsgbr + xcsdbr + xcssbr + xcsgmb);
|
||||
|
||||
xcbdb = (here->BSIM4cbsb - here->BSIM4capbd) * omega;
|
||||
xcbsb = (here->BSIM4cbdb - here->BSIM4capbs) * omega;
|
||||
xcbdb = (here->BSIM4v7cbsb - here->BSIM4v7capbd) * omega;
|
||||
xcbsb = (here->BSIM4v7cbdb - here->BSIM4v7capbs) * omega;
|
||||
xcdbdb = 0.0;
|
||||
}
|
||||
else
|
||||
{ xcdbbr = -(xcdgbr + xcddbr + xcdsbr + xcdgmb)
|
||||
+ here->BSIM4capbd * omega;
|
||||
+ here->BSIM4v7capbd * omega;
|
||||
xcsbbr = Cdbr * omega;
|
||||
|
||||
xcbdb = here->BSIM4cbsb * omega;
|
||||
xcbsb = here->BSIM4cbdb * omega;
|
||||
xcdbdb = -here->BSIM4capbd * omega;
|
||||
xcsbsb = -here->BSIM4capbs * omega;
|
||||
xcbdb = here->BSIM4v7cbsb * omega;
|
||||
xcbsb = here->BSIM4v7cbdb * omega;
|
||||
xcdbdb = -here->BSIM4v7capbd * omega;
|
||||
xcsbsb = -here->BSIM4v7capbs * omega;
|
||||
}
|
||||
xcbbb = -(xcbgb + xcbdb + xcbsb + xcbgmb);
|
||||
|
||||
|
|
@ -430,18 +430,18 @@ double m;
|
|||
xcgbbi = Cgbi;
|
||||
}
|
||||
|
||||
if (model->BSIM4rdsMod == 1)
|
||||
{ gstot = here->BSIM4gstot;
|
||||
gstotd = here->BSIM4gstotd;
|
||||
gstotg = here->BSIM4gstotg;
|
||||
gstots = here->BSIM4gstots - gstot;
|
||||
gstotb = here->BSIM4gstotb;
|
||||
if (model->BSIM4v7rdsMod == 1)
|
||||
{ gstot = here->BSIM4v7gstot;
|
||||
gstotd = here->BSIM4v7gstotd;
|
||||
gstotg = here->BSIM4v7gstotg;
|
||||
gstots = here->BSIM4v7gstots - gstot;
|
||||
gstotb = here->BSIM4v7gstotb;
|
||||
|
||||
gdtot = here->BSIM4gdtot;
|
||||
gdtotd = here->BSIM4gdtotd - gdtot;
|
||||
gdtotg = here->BSIM4gdtotg;
|
||||
gdtots = here->BSIM4gdtots;
|
||||
gdtotb = here->BSIM4gdtotb;
|
||||
gdtot = here->BSIM4v7gdtot;
|
||||
gdtotd = here->BSIM4v7gdtotd - gdtot;
|
||||
gdtotg = here->BSIM4v7gdtotg;
|
||||
gdtots = here->BSIM4v7gdtots;
|
||||
gdtotb = here->BSIM4v7gdtotb;
|
||||
}
|
||||
else
|
||||
{ gstot = gstotd = gstotg = gstots = gstotb = 0.0;
|
||||
|
|
@ -452,201 +452,201 @@ double m;
|
|||
/*
|
||||
* Loading AC matrix
|
||||
*/
|
||||
m = here->BSIM4m;
|
||||
m = here->BSIM4v7m;
|
||||
|
||||
if (!model->BSIM4rdsMod)
|
||||
{ gdpr = here->BSIM4drainConductance;
|
||||
gspr = here->BSIM4sourceConductance;
|
||||
if (!model->BSIM4v7rdsMod)
|
||||
{ gdpr = here->BSIM4v7drainConductance;
|
||||
gspr = here->BSIM4v7sourceConductance;
|
||||
}
|
||||
else
|
||||
gdpr = gspr = 0.0;
|
||||
|
||||
if (!here->BSIM4rbodyMod)
|
||||
{ gjbd = here->BSIM4gbd;
|
||||
gjbs = here->BSIM4gbs;
|
||||
if (!here->BSIM4v7rbodyMod)
|
||||
{ gjbd = here->BSIM4v7gbd;
|
||||
gjbs = here->BSIM4v7gbs;
|
||||
}
|
||||
else
|
||||
gjbd = gjbs = 0.0;
|
||||
|
||||
geltd = here->BSIM4grgeltd;
|
||||
geltd = here->BSIM4v7grgeltd;
|
||||
|
||||
if (here->BSIM4rgateMod == 1)
|
||||
{ *(here->BSIM4GEgePtr) += m * geltd;
|
||||
*(here->BSIM4GPgePtr) -= m * geltd;
|
||||
*(here->BSIM4GEgpPtr) -= m * geltd;
|
||||
if (here->BSIM4v7rgateMod == 1)
|
||||
{ *(here->BSIM4v7GEgePtr) += m * geltd;
|
||||
*(here->BSIM4v7GPgePtr) -= m * geltd;
|
||||
*(here->BSIM4v7GEgpPtr) -= m * geltd;
|
||||
|
||||
*(here->BSIM4GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4GPgpPtr) += m * (geltd + xcggbi + gIgtotg);
|
||||
*(here->BSIM4GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4GPdpPtr) += m * (xcgdbi + gIgtotd);
|
||||
*(here->BSIM4GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4GPspPtr) += m * (xcgsbi + gIgtots);
|
||||
*(here->BSIM4GPbpPtr +1) += m * xcgbbr;
|
||||
*(here->BSIM4GPbpPtr) += m * (xcgbbi + gIgtotb);
|
||||
*(here->BSIM4v7GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4v7GPgpPtr) += m * (geltd + xcggbi + gIgtotg);
|
||||
*(here->BSIM4v7GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4v7GPdpPtr) += m * (xcgdbi + gIgtotd);
|
||||
*(here->BSIM4v7GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4v7GPspPtr) += m * (xcgsbi + gIgtots);
|
||||
*(here->BSIM4v7GPbpPtr +1) += m * xcgbbr;
|
||||
*(here->BSIM4v7GPbpPtr) += m * (xcgbbi + gIgtotb);
|
||||
} /* WDLiu: gcrg already subtracted from all gcrgg below */
|
||||
else if (here->BSIM4rgateMod == 2)
|
||||
{ *(here->BSIM4GEgePtr) += m * gcrg;
|
||||
*(here->BSIM4GEgpPtr) += m * gcrgg;
|
||||
*(here->BSIM4GEdpPtr) += m * gcrgd;
|
||||
*(here->BSIM4GEspPtr) += m * gcrgs;
|
||||
*(here->BSIM4GEbpPtr) += m * gcrgb;
|
||||
else if (here->BSIM4v7rgateMod == 2)
|
||||
{ *(here->BSIM4v7GEgePtr) += m * gcrg;
|
||||
*(here->BSIM4v7GEgpPtr) += m * gcrgg;
|
||||
*(here->BSIM4v7GEdpPtr) += m * gcrgd;
|
||||
*(here->BSIM4v7GEspPtr) += m * gcrgs;
|
||||
*(here->BSIM4v7GEbpPtr) += m * gcrgb;
|
||||
|
||||
*(here->BSIM4GPgePtr) -= m * gcrg;
|
||||
*(here->BSIM4GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4GPgpPtr) -= m * (gcrgg - xcggbi - gIgtotg);
|
||||
*(here->BSIM4GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4GPdpPtr) -= m * (gcrgd - xcgdbi - gIgtotd);
|
||||
*(here->BSIM4GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4GPspPtr) -= m * (gcrgs - xcgsbi - gIgtots);
|
||||
*(here->BSIM4GPbpPtr +1) += m * xcgbbr;
|
||||
*(here->BSIM4GPbpPtr) -= m * (gcrgb - xcgbbi - gIgtotb);
|
||||
*(here->BSIM4v7GPgePtr) -= m * gcrg;
|
||||
*(here->BSIM4v7GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4v7GPgpPtr) -= m * (gcrgg - xcggbi - gIgtotg);
|
||||
*(here->BSIM4v7GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4v7GPdpPtr) -= m * (gcrgd - xcgdbi - gIgtotd);
|
||||
*(here->BSIM4v7GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4v7GPspPtr) -= m * (gcrgs - xcgsbi - gIgtots);
|
||||
*(here->BSIM4v7GPbpPtr +1) += m * xcgbbr;
|
||||
*(here->BSIM4v7GPbpPtr) -= m * (gcrgb - xcgbbi - gIgtotb);
|
||||
}
|
||||
else if (here->BSIM4rgateMod == 3)
|
||||
{ *(here->BSIM4GEgePtr) += m * geltd;
|
||||
*(here->BSIM4GEgmPtr) -= m * geltd;
|
||||
*(here->BSIM4GMgePtr) -= m * geltd;
|
||||
*(here->BSIM4GMgmPtr) += m * (geltd + gcrg);
|
||||
*(here->BSIM4GMgmPtr +1) += m * xcgmgmb;
|
||||
else if (here->BSIM4v7rgateMod == 3)
|
||||
{ *(here->BSIM4v7GEgePtr) += m * geltd;
|
||||
*(here->BSIM4v7GEgmPtr) -= m * geltd;
|
||||
*(here->BSIM4v7GMgePtr) -= m * geltd;
|
||||
*(here->BSIM4v7GMgmPtr) += m * (geltd + gcrg);
|
||||
*(here->BSIM4v7GMgmPtr +1) += m * xcgmgmb;
|
||||
|
||||
*(here->BSIM4GMdpPtr) += m * gcrgd;
|
||||
*(here->BSIM4GMdpPtr +1) += m * xcgmdb;
|
||||
*(here->BSIM4GMgpPtr) += m * gcrgg;
|
||||
*(here->BSIM4GMspPtr) += m * gcrgs;
|
||||
*(here->BSIM4GMspPtr +1) += m * xcgmsb;
|
||||
*(here->BSIM4GMbpPtr) += m * gcrgb;
|
||||
*(here->BSIM4GMbpPtr +1) += m * xcgmbb;
|
||||
*(here->BSIM4v7GMdpPtr) += m * gcrgd;
|
||||
*(here->BSIM4v7GMdpPtr +1) += m * xcgmdb;
|
||||
*(here->BSIM4v7GMgpPtr) += m * gcrgg;
|
||||
*(here->BSIM4v7GMspPtr) += m * gcrgs;
|
||||
*(here->BSIM4v7GMspPtr +1) += m * xcgmsb;
|
||||
*(here->BSIM4v7GMbpPtr) += m * gcrgb;
|
||||
*(here->BSIM4v7GMbpPtr +1) += m * xcgmbb;
|
||||
|
||||
*(here->BSIM4DPgmPtr +1) += m * xcdgmb;
|
||||
*(here->BSIM4GPgmPtr) -= m * gcrg;
|
||||
*(here->BSIM4SPgmPtr +1) += m * xcsgmb;
|
||||
*(here->BSIM4BPgmPtr +1) += m * xcbgmb;
|
||||
*(here->BSIM4v7DPgmPtr +1) += m * xcdgmb;
|
||||
*(here->BSIM4v7GPgmPtr) -= m * gcrg;
|
||||
*(here->BSIM4v7SPgmPtr +1) += m * xcsgmb;
|
||||
*(here->BSIM4v7BPgmPtr +1) += m * xcbgmb;
|
||||
|
||||
*(here->BSIM4GPgpPtr) -= m * (gcrgg - xcggbi - gIgtotg);
|
||||
*(here->BSIM4GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4GPdpPtr) -= m * (gcrgd - xcgdbi - gIgtotd);
|
||||
*(here->BSIM4GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4GPspPtr) -= m * (gcrgs - xcgsbi - gIgtots);
|
||||
*(here->BSIM4GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4GPbpPtr) -= m * (gcrgb - xcgbbi - gIgtotb);
|
||||
*(here->BSIM4GPbpPtr +1) += m * xcgbbr;
|
||||
*(here->BSIM4v7GPgpPtr) -= m * (gcrgg - xcggbi - gIgtotg);
|
||||
*(here->BSIM4v7GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4v7GPdpPtr) -= m * (gcrgd - xcgdbi - gIgtotd);
|
||||
*(here->BSIM4v7GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4v7GPspPtr) -= m * (gcrgs - xcgsbi - gIgtots);
|
||||
*(here->BSIM4v7GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4v7GPbpPtr) -= m * (gcrgb - xcgbbi - gIgtotb);
|
||||
*(here->BSIM4v7GPbpPtr +1) += m * xcgbbr;
|
||||
}
|
||||
else
|
||||
{ *(here->BSIM4GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4GPgpPtr) += m * (xcggbi + gIgtotg);
|
||||
*(here->BSIM4GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4GPdpPtr) += m * (xcgdbi + gIgtotd);
|
||||
*(here->BSIM4GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4GPspPtr) += m * (xcgsbi + gIgtots);
|
||||
*(here->BSIM4GPbpPtr +1) += m * xcgbbr;
|
||||
*(here->BSIM4GPbpPtr) += m * (xcgbbi + gIgtotb);
|
||||
{ *(here->BSIM4v7GPgpPtr +1) += m * xcggbr;
|
||||
*(here->BSIM4v7GPgpPtr) += m * (xcggbi + gIgtotg);
|
||||
*(here->BSIM4v7GPdpPtr +1) += m * xcgdbr;
|
||||
*(here->BSIM4v7GPdpPtr) += m * (xcgdbi + gIgtotd);
|
||||
*(here->BSIM4v7GPspPtr +1) += m * xcgsbr;
|
||||
*(here->BSIM4v7GPspPtr) += m * (xcgsbi + gIgtots);
|
||||
*(here->BSIM4v7GPbpPtr +1) += m * xcgbbr;
|
||||
*(here->BSIM4v7GPbpPtr) += m * (xcgbbi + gIgtotb);
|
||||
}
|
||||
|
||||
if (model->BSIM4rdsMod)
|
||||
{ (*(here->BSIM4DgpPtr) += m * gdtotg);
|
||||
(*(here->BSIM4DspPtr) += m * gdtots);
|
||||
(*(here->BSIM4DbpPtr) += m * gdtotb);
|
||||
(*(here->BSIM4SdpPtr) += m * gstotd);
|
||||
(*(here->BSIM4SgpPtr) += m * gstotg);
|
||||
(*(here->BSIM4SbpPtr) += m * gstotb);
|
||||
if (model->BSIM4v7rdsMod)
|
||||
{ (*(here->BSIM4v7DgpPtr) += m * gdtotg);
|
||||
(*(here->BSIM4v7DspPtr) += m * gdtots);
|
||||
(*(here->BSIM4v7DbpPtr) += m * gdtotb);
|
||||
(*(here->BSIM4v7SdpPtr) += m * gstotd);
|
||||
(*(here->BSIM4v7SgpPtr) += m * gstotg);
|
||||
(*(here->BSIM4v7SbpPtr) += m * gstotb);
|
||||
}
|
||||
|
||||
*(here->BSIM4DPdpPtr +1) += m * (xcddbr + gdsi + RevSumi);
|
||||
*(here->BSIM4DPdpPtr) += m * (gdpr + xcddbi + gdsr + here->BSIM4gbd
|
||||
*(here->BSIM4v7DPdpPtr +1) += m * (xcddbr + gdsi + RevSumi);
|
||||
*(here->BSIM4v7DPdpPtr) += m * (gdpr + xcddbi + gdsr + here->BSIM4v7gbd
|
||||
- gdtotd + RevSumr + gbdpdp - gIdtotd);
|
||||
*(here->BSIM4DPdPtr) -= m * (gdpr + gdtot);
|
||||
*(here->BSIM4DPgpPtr +1) += m * (xcdgbr + Gmi);
|
||||
*(here->BSIM4DPgpPtr) += m * (Gmr + xcdgbi - gdtotg + gbdpg - gIdtotg);
|
||||
*(here->BSIM4DPspPtr +1) += m * (xcdsbr - gdsi - FwdSumi);
|
||||
*(here->BSIM4DPspPtr) -= m * (gdsr - xcdsbi + FwdSumr + gdtots - gbdpsp + gIdtots);
|
||||
*(here->BSIM4DPbpPtr +1) += m * (xcdbbr + Gmbsi);
|
||||
*(here->BSIM4DPbpPtr) -= m * (gjbd + gdtotb - xcdbbi - Gmbsr - gbdpb + gIdtotb);
|
||||
*(here->BSIM4v7DPdPtr) -= m * (gdpr + gdtot);
|
||||
*(here->BSIM4v7DPgpPtr +1) += m * (xcdgbr + Gmi);
|
||||
*(here->BSIM4v7DPgpPtr) += m * (Gmr + xcdgbi - gdtotg + gbdpg - gIdtotg);
|
||||
*(here->BSIM4v7DPspPtr +1) += m * (xcdsbr - gdsi - FwdSumi);
|
||||
*(here->BSIM4v7DPspPtr) -= m * (gdsr - xcdsbi + FwdSumr + gdtots - gbdpsp + gIdtots);
|
||||
*(here->BSIM4v7DPbpPtr +1) += m * (xcdbbr + Gmbsi);
|
||||
*(here->BSIM4v7DPbpPtr) -= m * (gjbd + gdtotb - xcdbbi - Gmbsr - gbdpb + gIdtotb);
|
||||
|
||||
*(here->BSIM4DdpPtr) -= m * (gdpr - gdtotd);
|
||||
*(here->BSIM4DdPtr) += m * (gdpr + gdtot);
|
||||
*(here->BSIM4v7DdpPtr) -= m * (gdpr - gdtotd);
|
||||
*(here->BSIM4v7DdPtr) += m * (gdpr + gdtot);
|
||||
|
||||
*(here->BSIM4SPdpPtr +1) += m * (xcsdbr - gdsi - RevSumi);
|
||||
*(here->BSIM4SPdpPtr) -= m * (gdsr - xcsdbi + gstotd + RevSumr - gbspdp + gIstotd);
|
||||
*(here->BSIM4SPgpPtr +1) += m * (xcsgbr - Gmi);
|
||||
*(here->BSIM4SPgpPtr) -= m * (Gmr - xcsgbi + gstotg - gbspg + gIstotg);
|
||||
*(here->BSIM4SPspPtr +1) += m * (xcssbr + gdsi + FwdSumi);
|
||||
*(here->BSIM4SPspPtr) += m * (gspr + xcssbi + gdsr + here->BSIM4gbs
|
||||
*(here->BSIM4v7SPdpPtr +1) += m * (xcsdbr - gdsi - RevSumi);
|
||||
*(here->BSIM4v7SPdpPtr) -= m * (gdsr - xcsdbi + gstotd + RevSumr - gbspdp + gIstotd);
|
||||
*(here->BSIM4v7SPgpPtr +1) += m * (xcsgbr - Gmi);
|
||||
*(here->BSIM4v7SPgpPtr) -= m * (Gmr - xcsgbi + gstotg - gbspg + gIstotg);
|
||||
*(here->BSIM4v7SPspPtr +1) += m * (xcssbr + gdsi + FwdSumi);
|
||||
*(here->BSIM4v7SPspPtr) += m * (gspr + xcssbi + gdsr + here->BSIM4v7gbs
|
||||
- gstots + FwdSumr + gbspsp - gIstots);
|
||||
*(here->BSIM4SPsPtr) -= m * (gspr + gstot);
|
||||
*(here->BSIM4SPbpPtr +1) += m * (xcsbbr - Gmbsi);
|
||||
*(here->BSIM4SPbpPtr) -= m * (gjbs + gstotb - xcsbbi + Gmbsr - gbspb + gIstotb);
|
||||
*(here->BSIM4v7SPsPtr) -= m * (gspr + gstot);
|
||||
*(here->BSIM4v7SPbpPtr +1) += m * (xcsbbr - Gmbsi);
|
||||
*(here->BSIM4v7SPbpPtr) -= m * (gjbs + gstotb - xcsbbi + Gmbsr - gbspb + gIstotb);
|
||||
|
||||
*(here->BSIM4SspPtr) -= m * (gspr - gstots);
|
||||
*(here->BSIM4SsPtr) += m * (gspr + gstot);
|
||||
*(here->BSIM4v7SspPtr) -= m * (gspr - gstots);
|
||||
*(here->BSIM4v7SsPtr) += m * (gspr + gstot);
|
||||
|
||||
*(here->BSIM4BPdpPtr +1) += m * xcbdb;
|
||||
*(here->BSIM4BPdpPtr) -= m * (gjbd - gbbdp + gIbtotd);
|
||||
*(here->BSIM4BPgpPtr +1) += m * xcbgb;
|
||||
*(here->BSIM4BPgpPtr) -= m * (here->BSIM4gbgs + gIbtotg);
|
||||
*(here->BSIM4BPspPtr +1) += m * xcbsb;
|
||||
*(here->BSIM4BPspPtr) -= m * (gjbs - gbbsp + gIbtots);
|
||||
*(here->BSIM4BPbpPtr +1) += m * xcbbb;
|
||||
*(here->BSIM4BPbpPtr) += m * (gjbd + gjbs - here->BSIM4gbbs
|
||||
*(here->BSIM4v7BPdpPtr +1) += m * xcbdb;
|
||||
*(here->BSIM4v7BPdpPtr) -= m * (gjbd - gbbdp + gIbtotd);
|
||||
*(here->BSIM4v7BPgpPtr +1) += m * xcbgb;
|
||||
*(here->BSIM4v7BPgpPtr) -= m * (here->BSIM4v7gbgs + gIbtotg);
|
||||
*(here->BSIM4v7BPspPtr +1) += m * xcbsb;
|
||||
*(here->BSIM4v7BPspPtr) -= m * (gjbs - gbbsp + gIbtots);
|
||||
*(here->BSIM4v7BPbpPtr +1) += m * xcbbb;
|
||||
*(here->BSIM4v7BPbpPtr) += m * (gjbd + gjbs - here->BSIM4v7gbbs
|
||||
- gIbtotb);
|
||||
ggidld = here->BSIM4ggidld;
|
||||
ggidlg = here->BSIM4ggidlg;
|
||||
ggidlb = here->BSIM4ggidlb;
|
||||
ggislg = here->BSIM4ggislg;
|
||||
ggisls = here->BSIM4ggisls;
|
||||
ggislb = here->BSIM4ggislb;
|
||||
ggidld = here->BSIM4v7ggidld;
|
||||
ggidlg = here->BSIM4v7ggidlg;
|
||||
ggidlb = here->BSIM4v7ggidlb;
|
||||
ggislg = here->BSIM4v7ggislg;
|
||||
ggisls = here->BSIM4v7ggisls;
|
||||
ggislb = here->BSIM4v7ggislb;
|
||||
|
||||
/* stamp gidl */
|
||||
(*(here->BSIM4DPdpPtr) += m * ggidld);
|
||||
(*(here->BSIM4DPgpPtr) += m * ggidlg);
|
||||
(*(here->BSIM4DPspPtr) -= m * ((ggidlg + ggidld) + ggidlb));
|
||||
(*(here->BSIM4DPbpPtr) += m * ggidlb);
|
||||
(*(here->BSIM4BPdpPtr) -= m * ggidld);
|
||||
(*(here->BSIM4BPgpPtr) -= m * ggidlg);
|
||||
(*(here->BSIM4BPspPtr) += m * ((ggidlg + ggidld) + ggidlb));
|
||||
(*(here->BSIM4BPbpPtr) -= m * ggidlb);
|
||||
(*(here->BSIM4v7DPdpPtr) += m * ggidld);
|
||||
(*(here->BSIM4v7DPgpPtr) += m * ggidlg);
|
||||
(*(here->BSIM4v7DPspPtr) -= m * ((ggidlg + ggidld) + ggidlb));
|
||||
(*(here->BSIM4v7DPbpPtr) += m * ggidlb);
|
||||
(*(here->BSIM4v7BPdpPtr) -= m * ggidld);
|
||||
(*(here->BSIM4v7BPgpPtr) -= m * ggidlg);
|
||||
(*(here->BSIM4v7BPspPtr) += m * ((ggidlg + ggidld) + ggidlb));
|
||||
(*(here->BSIM4v7BPbpPtr) -= m * ggidlb);
|
||||
/* stamp gisl */
|
||||
(*(here->BSIM4SPdpPtr) -= m * ((ggisls + ggislg) + ggislb));
|
||||
(*(here->BSIM4SPgpPtr) += m * ggislg);
|
||||
(*(here->BSIM4SPspPtr) += m * ggisls);
|
||||
(*(here->BSIM4SPbpPtr) += m * ggislb);
|
||||
(*(here->BSIM4BPdpPtr) += m * ((ggislg + ggisls) + ggislb));
|
||||
(*(here->BSIM4BPgpPtr) -= m * ggislg);
|
||||
(*(here->BSIM4BPspPtr) -= m * ggisls);
|
||||
(*(here->BSIM4BPbpPtr) -= m * ggislb);
|
||||
(*(here->BSIM4v7SPdpPtr) -= m * ((ggisls + ggislg) + ggislb));
|
||||
(*(here->BSIM4v7SPgpPtr) += m * ggislg);
|
||||
(*(here->BSIM4v7SPspPtr) += m * ggisls);
|
||||
(*(here->BSIM4v7SPbpPtr) += m * ggislb);
|
||||
(*(here->BSIM4v7BPdpPtr) += m * ((ggislg + ggisls) + ggislb));
|
||||
(*(here->BSIM4v7BPgpPtr) -= m * ggislg);
|
||||
(*(here->BSIM4v7BPspPtr) -= m * ggisls);
|
||||
(*(here->BSIM4v7BPbpPtr) -= m * ggislb);
|
||||
|
||||
if (here->BSIM4rbodyMod)
|
||||
{ (*(here->BSIM4DPdbPtr +1) += m * xcdbdb);
|
||||
(*(here->BSIM4DPdbPtr) -= m * here->BSIM4gbd);
|
||||
(*(here->BSIM4SPsbPtr +1) += m * xcsbsb);
|
||||
(*(here->BSIM4SPsbPtr) -= m * here->BSIM4gbs);
|
||||
if (here->BSIM4v7rbodyMod)
|
||||
{ (*(here->BSIM4v7DPdbPtr +1) += m * xcdbdb);
|
||||
(*(here->BSIM4v7DPdbPtr) -= m * here->BSIM4v7gbd);
|
||||
(*(here->BSIM4v7SPsbPtr +1) += m * xcsbsb);
|
||||
(*(here->BSIM4v7SPsbPtr) -= m * here->BSIM4v7gbs);
|
||||
|
||||
(*(here->BSIM4DBdpPtr +1) += m * xcdbdb);
|
||||
(*(here->BSIM4DBdpPtr) -= m * here->BSIM4gbd);
|
||||
(*(here->BSIM4DBdbPtr +1) -= m * xcdbdb);
|
||||
(*(here->BSIM4DBdbPtr) += m * (here->BSIM4gbd + here->BSIM4grbpd
|
||||
+ here->BSIM4grbdb));
|
||||
(*(here->BSIM4DBbpPtr) -= m * here->BSIM4grbpd);
|
||||
(*(here->BSIM4DBbPtr) -= m * here->BSIM4grbdb);
|
||||
(*(here->BSIM4v7DBdpPtr +1) += m * xcdbdb);
|
||||
(*(here->BSIM4v7DBdpPtr) -= m * here->BSIM4v7gbd);
|
||||
(*(here->BSIM4v7DBdbPtr +1) -= m * xcdbdb);
|
||||
(*(here->BSIM4v7DBdbPtr) += m * (here->BSIM4v7gbd + here->BSIM4v7grbpd
|
||||
+ here->BSIM4v7grbdb));
|
||||
(*(here->BSIM4v7DBbpPtr) -= m * here->BSIM4v7grbpd);
|
||||
(*(here->BSIM4v7DBbPtr) -= m * here->BSIM4v7grbdb);
|
||||
|
||||
(*(here->BSIM4BPdbPtr) -= m * here->BSIM4grbpd);
|
||||
(*(here->BSIM4BPbPtr) -= m * here->BSIM4grbpb);
|
||||
(*(here->BSIM4BPsbPtr) -= m * here->BSIM4grbps);
|
||||
(*(here->BSIM4BPbpPtr) += m * (here->BSIM4grbpd + here->BSIM4grbps
|
||||
+ here->BSIM4grbpb));
|
||||
/* WDLiu: (-here->BSIM4gbbs) already added to BPbpPtr */
|
||||
(*(here->BSIM4v7BPdbPtr) -= m * here->BSIM4v7grbpd);
|
||||
(*(here->BSIM4v7BPbPtr) -= m * here->BSIM4v7grbpb);
|
||||
(*(here->BSIM4v7BPsbPtr) -= m * here->BSIM4v7grbps);
|
||||
(*(here->BSIM4v7BPbpPtr) += m * (here->BSIM4v7grbpd + here->BSIM4v7grbps
|
||||
+ here->BSIM4v7grbpb));
|
||||
/* WDLiu: (-here->BSIM4v7gbbs) already added to BPbpPtr */
|
||||
|
||||
(*(here->BSIM4SBspPtr +1) += m * xcsbsb);
|
||||
(*(here->BSIM4SBspPtr) -= m * here->BSIM4gbs);
|
||||
(*(here->BSIM4SBbpPtr) -= m * here->BSIM4grbps);
|
||||
(*(here->BSIM4SBbPtr) -= m * here->BSIM4grbsb);
|
||||
(*(here->BSIM4SBsbPtr +1) -= m * xcsbsb);
|
||||
(*(here->BSIM4SBsbPtr) += m * (here->BSIM4gbs
|
||||
+ here->BSIM4grbps + here->BSIM4grbsb));
|
||||
(*(here->BSIM4v7SBspPtr +1) += m * xcsbsb);
|
||||
(*(here->BSIM4v7SBspPtr) -= m * here->BSIM4v7gbs);
|
||||
(*(here->BSIM4v7SBbpPtr) -= m * here->BSIM4v7grbps);
|
||||
(*(here->BSIM4v7SBbPtr) -= m * here->BSIM4v7grbsb);
|
||||
(*(here->BSIM4v7SBsbPtr +1) -= m * xcsbsb);
|
||||
(*(here->BSIM4v7SBsbPtr) += m * (here->BSIM4v7gbs
|
||||
+ here->BSIM4v7grbps + here->BSIM4v7grbsb));
|
||||
|
||||
(*(here->BSIM4BdbPtr) -= m * here->BSIM4grbdb);
|
||||
(*(here->BSIM4BbpPtr) -= m * here->BSIM4grbpb);
|
||||
(*(here->BSIM4BsbPtr) -= m * here->BSIM4grbsb);
|
||||
(*(here->BSIM4BbPtr) += m * (here->BSIM4grbsb + here->BSIM4grbdb
|
||||
+ here->BSIM4grbpb));
|
||||
(*(here->BSIM4v7BdbPtr) -= m * here->BSIM4v7grbdb);
|
||||
(*(here->BSIM4v7BbpPtr) -= m * here->BSIM4v7grbpb);
|
||||
(*(here->BSIM4v7BsbPtr) -= m * here->BSIM4v7grbsb);
|
||||
(*(here->BSIM4v7BbPtr) += m * (here->BSIM4v7grbsb + here->BSIM4v7grbdb
|
||||
+ here->BSIM4v7grbpb));
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -656,16 +656,16 @@ double m;
|
|||
* otherwise a singular AC NQS matrix may occur if the transient NQS is on.
|
||||
* The charge node is isolated from the instance.
|
||||
*/
|
||||
if (here->BSIM4trnqsMod)
|
||||
{ (*(here->BSIM4QqPtr) += m * 1.0);
|
||||
(*(here->BSIM4QgpPtr) += 0.0);
|
||||
(*(here->BSIM4QdpPtr) += 0.0);
|
||||
(*(here->BSIM4QspPtr) += 0.0);
|
||||
(*(here->BSIM4QbpPtr) += 0.0);
|
||||
if (here->BSIM4v7trnqsMod)
|
||||
{ (*(here->BSIM4v7QqPtr) += m * 1.0);
|
||||
(*(here->BSIM4v7QgpPtr) += 0.0);
|
||||
(*(here->BSIM4v7QdpPtr) += 0.0);
|
||||
(*(here->BSIM4v7QspPtr) += 0.0);
|
||||
(*(here->BSIM4v7QbpPtr) += 0.0);
|
||||
|
||||
(*(here->BSIM4DPqPtr) += 0.0);
|
||||
(*(here->BSIM4SPqPtr) += 0.0);
|
||||
(*(here->BSIM4GPqPtr) += 0.0);
|
||||
(*(here->BSIM4v7DPqPtr) += 0.0);
|
||||
(*(here->BSIM4v7SPqPtr) += 0.0);
|
||||
(*(here->BSIM4v7GPqPtr) += 0.0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -18,384 +18,384 @@
|
|||
#include "ngspice/ifsim.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "ngspice/devdefs.h"
|
||||
#include "bsim4def.h"
|
||||
#include "bsim4v7def.h"
|
||||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
int
|
||||
BSIM4ask(
|
||||
BSIM4v7ask(
|
||||
CKTcircuit *ckt,
|
||||
GENinstance *inst,
|
||||
int which,
|
||||
IFvalue *value,
|
||||
IFvalue *select)
|
||||
{
|
||||
BSIM4instance *here = (BSIM4instance*)inst;
|
||||
BSIM4v7instance *here = (BSIM4v7instance*)inst;
|
||||
|
||||
NG_IGNORE(select);
|
||||
|
||||
switch(which)
|
||||
{ case BSIM4_L:
|
||||
value->rValue = here->BSIM4l;
|
||||
{ case BSIM4v7_L:
|
||||
value->rValue = here->BSIM4v7l;
|
||||
return(OK);
|
||||
case BSIM4_W:
|
||||
value->rValue = here->BSIM4w;
|
||||
case BSIM4v7_W:
|
||||
value->rValue = here->BSIM4v7w;
|
||||
return(OK);
|
||||
case BSIM4_M:
|
||||
value->rValue = here->BSIM4m;
|
||||
case BSIM4v7_M:
|
||||
value->rValue = here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_NF:
|
||||
value->rValue = here->BSIM4nf;
|
||||
case BSIM4v7_NF:
|
||||
value->rValue = here->BSIM4v7nf;
|
||||
return(OK);
|
||||
case BSIM4_MIN:
|
||||
value->iValue = here->BSIM4min;
|
||||
case BSIM4v7_MIN:
|
||||
value->iValue = here->BSIM4v7min;
|
||||
return(OK);
|
||||
case BSIM4_AS:
|
||||
value->rValue = here->BSIM4sourceArea;
|
||||
case BSIM4v7_AS:
|
||||
value->rValue = here->BSIM4v7sourceArea;
|
||||
return(OK);
|
||||
case BSIM4_AD:
|
||||
value->rValue = here->BSIM4drainArea;
|
||||
case BSIM4v7_AD:
|
||||
value->rValue = here->BSIM4v7drainArea;
|
||||
return(OK);
|
||||
case BSIM4_PS:
|
||||
value->rValue = here->BSIM4sourcePerimeter;
|
||||
case BSIM4v7_PS:
|
||||
value->rValue = here->BSIM4v7sourcePerimeter;
|
||||
return(OK);
|
||||
case BSIM4_PD:
|
||||
value->rValue = here->BSIM4drainPerimeter;
|
||||
case BSIM4v7_PD:
|
||||
value->rValue = here->BSIM4v7drainPerimeter;
|
||||
return(OK);
|
||||
case BSIM4_NRS:
|
||||
value->rValue = here->BSIM4sourceSquares;
|
||||
case BSIM4v7_NRS:
|
||||
value->rValue = here->BSIM4v7sourceSquares;
|
||||
return(OK);
|
||||
case BSIM4_NRD:
|
||||
value->rValue = here->BSIM4drainSquares;
|
||||
case BSIM4v7_NRD:
|
||||
value->rValue = here->BSIM4v7drainSquares;
|
||||
return(OK);
|
||||
case BSIM4_OFF:
|
||||
value->rValue = here->BSIM4off;
|
||||
case BSIM4v7_OFF:
|
||||
value->rValue = here->BSIM4v7off;
|
||||
return(OK);
|
||||
case BSIM4_SA:
|
||||
value->rValue = here->BSIM4sa ;
|
||||
case BSIM4v7_SA:
|
||||
value->rValue = here->BSIM4v7sa ;
|
||||
return(OK);
|
||||
case BSIM4_SB:
|
||||
value->rValue = here->BSIM4sb ;
|
||||
case BSIM4v7_SB:
|
||||
value->rValue = here->BSIM4v7sb ;
|
||||
return(OK);
|
||||
case BSIM4_SD:
|
||||
value->rValue = here->BSIM4sd ;
|
||||
case BSIM4v7_SD:
|
||||
value->rValue = here->BSIM4v7sd ;
|
||||
return(OK);
|
||||
case BSIM4_SCA:
|
||||
value->rValue = here->BSIM4sca ;
|
||||
case BSIM4v7_SCA:
|
||||
value->rValue = here->BSIM4v7sca ;
|
||||
return(OK);
|
||||
case BSIM4_SCB:
|
||||
value->rValue = here->BSIM4scb ;
|
||||
case BSIM4v7_SCB:
|
||||
value->rValue = here->BSIM4v7scb ;
|
||||
return(OK);
|
||||
case BSIM4_SCC:
|
||||
value->rValue = here->BSIM4scc ;
|
||||
case BSIM4v7_SCC:
|
||||
value->rValue = here->BSIM4v7scc ;
|
||||
return(OK);
|
||||
case BSIM4_SC:
|
||||
value->rValue = here->BSIM4sc ;
|
||||
case BSIM4v7_SC:
|
||||
value->rValue = here->BSIM4v7sc ;
|
||||
return(OK);
|
||||
|
||||
case BSIM4_RBSB:
|
||||
value->rValue = here->BSIM4rbsb;
|
||||
case BSIM4v7_RBSB:
|
||||
value->rValue = here->BSIM4v7rbsb;
|
||||
return(OK);
|
||||
case BSIM4_RBDB:
|
||||
value->rValue = here->BSIM4rbdb;
|
||||
case BSIM4v7_RBDB:
|
||||
value->rValue = here->BSIM4v7rbdb;
|
||||
return(OK);
|
||||
case BSIM4_RBPB:
|
||||
value->rValue = here->BSIM4rbpb;
|
||||
case BSIM4v7_RBPB:
|
||||
value->rValue = here->BSIM4v7rbpb;
|
||||
return(OK);
|
||||
case BSIM4_RBPS:
|
||||
value->rValue = here->BSIM4rbps;
|
||||
case BSIM4v7_RBPS:
|
||||
value->rValue = here->BSIM4v7rbps;
|
||||
return(OK);
|
||||
case BSIM4_RBPD:
|
||||
value->rValue = here->BSIM4rbpd;
|
||||
case BSIM4v7_RBPD:
|
||||
value->rValue = here->BSIM4v7rbpd;
|
||||
return(OK);
|
||||
case BSIM4_DELVTO:
|
||||
value->rValue = here->BSIM4delvto;
|
||||
case BSIM4v7_DELVTO:
|
||||
value->rValue = here->BSIM4v7delvto;
|
||||
return(OK);
|
||||
case BSIM4_XGW:
|
||||
value->rValue = here->BSIM4xgw;
|
||||
case BSIM4v7_XGW:
|
||||
value->rValue = here->BSIM4v7xgw;
|
||||
return(OK);
|
||||
case BSIM4_NGCON:
|
||||
value->rValue = here->BSIM4ngcon;
|
||||
case BSIM4v7_NGCON:
|
||||
value->rValue = here->BSIM4v7ngcon;
|
||||
return(OK);
|
||||
case BSIM4_TRNQSMOD:
|
||||
value->iValue = here->BSIM4trnqsMod;
|
||||
case BSIM4v7_TRNQSMOD:
|
||||
value->iValue = here->BSIM4v7trnqsMod;
|
||||
return(OK);
|
||||
case BSIM4_ACNQSMOD:
|
||||
value->iValue = here->BSIM4acnqsMod;
|
||||
case BSIM4v7_ACNQSMOD:
|
||||
value->iValue = here->BSIM4v7acnqsMod;
|
||||
return(OK);
|
||||
case BSIM4_RBODYMOD:
|
||||
value->iValue = here->BSIM4rbodyMod;
|
||||
case BSIM4v7_RBODYMOD:
|
||||
value->iValue = here->BSIM4v7rbodyMod;
|
||||
return(OK);
|
||||
case BSIM4_RGATEMOD:
|
||||
value->iValue = here->BSIM4rgateMod;
|
||||
case BSIM4v7_RGATEMOD:
|
||||
value->iValue = here->BSIM4v7rgateMod;
|
||||
return(OK);
|
||||
case BSIM4_GEOMOD:
|
||||
value->iValue = here->BSIM4geoMod;
|
||||
case BSIM4v7_GEOMOD:
|
||||
value->iValue = here->BSIM4v7geoMod;
|
||||
return(OK);
|
||||
case BSIM4_RGEOMOD:
|
||||
value->iValue = here->BSIM4rgeoMod;
|
||||
case BSIM4v7_RGEOMOD:
|
||||
value->iValue = here->BSIM4v7rgeoMod;
|
||||
return(OK);
|
||||
case BSIM4_IC_VDS:
|
||||
value->rValue = here->BSIM4icVDS;
|
||||
case BSIM4v7_IC_VDS:
|
||||
value->rValue = here->BSIM4v7icVDS;
|
||||
return(OK);
|
||||
case BSIM4_IC_VGS:
|
||||
value->rValue = here->BSIM4icVGS;
|
||||
case BSIM4v7_IC_VGS:
|
||||
value->rValue = here->BSIM4v7icVGS;
|
||||
return(OK);
|
||||
case BSIM4_IC_VBS:
|
||||
value->rValue = here->BSIM4icVBS;
|
||||
case BSIM4v7_IC_VBS:
|
||||
value->rValue = here->BSIM4v7icVBS;
|
||||
return(OK);
|
||||
case BSIM4_DNODE:
|
||||
value->iValue = here->BSIM4dNode;
|
||||
case BSIM4v7_DNODE:
|
||||
value->iValue = here->BSIM4v7dNode;
|
||||
return(OK);
|
||||
case BSIM4_GNODEEXT:
|
||||
value->iValue = here->BSIM4gNodeExt;
|
||||
case BSIM4v7_GNODEEXT:
|
||||
value->iValue = here->BSIM4v7gNodeExt;
|
||||
return(OK);
|
||||
case BSIM4_SNODE:
|
||||
value->iValue = here->BSIM4sNode;
|
||||
case BSIM4v7_SNODE:
|
||||
value->iValue = here->BSIM4v7sNode;
|
||||
return(OK);
|
||||
case BSIM4_BNODE:
|
||||
value->iValue = here->BSIM4bNode;
|
||||
case BSIM4v7_BNODE:
|
||||
value->iValue = here->BSIM4v7bNode;
|
||||
return(OK);
|
||||
case BSIM4_DNODEPRIME:
|
||||
value->iValue = here->BSIM4dNodePrime;
|
||||
case BSIM4v7_DNODEPRIME:
|
||||
value->iValue = here->BSIM4v7dNodePrime;
|
||||
return(OK);
|
||||
case BSIM4_GNODEPRIME:
|
||||
value->iValue = here->BSIM4gNodePrime;
|
||||
case BSIM4v7_GNODEPRIME:
|
||||
value->iValue = here->BSIM4v7gNodePrime;
|
||||
return(OK);
|
||||
case BSIM4_GNODEMID:
|
||||
value->iValue = here->BSIM4gNodeMid;
|
||||
case BSIM4v7_GNODEMID:
|
||||
value->iValue = here->BSIM4v7gNodeMid;
|
||||
return(OK);
|
||||
case BSIM4_SNODEPRIME:
|
||||
value->iValue = here->BSIM4sNodePrime;
|
||||
case BSIM4v7_SNODEPRIME:
|
||||
value->iValue = here->BSIM4v7sNodePrime;
|
||||
return(OK);
|
||||
case BSIM4_DBNODE:
|
||||
value->iValue = here->BSIM4dbNode;
|
||||
case BSIM4v7_DBNODE:
|
||||
value->iValue = here->BSIM4v7dbNode;
|
||||
return(OK);
|
||||
case BSIM4_BNODEPRIME:
|
||||
value->iValue = here->BSIM4bNodePrime;
|
||||
case BSIM4v7_BNODEPRIME:
|
||||
value->iValue = here->BSIM4v7bNodePrime;
|
||||
return(OK);
|
||||
case BSIM4_SBNODE:
|
||||
value->iValue = here->BSIM4sbNode;
|
||||
case BSIM4v7_SBNODE:
|
||||
value->iValue = here->BSIM4v7sbNode;
|
||||
return(OK);
|
||||
case BSIM4_SOURCECONDUCT:
|
||||
value->rValue = here->BSIM4sourceConductance;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_SOURCECONDUCT:
|
||||
value->rValue = here->BSIM4v7sourceConductance;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_DRAINCONDUCT:
|
||||
value->rValue = here->BSIM4drainConductance;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_DRAINCONDUCT:
|
||||
value->rValue = here->BSIM4v7drainConductance;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_VBD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4vbd);
|
||||
case BSIM4v7_VBD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v7vbd);
|
||||
return(OK);
|
||||
case BSIM4_VBS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4vbs);
|
||||
case BSIM4v7_VBS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v7vbs);
|
||||
return(OK);
|
||||
case BSIM4_VGS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4vgs);
|
||||
case BSIM4v7_VGS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v7vgs);
|
||||
return(OK);
|
||||
case BSIM4_VDS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4vds);
|
||||
case BSIM4v7_VDS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v7vds);
|
||||
return(OK);
|
||||
case BSIM4_CD:
|
||||
value->rValue = here->BSIM4cd;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CD:
|
||||
value->rValue = here->BSIM4v7cd;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CBS:
|
||||
value->rValue = here->BSIM4cbs;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CBS:
|
||||
value->rValue = here->BSIM4v7cbs;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CBD:
|
||||
value->rValue = here->BSIM4cbd;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CBD:
|
||||
value->rValue = here->BSIM4v7cbd;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CSUB:
|
||||
value->rValue = here->BSIM4csub;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CSUB:
|
||||
value->rValue = here->BSIM4v7csub;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_QINV:
|
||||
value->rValue = here-> BSIM4qinv;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_QINV:
|
||||
value->rValue = here-> BSIM4v7qinv;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_IGIDL:
|
||||
value->rValue = here->BSIM4Igidl;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_IGIDL:
|
||||
value->rValue = here->BSIM4v7Igidl;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_IGISL:
|
||||
value->rValue = here->BSIM4Igisl;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_IGISL:
|
||||
value->rValue = here->BSIM4v7Igisl;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_IGS:
|
||||
value->rValue = here->BSIM4Igs;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_IGS:
|
||||
value->rValue = here->BSIM4v7Igs;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_IGD:
|
||||
value->rValue = here->BSIM4Igd;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_IGD:
|
||||
value->rValue = here->BSIM4v7Igd;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_IGB:
|
||||
value->rValue = here->BSIM4Igb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_IGB:
|
||||
value->rValue = here->BSIM4v7Igb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_IGCS:
|
||||
value->rValue = here->BSIM4Igcs;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_IGCS:
|
||||
value->rValue = here->BSIM4v7Igcs;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_IGCD:
|
||||
value->rValue = here->BSIM4Igcd;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_IGCD:
|
||||
value->rValue = here->BSIM4v7Igcd;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_GM:
|
||||
value->rValue = here->BSIM4gm;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_GM:
|
||||
value->rValue = here->BSIM4v7gm;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_GDS:
|
||||
value->rValue = here->BSIM4gds;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_GDS:
|
||||
value->rValue = here->BSIM4v7gds;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_GMBS:
|
||||
value->rValue = here->BSIM4gmbs;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_GMBS:
|
||||
value->rValue = here->BSIM4v7gmbs;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_GBD:
|
||||
value->rValue = here->BSIM4gbd;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_GBD:
|
||||
value->rValue = here->BSIM4v7gbd;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_GBS:
|
||||
value->rValue = here->BSIM4gbs;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_GBS:
|
||||
value->rValue = here->BSIM4v7gbs;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
/* case BSIM4_QB:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4qb);
|
||||
/* case BSIM4v7_QB:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v7qb);
|
||||
return(OK); */
|
||||
case BSIM4_CQB:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4cqb);
|
||||
case BSIM4v7_CQB:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v7cqb);
|
||||
return(OK);
|
||||
/* case BSIM4_QG:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4qg);
|
||||
/* case BSIM4v7_QG:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v7qg);
|
||||
return(OK); */
|
||||
case BSIM4_CQG:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4cqg);
|
||||
case BSIM4v7_CQG:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v7cqg);
|
||||
return(OK);
|
||||
/* case BSIM4_QD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4qd);
|
||||
/* case BSIM4v7_QD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v7qd);
|
||||
return(OK); */
|
||||
case BSIM4_CQD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4cqd);
|
||||
case BSIM4v7_CQD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v7cqd);
|
||||
return(OK);
|
||||
/* case BSIM4_QS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4qs);
|
||||
/* case BSIM4v7_QS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v7qs);
|
||||
return(OK); */
|
||||
case BSIM4_QB:
|
||||
value->rValue = here->BSIM4qbulk;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_QB:
|
||||
value->rValue = here->BSIM4v7qbulk;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_QG:
|
||||
value->rValue = here->BSIM4qgate;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_QG:
|
||||
value->rValue = here->BSIM4v7qgate;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_QS:
|
||||
value->rValue = here->BSIM4qsrc;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_QS:
|
||||
value->rValue = here->BSIM4v7qsrc;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_QD:
|
||||
value->rValue = here->BSIM4qdrn;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_QD:
|
||||
value->rValue = here->BSIM4v7qdrn;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_QDEF:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4qdef);
|
||||
case BSIM4v7_QDEF:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v7qdef);
|
||||
return(OK);
|
||||
case BSIM4_GCRG:
|
||||
value->rValue = here->BSIM4gcrg;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_GCRG:
|
||||
value->rValue = here->BSIM4v7gcrg;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_GTAU:
|
||||
value->rValue = here->BSIM4gtau;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_GTAU:
|
||||
value->rValue = here->BSIM4v7gtau;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CGGB:
|
||||
value->rValue = here->BSIM4cggb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CGGB:
|
||||
value->rValue = here->BSIM4v7cggb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CGDB:
|
||||
value->rValue = here->BSIM4cgdb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CGDB:
|
||||
value->rValue = here->BSIM4v7cgdb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CGSB:
|
||||
value->rValue = here->BSIM4cgsb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CGSB:
|
||||
value->rValue = here->BSIM4v7cgsb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CDGB:
|
||||
value->rValue = here->BSIM4cdgb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CDGB:
|
||||
value->rValue = here->BSIM4v7cdgb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CDDB:
|
||||
value->rValue = here->BSIM4cddb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CDDB:
|
||||
value->rValue = here->BSIM4v7cddb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CDSB:
|
||||
value->rValue = here->BSIM4cdsb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CDSB:
|
||||
value->rValue = here->BSIM4v7cdsb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CBGB:
|
||||
value->rValue = here->BSIM4cbgb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CBGB:
|
||||
value->rValue = here->BSIM4v7cbgb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CBDB:
|
||||
value->rValue = here->BSIM4cbdb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CBDB:
|
||||
value->rValue = here->BSIM4v7cbdb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CBSB:
|
||||
value->rValue = here->BSIM4cbsb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CBSB:
|
||||
value->rValue = here->BSIM4v7cbsb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CSGB:
|
||||
value->rValue = here->BSIM4csgb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CSGB:
|
||||
value->rValue = here->BSIM4v7csgb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CSDB:
|
||||
value->rValue = here->BSIM4csdb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CSDB:
|
||||
value->rValue = here->BSIM4v7csdb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CSSB:
|
||||
value->rValue = here->BSIM4cssb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CSSB:
|
||||
value->rValue = here->BSIM4v7cssb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CGBB:
|
||||
value->rValue = here->BSIM4cgbb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CGBB:
|
||||
value->rValue = here->BSIM4v7cgbb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CDBB:
|
||||
value->rValue = here->BSIM4cdbb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CDBB:
|
||||
value->rValue = here->BSIM4v7cdbb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CSBB:
|
||||
value->rValue = here->BSIM4csbb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CSBB:
|
||||
value->rValue = here->BSIM4v7csbb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CBBB:
|
||||
value->rValue = here->BSIM4cbbb;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CBBB:
|
||||
value->rValue = here->BSIM4v7cbbb;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CAPBD:
|
||||
value->rValue = here->BSIM4capbd;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CAPBD:
|
||||
value->rValue = here->BSIM4v7capbd;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_CAPBS:
|
||||
value->rValue = here->BSIM4capbs;
|
||||
value->rValue *= here->BSIM4m;
|
||||
case BSIM4v7_CAPBS:
|
||||
value->rValue = here->BSIM4v7capbs;
|
||||
value->rValue *= here->BSIM4v7m;
|
||||
return(OK);
|
||||
case BSIM4_VON:
|
||||
value->rValue = here->BSIM4von;
|
||||
case BSIM4v7_VON:
|
||||
value->rValue = here->BSIM4v7von;
|
||||
return(OK);
|
||||
case BSIM4_VDSAT:
|
||||
value->rValue = here->BSIM4vdsat;
|
||||
case BSIM4v7_VDSAT:
|
||||
value->rValue = here->BSIM4v7vdsat;
|
||||
return(OK);
|
||||
case BSIM4_QBS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4qbs);
|
||||
case BSIM4v7_QBS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v7qbs);
|
||||
return(OK);
|
||||
case BSIM4_QBD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4qbd);
|
||||
case BSIM4v7_QBD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM4v7qbd);
|
||||
return(OK);
|
||||
default:
|
||||
return(E_BADPARM);
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -15,7 +15,7 @@
|
|||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "bsim4def.h"
|
||||
#include "bsim4v7def.h"
|
||||
#include "ngspice/trandefs.h"
|
||||
#include "ngspice/const.h"
|
||||
#include "ngspice/devdefs.h"
|
||||
|
|
@ -24,12 +24,12 @@
|
|||
|
||||
|
||||
int
|
||||
BSIM4convTest(
|
||||
BSIM4v7convTest(
|
||||
GENmodel *inModel,
|
||||
CKTcircuit *ckt)
|
||||
{
|
||||
BSIM4model *model = (BSIM4model*)inModel;
|
||||
BSIM4instance *here;
|
||||
BSIM4v7model *model = (BSIM4v7model*)inModel;
|
||||
BSIM4v7instance *here;
|
||||
double delvbd, delvbs, delvds, delvgd, delvgs;
|
||||
double delvdbd, delvsbs;
|
||||
double delvbd_jct, delvbs_jct;
|
||||
|
|
@ -41,111 +41,111 @@ double Isestot, cseshat, Idedtot, cdedhat;
|
|||
double Igstot, cgshat, Igdtot, cgdhat, Igbtot, cgbhat;
|
||||
double tol0, tol1, tol2, tol3, tol4, tol5, tol6;
|
||||
|
||||
for (; model != NULL; model = model->BSIM4nextModel)
|
||||
{ for (here = model->BSIM4instances; here != NULL ;
|
||||
here=here->BSIM4nextInstance)
|
||||
for (; model != NULL; model = model->BSIM4v7nextModel)
|
||||
{ for (here = model->BSIM4v7instances; here != NULL ;
|
||||
here=here->BSIM4v7nextInstance)
|
||||
{
|
||||
vds = model->BSIM4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4dNodePrime)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4sNodePrime));
|
||||
vgs = model->BSIM4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4gNodePrime)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4sNodePrime));
|
||||
vbs = model->BSIM4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4bNodePrime)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4sNodePrime));
|
||||
vdbs = model->BSIM4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4dbNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4sNodePrime));
|
||||
vsbs = model->BSIM4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4sbNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4sNodePrime));
|
||||
vses = model->BSIM4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4sNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4sNodePrime));
|
||||
vdes = model->BSIM4type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4dNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4sNodePrime));
|
||||
vds = model->BSIM4v7type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4v7dNodePrime)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4v7sNodePrime));
|
||||
vgs = model->BSIM4v7type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4v7gNodePrime)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4v7sNodePrime));
|
||||
vbs = model->BSIM4v7type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4v7bNodePrime)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4v7sNodePrime));
|
||||
vdbs = model->BSIM4v7type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4v7dbNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4v7sNodePrime));
|
||||
vsbs = model->BSIM4v7type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4v7sbNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4v7sNodePrime));
|
||||
vses = model->BSIM4v7type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4v7sNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4v7sNodePrime));
|
||||
vdes = model->BSIM4v7type
|
||||
* (*(ckt->CKTrhsOld + here->BSIM4v7dNode)
|
||||
- *(ckt->CKTrhsOld + here->BSIM4v7sNodePrime));
|
||||
|
||||
vgdo = *(ckt->CKTstate0 + here->BSIM4vgs)
|
||||
- *(ckt->CKTstate0 + here->BSIM4vds);
|
||||
vgdo = *(ckt->CKTstate0 + here->BSIM4v7vgs)
|
||||
- *(ckt->CKTstate0 + here->BSIM4v7vds);
|
||||
vbd = vbs - vds;
|
||||
vdbd = vdbs - vds;
|
||||
vgd = vgs - vds;
|
||||
|
||||
delvbd = vbd - *(ckt->CKTstate0 + here->BSIM4vbd);
|
||||
delvdbd = vdbd - *(ckt->CKTstate0 + here->BSIM4vdbd);
|
||||
delvbd = vbd - *(ckt->CKTstate0 + here->BSIM4v7vbd);
|
||||
delvdbd = vdbd - *(ckt->CKTstate0 + here->BSIM4v7vdbd);
|
||||
delvgd = vgd - vgdo;
|
||||
|
||||
delvds = vds - *(ckt->CKTstate0 + here->BSIM4vds);
|
||||
delvgs = vgs - *(ckt->CKTstate0 + here->BSIM4vgs);
|
||||
delvbs = vbs - *(ckt->CKTstate0 + here->BSIM4vbs);
|
||||
delvsbs = vsbs - *(ckt->CKTstate0 + here->BSIM4vsbs);
|
||||
delvds = vds - *(ckt->CKTstate0 + here->BSIM4v7vds);
|
||||
delvgs = vgs - *(ckt->CKTstate0 + here->BSIM4v7vgs);
|
||||
delvbs = vbs - *(ckt->CKTstate0 + here->BSIM4v7vbs);
|
||||
delvsbs = vsbs - *(ckt->CKTstate0 + here->BSIM4v7vsbs);
|
||||
|
||||
delvses = vses - (*(ckt->CKTstate0 + here->BSIM4vses));
|
||||
vdedo = *(ckt->CKTstate0 + here->BSIM4vdes)
|
||||
- *(ckt->CKTstate0 + here->BSIM4vds);
|
||||
delvdes = vdes - *(ckt->CKTstate0 + here->BSIM4vdes);
|
||||
delvses = vses - (*(ckt->CKTstate0 + here->BSIM4v7vses));
|
||||
vdedo = *(ckt->CKTstate0 + here->BSIM4v7vdes)
|
||||
- *(ckt->CKTstate0 + here->BSIM4v7vds);
|
||||
delvdes = vdes - *(ckt->CKTstate0 + here->BSIM4v7vdes);
|
||||
delvded = vdes - vds - vdedo;
|
||||
|
||||
delvbd_jct = (!here->BSIM4rbodyMod) ? delvbd : delvdbd;
|
||||
delvbs_jct = (!here->BSIM4rbodyMod) ? delvbs : delvsbs;
|
||||
delvbd_jct = (!here->BSIM4v7rbodyMod) ? delvbd : delvdbd;
|
||||
delvbs_jct = (!here->BSIM4v7rbodyMod) ? delvbs : delvsbs;
|
||||
|
||||
if (here->BSIM4mode >= 0)
|
||||
{ Idtot = here->BSIM4cd + here->BSIM4csub - here->BSIM4cbd
|
||||
+ here->BSIM4Igidl;
|
||||
cdhat = Idtot - here->BSIM4gbd * delvbd_jct
|
||||
+ (here->BSIM4gmbs + here->BSIM4gbbs + here->BSIM4ggidlb) * delvbs
|
||||
+ (here->BSIM4gm + here->BSIM4gbgs + here->BSIM4ggidlg) * delvgs
|
||||
+ (here->BSIM4gds + here->BSIM4gbds + here->BSIM4ggidld) * delvds;
|
||||
if (here->BSIM4v7mode >= 0)
|
||||
{ Idtot = here->BSIM4v7cd + here->BSIM4v7csub - here->BSIM4v7cbd
|
||||
+ here->BSIM4v7Igidl;
|
||||
cdhat = Idtot - here->BSIM4v7gbd * delvbd_jct
|
||||
+ (here->BSIM4v7gmbs + here->BSIM4v7gbbs + here->BSIM4v7ggidlb) * delvbs
|
||||
+ (here->BSIM4v7gm + here->BSIM4v7gbgs + here->BSIM4v7ggidlg) * delvgs
|
||||
+ (here->BSIM4v7gds + here->BSIM4v7gbds + here->BSIM4v7ggidld) * delvds;
|
||||
|
||||
Igstot = here->BSIM4Igs + here->BSIM4Igcs;
|
||||
cgshat = Igstot + (here->BSIM4gIgsg + here->BSIM4gIgcsg) * delvgs
|
||||
+ here->BSIM4gIgcsd * delvds + here->BSIM4gIgcsb * delvbs;
|
||||
Igstot = here->BSIM4v7Igs + here->BSIM4v7Igcs;
|
||||
cgshat = Igstot + (here->BSIM4v7gIgsg + here->BSIM4v7gIgcsg) * delvgs
|
||||
+ here->BSIM4v7gIgcsd * delvds + here->BSIM4v7gIgcsb * delvbs;
|
||||
|
||||
Igdtot = here->BSIM4Igd + here->BSIM4Igcd;
|
||||
cgdhat = Igdtot + here->BSIM4gIgdg * delvgd + here->BSIM4gIgcdg * delvgs
|
||||
+ here->BSIM4gIgcdd * delvds + here->BSIM4gIgcdb * delvbs;
|
||||
Igdtot = here->BSIM4v7Igd + here->BSIM4v7Igcd;
|
||||
cgdhat = Igdtot + here->BSIM4v7gIgdg * delvgd + here->BSIM4v7gIgcdg * delvgs
|
||||
+ here->BSIM4v7gIgcdd * delvds + here->BSIM4v7gIgcdb * delvbs;
|
||||
|
||||
Igbtot = here->BSIM4Igb;
|
||||
cgbhat = here->BSIM4Igb + here->BSIM4gIgbg * delvgs + here->BSIM4gIgbd
|
||||
* delvds + here->BSIM4gIgbb * delvbs;
|
||||
Igbtot = here->BSIM4v7Igb;
|
||||
cgbhat = here->BSIM4v7Igb + here->BSIM4v7gIgbg * delvgs + here->BSIM4v7gIgbd
|
||||
* delvds + here->BSIM4v7gIgbb * delvbs;
|
||||
}
|
||||
else
|
||||
{ Idtot = here->BSIM4cd + here->BSIM4cbd - here->BSIM4Igidl; /* bugfix */
|
||||
cdhat = Idtot + here->BSIM4gbd * delvbd_jct + here->BSIM4gmbs
|
||||
* delvbd + here->BSIM4gm * delvgd
|
||||
- (here->BSIM4gds + here->BSIM4ggidls) * delvds
|
||||
- here->BSIM4ggidlg * delvgs - here->BSIM4ggidlb * delvbs;
|
||||
{ Idtot = here->BSIM4v7cd + here->BSIM4v7cbd - here->BSIM4v7Igidl; /* bugfix */
|
||||
cdhat = Idtot + here->BSIM4v7gbd * delvbd_jct + here->BSIM4v7gmbs
|
||||
* delvbd + here->BSIM4v7gm * delvgd
|
||||
- (here->BSIM4v7gds + here->BSIM4v7ggidls) * delvds
|
||||
- here->BSIM4v7ggidlg * delvgs - here->BSIM4v7ggidlb * delvbs;
|
||||
|
||||
Igstot = here->BSIM4Igs + here->BSIM4Igcd;
|
||||
cgshat = Igstot + here->BSIM4gIgsg * delvgs + here->BSIM4gIgcdg * delvgd
|
||||
- here->BSIM4gIgcdd * delvds + here->BSIM4gIgcdb * delvbd;
|
||||
Igstot = here->BSIM4v7Igs + here->BSIM4v7Igcd;
|
||||
cgshat = Igstot + here->BSIM4v7gIgsg * delvgs + here->BSIM4v7gIgcdg * delvgd
|
||||
- here->BSIM4v7gIgcdd * delvds + here->BSIM4v7gIgcdb * delvbd;
|
||||
|
||||
Igdtot = here->BSIM4Igd + here->BSIM4Igcs;
|
||||
cgdhat = Igdtot + (here->BSIM4gIgdg + here->BSIM4gIgcsg) * delvgd
|
||||
- here->BSIM4gIgcsd * delvds + here->BSIM4gIgcsb * delvbd;
|
||||
Igdtot = here->BSIM4v7Igd + here->BSIM4v7Igcs;
|
||||
cgdhat = Igdtot + (here->BSIM4v7gIgdg + here->BSIM4v7gIgcsg) * delvgd
|
||||
- here->BSIM4v7gIgcsd * delvds + here->BSIM4v7gIgcsb * delvbd;
|
||||
|
||||
Igbtot = here->BSIM4Igb;
|
||||
cgbhat = here->BSIM4Igb + here->BSIM4gIgbg * delvgd - here->BSIM4gIgbd
|
||||
* delvds + here->BSIM4gIgbb * delvbd;
|
||||
Igbtot = here->BSIM4v7Igb;
|
||||
cgbhat = here->BSIM4v7Igb + here->BSIM4v7gIgbg * delvgd - here->BSIM4v7gIgbd
|
||||
* delvds + here->BSIM4v7gIgbb * delvbd;
|
||||
}
|
||||
|
||||
Isestot = here->BSIM4gstot * (*(ckt->CKTstate0 + here->BSIM4vses));
|
||||
cseshat = Isestot + here->BSIM4gstot * delvses
|
||||
+ here->BSIM4gstotd * delvds + here->BSIM4gstotg * delvgs
|
||||
+ here->BSIM4gstotb * delvbs;
|
||||
Isestot = here->BSIM4v7gstot * (*(ckt->CKTstate0 + here->BSIM4v7vses));
|
||||
cseshat = Isestot + here->BSIM4v7gstot * delvses
|
||||
+ here->BSIM4v7gstotd * delvds + here->BSIM4v7gstotg * delvgs
|
||||
+ here->BSIM4v7gstotb * delvbs;
|
||||
|
||||
Idedtot = here->BSIM4gdtot * vdedo;
|
||||
cdedhat = Idedtot + here->BSIM4gdtot * delvded
|
||||
+ here->BSIM4gdtotd * delvds + here->BSIM4gdtotg * delvgs
|
||||
+ here->BSIM4gdtotb * delvbs;
|
||||
Idedtot = here->BSIM4v7gdtot * vdedo;
|
||||
cdedhat = Idedtot + here->BSIM4v7gdtot * delvded
|
||||
+ here->BSIM4v7gdtotd * delvds + here->BSIM4v7gdtotg * delvgs
|
||||
+ here->BSIM4v7gdtotb * delvbs;
|
||||
|
||||
/*
|
||||
* Check convergence
|
||||
*/
|
||||
|
||||
if ((here->BSIM4off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
||||
if ((here->BSIM4v7off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
||||
{ tol0 = ckt->CKTreltol * MAX(fabs(cdhat), fabs(Idtot))
|
||||
+ ckt->CKTabstol;
|
||||
tol1 = ckt->CKTreltol * MAX(fabs(cseshat), fabs(Isestot))
|
||||
|
|
@ -171,21 +171,21 @@ double tol0, tol1, tol2, tol3, tol4, tol5, tol6;
|
|||
return(OK);
|
||||
}
|
||||
|
||||
Ibtot = here->BSIM4cbs + here->BSIM4cbd
|
||||
- here->BSIM4Igidl - here->BSIM4Igisl - here->BSIM4csub;
|
||||
if (here->BSIM4mode >= 0)
|
||||
{ cbhat = Ibtot + here->BSIM4gbd * delvbd_jct
|
||||
+ here->BSIM4gbs * delvbs_jct - (here->BSIM4gbbs + here->BSIM4ggidlb)
|
||||
* delvbs - (here->BSIM4gbgs + here->BSIM4ggidlg) * delvgs
|
||||
- (here->BSIM4gbds + here->BSIM4ggidld) * delvds
|
||||
- here->BSIM4ggislg * delvgd - here->BSIM4ggislb* delvbd + here->BSIM4ggisls * delvds ;
|
||||
Ibtot = here->BSIM4v7cbs + here->BSIM4v7cbd
|
||||
- here->BSIM4v7Igidl - here->BSIM4v7Igisl - here->BSIM4v7csub;
|
||||
if (here->BSIM4v7mode >= 0)
|
||||
{ cbhat = Ibtot + here->BSIM4v7gbd * delvbd_jct
|
||||
+ here->BSIM4v7gbs * delvbs_jct - (here->BSIM4v7gbbs + here->BSIM4v7ggidlb)
|
||||
* delvbs - (here->BSIM4v7gbgs + here->BSIM4v7ggidlg) * delvgs
|
||||
- (here->BSIM4v7gbds + here->BSIM4v7ggidld) * delvds
|
||||
- here->BSIM4v7ggislg * delvgd - here->BSIM4v7ggislb* delvbd + here->BSIM4v7ggisls * delvds ;
|
||||
}
|
||||
else
|
||||
{ cbhat = Ibtot + here->BSIM4gbs * delvbs_jct + here->BSIM4gbd
|
||||
* delvbd_jct - (here->BSIM4gbbs + here->BSIM4ggislb) * delvbd
|
||||
- (here->BSIM4gbgs + here->BSIM4ggislg) * delvgd
|
||||
+ (here->BSIM4gbds + here->BSIM4ggisld - here->BSIM4ggidls) * delvds
|
||||
- here->BSIM4ggidlg * delvgs - here->BSIM4ggidlb * delvbs;
|
||||
{ cbhat = Ibtot + here->BSIM4v7gbs * delvbs_jct + here->BSIM4v7gbd
|
||||
* delvbd_jct - (here->BSIM4v7gbbs + here->BSIM4v7ggislb) * delvbd
|
||||
- (here->BSIM4v7gbgs + here->BSIM4v7ggislg) * delvgd
|
||||
+ (here->BSIM4v7gbds + here->BSIM4v7ggisld - here->BSIM4v7ggidls) * delvds
|
||||
- here->BSIM4v7ggidlg * delvgs - here->BSIM4v7ggidlb * delvbs;
|
||||
}
|
||||
tol6 = ckt->CKTreltol * MAX(fabs(cbhat),
|
||||
fabs(Ibtot)) + ckt->CKTabstol;
|
||||
|
|
|
|||
|
|
@ -11,32 +11,32 @@
|
|||
**********/
|
||||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "bsim4def.h"
|
||||
#include "bsim4v7def.h"
|
||||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/gendefs.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
|
||||
int
|
||||
BSIM4delete(
|
||||
BSIM4v7delete(
|
||||
GENmodel *inModel,
|
||||
IFuid name,
|
||||
GENinstance **inInst)
|
||||
{
|
||||
BSIM4instance **fast = (BSIM4instance**)inInst;
|
||||
BSIM4model *model = (BSIM4model*)inModel;
|
||||
BSIM4instance **prev = NULL;
|
||||
BSIM4instance *here;
|
||||
BSIM4v7instance **fast = (BSIM4v7instance**)inInst;
|
||||
BSIM4v7model *model = (BSIM4v7model*)inModel;
|
||||
BSIM4v7instance **prev = NULL;
|
||||
BSIM4v7instance *here;
|
||||
|
||||
for (; model ; model = model->BSIM4nextModel)
|
||||
{ prev = &(model->BSIM4instances);
|
||||
for (; model ; model = model->BSIM4v7nextModel)
|
||||
{ prev = &(model->BSIM4v7instances);
|
||||
for (here = *prev; here ; here = *prev)
|
||||
{ if (here->BSIM4name == name || (fast && here==*fast))
|
||||
{ *prev= here->BSIM4nextInstance;
|
||||
{ if (here->BSIM4v7name == name || (fast && here==*fast))
|
||||
{ *prev= here->BSIM4v7nextInstance;
|
||||
FREE(here);
|
||||
return(OK);
|
||||
}
|
||||
prev = &(here->BSIM4nextInstance);
|
||||
prev = &(here->BSIM4v7nextInstance);
|
||||
}
|
||||
}
|
||||
return(E_NODEV);
|
||||
|
|
|
|||
|
|
@ -11,20 +11,20 @@
|
|||
**********/
|
||||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "bsim4def.h"
|
||||
#include "bsim4v7def.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
void
|
||||
BSIM4destroy(
|
||||
BSIM4v7destroy(
|
||||
GENmodel **inModel)
|
||||
{
|
||||
BSIM4model **model = (BSIM4model**)inModel;
|
||||
BSIM4instance *here;
|
||||
BSIM4instance *prev = NULL;
|
||||
BSIM4model *mod = *model;
|
||||
BSIM4model *oldmod = NULL;
|
||||
BSIM4v7model **model = (BSIM4v7model**)inModel;
|
||||
BSIM4v7instance *here;
|
||||
BSIM4v7instance *prev = NULL;
|
||||
BSIM4v7model *mod = *model;
|
||||
BSIM4v7model *oldmod = NULL;
|
||||
|
||||
for (; mod ; mod = mod->BSIM4nextModel) {
|
||||
for (; mod ; mod = mod->BSIM4v7nextModel) {
|
||||
/** added to get rid of link list pSizeDependParamKnot **/
|
||||
struct bsim4SizeDependParam *pParam, *pParamOld=NULL;
|
||||
|
||||
|
|
@ -38,12 +38,12 @@ BSIM4destroy(
|
|||
pParam = NULL;
|
||||
/** end of extra code **/
|
||||
if(oldmod) {
|
||||
FREE(oldmod->BSIM4version);
|
||||
FREE(oldmod->BSIM4v7version);
|
||||
FREE(oldmod);
|
||||
}
|
||||
oldmod = mod;
|
||||
prev = (BSIM4instance *)NULL;
|
||||
for (here = mod->BSIM4instances; here; here = here->BSIM4nextInstance) {
|
||||
prev = (BSIM4v7instance *)NULL;
|
||||
for (here = mod->BSIM4v7instances; here; here = here->BSIM4v7nextInstance) {
|
||||
if(prev) FREE(prev);
|
||||
prev = here;
|
||||
}
|
||||
|
|
@ -52,10 +52,10 @@ BSIM4destroy(
|
|||
if(oldmod) {
|
||||
#ifdef USE_OMP
|
||||
/* free just once for all models */
|
||||
FREE(oldmod->BSIM4InstanceArray);
|
||||
FREE(oldmod->BSIM4v7InstanceArray);
|
||||
#endif
|
||||
/* oldmod->BSIM4modName to be freed in INPtabEnd() */
|
||||
FREE(oldmod->BSIM4version);
|
||||
/* oldmod->BSIM4v7modName to be freed in INPtabEnd() */
|
||||
FREE(oldmod->BSIM4v7version);
|
||||
FREE(oldmod);
|
||||
}
|
||||
*model = NULL;
|
||||
|
|
|
|||
|
|
@ -11,18 +11,18 @@
|
|||
**********/
|
||||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "bsim4def.h"
|
||||
#include "bsim4v7def.h"
|
||||
|
||||
|
||||
/*
|
||||
* WDLiu:
|
||||
* This subrutine is a special module to process the geometry dependent
|
||||
* parasitics for BSIM4, which calculates Ps, Pd, As, Ad, and Rs and Rd
|
||||
* parasitics for BSIM4v7, which calculates Ps, Pd, As, Ad, and Rs and Rd
|
||||
* for multi-fingers and varous GEO and RGEO options.
|
||||
*/
|
||||
|
||||
static int
|
||||
BSIM4NumFingerDiff(
|
||||
BSIM4v7NumFingerDiff(
|
||||
double nf,
|
||||
int minSD,
|
||||
double *nuIntD, double *nuEndD, double *nuIntS, double *nuEndS)
|
||||
|
|
@ -52,7 +52,7 @@ return 0;
|
|||
|
||||
|
||||
int
|
||||
BSIM4PAeffGeo(
|
||||
BSIM4v7PAeffGeo(
|
||||
double nf,
|
||||
int geo, int minSD,
|
||||
double Weffcj, double DMCG, double DMCI, double DMDG,
|
||||
|
|
@ -64,7 +64,7 @@ double PDiso, PDsha, PDmer, PSiso, PSsha, PSmer;
|
|||
double nuIntD = 0.0, nuEndD = 0.0, nuIntS = 0.0, nuEndS = 0.0;
|
||||
|
||||
if (geo < 9) /* For geo = 9 and 10, the numbers of S/D diffusions already known */
|
||||
BSIM4NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS);
|
||||
BSIM4v7NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS);
|
||||
|
||||
T0 = DMCG + DMCI;
|
||||
T1 = DMCG + DMCG;
|
||||
|
|
@ -153,7 +153,7 @@ return 0;
|
|||
|
||||
|
||||
int
|
||||
BSIM4RdseffGeo(
|
||||
BSIM4v7RdseffGeo(
|
||||
double nf,
|
||||
int geo, int rgeo, int minSD,
|
||||
double Weffcj, double Rsh, double DMCG, double DMCI, double DMDG,
|
||||
|
|
@ -164,7 +164,7 @@ double Rint=0.0, Rend = 0.0;
|
|||
double nuIntD = 0.0, nuEndD = 0.0, nuIntS = 0.0, nuEndS = 0.0;
|
||||
|
||||
if (geo < 9) /* since geo = 9 and 10 only happen when nf = even */
|
||||
{ BSIM4NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS);
|
||||
{ BSIM4v7NumFingerDiff(nf, minSD, &nuIntD, &nuEndD, &nuIntS, &nuEndS);
|
||||
|
||||
/* Internal S/D resistance -- assume shared S or D and all wide contacts */
|
||||
if (Type == 1)
|
||||
|
|
@ -184,47 +184,47 @@ double nuIntD = 0.0, nuEndD = 0.0, nuIntS = 0.0, nuEndS = 0.0;
|
|||
/* End S/D resistance -- geo dependent */
|
||||
switch(geo)
|
||||
{ case 0:
|
||||
if (Type == 1) BSIM4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
if (Type == 1) BSIM4v7RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndS, rgeo, 1, &Rend);
|
||||
else BSIM4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
else BSIM4v7RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndD, rgeo, 0, &Rend);
|
||||
break;
|
||||
case 1:
|
||||
if (Type == 1) BSIM4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
if (Type == 1) BSIM4v7RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndS, rgeo, 1, &Rend);
|
||||
else BSIM4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
else BSIM4v7RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndD, rgeo, 0, &Rend);
|
||||
break;
|
||||
case 2:
|
||||
if (Type == 1) BSIM4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
if (Type == 1) BSIM4v7RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndS, rgeo, 1, &Rend);
|
||||
else BSIM4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
else BSIM4v7RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndD, rgeo, 0, &Rend);
|
||||
break;
|
||||
case 3:
|
||||
if (Type == 1) BSIM4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
if (Type == 1) BSIM4v7RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndS, rgeo, 1, &Rend);
|
||||
else BSIM4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
else BSIM4v7RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndD, rgeo, 0, &Rend);
|
||||
break;
|
||||
case 4:
|
||||
if (Type == 1) BSIM4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
if (Type == 1) BSIM4v7RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndS, rgeo, 1, &Rend);
|
||||
else Rend = Rsh * DMDG / Weffcj;
|
||||
break;
|
||||
case 5:
|
||||
if (Type == 1) BSIM4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
if (Type == 1) BSIM4v7RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndS, rgeo, 1, &Rend);
|
||||
else Rend = Rsh * DMDG / (Weffcj * nuEndD);
|
||||
break;
|
||||
case 6:
|
||||
if (Type == 1) Rend = Rsh * DMDG / Weffcj;
|
||||
else BSIM4RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
else BSIM4v7RdsEndIso(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndD, rgeo, 0, &Rend);
|
||||
break;
|
||||
case 7:
|
||||
if (Type == 1) Rend = Rsh * DMDG / (Weffcj * nuEndS);
|
||||
else BSIM4RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
else BSIM4v7RdsEndSha(Weffcj, Rsh, DMCG, DMCI, DMDG,
|
||||
nuEndD, rgeo, 0, &Rend);
|
||||
break;
|
||||
case 8:
|
||||
|
|
@ -273,7 +273,7 @@ return 0;
|
|||
|
||||
|
||||
int
|
||||
BSIM4RdsEndIso(
|
||||
BSIM4v7RdsEndIso(
|
||||
double Weffcj, double Rsh, double DMCG, double DMCI, double DMDG,
|
||||
double nuEnd,
|
||||
int rgeo, int Type,
|
||||
|
|
@ -334,7 +334,7 @@ return 0;
|
|||
|
||||
|
||||
int
|
||||
BSIM4RdsEndSha(
|
||||
BSIM4v7RdsEndSha(
|
||||
double Weffcj, double Rsh, double DMCG, double DMCI, double DMDG,
|
||||
double nuEnd,
|
||||
int rgeo, int Type,
|
||||
|
|
|
|||
|
|
@ -12,33 +12,33 @@
|
|||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "bsim4def.h"
|
||||
#include "bsim4v7def.h"
|
||||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
|
||||
int
|
||||
BSIM4getic(
|
||||
BSIM4v7getic(
|
||||
GENmodel *inModel,
|
||||
CKTcircuit *ckt)
|
||||
{
|
||||
BSIM4model *model = (BSIM4model*)inModel;
|
||||
BSIM4instance *here;
|
||||
BSIM4v7model *model = (BSIM4v7model*)inModel;
|
||||
BSIM4v7instance *here;
|
||||
|
||||
for (; model ; model = model->BSIM4nextModel)
|
||||
{ for (here = model->BSIM4instances; here; here = here->BSIM4nextInstance)
|
||||
for (; model ; model = model->BSIM4v7nextModel)
|
||||
{ for (here = model->BSIM4v7instances; here; here = here->BSIM4v7nextInstance)
|
||||
{
|
||||
if (!here->BSIM4icVDSGiven)
|
||||
{ here->BSIM4icVDS = *(ckt->CKTrhs + here->BSIM4dNode)
|
||||
- *(ckt->CKTrhs + here->BSIM4sNode);
|
||||
if (!here->BSIM4v7icVDSGiven)
|
||||
{ here->BSIM4v7icVDS = *(ckt->CKTrhs + here->BSIM4v7dNode)
|
||||
- *(ckt->CKTrhs + here->BSIM4v7sNode);
|
||||
}
|
||||
if (!here->BSIM4icVGSGiven)
|
||||
{ here->BSIM4icVGS = *(ckt->CKTrhs + here->BSIM4gNodeExt)
|
||||
- *(ckt->CKTrhs + here->BSIM4sNode);
|
||||
if (!here->BSIM4v7icVGSGiven)
|
||||
{ here->BSIM4v7icVGS = *(ckt->CKTrhs + here->BSIM4v7gNodeExt)
|
||||
- *(ckt->CKTrhs + here->BSIM4v7sNode);
|
||||
}
|
||||
if(!here->BSIM4icVBSGiven)
|
||||
{ here->BSIM4icVBS = *(ckt->CKTrhs + here->BSIM4bNode)
|
||||
- *(ckt->CKTrhs + here->BSIM4sNode);
|
||||
if(!here->BSIM4v7icVBSGiven)
|
||||
{ here->BSIM4v7icVBS = *(ckt->CKTrhs + here->BSIM4v7bNode)
|
||||
- *(ckt->CKTrhs + here->BSIM4v7sNode);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -11,25 +11,25 @@
|
|||
**********/
|
||||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "bsim4def.h"
|
||||
#include "bsim4v7def.h"
|
||||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
int
|
||||
BSIM4mDelete(
|
||||
BSIM4v7mDelete(
|
||||
GENmodel **inModel,
|
||||
IFuid modname,
|
||||
GENmodel *kill)
|
||||
{
|
||||
BSIM4model **model = (BSIM4model**)inModel;
|
||||
BSIM4model *modfast = (BSIM4model*)kill;
|
||||
BSIM4instance *here;
|
||||
BSIM4instance *prev = NULL;
|
||||
BSIM4model **oldmod;
|
||||
BSIM4v7model **model = (BSIM4v7model**)inModel;
|
||||
BSIM4v7model *modfast = (BSIM4v7model*)kill;
|
||||
BSIM4v7instance *here;
|
||||
BSIM4v7instance *prev = NULL;
|
||||
BSIM4v7model **oldmod;
|
||||
|
||||
oldmod = model;
|
||||
for (; *model ; model = &((*model)->BSIM4nextModel))
|
||||
{ if ((*model)->BSIM4modName == modname ||
|
||||
for (; *model ; model = &((*model)->BSIM4v7nextModel))
|
||||
{ if ((*model)->BSIM4v7modName == modname ||
|
||||
(modfast && *model == modfast))
|
||||
goto delgot;
|
||||
oldmod = model;
|
||||
|
|
@ -37,8 +37,8 @@ BSIM4model **oldmod;
|
|||
return(E_NOMOD);
|
||||
|
||||
delgot:
|
||||
*oldmod = (*model)->BSIM4nextModel; /* cut deleted device out of list */
|
||||
for (here = (*model)->BSIM4instances; here; here = here->BSIM4nextInstance)
|
||||
*oldmod = (*model)->BSIM4v7nextModel; /* cut deleted device out of list */
|
||||
for (here = (*model)->BSIM4v7instances; here; here = here->BSIM4v7nextInstance)
|
||||
{ if(prev) FREE(prev);
|
||||
prev = here;
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -20,7 +20,7 @@
|
|||
**********/
|
||||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "bsim4def.h"
|
||||
#include "bsim4v7def.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "ngspice/iferrmsg.h"
|
||||
#include "ngspice/noisedef.h"
|
||||
|
|
@ -37,8 +37,8 @@
|
|||
static double
|
||||
Eval1ovFNoise(
|
||||
double Vds,
|
||||
BSIM4model *model,
|
||||
BSIM4instance *here,
|
||||
BSIM4v7model *model,
|
||||
BSIM4v7instance *here,
|
||||
double freq, double temp)
|
||||
{
|
||||
struct bsim4SizeDependParam *pParam;
|
||||
|
|
@ -46,41 +46,41 @@ double cd, esat, DelClm, EffFreq, N0, Nl, Leff, Leffsq;
|
|||
double T0=0.0, T1, T2, T3, T4, T5, T6, T7, T8, T9, Ssi;
|
||||
|
||||
pParam = here->pParam;
|
||||
cd = fabs(here->BSIM4cd);
|
||||
Leff = pParam->BSIM4leff - 2.0 * model->BSIM4lintnoi;
|
||||
cd = fabs(here->BSIM4v7cd);
|
||||
Leff = pParam->BSIM4v7leff - 2.0 * model->BSIM4v7lintnoi;
|
||||
Leffsq = Leff * Leff;
|
||||
esat = 2.0 * here->BSIM4vsattemp / here->BSIM4ueff;
|
||||
if(model->BSIM4em<=0.0) DelClm = 0.0; /* flicker noise modified -JX */
|
||||
esat = 2.0 * here->BSIM4v7vsattemp / here->BSIM4v7ueff;
|
||||
if(model->BSIM4v7em<=0.0) DelClm = 0.0; /* flicker noise modified -JX */
|
||||
else {
|
||||
T0 = ((((Vds - here->BSIM4Vdseff) / pParam->BSIM4litl)
|
||||
+ model->BSIM4em) / esat);
|
||||
DelClm = pParam->BSIM4litl * log (MAX(T0, N_MINLOG));
|
||||
T0 = ((((Vds - here->BSIM4v7Vdseff) / pParam->BSIM4v7litl)
|
||||
+ model->BSIM4v7em) / esat);
|
||||
DelClm = pParam->BSIM4v7litl * log (MAX(T0, N_MINLOG));
|
||||
if (DelClm < 0.0) DelClm = 0.0; /* bugfix */
|
||||
}
|
||||
EffFreq = pow(freq, model->BSIM4ef);
|
||||
T1 = CHARGE * CHARGE * CONSTboltz * cd * temp * here->BSIM4ueff;
|
||||
T2 = 1.0e10 * EffFreq * here->BSIM4Abulk * model->BSIM4coxe * Leffsq;
|
||||
N0 = model->BSIM4coxe * here->BSIM4Vgsteff / CHARGE;
|
||||
Nl = model->BSIM4coxe * here->BSIM4Vgsteff
|
||||
* (1.0 - here->BSIM4AbovVgst2Vtm * here->BSIM4Vdseff) / CHARGE;
|
||||
EffFreq = pow(freq, model->BSIM4v7ef);
|
||||
T1 = CHARGE * CHARGE * CONSTboltz * cd * temp * here->BSIM4v7ueff;
|
||||
T2 = 1.0e10 * EffFreq * here->BSIM4v7Abulk * model->BSIM4v7coxe * Leffsq;
|
||||
N0 = model->BSIM4v7coxe * here->BSIM4v7Vgsteff / CHARGE;
|
||||
Nl = model->BSIM4v7coxe * here->BSIM4v7Vgsteff
|
||||
* (1.0 - here->BSIM4v7AbovVgst2Vtm * here->BSIM4v7Vdseff) / CHARGE;
|
||||
|
||||
T3 = model->BSIM4oxideTrapDensityA
|
||||
* log(MAX(((N0 + here->BSIM4nstar) / (Nl + here->BSIM4nstar)), N_MINLOG));
|
||||
T4 = model->BSIM4oxideTrapDensityB * (N0 - Nl);
|
||||
T5 = model->BSIM4oxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl);
|
||||
T3 = model->BSIM4v7oxideTrapDensityA
|
||||
* log(MAX(((N0 + here->BSIM4v7nstar) / (Nl + here->BSIM4v7nstar)), N_MINLOG));
|
||||
T4 = model->BSIM4v7oxideTrapDensityB * (N0 - Nl);
|
||||
T5 = model->BSIM4v7oxideTrapDensityC * 0.5 * (N0 * N0 - Nl * Nl);
|
||||
|
||||
T6 = CONSTboltz * temp * cd * cd;
|
||||
T7 = 1.0e10 * EffFreq * Leffsq * pParam->BSIM4weff * here->BSIM4nf;
|
||||
T8 = model->BSIM4oxideTrapDensityA + model->BSIM4oxideTrapDensityB * Nl
|
||||
+ model->BSIM4oxideTrapDensityC * Nl * Nl;
|
||||
T9 = (Nl + here->BSIM4nstar) * (Nl + here->BSIM4nstar);
|
||||
T7 = 1.0e10 * EffFreq * Leffsq * pParam->BSIM4v7weff * here->BSIM4v7nf;
|
||||
T8 = model->BSIM4v7oxideTrapDensityA + model->BSIM4v7oxideTrapDensityB * Nl
|
||||
+ model->BSIM4v7oxideTrapDensityC * Nl * Nl;
|
||||
T9 = (Nl + here->BSIM4v7nstar) * (Nl + here->BSIM4v7nstar);
|
||||
Ssi = T1 / T2 * (T3 + T4 + T5) + T6 / T7 * DelClm * T8 / T9;
|
||||
return Ssi;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
BSIM4noise (
|
||||
BSIM4v7noise (
|
||||
int mode, int operation,
|
||||
GENmodel *inModel,
|
||||
CKTcircuit *ckt,
|
||||
|
|
@ -89,14 +89,14 @@ double *OnDens)
|
|||
{
|
||||
NOISEAN *job = (NOISEAN *) ckt->CKTcurJob;
|
||||
|
||||
BSIM4model *model = (BSIM4model *)inModel;
|
||||
BSIM4instance *here;
|
||||
BSIM4v7model *model = (BSIM4v7model *)inModel;
|
||||
BSIM4v7instance *here;
|
||||
struct bsim4SizeDependParam *pParam;
|
||||
char name[N_MXVLNTH];
|
||||
double tempOnoise;
|
||||
double tempInoise;
|
||||
double noizDens[BSIM4NSRCS];
|
||||
double lnNdens[BSIM4NSRCS];
|
||||
double noizDens[BSIM4v7NSRCS];
|
||||
double lnNdens[BSIM4v7NSRCS];
|
||||
|
||||
double T0, T1, T2, T3, T4, T5, T6, T7, T8, T10, T11;
|
||||
double Vds, Ssi, Swi;
|
||||
|
|
@ -111,7 +111,7 @@ int i;
|
|||
double m;
|
||||
|
||||
/* define the names of the noise sources */
|
||||
static char *BSIM4nNames[BSIM4NSRCS] =
|
||||
static char *BSIM4v7nNames[BSIM4v7NSRCS] =
|
||||
{ /* Note that we have to keep the order */
|
||||
".rd", /* noise due to rd */
|
||||
".rs", /* noise due to rs */
|
||||
|
|
@ -130,14 +130,14 @@ double m;
|
|||
"" /* total transistor noise */
|
||||
};
|
||||
|
||||
for (; model != NULL; model = model->BSIM4nextModel)
|
||||
for (; model != NULL; model = model->BSIM4v7nextModel)
|
||||
{
|
||||
if(model->BSIM4tnoiMod != 2) {
|
||||
noizDens[BSIM4CORLNOIZ] = 0.0;
|
||||
lnNdens[BSIM4CORLNOIZ] = N_MINLOG;
|
||||
if(model->BSIM4v7tnoiMod != 2) {
|
||||
noizDens[BSIM4v7CORLNOIZ] = 0.0;
|
||||
lnNdens[BSIM4v7CORLNOIZ] = N_MINLOG;
|
||||
}
|
||||
for (here = model->BSIM4instances; here != NULL;
|
||||
here = here->BSIM4nextInstance)
|
||||
for (here = model->BSIM4v7instances; here != NULL;
|
||||
here = here->BSIM4v7nextInstance)
|
||||
{ pParam = here->pParam;
|
||||
switch (operation)
|
||||
{ case N_OPEN:
|
||||
|
|
@ -147,10 +147,10 @@ double m;
|
|||
if (job->NStpsSm != 0)
|
||||
{ switch (mode)
|
||||
{ case N_DENS:
|
||||
for (i = 0; i < BSIM4NSRCS; i++)
|
||||
for (i = 0; i < BSIM4v7NSRCS; i++)
|
||||
{ (void) sprintf(name, "onoise.%s%s",
|
||||
here->BSIM4name,
|
||||
BSIM4nNames[i]);
|
||||
here->BSIM4v7name,
|
||||
BSIM4v7nNames[i]);
|
||||
data->namelist = TREALLOC(IFuid,
|
||||
data->namelist,
|
||||
data->numPlots + 1);
|
||||
|
|
@ -163,10 +163,10 @@ double m;
|
|||
}
|
||||
break;
|
||||
case INT_NOIZ:
|
||||
for (i = 0; i < BSIM4NSRCS; i++)
|
||||
for (i = 0; i < BSIM4v7NSRCS; i++)
|
||||
{ (void) sprintf(name, "onoise_total.%s%s",
|
||||
here->BSIM4name,
|
||||
BSIM4nNames[i]);
|
||||
here->BSIM4v7name,
|
||||
BSIM4v7nNames[i]);
|
||||
data->namelist = TREALLOC(IFuid,
|
||||
data->namelist,
|
||||
data->numPlots + 1);
|
||||
|
|
@ -178,8 +178,8 @@ double m;
|
|||
/* we've added one more plot */
|
||||
|
||||
(void) sprintf(name, "inoise_total.%s%s",
|
||||
here->BSIM4name,
|
||||
BSIM4nNames[i]);
|
||||
here->BSIM4v7name,
|
||||
BSIM4v7nNames[i]);
|
||||
data->namelist = TREALLOC(IFuid,
|
||||
data->namelist,
|
||||
data->numPlots + 1);
|
||||
|
|
@ -195,205 +195,205 @@ double m;
|
|||
}
|
||||
break;
|
||||
case N_CALC:
|
||||
m = here->BSIM4m;
|
||||
m = here->BSIM4v7m;
|
||||
switch (mode)
|
||||
{ case N_DENS:
|
||||
if (model->BSIM4tnoiMod == 0)
|
||||
{ if (model->BSIM4rdsMod == 0)
|
||||
{ gspr = here->BSIM4sourceConductance;
|
||||
gdpr = here->BSIM4drainConductance;
|
||||
if (here->BSIM4grdsw > 0.0)
|
||||
tmp = 1.0 / here->BSIM4grdsw; /* tmp used below */
|
||||
if (model->BSIM4v7tnoiMod == 0)
|
||||
{ if (model->BSIM4v7rdsMod == 0)
|
||||
{ gspr = here->BSIM4v7sourceConductance;
|
||||
gdpr = here->BSIM4v7drainConductance;
|
||||
if (here->BSIM4v7grdsw > 0.0)
|
||||
tmp = 1.0 / here->BSIM4v7grdsw; /* tmp used below */
|
||||
else
|
||||
tmp = 0.0;
|
||||
}
|
||||
else
|
||||
{ gspr = here->BSIM4gstot;
|
||||
gdpr = here->BSIM4gdtot;
|
||||
{ gspr = here->BSIM4v7gstot;
|
||||
gdpr = here->BSIM4v7gdtot;
|
||||
tmp = 0.0;
|
||||
}
|
||||
}
|
||||
else if(model->BSIM4tnoiMod == 1)
|
||||
{ T5 = here->BSIM4Vgsteff / here->BSIM4EsatL;
|
||||
else if(model->BSIM4v7tnoiMod == 1)
|
||||
{ T5 = here->BSIM4v7Vgsteff / here->BSIM4v7EsatL;
|
||||
T5 *= T5;
|
||||
npart_beta = model->BSIM4rnoia * (1.0 + T5
|
||||
* model->BSIM4tnoia * pParam->BSIM4leff);
|
||||
npart_theta = model->BSIM4rnoib * (1.0 + T5
|
||||
* model->BSIM4tnoib * pParam->BSIM4leff);
|
||||
npart_beta = model->BSIM4v7rnoia * (1.0 + T5
|
||||
* model->BSIM4v7tnoia * pParam->BSIM4v7leff);
|
||||
npart_theta = model->BSIM4v7rnoib * (1.0 + T5
|
||||
* model->BSIM4v7tnoib * pParam->BSIM4v7leff);
|
||||
if(npart_theta > 0.9)
|
||||
npart_theta = 0.9;
|
||||
if(npart_theta > 0.9 * npart_beta)
|
||||
npart_theta = 0.9 * npart_beta; //4.6.2
|
||||
|
||||
if (model->BSIM4rdsMod == 0)
|
||||
{ gspr = here->BSIM4sourceConductance;
|
||||
gdpr = here->BSIM4drainConductance;
|
||||
if (model->BSIM4v7rdsMod == 0)
|
||||
{ gspr = here->BSIM4v7sourceConductance;
|
||||
gdpr = here->BSIM4v7drainConductance;
|
||||
}
|
||||
else
|
||||
{ gspr = here->BSIM4gstot;
|
||||
gdpr = here->BSIM4gdtot;
|
||||
{ gspr = here->BSIM4v7gstot;
|
||||
gdpr = here->BSIM4v7gdtot;
|
||||
}
|
||||
|
||||
if ((*(ckt->CKTstates[0] + here->BSIM4vds)) >= 0.0)
|
||||
if ((*(ckt->CKTstates[0] + here->BSIM4v7vds)) >= 0.0)
|
||||
gspr = gspr * (1.0 + npart_theta * npart_theta * gspr
|
||||
/ here->BSIM4IdovVds);
|
||||
/ here->BSIM4v7IdovVds);
|
||||
else
|
||||
gdpr = gdpr * (1.0 + npart_theta * npart_theta * gdpr
|
||||
/ here->BSIM4IdovVds);
|
||||
/ here->BSIM4v7IdovVds);
|
||||
}
|
||||
else
|
||||
{ /* tnoiMod=2 (v4.7) */
|
||||
|
||||
if (model->BSIM4rdsMod == 0)
|
||||
{ gspr = here->BSIM4sourceConductance;
|
||||
gdpr = here->BSIM4drainConductance;
|
||||
if (model->BSIM4v7rdsMod == 0)
|
||||
{ gspr = here->BSIM4v7sourceConductance;
|
||||
gdpr = here->BSIM4v7drainConductance;
|
||||
}
|
||||
else
|
||||
{ gspr = here->BSIM4gstot;
|
||||
gdpr = here->BSIM4gdtot;
|
||||
{ gspr = here->BSIM4v7gstot;
|
||||
gdpr = here->BSIM4v7gdtot;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
NevalSrc(&noizDens[BSIM4RDNOIZ],
|
||||
&lnNdens[BSIM4RDNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4dNodePrime, here->BSIM4dNode,
|
||||
NevalSrc(&noizDens[BSIM4v7RDNOIZ],
|
||||
&lnNdens[BSIM4v7RDNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v7dNodePrime, here->BSIM4v7dNode,
|
||||
gdpr * m);
|
||||
|
||||
NevalSrc(&noizDens[BSIM4RSNOIZ],
|
||||
&lnNdens[BSIM4RSNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4sNodePrime, here->BSIM4sNode,
|
||||
NevalSrc(&noizDens[BSIM4v7RSNOIZ],
|
||||
&lnNdens[BSIM4v7RSNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v7sNodePrime, here->BSIM4v7sNode,
|
||||
gspr * m);
|
||||
|
||||
|
||||
if (here->BSIM4rgateMod == 1)
|
||||
{ NevalSrc(&noizDens[BSIM4RGNOIZ],
|
||||
&lnNdens[BSIM4RGNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4gNodePrime, here->BSIM4gNodeExt,
|
||||
here->BSIM4grgeltd * m);
|
||||
if (here->BSIM4v7rgateMod == 1)
|
||||
{ NevalSrc(&noizDens[BSIM4v7RGNOIZ],
|
||||
&lnNdens[BSIM4v7RGNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v7gNodePrime, here->BSIM4v7gNodeExt,
|
||||
here->BSIM4v7grgeltd * m);
|
||||
}
|
||||
else if (here->BSIM4rgateMod == 2)
|
||||
else if (here->BSIM4v7rgateMod == 2)
|
||||
{
|
||||
T0 = 1.0 + here->BSIM4grgeltd/here->BSIM4gcrg;
|
||||
T0 = 1.0 + here->BSIM4v7grgeltd/here->BSIM4v7gcrg;
|
||||
T1 = T0 * T0;
|
||||
NevalSrc(&noizDens[BSIM4RGNOIZ],
|
||||
&lnNdens[BSIM4RGNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4gNodePrime, here->BSIM4gNodeExt,
|
||||
here->BSIM4grgeltd * m / T1);
|
||||
NevalSrc(&noizDens[BSIM4v7RGNOIZ],
|
||||
&lnNdens[BSIM4v7RGNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v7gNodePrime, here->BSIM4v7gNodeExt,
|
||||
here->BSIM4v7grgeltd * m / T1);
|
||||
}
|
||||
else if (here->BSIM4rgateMod == 3)
|
||||
{ NevalSrc(&noizDens[BSIM4RGNOIZ],
|
||||
&lnNdens[BSIM4RGNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4gNodeMid, here->BSIM4gNodeExt,
|
||||
here->BSIM4grgeltd * m);
|
||||
else if (here->BSIM4v7rgateMod == 3)
|
||||
{ NevalSrc(&noizDens[BSIM4v7RGNOIZ],
|
||||
&lnNdens[BSIM4v7RGNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v7gNodeMid, here->BSIM4v7gNodeExt,
|
||||
here->BSIM4v7grgeltd * m);
|
||||
}
|
||||
else
|
||||
{ noizDens[BSIM4RGNOIZ] = 0.0;
|
||||
lnNdens[BSIM4RGNOIZ] =
|
||||
log(MAX(noizDens[BSIM4RGNOIZ], N_MINLOG));
|
||||
{ noizDens[BSIM4v7RGNOIZ] = 0.0;
|
||||
lnNdens[BSIM4v7RGNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v7RGNOIZ], N_MINLOG));
|
||||
}
|
||||
|
||||
bodymode = 5;
|
||||
if (here->BSIM4rbodyMod == 2)
|
||||
{ if( ( !model->BSIM4rbps0Given) ||
|
||||
( !model->BSIM4rbpd0Given) )
|
||||
if (here->BSIM4v7rbodyMod == 2)
|
||||
{ if( ( !model->BSIM4v7rbps0Given) ||
|
||||
( !model->BSIM4v7rbpd0Given) )
|
||||
bodymode = 1;
|
||||
else
|
||||
if( (!model->BSIM4rbsbx0Given && !model->BSIM4rbsby0Given) ||
|
||||
(!model->BSIM4rbdbx0Given && !model->BSIM4rbdby0Given) )
|
||||
if( (!model->BSIM4v7rbsbx0Given && !model->BSIM4v7rbsby0Given) ||
|
||||
(!model->BSIM4v7rbdbx0Given && !model->BSIM4v7rbdby0Given) )
|
||||
bodymode = 3;
|
||||
}
|
||||
|
||||
if (here->BSIM4rbodyMod)
|
||||
if (here->BSIM4v7rbodyMod)
|
||||
{
|
||||
if(bodymode == 5)
|
||||
{
|
||||
NevalSrc(&noizDens[BSIM4RBPSNOIZ],
|
||||
&lnNdens[BSIM4RBPSNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4bNodePrime, here->BSIM4sbNode,
|
||||
here->BSIM4grbps * m);
|
||||
NevalSrc(&noizDens[BSIM4RBPDNOIZ],
|
||||
&lnNdens[BSIM4RBPDNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4bNodePrime, here->BSIM4dbNode,
|
||||
here->BSIM4grbpd * m);
|
||||
NevalSrc(&noizDens[BSIM4RBPBNOIZ],
|
||||
&lnNdens[BSIM4RBPBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4bNodePrime, here->BSIM4bNode,
|
||||
here->BSIM4grbpb * m);
|
||||
NevalSrc(&noizDens[BSIM4RBSBNOIZ],
|
||||
&lnNdens[BSIM4RBSBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4bNode, here->BSIM4sbNode,
|
||||
here->BSIM4grbsb * m);
|
||||
NevalSrc(&noizDens[BSIM4RBDBNOIZ],
|
||||
&lnNdens[BSIM4RBDBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4bNode, here->BSIM4dbNode,
|
||||
here->BSIM4grbdb * m);
|
||||
NevalSrc(&noizDens[BSIM4v7RBPSNOIZ],
|
||||
&lnNdens[BSIM4v7RBPSNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v7bNodePrime, here->BSIM4v7sbNode,
|
||||
here->BSIM4v7grbps * m);
|
||||
NevalSrc(&noizDens[BSIM4v7RBPDNOIZ],
|
||||
&lnNdens[BSIM4v7RBPDNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v7bNodePrime, here->BSIM4v7dbNode,
|
||||
here->BSIM4v7grbpd * m);
|
||||
NevalSrc(&noizDens[BSIM4v7RBPBNOIZ],
|
||||
&lnNdens[BSIM4v7RBPBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v7bNodePrime, here->BSIM4v7bNode,
|
||||
here->BSIM4v7grbpb * m);
|
||||
NevalSrc(&noizDens[BSIM4v7RBSBNOIZ],
|
||||
&lnNdens[BSIM4v7RBSBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v7bNode, here->BSIM4v7sbNode,
|
||||
here->BSIM4v7grbsb * m);
|
||||
NevalSrc(&noizDens[BSIM4v7RBDBNOIZ],
|
||||
&lnNdens[BSIM4v7RBDBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v7bNode, here->BSIM4v7dbNode,
|
||||
here->BSIM4v7grbdb * m);
|
||||
}
|
||||
if(bodymode == 3)
|
||||
{
|
||||
NevalSrc(&noizDens[BSIM4RBPSNOIZ],
|
||||
&lnNdens[BSIM4RBPSNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4bNodePrime, here->BSIM4sbNode,
|
||||
here->BSIM4grbps * m);
|
||||
NevalSrc(&noizDens[BSIM4RBPDNOIZ],
|
||||
&lnNdens[BSIM4RBPDNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4bNodePrime, here->BSIM4dbNode,
|
||||
here->BSIM4grbpd * m);
|
||||
NevalSrc(&noizDens[BSIM4RBPBNOIZ],
|
||||
&lnNdens[BSIM4RBPBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4bNodePrime, here->BSIM4bNode,
|
||||
here->BSIM4grbpb * m);
|
||||
noizDens[BSIM4RBSBNOIZ] = noizDens[BSIM4RBDBNOIZ] = 0.0;
|
||||
lnNdens[BSIM4RBSBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4RBSBNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4RBDBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4RBDBNOIZ], N_MINLOG));
|
||||
NevalSrc(&noizDens[BSIM4v7RBPSNOIZ],
|
||||
&lnNdens[BSIM4v7RBPSNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v7bNodePrime, here->BSIM4v7sbNode,
|
||||
here->BSIM4v7grbps * m);
|
||||
NevalSrc(&noizDens[BSIM4v7RBPDNOIZ],
|
||||
&lnNdens[BSIM4v7RBPDNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v7bNodePrime, here->BSIM4v7dbNode,
|
||||
here->BSIM4v7grbpd * m);
|
||||
NevalSrc(&noizDens[BSIM4v7RBPBNOIZ],
|
||||
&lnNdens[BSIM4v7RBPBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v7bNodePrime, here->BSIM4v7bNode,
|
||||
here->BSIM4v7grbpb * m);
|
||||
noizDens[BSIM4v7RBSBNOIZ] = noizDens[BSIM4v7RBDBNOIZ] = 0.0;
|
||||
lnNdens[BSIM4v7RBSBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v7RBSBNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4v7RBDBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v7RBDBNOIZ], N_MINLOG));
|
||||
}
|
||||
if(bodymode == 1)
|
||||
{
|
||||
NevalSrc(&noizDens[BSIM4RBPBNOIZ],
|
||||
&lnNdens[BSIM4RBPBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4bNodePrime, here->BSIM4bNode,
|
||||
here->BSIM4grbpb * m);
|
||||
noizDens[BSIM4RBPSNOIZ] = noizDens[BSIM4RBPDNOIZ] = 0.0;
|
||||
noizDens[BSIM4RBSBNOIZ] = noizDens[BSIM4RBDBNOIZ] = 0.0;
|
||||
lnNdens[BSIM4RBPSNOIZ] =
|
||||
log(MAX(noizDens[BSIM4RBPSNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4RBPDNOIZ] =
|
||||
log(MAX(noizDens[BSIM4RBPDNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4RBSBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4RBSBNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4RBDBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4RBDBNOIZ], N_MINLOG));
|
||||
NevalSrc(&noizDens[BSIM4v7RBPBNOIZ],
|
||||
&lnNdens[BSIM4v7RBPBNOIZ], ckt, THERMNOISE,
|
||||
here->BSIM4v7bNodePrime, here->BSIM4v7bNode,
|
||||
here->BSIM4v7grbpb * m);
|
||||
noizDens[BSIM4v7RBPSNOIZ] = noizDens[BSIM4v7RBPDNOIZ] = 0.0;
|
||||
noizDens[BSIM4v7RBSBNOIZ] = noizDens[BSIM4v7RBDBNOIZ] = 0.0;
|
||||
lnNdens[BSIM4v7RBPSNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v7RBPSNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4v7RBPDNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v7RBPDNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4v7RBSBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v7RBSBNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4v7RBDBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v7RBDBNOIZ], N_MINLOG));
|
||||
}
|
||||
}
|
||||
else
|
||||
{ noizDens[BSIM4RBPSNOIZ] = noizDens[BSIM4RBPDNOIZ] = 0.0;
|
||||
noizDens[BSIM4RBPBNOIZ] = 0.0;
|
||||
noizDens[BSIM4RBSBNOIZ] = noizDens[BSIM4RBDBNOIZ] = 0.0;
|
||||
lnNdens[BSIM4RBPSNOIZ] =
|
||||
log(MAX(noizDens[BSIM4RBPSNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4RBPDNOIZ] =
|
||||
log(MAX(noizDens[BSIM4RBPDNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4RBPBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4RBPBNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4RBSBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4RBSBNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4RBDBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4RBDBNOIZ], N_MINLOG));
|
||||
{ noizDens[BSIM4v7RBPSNOIZ] = noizDens[BSIM4v7RBPDNOIZ] = 0.0;
|
||||
noizDens[BSIM4v7RBPBNOIZ] = 0.0;
|
||||
noizDens[BSIM4v7RBSBNOIZ] = noizDens[BSIM4v7RBDBNOIZ] = 0.0;
|
||||
lnNdens[BSIM4v7RBPSNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v7RBPSNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4v7RBPDNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v7RBPDNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4v7RBPBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v7RBPBNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4v7RBSBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v7RBSBNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4v7RBDBNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v7RBDBNOIZ], N_MINLOG));
|
||||
}
|
||||
|
||||
if(model->BSIM4tnoiMod == 2)
|
||||
if(model->BSIM4v7tnoiMod == 2)
|
||||
{
|
||||
eta = 1.0 - here->BSIM4Vdseff * here->BSIM4AbovVgst2Vtm;
|
||||
eta = 1.0 - here->BSIM4v7Vdseff * here->BSIM4v7AbovVgst2Vtm;
|
||||
T0 = 1.0 - eta;
|
||||
T1 = 1.0 + eta;
|
||||
T2 = T1 + 2.0 * here->BSIM4Abulk * model->BSIM4vtm / here->BSIM4Vgsteff;
|
||||
Leff = pParam->BSIM4leff;
|
||||
Lvsat = Leff * (1.0 + here->BSIM4Vdseff / here->BSIM4EsatL);
|
||||
T2 = T1 + 2.0 * here->BSIM4v7Abulk * model->BSIM4v7vtm / here->BSIM4v7Vgsteff;
|
||||
Leff = pParam->BSIM4v7leff;
|
||||
Lvsat = Leff * (1.0 + here->BSIM4v7Vdseff / here->BSIM4v7EsatL);
|
||||
T6 = Leff / Lvsat;
|
||||
|
||||
T5 = here->BSIM4Vgsteff / here->BSIM4EsatL;
|
||||
T5 = here->BSIM4v7Vgsteff / here->BSIM4v7EsatL;
|
||||
T5 = T5 * T5;
|
||||
gamma = T6 * (0.5 * T1 + T0 * T0 / (6.0 * T2));
|
||||
T3 = T2 * T2;
|
||||
|
|
@ -403,56 +403,56 @@ double m;
|
|||
T7 = T0 / T2;
|
||||
epsilon = (T7 - T7 * T7 * T7 / 3.0) / (6.0 * T6);
|
||||
|
||||
T8 = here->BSIM4Vgsteff / here->BSIM4EsatL;
|
||||
T8 = here->BSIM4v7Vgsteff / here->BSIM4v7EsatL;
|
||||
T8 *= T8;
|
||||
npart_c = model->BSIM4rnoic * (1.0 + T8
|
||||
* model->BSIM4tnoic * Leff);
|
||||
npart_c = model->BSIM4v7rnoic * (1.0 + T8
|
||||
* model->BSIM4v7tnoic * Leff);
|
||||
ctnoi = epsilon / sqrt(gamma * delta)
|
||||
* (2.5316 * npart_c);
|
||||
|
||||
npart_beta = model->BSIM4rnoia * (1.0 + T8
|
||||
* model->BSIM4tnoia * Leff);
|
||||
npart_theta = model->BSIM4rnoib * (1.0 + T8
|
||||
* model->BSIM4tnoib * Leff);
|
||||
npart_beta = model->BSIM4v7rnoia * (1.0 + T8
|
||||
* model->BSIM4v7tnoia * Leff);
|
||||
npart_theta = model->BSIM4v7rnoib * (1.0 + T8
|
||||
* model->BSIM4v7tnoib * Leff);
|
||||
gamma = gamma * (3.0 * npart_beta * npart_beta);
|
||||
delta = delta * (3.75 * npart_theta * npart_theta);
|
||||
|
||||
GammaGd0 = gamma * here->BSIM4noiGd0;
|
||||
C0 = here->BSIM4Coxeff * pParam->BSIM4weffCV * here->BSIM4nf * pParam->BSIM4leffCV;
|
||||
T0 = C0 / here->BSIM4noiGd0;
|
||||
GammaGd0 = gamma * here->BSIM4v7noiGd0;
|
||||
C0 = here->BSIM4v7Coxeff * pParam->BSIM4v7weffCV * here->BSIM4v7nf * pParam->BSIM4v7leffCV;
|
||||
T0 = C0 / here->BSIM4v7noiGd0;
|
||||
sigrat = T0 * sqrt(delta / gamma);
|
||||
}
|
||||
switch(model->BSIM4tnoiMod)
|
||||
switch(model->BSIM4v7tnoiMod)
|
||||
{ case 0:
|
||||
T0 = here->BSIM4ueff * fabs(here->BSIM4qinv);
|
||||
T1 = T0 * tmp + pParam->BSIM4leff
|
||||
* pParam->BSIM4leff;
|
||||
NevalSrc(&noizDens[BSIM4IDNOIZ],
|
||||
&lnNdens[BSIM4IDNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM4dNodePrime,
|
||||
here->BSIM4sNodePrime,
|
||||
(T0 / T1) * model->BSIM4ntnoi * m);
|
||||
T0 = here->BSIM4v7ueff * fabs(here->BSIM4v7qinv);
|
||||
T1 = T0 * tmp + pParam->BSIM4v7leff
|
||||
* pParam->BSIM4v7leff;
|
||||
NevalSrc(&noizDens[BSIM4v7IDNOIZ],
|
||||
&lnNdens[BSIM4v7IDNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM4v7dNodePrime,
|
||||
here->BSIM4v7sNodePrime,
|
||||
(T0 / T1) * model->BSIM4v7ntnoi * m);
|
||||
break;
|
||||
case 1:
|
||||
T0 = here->BSIM4gm + here->BSIM4gmbs + here->BSIM4gds;
|
||||
T0 = here->BSIM4v7gm + here->BSIM4v7gmbs + here->BSIM4v7gds;
|
||||
T0 *= T0;
|
||||
igsquare = npart_theta * npart_theta * T0 / here->BSIM4IdovVds;
|
||||
T1 = npart_beta * (here->BSIM4gm
|
||||
+ here->BSIM4gmbs) + here->BSIM4gds;
|
||||
T2 = T1 * T1 / here->BSIM4IdovVds;
|
||||
NevalSrc(&noizDens[BSIM4IDNOIZ],
|
||||
&lnNdens[BSIM4IDNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM4dNodePrime,
|
||||
here->BSIM4sNodePrime, (T2 - igsquare) * m);
|
||||
igsquare = npart_theta * npart_theta * T0 / here->BSIM4v7IdovVds;
|
||||
T1 = npart_beta * (here->BSIM4v7gm
|
||||
+ here->BSIM4v7gmbs) + here->BSIM4v7gds;
|
||||
T2 = T1 * T1 / here->BSIM4v7IdovVds;
|
||||
NevalSrc(&noizDens[BSIM4v7IDNOIZ],
|
||||
&lnNdens[BSIM4v7IDNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM4v7dNodePrime,
|
||||
here->BSIM4v7sNodePrime, (T2 - igsquare) * m);
|
||||
break;
|
||||
case 2:
|
||||
T2 = GammaGd0;
|
||||
T3 = ctnoi * ctnoi;
|
||||
T4 = 1.0 - T3;
|
||||
NevalSrc(&noizDens[BSIM4IDNOIZ],
|
||||
&lnNdens[BSIM4IDNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM4dNodePrime,
|
||||
here->BSIM4sNodePrime, T2 * T4 * m);
|
||||
NevalSrc(&noizDens[BSIM4v7IDNOIZ],
|
||||
&lnNdens[BSIM4v7IDNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM4v7dNodePrime,
|
||||
here->BSIM4v7sNodePrime, T2 * T4 * m);
|
||||
|
||||
/* Evaluate output noise due to two correlated noise sources */
|
||||
omega = 2.0 * M_PI * data->freq;
|
||||
|
|
@ -460,106 +460,106 @@ double m;
|
|||
T6 = T5 * T5;
|
||||
T7 = T6 / (1.0 + T6);
|
||||
|
||||
if (here->BSIM4mode >= 0) {
|
||||
NevalSrc2(&noizDens[BSIM4CORLNOIZ],
|
||||
&lnNdens[BSIM4CORLNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM4dNodePrime,
|
||||
here->BSIM4sNodePrime, T2 * T3 * m,
|
||||
here->BSIM4gNodePrime,
|
||||
here->BSIM4sNodePrime,
|
||||
if (here->BSIM4v7mode >= 0) {
|
||||
NevalSrc2(&noizDens[BSIM4v7CORLNOIZ],
|
||||
&lnNdens[BSIM4v7CORLNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM4v7dNodePrime,
|
||||
here->BSIM4v7sNodePrime, T2 * T3 * m,
|
||||
here->BSIM4v7gNodePrime,
|
||||
here->BSIM4v7sNodePrime,
|
||||
T2 * T7 * m, 0.5 * M_PI);
|
||||
}
|
||||
else
|
||||
{
|
||||
NevalSrc2(&noizDens[BSIM4CORLNOIZ],
|
||||
&lnNdens[BSIM4CORLNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM4sNodePrime,
|
||||
here->BSIM4dNodePrime, T2 * T3 * m,
|
||||
here->BSIM4gNodePrime,
|
||||
here->BSIM4dNodePrime,
|
||||
NevalSrc2(&noizDens[BSIM4v7CORLNOIZ],
|
||||
&lnNdens[BSIM4v7CORLNOIZ], ckt,
|
||||
THERMNOISE, here->BSIM4v7sNodePrime,
|
||||
here->BSIM4v7dNodePrime, T2 * T3 * m,
|
||||
here->BSIM4v7gNodePrime,
|
||||
here->BSIM4v7dNodePrime,
|
||||
T2 * T7 * m, 0.5 * M_PI);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
NevalSrc(&noizDens[BSIM4FLNOIZ], (double*) NULL,
|
||||
ckt, N_GAIN, here->BSIM4dNodePrime,
|
||||
here->BSIM4sNodePrime, (double) 0.0);
|
||||
NevalSrc(&noizDens[BSIM4v7FLNOIZ], (double*) NULL,
|
||||
ckt, N_GAIN, here->BSIM4v7dNodePrime,
|
||||
here->BSIM4v7sNodePrime, (double) 0.0);
|
||||
|
||||
switch(model->BSIM4fnoiMod)
|
||||
switch(model->BSIM4v7fnoiMod)
|
||||
{ case 0:
|
||||
noizDens[BSIM4FLNOIZ] *= m * model->BSIM4kf
|
||||
* exp(model->BSIM4af
|
||||
* log(MAX(fabs(here->BSIM4cd),
|
||||
noizDens[BSIM4v7FLNOIZ] *= m * model->BSIM4v7kf
|
||||
* exp(model->BSIM4v7af
|
||||
* log(MAX(fabs(here->BSIM4v7cd),
|
||||
N_MINLOG)))
|
||||
/ (pow(data->freq, model->BSIM4ef)
|
||||
* pParam->BSIM4leff
|
||||
* pParam->BSIM4leff
|
||||
* model->BSIM4coxe);
|
||||
/ (pow(data->freq, model->BSIM4v7ef)
|
||||
* pParam->BSIM4v7leff
|
||||
* pParam->BSIM4v7leff
|
||||
* model->BSIM4v7coxe);
|
||||
break;
|
||||
case 1:
|
||||
Vds = *(ckt->CKTstates[0] + here->BSIM4vds);
|
||||
Vds = *(ckt->CKTstates[0] + here->BSIM4v7vds);
|
||||
if (Vds < 0.0)
|
||||
Vds = -Vds;
|
||||
|
||||
Ssi = Eval1ovFNoise(Vds, model, here,
|
||||
data->freq, ckt->CKTtemp);
|
||||
T10 = model->BSIM4oxideTrapDensityA
|
||||
T10 = model->BSIM4v7oxideTrapDensityA
|
||||
* CONSTboltz * ckt->CKTtemp;
|
||||
T11 = pParam->BSIM4weff * here->BSIM4nf * pParam->BSIM4leff
|
||||
* pow(data->freq, model->BSIM4ef) * 1.0e10
|
||||
* here->BSIM4nstar * here->BSIM4nstar;
|
||||
Swi = T10 / T11 * here->BSIM4cd
|
||||
* here->BSIM4cd;
|
||||
T11 = pParam->BSIM4v7weff * here->BSIM4v7nf * pParam->BSIM4v7leff
|
||||
* pow(data->freq, model->BSIM4v7ef) * 1.0e10
|
||||
* here->BSIM4v7nstar * here->BSIM4v7nstar;
|
||||
Swi = T10 / T11 * here->BSIM4v7cd
|
||||
* here->BSIM4v7cd;
|
||||
T1 = Swi + Ssi;
|
||||
if (T1 > 0.0)
|
||||
noizDens[BSIM4FLNOIZ] *= m * (Ssi * Swi) / T1;
|
||||
noizDens[BSIM4v7FLNOIZ] *= m * (Ssi * Swi) / T1;
|
||||
else
|
||||
noizDens[BSIM4FLNOIZ] *= 0.0;
|
||||
noizDens[BSIM4v7FLNOIZ] *= 0.0;
|
||||
break;
|
||||
}
|
||||
|
||||
lnNdens[BSIM4FLNOIZ] =
|
||||
log(MAX(noizDens[BSIM4FLNOIZ], N_MINLOG));
|
||||
lnNdens[BSIM4v7FLNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v7FLNOIZ], N_MINLOG));
|
||||
|
||||
|
||||
if(here->BSIM4mode >= 0) { /* bugfix */
|
||||
NevalSrc(&noizDens[BSIM4IGSNOIZ],
|
||||
&lnNdens[BSIM4IGSNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4gNodePrime, here->BSIM4sNodePrime,
|
||||
m * (here->BSIM4Igs + here->BSIM4Igcs));
|
||||
NevalSrc(&noizDens[BSIM4IGDNOIZ],
|
||||
&lnNdens[BSIM4IGDNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4gNodePrime, here->BSIM4dNodePrime,
|
||||
m * (here->BSIM4Igd + here->BSIM4Igcd));
|
||||
if(here->BSIM4v7mode >= 0) { /* bugfix */
|
||||
NevalSrc(&noizDens[BSIM4v7IGSNOIZ],
|
||||
&lnNdens[BSIM4v7IGSNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4v7gNodePrime, here->BSIM4v7sNodePrime,
|
||||
m * (here->BSIM4v7Igs + here->BSIM4v7Igcs));
|
||||
NevalSrc(&noizDens[BSIM4v7IGDNOIZ],
|
||||
&lnNdens[BSIM4v7IGDNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4v7gNodePrime, here->BSIM4v7dNodePrime,
|
||||
m * (here->BSIM4v7Igd + here->BSIM4v7Igcd));
|
||||
} else {
|
||||
NevalSrc(&noizDens[BSIM4IGSNOIZ],
|
||||
&lnNdens[BSIM4IGSNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4gNodePrime, here->BSIM4sNodePrime,
|
||||
m * (here->BSIM4Igs + here->BSIM4Igcd));
|
||||
NevalSrc(&noizDens[BSIM4IGDNOIZ],
|
||||
&lnNdens[BSIM4IGDNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4gNodePrime, here->BSIM4dNodePrime,
|
||||
m * (here->BSIM4Igd + here->BSIM4Igcs));
|
||||
NevalSrc(&noizDens[BSIM4v7IGSNOIZ],
|
||||
&lnNdens[BSIM4v7IGSNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4v7gNodePrime, here->BSIM4v7sNodePrime,
|
||||
m * (here->BSIM4v7Igs + here->BSIM4v7Igcd));
|
||||
NevalSrc(&noizDens[BSIM4v7IGDNOIZ],
|
||||
&lnNdens[BSIM4v7IGDNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4v7gNodePrime, here->BSIM4v7dNodePrime,
|
||||
m * (here->BSIM4v7Igd + here->BSIM4v7Igcs));
|
||||
}
|
||||
NevalSrc(&noizDens[BSIM4IGBNOIZ],
|
||||
&lnNdens[BSIM4IGBNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4gNodePrime, here->BSIM4bNodePrime,
|
||||
m * here->BSIM4Igb);
|
||||
NevalSrc(&noizDens[BSIM4v7IGBNOIZ],
|
||||
&lnNdens[BSIM4v7IGBNOIZ], ckt, SHOTNOISE,
|
||||
here->BSIM4v7gNodePrime, here->BSIM4v7bNodePrime,
|
||||
m * here->BSIM4v7Igb);
|
||||
|
||||
|
||||
noizDens[BSIM4TOTNOIZ] = noizDens[BSIM4RDNOIZ]
|
||||
+ noizDens[BSIM4RSNOIZ] + noizDens[BSIM4RGNOIZ]
|
||||
+ noizDens[BSIM4RBPSNOIZ] + noizDens[BSIM4RBPDNOIZ]
|
||||
+ noizDens[BSIM4RBPBNOIZ]
|
||||
+ noizDens[BSIM4RBSBNOIZ] + noizDens[BSIM4RBDBNOIZ]
|
||||
+ noizDens[BSIM4IDNOIZ] + noizDens[BSIM4FLNOIZ]
|
||||
+ noizDens[BSIM4IGSNOIZ] + noizDens[BSIM4IGDNOIZ]
|
||||
+ noizDens[BSIM4IGBNOIZ] + noizDens[BSIM4CORLNOIZ];
|
||||
lnNdens[BSIM4TOTNOIZ] =
|
||||
log(MAX(noizDens[BSIM4TOTNOIZ], N_MINLOG));
|
||||
noizDens[BSIM4v7TOTNOIZ] = noizDens[BSIM4v7RDNOIZ]
|
||||
+ noizDens[BSIM4v7RSNOIZ] + noizDens[BSIM4v7RGNOIZ]
|
||||
+ noizDens[BSIM4v7RBPSNOIZ] + noizDens[BSIM4v7RBPDNOIZ]
|
||||
+ noizDens[BSIM4v7RBPBNOIZ]
|
||||
+ noizDens[BSIM4v7RBSBNOIZ] + noizDens[BSIM4v7RBDBNOIZ]
|
||||
+ noizDens[BSIM4v7IDNOIZ] + noizDens[BSIM4v7FLNOIZ]
|
||||
+ noizDens[BSIM4v7IGSNOIZ] + noizDens[BSIM4v7IGDNOIZ]
|
||||
+ noizDens[BSIM4v7IGBNOIZ] + noizDens[BSIM4v7CORLNOIZ];
|
||||
lnNdens[BSIM4v7TOTNOIZ] =
|
||||
log(MAX(noizDens[BSIM4v7TOTNOIZ], N_MINLOG));
|
||||
|
||||
*OnDens += noizDens[BSIM4TOTNOIZ];
|
||||
*OnDens += noizDens[BSIM4v7TOTNOIZ];
|
||||
|
||||
if (data->delFreq == 0.0)
|
||||
{ /* if we haven't done any previous
|
||||
|
|
@ -567,8 +567,8 @@ double m;
|
|||
"history" variables.
|
||||
*/
|
||||
|
||||
for (i = 0; i < BSIM4NSRCS; i++)
|
||||
{ here->BSIM4nVar[LNLSTDENS][i] =
|
||||
for (i = 0; i < BSIM4v7NSRCS; i++)
|
||||
{ here->BSIM4v7nVar[LNLSTDENS][i] =
|
||||
lnNdens[i];
|
||||
}
|
||||
|
||||
|
|
@ -577,9 +577,9 @@ double m;
|
|||
*/
|
||||
if (data->freq ==
|
||||
job->NstartFreq)
|
||||
{ for (i = 0; i < BSIM4NSRCS; i++)
|
||||
{ here->BSIM4nVar[OUTNOIZ][i] = 0.0;
|
||||
here->BSIM4nVar[INNOIZ][i] = 0.0;
|
||||
{ for (i = 0; i < BSIM4v7NSRCS; i++)
|
||||
{ here->BSIM4v7nVar[OUTNOIZ][i] = 0.0;
|
||||
here->BSIM4v7nVar[INNOIZ][i] = 0.0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -587,36 +587,36 @@ double m;
|
|||
{ /* data->delFreq != 0.0,
|
||||
we have to integrate.
|
||||
*/
|
||||
for (i = 0; i < BSIM4NSRCS; i++)
|
||||
{ if (i != BSIM4TOTNOIZ)
|
||||
for (i = 0; i < BSIM4v7NSRCS; i++)
|
||||
{ if (i != BSIM4v7TOTNOIZ)
|
||||
{ tempOnoise = Nintegrate(noizDens[i],
|
||||
lnNdens[i],
|
||||
here->BSIM4nVar[LNLSTDENS][i],
|
||||
here->BSIM4v7nVar[LNLSTDENS][i],
|
||||
data);
|
||||
tempInoise = Nintegrate(noizDens[i]
|
||||
* data->GainSqInv, lnNdens[i]
|
||||
+ data->lnGainInv,
|
||||
here->BSIM4nVar[LNLSTDENS][i]
|
||||
here->BSIM4v7nVar[LNLSTDENS][i]
|
||||
+ data->lnGainInv, data);
|
||||
here->BSIM4nVar[LNLSTDENS][i] =
|
||||
here->BSIM4v7nVar[LNLSTDENS][i] =
|
||||
lnNdens[i];
|
||||
data->outNoiz += tempOnoise;
|
||||
data->inNoise += tempInoise;
|
||||
if (job->NStpsSm != 0)
|
||||
{ here->BSIM4nVar[OUTNOIZ][i]
|
||||
{ here->BSIM4v7nVar[OUTNOIZ][i]
|
||||
+= tempOnoise;
|
||||
here->BSIM4nVar[OUTNOIZ][BSIM4TOTNOIZ]
|
||||
here->BSIM4v7nVar[OUTNOIZ][BSIM4v7TOTNOIZ]
|
||||
+= tempOnoise;
|
||||
here->BSIM4nVar[INNOIZ][i]
|
||||
here->BSIM4v7nVar[INNOIZ][i]
|
||||
+= tempInoise;
|
||||
here->BSIM4nVar[INNOIZ][BSIM4TOTNOIZ]
|
||||
here->BSIM4v7nVar[INNOIZ][BSIM4v7TOTNOIZ]
|
||||
+= tempInoise;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
if (data->prtSummary)
|
||||
{ for (i = 0; i < BSIM4NSRCS; i++)
|
||||
{ for (i = 0; i < BSIM4v7NSRCS; i++)
|
||||
{ /* print a summary report */
|
||||
data->outpVector[data->outNumber++]
|
||||
= noizDens[i];
|
||||
|
|
@ -626,11 +626,11 @@ double m;
|
|||
case INT_NOIZ:
|
||||
/* already calculated, just output */
|
||||
if (job->NStpsSm != 0)
|
||||
{ for (i = 0; i < BSIM4NSRCS; i++)
|
||||
{ for (i = 0; i < BSIM4v7NSRCS; i++)
|
||||
{ data->outpVector[data->outNumber++]
|
||||
= here->BSIM4nVar[OUTNOIZ][i];
|
||||
= here->BSIM4v7nVar[OUTNOIZ][i];
|
||||
data->outpVector[data->outNumber++]
|
||||
= here->BSIM4nVar[INNOIZ][i];
|
||||
= here->BSIM4v7nVar[INNOIZ][i];
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -16,13 +16,13 @@
|
|||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "ngspice/ifsim.h"
|
||||
#include "bsim4def.h"
|
||||
#include "bsim4v7def.h"
|
||||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
#include "ngspice/fteext.h"
|
||||
|
||||
int
|
||||
BSIM4param(
|
||||
BSIM4v7param(
|
||||
int param,
|
||||
IFvalue *value,
|
||||
GENinstance *inst,
|
||||
|
|
@ -30,7 +30,7 @@ IFvalue *select)
|
|||
{
|
||||
double scale;
|
||||
|
||||
BSIM4instance *here = (BSIM4instance*)inst;
|
||||
BSIM4v7instance *here = (BSIM4v7instance*)inst;
|
||||
|
||||
NG_IGNORE(select);
|
||||
|
||||
|
|
@ -38,160 +38,160 @@ IFvalue *select)
|
|||
scale = 1;
|
||||
|
||||
switch(param)
|
||||
{ case BSIM4_W:
|
||||
here->BSIM4w = value->rValue * scale;
|
||||
here->BSIM4wGiven = TRUE;
|
||||
{ case BSIM4v7_W:
|
||||
here->BSIM4v7w = value->rValue * scale;
|
||||
here->BSIM4v7wGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_L:
|
||||
here->BSIM4l = value->rValue * scale;
|
||||
here->BSIM4lGiven = TRUE;
|
||||
case BSIM4v7_L:
|
||||
here->BSIM4v7l = value->rValue * scale;
|
||||
here->BSIM4v7lGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_M:
|
||||
here->BSIM4m = value->rValue;
|
||||
here->BSIM4mGiven = TRUE;
|
||||
case BSIM4v7_M:
|
||||
here->BSIM4v7m = value->rValue;
|
||||
here->BSIM4v7mGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_NF:
|
||||
here->BSIM4nf = value->rValue;
|
||||
here->BSIM4nfGiven = TRUE;
|
||||
case BSIM4v7_NF:
|
||||
here->BSIM4v7nf = value->rValue;
|
||||
here->BSIM4v7nfGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_MIN:
|
||||
here->BSIM4min = value->iValue;
|
||||
here->BSIM4minGiven = TRUE;
|
||||
case BSIM4v7_MIN:
|
||||
here->BSIM4v7min = value->iValue;
|
||||
here->BSIM4v7minGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_AS:
|
||||
here->BSIM4sourceArea = value->rValue * scale * scale;
|
||||
here->BSIM4sourceAreaGiven = TRUE;
|
||||
case BSIM4v7_AS:
|
||||
here->BSIM4v7sourceArea = value->rValue * scale * scale;
|
||||
here->BSIM4v7sourceAreaGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_AD:
|
||||
here->BSIM4drainArea = value->rValue * scale * scale;
|
||||
here->BSIM4drainAreaGiven = TRUE;
|
||||
case BSIM4v7_AD:
|
||||
here->BSIM4v7drainArea = value->rValue * scale * scale;
|
||||
here->BSIM4v7drainAreaGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_PS:
|
||||
here->BSIM4sourcePerimeter = value->rValue * scale;
|
||||
here->BSIM4sourcePerimeterGiven = TRUE;
|
||||
case BSIM4v7_PS:
|
||||
here->BSIM4v7sourcePerimeter = value->rValue * scale;
|
||||
here->BSIM4v7sourcePerimeterGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_PD:
|
||||
here->BSIM4drainPerimeter = value->rValue * scale;
|
||||
here->BSIM4drainPerimeterGiven = TRUE;
|
||||
case BSIM4v7_PD:
|
||||
here->BSIM4v7drainPerimeter = value->rValue * scale;
|
||||
here->BSIM4v7drainPerimeterGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_NRS:
|
||||
here->BSIM4sourceSquares = value->rValue;
|
||||
here->BSIM4sourceSquaresGiven = TRUE;
|
||||
case BSIM4v7_NRS:
|
||||
here->BSIM4v7sourceSquares = value->rValue;
|
||||
here->BSIM4v7sourceSquaresGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_NRD:
|
||||
here->BSIM4drainSquares = value->rValue;
|
||||
here->BSIM4drainSquaresGiven = TRUE;
|
||||
case BSIM4v7_NRD:
|
||||
here->BSIM4v7drainSquares = value->rValue;
|
||||
here->BSIM4v7drainSquaresGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_OFF:
|
||||
here->BSIM4off = value->iValue;
|
||||
case BSIM4v7_OFF:
|
||||
here->BSIM4v7off = value->iValue;
|
||||
break;
|
||||
case BSIM4_SA:
|
||||
here->BSIM4sa = value->rValue;
|
||||
here->BSIM4saGiven = TRUE;
|
||||
case BSIM4v7_SA:
|
||||
here->BSIM4v7sa = value->rValue;
|
||||
here->BSIM4v7saGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_SB:
|
||||
here->BSIM4sb = value->rValue;
|
||||
here->BSIM4sbGiven = TRUE;
|
||||
case BSIM4v7_SB:
|
||||
here->BSIM4v7sb = value->rValue;
|
||||
here->BSIM4v7sbGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_SD:
|
||||
here->BSIM4sd = value->rValue;
|
||||
here->BSIM4sdGiven = TRUE;
|
||||
case BSIM4v7_SD:
|
||||
here->BSIM4v7sd = value->rValue;
|
||||
here->BSIM4v7sdGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_SCA:
|
||||
here->BSIM4sca = value->rValue;
|
||||
here->BSIM4scaGiven = TRUE;
|
||||
case BSIM4v7_SCA:
|
||||
here->BSIM4v7sca = value->rValue;
|
||||
here->BSIM4v7scaGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_SCB:
|
||||
here->BSIM4scb = value->rValue;
|
||||
here->BSIM4scbGiven = TRUE;
|
||||
case BSIM4v7_SCB:
|
||||
here->BSIM4v7scb = value->rValue;
|
||||
here->BSIM4v7scbGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_SCC:
|
||||
here->BSIM4scc = value->rValue;
|
||||
here->BSIM4sccGiven = TRUE;
|
||||
case BSIM4v7_SCC:
|
||||
here->BSIM4v7scc = value->rValue;
|
||||
here->BSIM4v7sccGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_SC:
|
||||
here->BSIM4sc = value->rValue;
|
||||
here->BSIM4scGiven = TRUE;
|
||||
case BSIM4v7_SC:
|
||||
here->BSIM4v7sc = value->rValue;
|
||||
here->BSIM4v7scGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_RBSB:
|
||||
here->BSIM4rbsb = value->rValue;
|
||||
here->BSIM4rbsbGiven = TRUE;
|
||||
case BSIM4v7_RBSB:
|
||||
here->BSIM4v7rbsb = value->rValue;
|
||||
here->BSIM4v7rbsbGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_RBDB:
|
||||
here->BSIM4rbdb = value->rValue;
|
||||
here->BSIM4rbdbGiven = TRUE;
|
||||
case BSIM4v7_RBDB:
|
||||
here->BSIM4v7rbdb = value->rValue;
|
||||
here->BSIM4v7rbdbGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_RBPB:
|
||||
here->BSIM4rbpb = value->rValue;
|
||||
here->BSIM4rbpbGiven = TRUE;
|
||||
case BSIM4v7_RBPB:
|
||||
here->BSIM4v7rbpb = value->rValue;
|
||||
here->BSIM4v7rbpbGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_RBPS:
|
||||
here->BSIM4rbps = value->rValue;
|
||||
here->BSIM4rbpsGiven = TRUE;
|
||||
case BSIM4v7_RBPS:
|
||||
here->BSIM4v7rbps = value->rValue;
|
||||
here->BSIM4v7rbpsGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_RBPD:
|
||||
here->BSIM4rbpd = value->rValue;
|
||||
here->BSIM4rbpdGiven = TRUE;
|
||||
case BSIM4v7_RBPD:
|
||||
here->BSIM4v7rbpd = value->rValue;
|
||||
here->BSIM4v7rbpdGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_DELVTO:
|
||||
here->BSIM4delvto = value->rValue;
|
||||
here->BSIM4delvtoGiven = TRUE;
|
||||
case BSIM4v7_DELVTO:
|
||||
here->BSIM4v7delvto = value->rValue;
|
||||
here->BSIM4v7delvtoGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_XGW:
|
||||
here->BSIM4xgw = value->rValue;
|
||||
here->BSIM4xgwGiven = TRUE;
|
||||
case BSIM4v7_XGW:
|
||||
here->BSIM4v7xgw = value->rValue;
|
||||
here->BSIM4v7xgwGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_NGCON:
|
||||
here->BSIM4ngcon = value->rValue;
|
||||
here->BSIM4ngconGiven = TRUE;
|
||||
case BSIM4v7_NGCON:
|
||||
here->BSIM4v7ngcon = value->rValue;
|
||||
here->BSIM4v7ngconGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_TRNQSMOD:
|
||||
here->BSIM4trnqsMod = value->iValue;
|
||||
here->BSIM4trnqsModGiven = TRUE;
|
||||
case BSIM4v7_TRNQSMOD:
|
||||
here->BSIM4v7trnqsMod = value->iValue;
|
||||
here->BSIM4v7trnqsModGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_ACNQSMOD:
|
||||
here->BSIM4acnqsMod = value->iValue;
|
||||
here->BSIM4acnqsModGiven = TRUE;
|
||||
case BSIM4v7_ACNQSMOD:
|
||||
here->BSIM4v7acnqsMod = value->iValue;
|
||||
here->BSIM4v7acnqsModGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_RBODYMOD:
|
||||
here->BSIM4rbodyMod = value->iValue;
|
||||
here->BSIM4rbodyModGiven = TRUE;
|
||||
case BSIM4v7_RBODYMOD:
|
||||
here->BSIM4v7rbodyMod = value->iValue;
|
||||
here->BSIM4v7rbodyModGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_RGATEMOD:
|
||||
here->BSIM4rgateMod = value->iValue;
|
||||
here->BSIM4rgateModGiven = TRUE;
|
||||
case BSIM4v7_RGATEMOD:
|
||||
here->BSIM4v7rgateMod = value->iValue;
|
||||
here->BSIM4v7rgateModGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_GEOMOD:
|
||||
here->BSIM4geoMod = value->iValue;
|
||||
here->BSIM4geoModGiven = TRUE;
|
||||
case BSIM4v7_GEOMOD:
|
||||
here->BSIM4v7geoMod = value->iValue;
|
||||
here->BSIM4v7geoModGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_RGEOMOD:
|
||||
here->BSIM4rgeoMod = value->iValue;
|
||||
here->BSIM4rgeoModGiven = TRUE;
|
||||
case BSIM4v7_RGEOMOD:
|
||||
here->BSIM4v7rgeoMod = value->iValue;
|
||||
here->BSIM4v7rgeoModGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_IC_VDS:
|
||||
here->BSIM4icVDS = value->rValue;
|
||||
here->BSIM4icVDSGiven = TRUE;
|
||||
case BSIM4v7_IC_VDS:
|
||||
here->BSIM4v7icVDS = value->rValue;
|
||||
here->BSIM4v7icVDSGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_IC_VGS:
|
||||
here->BSIM4icVGS = value->rValue;
|
||||
here->BSIM4icVGSGiven = TRUE;
|
||||
case BSIM4v7_IC_VGS:
|
||||
here->BSIM4v7icVGS = value->rValue;
|
||||
here->BSIM4v7icVGSGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_IC_VBS:
|
||||
here->BSIM4icVBS = value->rValue;
|
||||
here->BSIM4icVBSGiven = TRUE;
|
||||
case BSIM4v7_IC_VBS:
|
||||
here->BSIM4v7icVBS = value->rValue;
|
||||
here->BSIM4v7icVBSGiven = TRUE;
|
||||
break;
|
||||
case BSIM4_IC:
|
||||
case BSIM4v7_IC:
|
||||
switch(value->v.numValue)
|
||||
{ case 3:
|
||||
here->BSIM4icVBS = *(value->v.vec.rVec+2);
|
||||
here->BSIM4icVBSGiven = TRUE;
|
||||
here->BSIM4v7icVBS = *(value->v.vec.rVec+2);
|
||||
here->BSIM4v7icVBSGiven = TRUE;
|
||||
case 2:
|
||||
here->BSIM4icVGS = *(value->v.vec.rVec+1);
|
||||
here->BSIM4icVGSGiven = TRUE;
|
||||
here->BSIM4v7icVGS = *(value->v.vec.rVec+1);
|
||||
here->BSIM4v7icVGSGiven = TRUE;
|
||||
case 1:
|
||||
here->BSIM4icVDS = *(value->v.vec.rVec);
|
||||
here->BSIM4icVDSGiven = TRUE;
|
||||
here->BSIM4v7icVDS = *(value->v.vec.rVec);
|
||||
here->BSIM4v7icVDSGiven = TRUE;
|
||||
break;
|
||||
default:
|
||||
return(E_BADPARM);
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -5,7 +5,7 @@ Author: 2013 Dietmar Warning
|
|||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "bsim4def.h"
|
||||
#include "bsim4v7def.h"
|
||||
#include "ngspice/trandefs.h"
|
||||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
|
@ -13,10 +13,10 @@ Author: 2013 Dietmar Warning
|
|||
|
||||
|
||||
int
|
||||
BSIM4soaCheck(CKTcircuit *ckt, GENmodel *inModel)
|
||||
BSIM4v7soaCheck(CKTcircuit *ckt, GENmodel *inModel)
|
||||
{
|
||||
BSIM4model *model = (BSIM4model *) inModel;
|
||||
BSIM4instance *here;
|
||||
BSIM4v7model *model = (BSIM4v7model *) inModel;
|
||||
BSIM4v7instance *here;
|
||||
double vgs, vgd, vgb, vds, vbs, vbd; /* actual mos voltages */
|
||||
int maxwarns;
|
||||
static int warns_vgs = 0, warns_vgd = 0, warns_vgb = 0, warns_vds = 0, warns_vbs = 0, warns_vbd = 0;
|
||||
|
|
@ -33,73 +33,73 @@ BSIM4soaCheck(CKTcircuit *ckt, GENmodel *inModel)
|
|||
|
||||
maxwarns = ckt->CKTsoaMaxWarns;
|
||||
|
||||
for (; model; model = model->BSIM4nextModel) {
|
||||
for (; model; model = model->BSIM4v7nextModel) {
|
||||
|
||||
for (here = model->BSIM4instances; here; here = here->BSIM4nextInstance) {
|
||||
for (here = model->BSIM4v7instances; here; here = here->BSIM4v7nextInstance) {
|
||||
|
||||
vgs = fabs(ckt->CKTrhsOld [here->BSIM4gNodePrime] -
|
||||
ckt->CKTrhsOld [here->BSIM4sNodePrime]);
|
||||
vgs = fabs(ckt->CKTrhsOld [here->BSIM4v7gNodePrime] -
|
||||
ckt->CKTrhsOld [here->BSIM4v7sNodePrime]);
|
||||
|
||||
vgd = fabs(ckt->CKTrhsOld [here->BSIM4gNodePrime] -
|
||||
ckt->CKTrhsOld [here->BSIM4dNodePrime]);
|
||||
vgd = fabs(ckt->CKTrhsOld [here->BSIM4v7gNodePrime] -
|
||||
ckt->CKTrhsOld [here->BSIM4v7dNodePrime]);
|
||||
|
||||
vgb = fabs(ckt->CKTrhsOld [here->BSIM4gNodePrime] -
|
||||
ckt->CKTrhsOld [here->BSIM4bNodePrime]);
|
||||
vgb = fabs(ckt->CKTrhsOld [here->BSIM4v7gNodePrime] -
|
||||
ckt->CKTrhsOld [here->BSIM4v7bNodePrime]);
|
||||
|
||||
vds = fabs(ckt->CKTrhsOld [here->BSIM4dNodePrime] -
|
||||
ckt->CKTrhsOld [here->BSIM4sNodePrime]);
|
||||
vds = fabs(ckt->CKTrhsOld [here->BSIM4v7dNodePrime] -
|
||||
ckt->CKTrhsOld [here->BSIM4v7sNodePrime]);
|
||||
|
||||
vbs = fabs(ckt->CKTrhsOld [here->BSIM4bNodePrime] -
|
||||
ckt->CKTrhsOld [here->BSIM4sNodePrime]);
|
||||
vbs = fabs(ckt->CKTrhsOld [here->BSIM4v7bNodePrime] -
|
||||
ckt->CKTrhsOld [here->BSIM4v7sNodePrime]);
|
||||
|
||||
vbd = fabs(ckt->CKTrhsOld [here->BSIM4bNodePrime] -
|
||||
ckt->CKTrhsOld [here->BSIM4dNodePrime]);
|
||||
vbd = fabs(ckt->CKTrhsOld [here->BSIM4v7bNodePrime] -
|
||||
ckt->CKTrhsOld [here->BSIM4v7dNodePrime]);
|
||||
|
||||
if (vgs > model->BSIM4vgsMax)
|
||||
if (vgs > model->BSIM4v7vgsMax)
|
||||
if (warns_vgs < maxwarns) {
|
||||
soa_printf(ckt, (GENinstance*) here,
|
||||
"|Vgs|=%g has exceeded Vgs_max=%g\n",
|
||||
vgs, model->BSIM4vgsMax);
|
||||
vgs, model->BSIM4v7vgsMax);
|
||||
warns_vgs++;
|
||||
}
|
||||
|
||||
if (vgd > model->BSIM4vgdMax)
|
||||
if (vgd > model->BSIM4v7vgdMax)
|
||||
if (warns_vgd < maxwarns) {
|
||||
soa_printf(ckt, (GENinstance*) here,
|
||||
"|Vgd|=%g has exceeded Vgd_max=%g\n",
|
||||
vgd, model->BSIM4vgdMax);
|
||||
vgd, model->BSIM4v7vgdMax);
|
||||
warns_vgd++;
|
||||
}
|
||||
|
||||
if (vgb > model->BSIM4vgbMax)
|
||||
if (vgb > model->BSIM4v7vgbMax)
|
||||
if (warns_vgb < maxwarns) {
|
||||
soa_printf(ckt, (GENinstance*) here,
|
||||
"|Vgb|=%g has exceeded Vgb_max=%g\n",
|
||||
vgb, model->BSIM4vgbMax);
|
||||
vgb, model->BSIM4v7vgbMax);
|
||||
warns_vgb++;
|
||||
}
|
||||
|
||||
if (vds > model->BSIM4vdsMax)
|
||||
if (vds > model->BSIM4v7vdsMax)
|
||||
if (warns_vds < maxwarns) {
|
||||
soa_printf(ckt, (GENinstance*) here,
|
||||
"|Vds|=%g has exceeded Vds_max=%g\n",
|
||||
vds, model->BSIM4vdsMax);
|
||||
vds, model->BSIM4v7vdsMax);
|
||||
warns_vds++;
|
||||
}
|
||||
|
||||
if (vbs > model->BSIM4vbsMax)
|
||||
if (vbs > model->BSIM4v7vbsMax)
|
||||
if (warns_vbs < maxwarns) {
|
||||
soa_printf(ckt, (GENinstance*) here,
|
||||
"|Vbs|=%g has exceeded Vbs_max=%g\n",
|
||||
vbs, model->BSIM4vbsMax);
|
||||
vbs, model->BSIM4v7vbsMax);
|
||||
warns_vbs++;
|
||||
}
|
||||
|
||||
if (vbd > model->BSIM4vbdMax)
|
||||
if (vbd > model->BSIM4v7vbdMax)
|
||||
if (warns_vbd < maxwarns) {
|
||||
soa_printf(ckt, (GENinstance*) here,
|
||||
"|Vbd|=%g has exceeded Vbd_max=%g\n",
|
||||
vbd, model->BSIM4vbdMax);
|
||||
vbd, model->BSIM4v7vbdMax);
|
||||
warns_vbd++;
|
||||
}
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -12,46 +12,46 @@
|
|||
|
||||
#include "ngspice/ngspice.h"
|
||||
#include "ngspice/cktdefs.h"
|
||||
#include "bsim4def.h"
|
||||
#include "bsim4v7def.h"
|
||||
#include "ngspice/sperror.h"
|
||||
#include "ngspice/suffix.h"
|
||||
|
||||
|
||||
int
|
||||
BSIM4trunc(
|
||||
BSIM4v7trunc(
|
||||
GENmodel *inModel,
|
||||
CKTcircuit *ckt,
|
||||
double *timeStep)
|
||||
{
|
||||
BSIM4model *model = (BSIM4model*)inModel;
|
||||
BSIM4instance *here;
|
||||
BSIM4v7model *model = (BSIM4v7model*)inModel;
|
||||
BSIM4v7instance *here;
|
||||
|
||||
#ifdef STEPDEBUG
|
||||
double debugtemp;
|
||||
#endif /* STEPDEBUG */
|
||||
|
||||
for (; model != NULL; model = model->BSIM4nextModel)
|
||||
{ for (here = model->BSIM4instances; here != NULL;
|
||||
here = here->BSIM4nextInstance)
|
||||
for (; model != NULL; model = model->BSIM4v7nextModel)
|
||||
{ for (here = model->BSIM4v7instances; here != NULL;
|
||||
here = here->BSIM4v7nextInstance)
|
||||
{
|
||||
#ifdef STEPDEBUG
|
||||
debugtemp = *timeStep;
|
||||
#endif /* STEPDEBUG */
|
||||
CKTterr(here->BSIM4qb,ckt,timeStep);
|
||||
CKTterr(here->BSIM4qg,ckt,timeStep);
|
||||
CKTterr(here->BSIM4qd,ckt,timeStep);
|
||||
if (here->BSIM4trnqsMod)
|
||||
CKTterr(here->BSIM4qcdump,ckt,timeStep);
|
||||
if (here->BSIM4rbodyMod)
|
||||
{ CKTterr(here->BSIM4qbs,ckt,timeStep);
|
||||
CKTterr(here->BSIM4qbd,ckt,timeStep);
|
||||
CKTterr(here->BSIM4v7qb,ckt,timeStep);
|
||||
CKTterr(here->BSIM4v7qg,ckt,timeStep);
|
||||
CKTterr(here->BSIM4v7qd,ckt,timeStep);
|
||||
if (here->BSIM4v7trnqsMod)
|
||||
CKTterr(here->BSIM4v7qcdump,ckt,timeStep);
|
||||
if (here->BSIM4v7rbodyMod)
|
||||
{ CKTterr(here->BSIM4v7qbs,ckt,timeStep);
|
||||
CKTterr(here->BSIM4v7qbd,ckt,timeStep);
|
||||
}
|
||||
if (here->BSIM4rgateMod == 3)
|
||||
CKTterr(here->BSIM4qgmid,ckt,timeStep);
|
||||
if (here->BSIM4v7rgateMod == 3)
|
||||
CKTterr(here->BSIM4v7qgmid,ckt,timeStep);
|
||||
#ifdef STEPDEBUG
|
||||
if(debugtemp != *timeStep)
|
||||
{ printf("device %s reduces step from %g to %g\n",
|
||||
here->BSIM4name,debugtemp,*timeStep);
|
||||
here->BSIM4v7name,debugtemp,*timeStep);
|
||||
}
|
||||
#endif /* STEPDEBUG */
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -2,30 +2,30 @@
|
|||
Copyright 2004 Regents of the University of California. All rights reserved.
|
||||
Author: 2000 Weidong Liu
|
||||
Author: 2001- Xuemei Xi
|
||||
File: bsim4ext.h
|
||||
File: bsim4v7ext.h
|
||||
**********/
|
||||
|
||||
extern int BSIM4acLoad(GENmodel *,CKTcircuit*);
|
||||
extern int BSIM4ask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*);
|
||||
extern int BSIM4convTest(GENmodel *,CKTcircuit*);
|
||||
extern int BSIM4delete(GENmodel*,IFuid,GENinstance**);
|
||||
extern void BSIM4destroy(GENmodel**);
|
||||
extern int BSIM4getic(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4load(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4mAsk(CKTcircuit*,GENmodel *,int, IFvalue*);
|
||||
extern int BSIM4mDelete(GENmodel**,IFuid,GENmodel*);
|
||||
extern int BSIM4mParam(int,IFvalue*,GENmodel*);
|
||||
extern void BSIM4mosCap(CKTcircuit*, double, double, double, double,
|
||||
extern int BSIM4v7acLoad(GENmodel *,CKTcircuit*);
|
||||
extern int BSIM4v7ask(CKTcircuit *,GENinstance*,int,IFvalue*,IFvalue*);
|
||||
extern int BSIM4v7convTest(GENmodel *,CKTcircuit*);
|
||||
extern int BSIM4v7delete(GENmodel*,IFuid,GENinstance**);
|
||||
extern void BSIM4v7destroy(GENmodel**);
|
||||
extern int BSIM4v7getic(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4v7load(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4v7mAsk(CKTcircuit*,GENmodel *,int, IFvalue*);
|
||||
extern int BSIM4v7mDelete(GENmodel**,IFuid,GENmodel*);
|
||||
extern int BSIM4v7mParam(int,IFvalue*,GENmodel*);
|
||||
extern void BSIM4v7mosCap(CKTcircuit*, double, double, double, double,
|
||||
double, double, double, double, double, double, double,
|
||||
double, double, double, double, double, double, double*,
|
||||
double*, double*, double*, double*, double*, double*, double*,
|
||||
double*, double*, double*, double*, double*, double*, double*,
|
||||
double*);
|
||||
extern int BSIM4param(int,IFvalue*,GENinstance*,IFvalue*);
|
||||
extern int BSIM4pzLoad(GENmodel*,CKTcircuit*,SPcomplex*);
|
||||
extern int BSIM4setup(SMPmatrix*,GENmodel*,CKTcircuit*,int*);
|
||||
extern int BSIM4temp(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4trunc(GENmodel*,CKTcircuit*,double*);
|
||||
extern int BSIM4noise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*);
|
||||
extern int BSIM4unsetup(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4soaCheck(CKTcircuit *, GENmodel *);
|
||||
extern int BSIM4v7param(int,IFvalue*,GENinstance*,IFvalue*);
|
||||
extern int BSIM4v7pzLoad(GENmodel*,CKTcircuit*,SPcomplex*);
|
||||
extern int BSIM4v7setup(SMPmatrix*,GENmodel*,CKTcircuit*,int*);
|
||||
extern int BSIM4v7temp(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4v7trunc(GENmodel*,CKTcircuit*,double*);
|
||||
extern int BSIM4v7noise(int,int,GENmodel*,CKTcircuit*,Ndata*,double*);
|
||||
extern int BSIM4v7unsetup(GENmodel*,CKTcircuit*);
|
||||
extern int BSIM4v7soaCheck(CKTcircuit *, GENmodel *);
|
||||
|
|
|
|||
|
|
@ -2,25 +2,25 @@
|
|||
|
||||
#include "ngspice/devdefs.h"
|
||||
|
||||
#include "bsim4itf.h"
|
||||
#include "bsim4ext.h"
|
||||
#include "bsim4init.h"
|
||||
#include "bsim4v7itf.h"
|
||||
#include "bsim4v7ext.h"
|
||||
#include "bsim4v7init.h"
|
||||
|
||||
|
||||
SPICEdev BSIM4info = {
|
||||
SPICEdev BSIM4v7info = {
|
||||
{
|
||||
"BSIM4",
|
||||
"BSIM4v7",
|
||||
"Berkeley Short Channel IGFET Model-4",
|
||||
|
||||
&BSIM4nSize,
|
||||
&BSIM4nSize,
|
||||
BSIM4names,
|
||||
&BSIM4v7nSize,
|
||||
&BSIM4v7nSize,
|
||||
BSIM4v7names,
|
||||
|
||||
&BSIM4pTSize,
|
||||
BSIM4pTable,
|
||||
&BSIM4v7pTSize,
|
||||
BSIM4v7pTable,
|
||||
|
||||
&BSIM4mPTSize,
|
||||
BSIM4mPTable,
|
||||
&BSIM4v7mPTSize,
|
||||
BSIM4v7mPTable,
|
||||
|
||||
#ifdef XSPICE
|
||||
/*---- Fixed by SDB 5.2.2003 to enable XSPICE/tclspice integration -----*/
|
||||
|
|
@ -40,25 +40,25 @@ SPICEdev BSIM4info = {
|
|||
DEV_DEFAULT
|
||||
},
|
||||
|
||||
BSIM4param, /* DEVparam */
|
||||
BSIM4mParam, /* DEVmodParam */
|
||||
BSIM4load, /* DEVload */
|
||||
BSIM4setup, /* DEVsetup */
|
||||
BSIM4unsetup, /* DEVunsetup */
|
||||
BSIM4setup, /* DEVpzSetup */
|
||||
BSIM4temp, /* DEVtemperature */
|
||||
BSIM4trunc, /* DEVtrunc */
|
||||
BSIM4v7param, /* DEVparam */
|
||||
BSIM4v7mParam, /* DEVmodParam */
|
||||
BSIM4v7load, /* DEVload */
|
||||
BSIM4v7setup, /* DEVsetup */
|
||||
BSIM4v7unsetup, /* DEVunsetup */
|
||||
BSIM4v7setup, /* DEVpzSetup */
|
||||
BSIM4v7temp, /* DEVtemperature */
|
||||
BSIM4v7trunc, /* DEVtrunc */
|
||||
NULL, /* DEVfindBranch */
|
||||
BSIM4acLoad, /* DEVacLoad */
|
||||
BSIM4v7acLoad, /* DEVacLoad */
|
||||
NULL, /* DEVaccept */
|
||||
BSIM4destroy, /* DEVdestroy */
|
||||
BSIM4mDelete, /* DEVmodDelete */
|
||||
BSIM4delete, /* DEVdelete */
|
||||
BSIM4getic, /* DEVsetic */
|
||||
BSIM4ask, /* DEVask */
|
||||
BSIM4mAsk, /* DEVmodAsk */
|
||||
BSIM4pzLoad, /* DEVpzLoad */
|
||||
BSIM4convTest, /* DEVconvTest */
|
||||
BSIM4v7destroy, /* DEVdestroy */
|
||||
BSIM4v7mDelete, /* DEVmodDelete */
|
||||
BSIM4v7delete, /* DEVdelete */
|
||||
BSIM4v7getic, /* DEVsetic */
|
||||
BSIM4v7ask, /* DEVask */
|
||||
BSIM4v7mAsk, /* DEVmodAsk */
|
||||
BSIM4v7pzLoad, /* DEVpzLoad */
|
||||
BSIM4v7convTest, /* DEVconvTest */
|
||||
NULL, /* DEVsenSetup */
|
||||
NULL, /* DEVsenLoad */
|
||||
NULL, /* DEVsenUpdate */
|
||||
|
|
@ -66,19 +66,19 @@ SPICEdev BSIM4info = {
|
|||
NULL, /* DEVsenPrint */
|
||||
NULL, /* DEVsenTrunc */
|
||||
NULL, /* DEVdisto */
|
||||
BSIM4noise, /* DEVnoise */
|
||||
BSIM4soaCheck, /* DEVsoaCheck */
|
||||
BSIM4v7noise, /* DEVnoise */
|
||||
BSIM4v7soaCheck, /* DEVsoaCheck */
|
||||
#ifdef CIDER
|
||||
NULL, /* DEVdump */
|
||||
NULL, /* DEVacct */
|
||||
#endif
|
||||
&BSIM4iSize, /* DEVinstSize */
|
||||
&BSIM4mSize /* DEVmodSize */
|
||||
&BSIM4v7iSize, /* DEVinstSize */
|
||||
&BSIM4v7mSize /* DEVmodSize */
|
||||
};
|
||||
|
||||
|
||||
SPICEdev *
|
||||
get_bsim4_info(void)
|
||||
get_bsim4v7_info(void)
|
||||
{
|
||||
return &BSIM4info;
|
||||
return &BSIM4v7info;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,13 +1,13 @@
|
|||
#ifndef _BSIM4INIT_H
|
||||
#define _BSIM4INIT_H
|
||||
#ifndef _BSIM4v7INIT_H
|
||||
#define _BSIM4v7INIT_H
|
||||
|
||||
extern IFparm BSIM4pTable[ ];
|
||||
extern IFparm BSIM4mPTable[ ];
|
||||
extern char *BSIM4names[ ];
|
||||
extern int BSIM4pTSize;
|
||||
extern int BSIM4mPTSize;
|
||||
extern int BSIM4nSize;
|
||||
extern int BSIM4iSize;
|
||||
extern int BSIM4mSize;
|
||||
extern IFparm BSIM4v7pTable[ ];
|
||||
extern IFparm BSIM4v7mPTable[ ];
|
||||
extern char *BSIM4v7names[ ];
|
||||
extern int BSIM4v7pTSize;
|
||||
extern int BSIM4v7mPTSize;
|
||||
extern int BSIM4v7nSize;
|
||||
extern int BSIM4v7iSize;
|
||||
extern int BSIM4v7mSize;
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -2,12 +2,12 @@
|
|||
Copyright 2004 Regents of the University of California. All rights reserved.
|
||||
Author: 2000 Weidong Liu.
|
||||
Author: 2001- Xuemei Xi
|
||||
File: bsim4itf.h
|
||||
File: bsim4v7itf.h
|
||||
**********/
|
||||
|
||||
#ifndef DEV_BSIM4
|
||||
#define DEV_BSIM4
|
||||
#ifndef DEV_BSIM4v7
|
||||
#define DEV_BSIM4v7
|
||||
|
||||
SPICEdev *get_bsim4_info(void);
|
||||
SPICEdev *get_bsim4v7_info(void);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue