code merge for bsim3 version 0 and 1
This commit is contained in:
parent
7785cfce91
commit
4b74852dce
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@ -1,3 +1,9 @@
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2011-04-12 Dietmar Warning
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* devices: merged bsim3v1a code with bsim3v0
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* devices: merged bsim3v1s code with bsim3v1
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* update this situation to DEVICES, configure.ac, src/Makefile.am,
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spicelib/parser/inpdomod.c, inp2m.c, devices/dev.c
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2011-04-09 Robert Larice
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* src/frontend/plotting/x11.c :
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bugfix, segfault when closing a plot window
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42
DEVICES
42
DEVICES
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@ -47,13 +47,12 @@ Table of contents
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11.5 MOS9 - Level 9 MOS model
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11.6 BSIM1 - BSIM model level 1
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11.7 BSIM2 - BSIM model level 2
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11.8 BSIM3v0 - BSIM model level 3
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11.9 BSIM3v1 - BSIM model level 3
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11.10 BSIM3v1 - BSIM model level 3
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11.11 BSIM3v1 - BSIM model level 3
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11.12 BSIM3 - BSIM model level 3
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11.13 BSIM4 - BSIM model level 4
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11.14 HiSIM - Hiroshima-university STARC IGFET Model
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11.8 BSIM3 - BSIM model level 3 vers. 0
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11.9 BSIM3 - BSIM model level 3 vers. 1
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11.10 BSIM3 - BSIM model level 3 vers. 2
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11.11 BSIM3 - BSIM model level 3 vers. 3
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11.12 BSIM4 - BSIM model level 4
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11.13 HiSIM - Hiroshima-University STARC IGFET Model
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12. SOI devices
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12.1 BSIM3SOI_FD - SOI model (fully depleted devices)
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12.2 BSIM3SOI_DD - SOI Model (dynamic depletion model)
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@ -609,40 +608,21 @@ will be updated every time the device specific code is altered or changed to ref
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Dir: devices/bsim3v0
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Status: TO BE TESTED AND IMPROVED
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11.9 BSIM3v1 - BSIM model level 3
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Ver: 3.1
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Class: M
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Level: 8 & 49, version = 3.1
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Dir: devices/bsim3v1
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Status: TO BE TESTED
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11.10 BSIM3v1 - BSIM model level 3
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Ver: 3.1
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Class: M
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Level: 8 & 49, version = 3.1a
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Dir: devices/bsim3v1a
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Status: TO BE TESTED AND IMPROVED
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This is the BSIM3v3.1 model modified by Alan Gillespie.
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11.11 BSIM3v1 - BSIM model level 3
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Ver: 3.1
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Class: M
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Level: 8 & 49, version = 3.1s
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Dir: devices/bsim3v1s
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Status: TO BE TESTED AND IMPROVED
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This is the BSIM3v3.1 model modified by Serban Popescu.
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This is level 49 model. It is an implementation that supports
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"HDIF" and "M" parameters.
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11.12 BSIM3 - BSIM model level 3
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11.10 BSIM3 - BSIM model level 3
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Ver: 3.2.4
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Class: M
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@ -663,7 +643,7 @@ will be updated every time the device specific code is altered or changed to ref
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- NodesetFix
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11.12 BSIM3 - BSIM model level 3
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11.11 BSIM3 - BSIM model level 3
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Ver: 3.3.0
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Class: M
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@ -685,7 +665,7 @@ will be updated every time the device specific code is altered or changed to ref
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- Support for Multi-core processors using OpenMP
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11.13 BSIM4 - BSIM model level 4
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11.12 BSIM4 - BSIM model level 4
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Ver: 4.2.0 - 4.6.5
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Class: M
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@ -704,7 +684,7 @@ will be updated every time the device specific code is altered or changed to ref
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- Support for Multi-core processors using OpenMP
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11.14 HiSIM - Hiroshima-university STARC IGFET Model
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11.13 HiSIM - Hiroshima-university STARC IGFET Model
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Ver: 1.2.0
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Class: M
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@ -1013,8 +1013,6 @@ AC_CONFIG_FILES([Makefile
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src/spicelib/devices/bsim3/Makefile
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src/spicelib/devices/bsim3v0/Makefile
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src/spicelib/devices/bsim3v1/Makefile
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src/spicelib/devices/bsim3v1a/Makefile
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src/spicelib/devices/bsim3v1s/Makefile
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src/spicelib/devices/bsim3v32/Makefile
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src/spicelib/devices/bsim4/Makefile
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src/spicelib/devices/bsim4v2/Makefile
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@ -46,8 +46,6 @@ DYNAMIC_DEVICELIBS = \
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spicelib/devices/bsim3/libbsim3.la \
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spicelib/devices/bsim3v0/libbsim3v0.la \
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spicelib/devices/bsim3v1/libbsim3v1.la \
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spicelib/devices/bsim3v1s/libbsim3v1s.la \
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spicelib/devices/bsim3v1a/libbsim3v1a.la \
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spicelib/devices/bsim3v32/libbsim3v32.la \
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spicelib/devices/bsim4/libbsim4.la \
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spicelib/devices/bsim4v2/libbsim4v2.la \
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@ -1,7 +1,7 @@
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/**********
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Copyright 1990 Regents of the University of California. All rights reserved.
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Author: 1995 Min-Chie Jeng and Mansun Chan.
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File: b3v0.c
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File: b3.c
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**********/
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#include "ngspice.h"
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@ -31,6 +31,10 @@ OP( "id", BSIM3v0_CD, IF_REAL, "Ids"),
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OP( "vbs", BSIM3v0_VBS, IF_REAL, "Vbs"),
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OP( "vgs", BSIM3v0_VGS, IF_REAL, "Vgs"),
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OP( "vds", BSIM3v0_VDS, IF_REAL, "Vds"),
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OP( "gbd", BSIM3v0_GBD, IF_REAL, "Gbd"),
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OP( "gbs", BSIM3v0_GBS, IF_REAL, "Gbs"),
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OP( "ibd", BSIM3v0_CBD, IF_REAL, "Ibd"),
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OP( "ibs", BSIM3v0_CBS, IF_REAL, "Ibs"),
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};
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IFparm BSIM3v0mPTable[] = { /* model parameters */
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@ -1,7 +1,7 @@
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/**********
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Copyright 1990 Regents of the University of California. All rights reserved.
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Author: 1991 JianHui Huang and Min-Chie Jeng.
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File: b3v0ld.c 1/3/92
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File: b3ld.c 1/3/92
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Modified by Mansun Chan (1995)
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**********/
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@ -117,7 +117,7 @@ double dQac0_dVg, dQac0_dVd, dQac0_dVb, dQsub0_dVg, dQsub0_dVd, dQsub0_dVb;
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struct bsim3v0SizeDependParam *pParam;
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int ByPass, Check, ChargeComputationNeeded = 0, error;
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double m = 0.0;
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double m = 1.0;
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for (; model != NULL; model = model->BSIM3v0nextModel)
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{ for (here = model->BSIM3v0instances; here != NULL;
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@ -1,7 +1,7 @@
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/**********
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Copyright 1990 Regents of the University of California. All rights reserved.
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Author: 1995 Min-Chie Jeng and Mansun Chan.
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File: b3v0pzld.c
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File: b3pzld.c
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**********/
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#include "ngspice.h"
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@ -14,8 +14,8 @@ File: b3v0pzld.c
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int
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BSIM3v0pzLoad(GENmodel *inModel, CKTcircuit *ckt, SPcomplex *s)
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{
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register BSIM3v0model *model = (BSIM3v0model*)inModel;
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register BSIM3v0instance *here;
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BSIM3v0model *model = (BSIM3v0model*)inModel;
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BSIM3v0instance *here;
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double xcggb, xcgdb, xcgsb, xcbgb, xcbdb, xcbsb, xcddb, xcssb, xcdgb;
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double gdpr, gspr, gds, gbd, gbs, capbd, capbs, xcsgb, xcdsb, xcsdb;
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double cggb, cgdb, cgsb, cbgb, cbdb, cbsb, cddb, cdgb, cdsb;
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/***********
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Copyright 1990 Regents of the University of California. All rights reserved.
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Author: 1995 Min-Chie Jeng and Mansun Chan.
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File: b3v0temp.c
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File: b3temp.c
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**********/
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/* Lmin, Lmax, Wmin, Wmax */
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@ -28,8 +28,8 @@ File: b3v0temp.c
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int
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BSIM3v0temp(GENmodel *inModel, CKTcircuit *ckt)
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{
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register BSIM3v0model *model = (BSIM3v0model*) inModel;
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register BSIM3v0instance *here;
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BSIM3v0model *model = (BSIM3v0model*) inModel;
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BSIM3v0instance *here;
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struct bsim3v0SizeDependParam *pSizeDependParamKnot, *pLastKnot, *pParam = NULL;
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double tmp1, tmp2, Eg, ni, T0, T1, T2, T3, Ldrn, Wdrn;
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double Temp, TRatio, Inv_L, Inv_W, Inv_LW, Vtm0, Tnom;
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@ -1,13 +1,13 @@
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/**********
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* Copyright 1990 Regents of the University of California. All rights reserved.
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* File: b3v1.c
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* File: b3.c
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* Author: 1995 Min-Chie Jeng and Mansun Chan.
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* Modified by Paolo Nenzi 2002
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**********/
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/*
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* Release Notes:
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* BSIM3v3.1, Released by yuhua 96/12/08
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* BSIM3v1v3.1, Released by yuhua 96/12/08
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*/
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@ -427,6 +427,8 @@ IOP( "kf", BSIM3v1_MOD_KF, IF_REAL, "Flicker noise coefficient"),
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IP( "nmos", BSIM3v1_MOD_NMOS, IF_FLAG, "Flag to indicate NMOS"),
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IP( "pmos", BSIM3v1_MOD_PMOS, IF_FLAG, "Flag to indicate PMOS"),
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/* serban */
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IOP( "hdif", BSIM3v1_MOD_HDIF, IF_REAL, "S/D junction extension (HSPICE style)"),
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};
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char *BSIM3v1names[] = {
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@ -1,13 +1,13 @@
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/**********
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* Copyright 1990 Regents of the University of California. All rights reserved.
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* File: b3v1ask.c
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* File: b3ask.c
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* Author: 1995 Min-Chie Jeng and Mansun Chan.
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* Modified by Paolo Nenzi 2002
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**********/
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/*
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* Release Notes:
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* BSIM3v3.1, Released by yuhua 96/12/08
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* BSIM3v1v3.1, Released by yuhua 96/12/08
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*/
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#include "ngspice.h"
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@ -30,198 +30,198 @@ BSIM3v1ask (CKTcircuit * ckt, GENinstance * inst, int which, IFvalue * value,
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{
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case BSIM3v1_L:
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value->rValue = here->BSIM3v1l;
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return (OK);
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return(OK);
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case BSIM3v1_W:
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value->rValue = here->BSIM3v1w;
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return (OK);
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return(OK);
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case BSIM3v1_M:
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value->rValue = here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_AS:
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value->rValue = here->BSIM3v1sourceArea;
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return (OK);
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return(OK);
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case BSIM3v1_AD:
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value->rValue = here->BSIM3v1drainArea;
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return (OK);
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return(OK);
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case BSIM3v1_PS:
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value->rValue = here->BSIM3v1sourcePerimeter;
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return (OK);
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return(OK);
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case BSIM3v1_PD:
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value->rValue = here->BSIM3v1drainPerimeter;
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return (OK);
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return(OK);
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case BSIM3v1_NRS:
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value->rValue = here->BSIM3v1sourceSquares;
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return (OK);
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return(OK);
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case BSIM3v1_NRD:
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value->rValue = here->BSIM3v1drainSquares;
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return (OK);
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return(OK);
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case BSIM3v1_OFF:
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value->rValue = here->BSIM3v1off;
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return (OK);
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return(OK);
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case BSIM3v1_NQSMOD:
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value->iValue = here->BSIM3v1nqsMod;
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return (OK);
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return(OK);
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case BSIM3v1_IC_VBS:
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value->rValue = here->BSIM3v1icVBS;
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return (OK);
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return(OK);
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case BSIM3v1_IC_VDS:
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value->rValue = here->BSIM3v1icVDS;
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return (OK);
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return(OK);
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case BSIM3v1_IC_VGS:
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value->rValue = here->BSIM3v1icVGS;
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return (OK);
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return(OK);
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case BSIM3v1_DNODE:
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value->iValue = here->BSIM3v1dNode;
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return (OK);
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return(OK);
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case BSIM3v1_GNODE:
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value->iValue = here->BSIM3v1gNode;
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return (OK);
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return(OK);
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case BSIM3v1_SNODE:
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value->iValue = here->BSIM3v1sNode;
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return (OK);
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return(OK);
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case BSIM3v1_BNODE:
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value->iValue = here->BSIM3v1bNode;
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return (OK);
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return(OK);
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case BSIM3v1_DNODEPRIME:
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value->iValue = here->BSIM3v1dNodePrime;
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return (OK);
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return(OK);
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case BSIM3v1_SNODEPRIME:
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value->iValue = here->BSIM3v1sNodePrime;
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return (OK);
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return(OK);
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case BSIM3v1_SOURCECONDUCT:
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value->rValue = here->BSIM3v1sourceConductance;
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value->rValue *= here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_DRAINCONDUCT:
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value->rValue = here->BSIM3v1drainConductance;
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value->rValue *= here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_VBD:
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value->rValue = *(ckt->CKTstate0 + here->BSIM3v1vbd);
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return (OK);
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return(OK);
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case BSIM3v1_VBS:
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value->rValue = *(ckt->CKTstate0 + here->BSIM3v1vbs);
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return (OK);
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return(OK);
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case BSIM3v1_VGS:
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value->rValue = *(ckt->CKTstate0 + here->BSIM3v1vgs);
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return (OK);
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return(OK);
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case BSIM3v1_VDS:
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value->rValue = *(ckt->CKTstate0 + here->BSIM3v1vds);
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return (OK);
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return(OK);
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case BSIM3v1_CD:
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value->rValue = here->BSIM3v1cd;
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value->rValue *= here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_CBS:
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value->rValue = here->BSIM3v1cbs;
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value->rValue *= here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_CBD:
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value->rValue = here->BSIM3v1cbd;
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value->rValue *= here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_GM:
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value->rValue = here->BSIM3v1gm;
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value->rValue *= here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_GDS:
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value->rValue = here->BSIM3v1gds;
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value->rValue *= here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_GMBS:
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value->rValue = here->BSIM3v1gmbs;
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value->rValue *= here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_GBD:
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value->rValue = here->BSIM3v1gbd;
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value->rValue *= here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_GBS:
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value->rValue = here->BSIM3v1gbs;
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value->rValue *= here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_QB:
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value->rValue = *(ckt->CKTstate0 + here->BSIM3v1qb);
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value->rValue *= here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_CQB:
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value->rValue = *(ckt->CKTstate0 + here->BSIM3v1cqb);
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value->rValue *= here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_QG:
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value->rValue = *(ckt->CKTstate0 + here->BSIM3v1qg);
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value->rValue *= here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_CQG:
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value->rValue = *(ckt->CKTstate0 + here->BSIM3v1cqg);
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value->rValue *= here->BSIM3v1m;
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return (OK);
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return(OK);
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case BSIM3v1_QD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1qd);
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_CQD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1cqd);
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_CGG:
|
||||
value->rValue = here->BSIM3v1cggb;
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_CGD:
|
||||
value->rValue = here->BSIM3v1cgdb;
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_CGS:
|
||||
value->rValue = here->BSIM3v1cgsb;
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_CDG:
|
||||
value->rValue = here->BSIM3v1cdgb;
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_CDD:
|
||||
value->rValue = here->BSIM3v1cddb;
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_CDS:
|
||||
value->rValue = here->BSIM3v1cdsb;
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_CBG:
|
||||
value->rValue = here->BSIM3v1cbgb;
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_CBDB:
|
||||
value->rValue = here->BSIM3v1cbdb;
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_CBSB:
|
||||
value->rValue = here->BSIM3v1cbsb;
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_CAPBD:
|
||||
value->rValue = here->BSIM3v1capbd;
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_CAPBS:
|
||||
value->rValue = here->BSIM3v1capbs;
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_VON:
|
||||
value->rValue = here->BSIM3v1von;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_VDSAT:
|
||||
value->rValue = here->BSIM3v1vdsat;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_QBS:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1qbs);
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
case BSIM3v1_QBD:
|
||||
value->rValue = *(ckt->CKTstate0 + here->BSIM3v1qbd);
|
||||
value->rValue *= here->BSIM3v1m;
|
||||
return (OK);
|
||||
return(OK);
|
||||
default:
|
||||
return (E_BADPARM);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/**********
|
||||
* Copyright 1990 Regents of the University of California. All rights reserved.
|
||||
* File: b3v1ld.c
|
||||
* File: b3ld.c
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan.
|
||||
* Modified by Mansun Chan (1995)
|
||||
* Modified by Paolo Nenzi 2002
|
||||
|
|
@ -8,7 +8,7 @@
|
|||
|
||||
/*
|
||||
* Release Notes:
|
||||
* BSIM3v3.1, Released by yuhua 96/12/08
|
||||
* BSIM3v1v3.1, Released by yuhua 96/12/08
|
||||
*/
|
||||
|
||||
#include "ngspice.h"
|
||||
|
|
@ -120,7 +120,7 @@ double Csg, Csd, Csb, Cbg, Cbd, Cbb;
|
|||
double Cgg1, Cgb1, Cgd1, Cbg1, Cbb1, Cbd1, Qac0, Qsub0;
|
||||
double dQac0_dVg, dQac0_dVd, dQac0_dVb, dQsub0_dVg, dQsub0_dVd, dQsub0_dVb;
|
||||
|
||||
double m = 0.0;
|
||||
double m = 1.0;
|
||||
|
||||
struct bsim3v1SizeDependParam *pParam;
|
||||
int ByPass, Check, ChargeComputationNeeded = 0, error;
|
||||
|
|
@ -133,7 +133,6 @@ for (; model != NULL; model = model->BSIM3v1nextModel)
|
|||
if (here->BSIM3v1owner != ARCHme)
|
||||
continue;
|
||||
|
||||
|
||||
Check = 1;
|
||||
ByPass = 0;
|
||||
pParam = here->pParam;
|
||||
|
|
@ -2018,8 +2017,25 @@ finished: /* returning Values to Calling Routine */
|
|||
*/
|
||||
if ((here->BSIM3v1off == 0) || (!(ckt->CKTmode & MODEINITFIX)))
|
||||
{ if (Check == 1)
|
||||
{
|
||||
ckt->CKTnoncon++;
|
||||
{ ckt->CKTnoncon++;
|
||||
#ifndef NEWCONV
|
||||
}
|
||||
else
|
||||
{ tol = ckt->CKTreltol * MAX(FABS(cdhat), FABS(here->BSIM3v1cd))
|
||||
+ ckt->CKTabstol;
|
||||
if (FABS(cdhat - here->BSIM3v1cd) >= tol)
|
||||
{ ckt->CKTnoncon++;
|
||||
}
|
||||
else
|
||||
{ tol = ckt->CKTreltol * MAX(FABS(cbhat),
|
||||
FABS(here->BSIM3v1cbs + here->BSIM3v1cbd))
|
||||
+ ckt->CKTabstol;
|
||||
if (FABS(cbhat - (here->BSIM3v1cbs + here->BSIM3v1cbd))
|
||||
> tol)
|
||||
{ ckt->CKTnoncon++;
|
||||
}
|
||||
}
|
||||
#endif /* NEWCONV */
|
||||
}
|
||||
}
|
||||
*(ckt->CKTstate0 + here->BSIM3v1vbs) = vbs;
|
||||
|
|
@ -2354,7 +2370,7 @@ line900:
|
|||
|
||||
if (model->BSIM3v1type > 0)
|
||||
{ ceqbs += (here->BSIM3v1cbs - (here->BSIM3v1gbs - ckt->CKTgmin) * vbs);
|
||||
ceqbd += (here->BSIM3v1cbd - (here->BSIM3v1gbd - ckt->CKTgmin ) * vbd);
|
||||
ceqbd += (here->BSIM3v1cbd - (here->BSIM3v1gbd - ckt->CKTgmin) * vbd);
|
||||
ceqqg = ceqqg;
|
||||
ceqqb = ceqqb;
|
||||
ceqqd = ceqqd;
|
||||
|
|
@ -2390,15 +2406,12 @@ line900:
|
|||
- gcbgb - gcbdb - gcbsb) - here->BSIM3v1gbbs));
|
||||
(*(here->BSIM3v1DPdpPtr) += m * ((here->BSIM3v1drainConductance
|
||||
+ here->BSIM3v1gds + here->BSIM3v1gbd
|
||||
+ RevSum + gcddb) + dxpart * here->BSIM3v1gtd +
|
||||
gbdpdp));
|
||||
+ RevSum + gcddb) + dxpart * here->BSIM3v1gtd + gbdpdp));
|
||||
(*(here->BSIM3v1SPspPtr) += m * ((here->BSIM3v1sourceConductance
|
||||
+ here->BSIM3v1gds + here->BSIM3v1gbs
|
||||
+ FwdSum + gcssb) + sxpart * here->BSIM3v1gts +
|
||||
gbspsp));
|
||||
+ FwdSum + gcssb) + sxpart * here->BSIM3v1gts + gbspsp));
|
||||
(*(here->BSIM3v1DdpPtr) -= m * here->BSIM3v1drainConductance);
|
||||
(*(here->BSIM3v1GbPtr) -= m * (gcggb + gcgdb + gcgsb +
|
||||
here->BSIM3v1gtb));
|
||||
(*(here->BSIM3v1GbPtr) -= m * (gcggb + gcgdb + gcgsb + here->BSIM3v1gtb));
|
||||
(*(here->BSIM3v1GdpPtr) += m * (gcgdb - here->BSIM3v1gtd));
|
||||
(*(here->BSIM3v1GspPtr) += m * (gcgsb - here->BSIM3v1gts));
|
||||
(*(here->BSIM3v1SspPtr) -= m * here->BSIM3v1sourceConductance);
|
||||
|
|
@ -2418,8 +2431,7 @@ line900:
|
|||
(*(here->BSIM3v1SPbPtr) -= m * ((here->BSIM3v1gbs + Gmbs + gcsgb + gcsdb
|
||||
+ gcssb - sxpart * here->BSIM3v1gtb) - gbspb));
|
||||
(*(here->BSIM3v1SPdpPtr) -= m * ((here->BSIM3v1gds + RevSum - gcsdb
|
||||
- sxpart * here->BSIM3v1gtd - here->BSIM3v1gbd)
|
||||
- gbspdp));
|
||||
- sxpart * here->BSIM3v1gtd - here->BSIM3v1gbd) - gbspdp));
|
||||
|
||||
*(here->BSIM3v1QqPtr) += m * ((gqdef + here->BSIM3v1gtau));
|
||||
|
||||
|
|
|
|||
|
|
@ -1,13 +1,13 @@
|
|||
/**********
|
||||
* Copyright 1990 Regents of the University of California. All rights reserved.
|
||||
* File: b3v1mpar.c
|
||||
* File: b3mpar.c
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan.
|
||||
* Modified by Paolo Nenzi 2002
|
||||
**********/
|
||||
|
||||
/*
|
||||
* Release Notes:
|
||||
* BSIM3v3.1, Released by yuhua 96/12/08
|
||||
* BSIM3v1v3.1, Released by yuhua 96/12/08
|
||||
*/
|
||||
|
||||
#include "ngspice.h"
|
||||
|
|
@ -118,14 +118,14 @@ BSIM3v1mParam(int param, IFvalue *value, GENmodel *inMod)
|
|||
case BSIM3v1_MOD_NPEAK:
|
||||
mod->BSIM3v1npeak = value->rValue;
|
||||
mod->BSIM3v1npeakGiven = TRUE;
|
||||
if (mod->BSIM3v1npeak > 1.0e20)
|
||||
mod->BSIM3v1npeak *= 1.0e-6;
|
||||
if (mod->BSIM3v1npeak > 1.0e20)
|
||||
mod->BSIM3v1npeak *= 1.0e-6;
|
||||
break;
|
||||
case BSIM3v1_MOD_NGATE:
|
||||
mod->BSIM3v1ngate = value->rValue;
|
||||
mod->BSIM3v1ngateGiven = TRUE;
|
||||
if (mod->BSIM3v1ngate > 1.0e23)
|
||||
mod->BSIM3v1ngate *= 1.0e-6;
|
||||
if (mod->BSIM3v1ngate > 1.0e23)
|
||||
mod->BSIM3v1ngate *= 1.0e-6;
|
||||
break;
|
||||
case BSIM3v1_MOD_GAMMA1:
|
||||
mod->BSIM3v1gamma1 = value->rValue;
|
||||
|
|
@ -445,14 +445,14 @@ BSIM3v1mParam(int param, IFvalue *value, GENmodel *inMod)
|
|||
case BSIM3v1_MOD_LNPEAK:
|
||||
mod->BSIM3v1lnpeak = value->rValue;
|
||||
mod->BSIM3v1lnpeakGiven = TRUE;
|
||||
if (mod->BSIM3v1lnpeak > 1.0e20)
|
||||
mod->BSIM3v1lnpeak *= 1.0e-6;
|
||||
if (mod->BSIM3v1lnpeak > 1.0e20)
|
||||
mod->BSIM3v1lnpeak *= 1.0e-6;
|
||||
break;
|
||||
case BSIM3v1_MOD_LNGATE:
|
||||
mod->BSIM3v1lngate = value->rValue;
|
||||
mod->BSIM3v1lngateGiven = TRUE;
|
||||
if (mod->BSIM3v1lngate > 1.0e23)
|
||||
mod->BSIM3v1lngate *= 1.0e-6;
|
||||
if (mod->BSIM3v1lngate > 1.0e23)
|
||||
mod->BSIM3v1lngate *= 1.0e-6;
|
||||
break;
|
||||
case BSIM3v1_MOD_LGAMMA1:
|
||||
mod->BSIM3v1lgamma1 = value->rValue;
|
||||
|
|
@ -764,14 +764,14 @@ BSIM3v1mParam(int param, IFvalue *value, GENmodel *inMod)
|
|||
case BSIM3v1_MOD_WNPEAK:
|
||||
mod->BSIM3v1wnpeak = value->rValue;
|
||||
mod->BSIM3v1wnpeakGiven = TRUE;
|
||||
if (mod->BSIM3v1wnpeak > 1.0e20)
|
||||
mod->BSIM3v1wnpeak *= 1.0e-6;
|
||||
if (mod->BSIM3v1wnpeak > 1.0e20)
|
||||
mod->BSIM3v1wnpeak *= 1.0e-6;
|
||||
break;
|
||||
case BSIM3v1_MOD_WNGATE:
|
||||
mod->BSIM3v1wngate = value->rValue;
|
||||
mod->BSIM3v1wngateGiven = TRUE;
|
||||
if (mod->BSIM3v1wngate > 1.0e23)
|
||||
mod->BSIM3v1wngate *= 1.0e-6;
|
||||
if (mod->BSIM3v1wngate > 1.0e23)
|
||||
mod->BSIM3v1wngate *= 1.0e-6;
|
||||
break;
|
||||
case BSIM3v1_MOD_WGAMMA1:
|
||||
mod->BSIM3v1wgamma1 = value->rValue;
|
||||
|
|
@ -1083,14 +1083,14 @@ BSIM3v1mParam(int param, IFvalue *value, GENmodel *inMod)
|
|||
case BSIM3v1_MOD_PNPEAK:
|
||||
mod->BSIM3v1pnpeak = value->rValue;
|
||||
mod->BSIM3v1pnpeakGiven = TRUE;
|
||||
if (mod->BSIM3v1pnpeak > 1.0e20)
|
||||
mod->BSIM3v1pnpeak *= 1.0e-6;
|
||||
if (mod->BSIM3v1pnpeak > 1.0e20)
|
||||
mod->BSIM3v1pnpeak *= 1.0e-6;
|
||||
break;
|
||||
case BSIM3v1_MOD_PNGATE:
|
||||
mod->BSIM3v1pngate = value->rValue;
|
||||
mod->BSIM3v1pngateGiven = TRUE;
|
||||
if (mod->BSIM3v1pngate > 1.0e23)
|
||||
mod->BSIM3v1pngate *= 1.0e-6;
|
||||
if (mod->BSIM3v1pngate > 1.0e23)
|
||||
mod->BSIM3v1pngate *= 1.0e-6;
|
||||
break;
|
||||
case BSIM3v1_MOD_PGAMMA1:
|
||||
mod->BSIM3v1pgamma1 = value->rValue;
|
||||
|
|
@ -1519,6 +1519,11 @@ BSIM3v1mParam(int param, IFvalue *value, GENmodel *inMod)
|
|||
mod->BSIM3v1typeGiven = TRUE;
|
||||
}
|
||||
break;
|
||||
/* serban */
|
||||
case BSIM3v1_MOD_HDIF :
|
||||
mod->BSIM3v1hdif = value->rValue;
|
||||
mod->BSIM3v1hdifGiven = TRUE;
|
||||
break;
|
||||
default:
|
||||
return(E_BADPARM);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,13 +1,13 @@
|
|||
/**********
|
||||
* Copyright 1990 Regents of the University of California. All rights reserved.
|
||||
* File: b3v1noi.c
|
||||
* File: b3noi.c
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan.
|
||||
* Modified by Paolo Nenzi 2002
|
||||
**********/
|
||||
|
||||
/*
|
||||
* Release Notes:
|
||||
* BSIM3v3.1, Released by yuhua 96/12/08
|
||||
* BSIM3v1v3.1, Released by yuhua 96/12/08
|
||||
*/
|
||||
|
||||
#include "ngspice.h"
|
||||
|
|
@ -46,7 +46,7 @@
|
|||
|
||||
|
||||
static double
|
||||
StrongInversionNoiseEval_b3v1(double vgs, double vds, BSIM3v1model *model,
|
||||
StrongInversionNoiseEval_b3(double vgs, double vds, BSIM3v1model *model,
|
||||
BSIM3v1instance *here, double freq, double temp)
|
||||
{
|
||||
struct bsim3v1SizeDependParam *pParam;
|
||||
|
|
@ -143,9 +143,11 @@ int i;
|
|||
{ (void) sprintf(name, "onoise.%s%s",
|
||||
here->BSIM3v1name,
|
||||
BSIM3v1nNames[i]);
|
||||
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
|
||||
if (!data->namelist)
|
||||
return(E_NOMEM);
|
||||
data->namelist = TREALLOC(
|
||||
IFuid, data->namelist,
|
||||
data->numPlots + 1);
|
||||
if (!data->namelist)
|
||||
return(E_NOMEM);
|
||||
(*(SPfrontEnd->IFnewUid)) (ckt,
|
||||
&(data->namelist[data->numPlots++]),
|
||||
(IFuid) NULL, name, UID_OTHER,
|
||||
|
|
@ -158,9 +160,11 @@ int i;
|
|||
{ (void) sprintf(name, "onoise_total.%s%s",
|
||||
here->BSIM3v1name,
|
||||
BSIM3v1nNames[i]);
|
||||
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
|
||||
if (!data->namelist)
|
||||
return(E_NOMEM);
|
||||
data->namelist = TREALLOC(
|
||||
IFuid, data->namelist,
|
||||
data->numPlots + 1);
|
||||
if (!data->namelist)
|
||||
return(E_NOMEM);
|
||||
(*(SPfrontEnd->IFnewUid)) (ckt,
|
||||
&(data->namelist[data->numPlots++]),
|
||||
(IFuid) NULL, name, UID_OTHER,
|
||||
|
|
@ -170,9 +174,11 @@ int i;
|
|||
(void) sprintf(name, "inoise_total.%s%s",
|
||||
here->BSIM3v1name,
|
||||
BSIM3v1nNames[i]);
|
||||
data->namelist = TREALLOC(IFuid, data->namelist, data->numPlots + 1);
|
||||
if (!data->namelist)
|
||||
return(E_NOMEM);
|
||||
data->namelist = TREALLOC(
|
||||
IFuid, data->namelist,
|
||||
data->numPlots + 1);
|
||||
if (!data->namelist)
|
||||
return(E_NOMEM);
|
||||
(*(SPfrontEnd->IFnewUid)) (ckt,
|
||||
&(data->namelist[data->numPlots++]),
|
||||
(IFuid) NULL, name, UID_OTHER,
|
||||
|
|
@ -244,7 +250,7 @@ int i;
|
|||
vgs = vgs + vds;
|
||||
}
|
||||
if (vgs >= here->BSIM3v1von + 0.1)
|
||||
{ Ssi = StrongInversionNoiseEval_b3v1(vgs,
|
||||
{ Ssi = StrongInversionNoiseEval_b3(vgs,
|
||||
vds, model, here, data->freq,
|
||||
ckt->CKTtemp);
|
||||
noizDens[BSIM3v1FLNOIZ] *= Ssi;
|
||||
|
|
@ -259,7 +265,7 @@ int i;
|
|||
* 4.0e36;
|
||||
Swi = T10 / T11 * here->BSIM3v1cd * here->BSIM3v1m
|
||||
* here->BSIM3v1cd * here->BSIM3v1m;
|
||||
Slimit = StrongInversionNoiseEval_b3v1(
|
||||
Slimit = StrongInversionNoiseEval_b3(
|
||||
here->BSIM3v1von + 0.1, vds, model,
|
||||
here, data->freq, ckt->CKTtemp);
|
||||
T1 = Swi + Slimit;
|
||||
|
|
|
|||
|
|
@ -1,13 +1,13 @@
|
|||
/**********
|
||||
* Copyright 1990 Regents of the University of California. All rights reserved.
|
||||
* File: b3v1par.c
|
||||
* File: b3par.c
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan.
|
||||
* Modified by Paolo Nenzi 2002
|
||||
**********/
|
||||
|
||||
/*
|
||||
* Release Notes:
|
||||
* BSIM3v3.1, Released by yuhua 96/12/08
|
||||
* BSIM3v1v3.1, Released by yuhua 96/12/08
|
||||
*/
|
||||
|
||||
#include "ngspice.h"
|
||||
|
|
@ -37,7 +37,7 @@ BSIM3v1param(int param, IFvalue *value, GENinstance *inst, IFvalue *select)
|
|||
here->BSIM3v1l = value->rValue*scale;
|
||||
here->BSIM3v1lGiven = TRUE;
|
||||
break;
|
||||
case BSIM3v1_M:
|
||||
case BSIM3v1_M:
|
||||
here->BSIM3v1m = value->rValue;
|
||||
here->BSIM3v1mGiven = TRUE;
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -1,13 +1,13 @@
|
|||
/**********
|
||||
* Copyright 1990 Regents of the University of California. All rights reserved.
|
||||
* File: b3v1set.c
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan.
|
||||
* File: b3set.c
|
||||
* Author: 1995 Min-Chie Jeng and Mansun Chan.
|
||||
* Modified by Paolo Nenzi 2002
|
||||
**********/
|
||||
|
||||
/*
|
||||
* Release Notes:
|
||||
* BSIM3v3.1, Released by yuhua 96/12/08
|
||||
|
||||
/*
|
||||
* Release Notes:
|
||||
* BSIM3v1v3.1, Released by yuhua 96/12/08
|
||||
*/
|
||||
|
||||
#include "ngspice.h"
|
||||
|
|
@ -29,7 +29,7 @@
|
|||
#define Meter2Micron 1.0e6
|
||||
|
||||
int
|
||||
BSIM3v1setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
|
||||
BSIM3v1setup(SMPmatrix *matrix, GENmodel *inModel, CKTcircuit *ckt,
|
||||
int *states)
|
||||
{
|
||||
BSIM3v1model *model = (BSIM3v1model*)inModel;
|
||||
|
|
@ -45,20 +45,20 @@ IFuid tmpName;
|
|||
{
|
||||
/* Default value Processing for BSIM3v1 MOSFET Models */
|
||||
if (!model->BSIM3v1typeGiven)
|
||||
model->BSIM3v1type = NMOS;
|
||||
if (!model->BSIM3v1mobModGiven)
|
||||
model->BSIM3v1type = NMOS;
|
||||
if (!model->BSIM3v1mobModGiven)
|
||||
model->BSIM3v1mobMod = 1;
|
||||
if (!model->BSIM3v1binUnitGiven)
|
||||
if (!model->BSIM3v1binUnitGiven)
|
||||
model->BSIM3v1binUnit = 1;
|
||||
if (!model->BSIM3v1paramChkGiven)
|
||||
if (!model->BSIM3v1paramChkGiven)
|
||||
model->BSIM3v1paramChk = 0;
|
||||
if (!model->BSIM3v1capModGiven)
|
||||
if (!model->BSIM3v1capModGiven)
|
||||
model->BSIM3v1capMod = 2;
|
||||
if (!model->BSIM3v1nqsModGiven)
|
||||
if (!model->BSIM3v1nqsModGiven)
|
||||
model->BSIM3v1nqsMod = 0;
|
||||
if (!model->BSIM3v1noiModGiven)
|
||||
if (!model->BSIM3v1noiModGiven)
|
||||
model->BSIM3v1noiMod = 1;
|
||||
if (!model->BSIM3v1versionGiven)
|
||||
if (!model->BSIM3v1versionGiven)
|
||||
model->BSIM3v1version = 3.1;
|
||||
if (!model->BSIM3v1toxGiven)
|
||||
model->BSIM3v1tox = 150.0e-10;
|
||||
|
|
@ -67,7 +67,7 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1cdscGiven)
|
||||
model->BSIM3v1cdsc = 2.4e-4; /* unit Q/V/m^2 */
|
||||
if (!model->BSIM3v1cdscbGiven)
|
||||
model->BSIM3v1cdscb = 0.0; /* unit Q/V/m^2 */
|
||||
model->BSIM3v1cdscb = 0.0; /* unit Q/V/m^2 */
|
||||
if (!model->BSIM3v1cdscdGiven)
|
||||
model->BSIM3v1cdscd = 0.0; /* unit Q/V/m^2 */
|
||||
if (!model->BSIM3v1citGiven)
|
||||
|
|
@ -77,11 +77,11 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1xjGiven)
|
||||
model->BSIM3v1xj = .15e-6;
|
||||
if (!model->BSIM3v1vsatGiven)
|
||||
model->BSIM3v1vsat = 8.0e4; /* unit m/s */
|
||||
model->BSIM3v1vsat = 8.0e4; /* unit m/s */
|
||||
if (!model->BSIM3v1atGiven)
|
||||
model->BSIM3v1at = 3.3e4; /* unit m/s */
|
||||
model->BSIM3v1at = 3.3e4; /* unit m/s */
|
||||
if (!model->BSIM3v1a0Given)
|
||||
model->BSIM3v1a0 = 1.0;
|
||||
model->BSIM3v1a0 = 1.0;
|
||||
if (!model->BSIM3v1agsGiven)
|
||||
model->BSIM3v1ags = 0.0;
|
||||
if (!model->BSIM3v1a1Given)
|
||||
|
|
@ -107,31 +107,31 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1kt2Given)
|
||||
model->BSIM3v1kt2 = 0.022; /* No unit */
|
||||
if (!model->BSIM3v1k3Given)
|
||||
model->BSIM3v1k3 = 80.0;
|
||||
model->BSIM3v1k3 = 80.0;
|
||||
if (!model->BSIM3v1k3bGiven)
|
||||
model->BSIM3v1k3b = 0.0;
|
||||
model->BSIM3v1k3b = 0.0;
|
||||
if (!model->BSIM3v1w0Given)
|
||||
model->BSIM3v1w0 = 2.5e-6;
|
||||
model->BSIM3v1w0 = 2.5e-6;
|
||||
if (!model->BSIM3v1nlxGiven)
|
||||
model->BSIM3v1nlx = 1.74e-7;
|
||||
model->BSIM3v1nlx = 1.74e-7;
|
||||
if (!model->BSIM3v1dvt0Given)
|
||||
model->BSIM3v1dvt0 = 2.2;
|
||||
model->BSIM3v1dvt0 = 2.2;
|
||||
if (!model->BSIM3v1dvt1Given)
|
||||
model->BSIM3v1dvt1 = 0.53;
|
||||
model->BSIM3v1dvt1 = 0.53;
|
||||
if (!model->BSIM3v1dvt2Given)
|
||||
model->BSIM3v1dvt2 = -0.032; /* unit 1 / V */
|
||||
model->BSIM3v1dvt2 = -0.032; /* unit 1 / V */
|
||||
|
||||
if (!model->BSIM3v1dvt0wGiven)
|
||||
model->BSIM3v1dvt0w = 0.0;
|
||||
model->BSIM3v1dvt0w = 0.0;
|
||||
if (!model->BSIM3v1dvt1wGiven)
|
||||
model->BSIM3v1dvt1w = 5.3e6;
|
||||
model->BSIM3v1dvt1w = 5.3e6;
|
||||
if (!model->BSIM3v1dvt2wGiven)
|
||||
model->BSIM3v1dvt2w = -0.032;
|
||||
model->BSIM3v1dvt2w = -0.032;
|
||||
|
||||
if (!model->BSIM3v1droutGiven)
|
||||
model->BSIM3v1drout = 0.56;
|
||||
model->BSIM3v1drout = 0.56;
|
||||
if (!model->BSIM3v1dsubGiven)
|
||||
model->BSIM3v1dsub = model->BSIM3v1drout;
|
||||
model->BSIM3v1dsub = model->BSIM3v1drout;
|
||||
if (!model->BSIM3v1vth0Given)
|
||||
model->BSIM3v1vth0 = (model->BSIM3v1type == NMOS) ? 0.7 : -0.7;
|
||||
if (!model->BSIM3v1uaGiven)
|
||||
|
|
@ -143,72 +143,72 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1ub1Given)
|
||||
model->BSIM3v1ub1 = -7.61e-18; /* unit (m/V)**2 */
|
||||
if (!model->BSIM3v1ucGiven)
|
||||
model->BSIM3v1uc = (model->BSIM3v1mobMod == 3) ? -0.0465 : -0.0465e-9;
|
||||
model->BSIM3v1uc = (model->BSIM3v1mobMod == 3) ? -0.0465 : -0.0465e-9;
|
||||
if (!model->BSIM3v1uc1Given)
|
||||
model->BSIM3v1uc1 = (model->BSIM3v1mobMod == 3) ? -0.056 : -0.056e-9;
|
||||
model->BSIM3v1uc1 = (model->BSIM3v1mobMod == 3) ? -0.056 : -0.056e-9;
|
||||
if (!model->BSIM3v1u0Given)
|
||||
model->BSIM3v1u0 = (model->BSIM3v1type == NMOS) ? 0.067 : 0.025;
|
||||
if (!model->BSIM3v1uteGiven)
|
||||
model->BSIM3v1ute = -1.5;
|
||||
model->BSIM3v1ute = -1.5;
|
||||
if (!model->BSIM3v1voffGiven)
|
||||
model->BSIM3v1voff = -0.08;
|
||||
if (!model->BSIM3v1deltaGiven)
|
||||
if (!model->BSIM3v1deltaGiven)
|
||||
model->BSIM3v1delta = 0.01;
|
||||
if (!model->BSIM3v1rdswGiven)
|
||||
model->BSIM3v1rdsw = 0;
|
||||
model->BSIM3v1rdsw = 0;
|
||||
if (!model->BSIM3v1prwgGiven)
|
||||
model->BSIM3v1prwg = 0.0; /* unit 1/V */
|
||||
if (!model->BSIM3v1prwbGiven)
|
||||
model->BSIM3v1prwb = 0.0;
|
||||
model->BSIM3v1prwb = 0.0;
|
||||
if (!model->BSIM3v1prtGiven)
|
||||
if (!model->BSIM3v1prtGiven)
|
||||
model->BSIM3v1prt = 0.0;
|
||||
model->BSIM3v1prt = 0.0;
|
||||
if (!model->BSIM3v1eta0Given)
|
||||
model->BSIM3v1eta0 = 0.08; /* no unit */
|
||||
model->BSIM3v1eta0 = 0.08; /* no unit */
|
||||
if (!model->BSIM3v1etabGiven)
|
||||
model->BSIM3v1etab = -0.07; /* unit 1/V */
|
||||
model->BSIM3v1etab = -0.07; /* unit 1/V */
|
||||
if (!model->BSIM3v1pclmGiven)
|
||||
model->BSIM3v1pclm = 1.3; /* no unit */
|
||||
model->BSIM3v1pclm = 1.3; /* no unit */
|
||||
if (!model->BSIM3v1pdibl1Given)
|
||||
model->BSIM3v1pdibl1 = .39; /* no unit */
|
||||
if (!model->BSIM3v1pdibl2Given)
|
||||
model->BSIM3v1pdibl2 = 0.0086; /* no unit */
|
||||
model->BSIM3v1pdibl2 = 0.0086; /* no unit */
|
||||
if (!model->BSIM3v1pdiblbGiven)
|
||||
model->BSIM3v1pdiblb = 0.0; /* 1/V */
|
||||
model->BSIM3v1pdiblb = 0.0; /* 1/V */
|
||||
if (!model->BSIM3v1pscbe1Given)
|
||||
model->BSIM3v1pscbe1 = 4.24e8;
|
||||
model->BSIM3v1pscbe1 = 4.24e8;
|
||||
if (!model->BSIM3v1pscbe2Given)
|
||||
model->BSIM3v1pscbe2 = 1.0e-5;
|
||||
model->BSIM3v1pscbe2 = 1.0e-5;
|
||||
if (!model->BSIM3v1pvagGiven)
|
||||
model->BSIM3v1pvag = 0.0;
|
||||
if (!model->BSIM3v1wrGiven)
|
||||
model->BSIM3v1pvag = 0.0;
|
||||
if (!model->BSIM3v1wrGiven)
|
||||
model->BSIM3v1wr = 1.0;
|
||||
if (!model->BSIM3v1dwgGiven)
|
||||
if (!model->BSIM3v1dwgGiven)
|
||||
model->BSIM3v1dwg = 0.0;
|
||||
if (!model->BSIM3v1dwbGiven)
|
||||
if (!model->BSIM3v1dwbGiven)
|
||||
model->BSIM3v1dwb = 0.0;
|
||||
if (!model->BSIM3v1b0Given)
|
||||
model->BSIM3v1b0 = 0.0;
|
||||
if (!model->BSIM3v1b1Given)
|
||||
if (!model->BSIM3v1b1Given)
|
||||
model->BSIM3v1b1 = 0.0;
|
||||
if (!model->BSIM3v1alpha0Given)
|
||||
if (!model->BSIM3v1alpha0Given)
|
||||
model->BSIM3v1alpha0 = 0.0;
|
||||
if (!model->BSIM3v1beta0Given)
|
||||
if (!model->BSIM3v1beta0Given)
|
||||
model->BSIM3v1beta0 = 30.0;
|
||||
|
||||
if (!model->BSIM3v1elmGiven)
|
||||
if (!model->BSIM3v1elmGiven)
|
||||
model->BSIM3v1elm = 5.0;
|
||||
if (!model->BSIM3v1cgslGiven)
|
||||
if (!model->BSIM3v1cgslGiven)
|
||||
model->BSIM3v1cgsl = 0.0;
|
||||
if (!model->BSIM3v1cgdlGiven)
|
||||
if (!model->BSIM3v1cgdlGiven)
|
||||
model->BSIM3v1cgdl = 0.0;
|
||||
if (!model->BSIM3v1ckappaGiven)
|
||||
if (!model->BSIM3v1ckappaGiven)
|
||||
model->BSIM3v1ckappa = 0.6;
|
||||
if (!model->BSIM3v1clcGiven)
|
||||
if (!model->BSIM3v1clcGiven)
|
||||
model->BSIM3v1clc = 0.1e-6;
|
||||
if (!model->BSIM3v1cleGiven)
|
||||
if (!model->BSIM3v1cleGiven)
|
||||
model->BSIM3v1cle = 0.6;
|
||||
if (!model->BSIM3v1vfbcvGiven)
|
||||
if (!model->BSIM3v1vfbcvGiven)
|
||||
model->BSIM3v1vfbcv = -1.0;
|
||||
|
||||
/* Length dependence */
|
||||
|
|
@ -216,7 +216,7 @@ IFuid tmpName;
|
|||
model->BSIM3v1lcdsc = 0.0;
|
||||
if (!model->BSIM3v1lcdscbGiven)
|
||||
model->BSIM3v1lcdscb = 0.0;
|
||||
if (!model->BSIM3v1lcdscdGiven)
|
||||
if (!model->BSIM3v1lcdscdGiven)
|
||||
model->BSIM3v1lcdscd = 0.0;
|
||||
if (!model->BSIM3v1lcitGiven)
|
||||
model->BSIM3v1lcit = 0.0;
|
||||
|
|
@ -229,7 +229,7 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1latGiven)
|
||||
model->BSIM3v1lat = 0.0;
|
||||
if (!model->BSIM3v1la0Given)
|
||||
model->BSIM3v1la0 = 0.0;
|
||||
model->BSIM3v1la0 = 0.0;
|
||||
if (!model->BSIM3v1lagsGiven)
|
||||
model->BSIM3v1lags = 0.0;
|
||||
if (!model->BSIM3v1la1Given)
|
||||
|
|
@ -249,33 +249,33 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1lxtGiven)
|
||||
model->BSIM3v1lxt = 0.0;
|
||||
if (!model->BSIM3v1lkt1Given)
|
||||
model->BSIM3v1lkt1 = 0.0;
|
||||
model->BSIM3v1lkt1 = 0.0;
|
||||
if (!model->BSIM3v1lkt1lGiven)
|
||||
model->BSIM3v1lkt1l = 0.0;
|
||||
if (!model->BSIM3v1lkt2Given)
|
||||
model->BSIM3v1lkt2 = 0.0;
|
||||
if (!model->BSIM3v1lk3Given)
|
||||
model->BSIM3v1lk3 = 0.0;
|
||||
model->BSIM3v1lk3 = 0.0;
|
||||
if (!model->BSIM3v1lk3bGiven)
|
||||
model->BSIM3v1lk3b = 0.0;
|
||||
model->BSIM3v1lk3b = 0.0;
|
||||
if (!model->BSIM3v1lw0Given)
|
||||
model->BSIM3v1lw0 = 0.0;
|
||||
model->BSIM3v1lw0 = 0.0;
|
||||
if (!model->BSIM3v1lnlxGiven)
|
||||
model->BSIM3v1lnlx = 0.0;
|
||||
model->BSIM3v1lnlx = 0.0;
|
||||
if (!model->BSIM3v1ldvt0Given)
|
||||
model->BSIM3v1ldvt0 = 0.0;
|
||||
model->BSIM3v1ldvt0 = 0.0;
|
||||
if (!model->BSIM3v1ldvt1Given)
|
||||
model->BSIM3v1ldvt1 = 0.0;
|
||||
model->BSIM3v1ldvt1 = 0.0;
|
||||
if (!model->BSIM3v1ldvt2Given)
|
||||
model->BSIM3v1ldvt2 = 0.0;
|
||||
if (!model->BSIM3v1ldvt0wGiven)
|
||||
model->BSIM3v1ldvt0w = 0.0;
|
||||
model->BSIM3v1ldvt0w = 0.0;
|
||||
if (!model->BSIM3v1ldvt1wGiven)
|
||||
model->BSIM3v1ldvt1w = 0.0;
|
||||
model->BSIM3v1ldvt1w = 0.0;
|
||||
if (!model->BSIM3v1ldvt2wGiven)
|
||||
model->BSIM3v1ldvt2w = 0.0;
|
||||
if (!model->BSIM3v1ldroutGiven)
|
||||
model->BSIM3v1ldrout = 0.0;
|
||||
model->BSIM3v1ldrout = 0.0;
|
||||
if (!model->BSIM3v1ldsubGiven)
|
||||
model->BSIM3v1ldsub = 0.0;
|
||||
if (!model->BSIM3v1lvth0Given)
|
||||
|
|
@ -295,10 +295,10 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1lu0Given)
|
||||
model->BSIM3v1lu0 = 0.0;
|
||||
if (!model->BSIM3v1luteGiven)
|
||||
model->BSIM3v1lute = 0.0;
|
||||
model->BSIM3v1lute = 0.0;
|
||||
if (!model->BSIM3v1lvoffGiven)
|
||||
model->BSIM3v1lvoff = 0.0;
|
||||
if (!model->BSIM3v1ldeltaGiven)
|
||||
if (!model->BSIM3v1ldeltaGiven)
|
||||
model->BSIM3v1ldelta = 0.0;
|
||||
if (!model->BSIM3v1lrdswGiven)
|
||||
model->BSIM3v1lrdsw = 0.0;
|
||||
|
|
@ -314,7 +314,7 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1letabGiven)
|
||||
model->BSIM3v1letab = -0.0;
|
||||
if (!model->BSIM3v1lpclmGiven)
|
||||
model->BSIM3v1lpclm = 0.0;
|
||||
model->BSIM3v1lpclm = 0.0;
|
||||
if (!model->BSIM3v1lpdibl1Given)
|
||||
model->BSIM3v1lpdibl1 = 0.0;
|
||||
if (!model->BSIM3v1lpdibl2Given)
|
||||
|
|
@ -326,44 +326,44 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1lpscbe2Given)
|
||||
model->BSIM3v1lpscbe2 = 0.0;
|
||||
if (!model->BSIM3v1lpvagGiven)
|
||||
model->BSIM3v1lpvag = 0.0;
|
||||
if (!model->BSIM3v1lwrGiven)
|
||||
model->BSIM3v1lpvag = 0.0;
|
||||
if (!model->BSIM3v1lwrGiven)
|
||||
model->BSIM3v1lwr = 0.0;
|
||||
if (!model->BSIM3v1ldwgGiven)
|
||||
if (!model->BSIM3v1ldwgGiven)
|
||||
model->BSIM3v1ldwg = 0.0;
|
||||
if (!model->BSIM3v1ldwbGiven)
|
||||
if (!model->BSIM3v1ldwbGiven)
|
||||
model->BSIM3v1ldwb = 0.0;
|
||||
if (!model->BSIM3v1lb0Given)
|
||||
model->BSIM3v1lb0 = 0.0;
|
||||
if (!model->BSIM3v1lb1Given)
|
||||
if (!model->BSIM3v1lb1Given)
|
||||
model->BSIM3v1lb1 = 0.0;
|
||||
if (!model->BSIM3v1lalpha0Given)
|
||||
if (!model->BSIM3v1lalpha0Given)
|
||||
model->BSIM3v1lalpha0 = 0.0;
|
||||
if (!model->BSIM3v1lbeta0Given)
|
||||
if (!model->BSIM3v1lbeta0Given)
|
||||
model->BSIM3v1lbeta0 = 0.0;
|
||||
|
||||
if (!model->BSIM3v1lelmGiven)
|
||||
if (!model->BSIM3v1lelmGiven)
|
||||
model->BSIM3v1lelm = 0.0;
|
||||
if (!model->BSIM3v1lcgslGiven)
|
||||
if (!model->BSIM3v1lcgslGiven)
|
||||
model->BSIM3v1lcgsl = 0.0;
|
||||
if (!model->BSIM3v1lcgdlGiven)
|
||||
if (!model->BSIM3v1lcgdlGiven)
|
||||
model->BSIM3v1lcgdl = 0.0;
|
||||
if (!model->BSIM3v1lckappaGiven)
|
||||
if (!model->BSIM3v1lckappaGiven)
|
||||
model->BSIM3v1lckappa = 0.0;
|
||||
if (!model->BSIM3v1lclcGiven)
|
||||
if (!model->BSIM3v1lclcGiven)
|
||||
model->BSIM3v1lclc = 0.0;
|
||||
if (!model->BSIM3v1lcleGiven)
|
||||
if (!model->BSIM3v1lcleGiven)
|
||||
model->BSIM3v1lcle = 0.0;
|
||||
if (!model->BSIM3v1lcfGiven)
|
||||
if (!model->BSIM3v1lcfGiven)
|
||||
model->BSIM3v1lcf = 0.0;
|
||||
if (!model->BSIM3v1lvfbcvGiven)
|
||||
if (!model->BSIM3v1lvfbcvGiven)
|
||||
model->BSIM3v1lvfbcv = 0.0;
|
||||
|
||||
/* Width dependence */
|
||||
if (!model->BSIM3v1wcdscGiven)
|
||||
model->BSIM3v1wcdsc = 0.0;
|
||||
if (!model->BSIM3v1wcdscbGiven)
|
||||
model->BSIM3v1wcdscb = 0.0;
|
||||
model->BSIM3v1wcdscb = 0.0;
|
||||
if (!model->BSIM3v1wcdscdGiven)
|
||||
model->BSIM3v1wcdscd = 0.0;
|
||||
if (!model->BSIM3v1wcitGiven)
|
||||
|
|
@ -377,7 +377,7 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1watGiven)
|
||||
model->BSIM3v1wat = 0.0;
|
||||
if (!model->BSIM3v1wa0Given)
|
||||
model->BSIM3v1wa0 = 0.0;
|
||||
model->BSIM3v1wa0 = 0.0;
|
||||
if (!model->BSIM3v1wagsGiven)
|
||||
model->BSIM3v1wags = 0.0;
|
||||
if (!model->BSIM3v1wa1Given)
|
||||
|
|
@ -397,33 +397,33 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1wxtGiven)
|
||||
model->BSIM3v1wxt = 0.0;
|
||||
if (!model->BSIM3v1wkt1Given)
|
||||
model->BSIM3v1wkt1 = 0.0;
|
||||
model->BSIM3v1wkt1 = 0.0;
|
||||
if (!model->BSIM3v1wkt1lGiven)
|
||||
model->BSIM3v1wkt1l = 0.0;
|
||||
if (!model->BSIM3v1wkt2Given)
|
||||
model->BSIM3v1wkt2 = 0.0;
|
||||
if (!model->BSIM3v1wk3Given)
|
||||
model->BSIM3v1wk3 = 0.0;
|
||||
model->BSIM3v1wk3 = 0.0;
|
||||
if (!model->BSIM3v1wk3bGiven)
|
||||
model->BSIM3v1wk3b = 0.0;
|
||||
model->BSIM3v1wk3b = 0.0;
|
||||
if (!model->BSIM3v1ww0Given)
|
||||
model->BSIM3v1ww0 = 0.0;
|
||||
model->BSIM3v1ww0 = 0.0;
|
||||
if (!model->BSIM3v1wnlxGiven)
|
||||
model->BSIM3v1wnlx = 0.0;
|
||||
model->BSIM3v1wnlx = 0.0;
|
||||
if (!model->BSIM3v1wdvt0Given)
|
||||
model->BSIM3v1wdvt0 = 0.0;
|
||||
model->BSIM3v1wdvt0 = 0.0;
|
||||
if (!model->BSIM3v1wdvt1Given)
|
||||
model->BSIM3v1wdvt1 = 0.0;
|
||||
model->BSIM3v1wdvt1 = 0.0;
|
||||
if (!model->BSIM3v1wdvt2Given)
|
||||
model->BSIM3v1wdvt2 = 0.0;
|
||||
if (!model->BSIM3v1wdvt0wGiven)
|
||||
model->BSIM3v1wdvt0w = 0.0;
|
||||
model->BSIM3v1wdvt0w = 0.0;
|
||||
if (!model->BSIM3v1wdvt1wGiven)
|
||||
model->BSIM3v1wdvt1w = 0.0;
|
||||
model->BSIM3v1wdvt1w = 0.0;
|
||||
if (!model->BSIM3v1wdvt2wGiven)
|
||||
model->BSIM3v1wdvt2w = 0.0;
|
||||
if (!model->BSIM3v1wdroutGiven)
|
||||
model->BSIM3v1wdrout = 0.0;
|
||||
model->BSIM3v1wdrout = 0.0;
|
||||
if (!model->BSIM3v1wdsubGiven)
|
||||
model->BSIM3v1wdsub = 0.0;
|
||||
if (!model->BSIM3v1wvth0Given)
|
||||
|
|
@ -443,10 +443,10 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1wu0Given)
|
||||
model->BSIM3v1wu0 = 0.0;
|
||||
if (!model->BSIM3v1wuteGiven)
|
||||
model->BSIM3v1wute = 0.0;
|
||||
model->BSIM3v1wute = 0.0;
|
||||
if (!model->BSIM3v1wvoffGiven)
|
||||
model->BSIM3v1wvoff = 0.0;
|
||||
if (!model->BSIM3v1wdeltaGiven)
|
||||
if (!model->BSIM3v1wdeltaGiven)
|
||||
model->BSIM3v1wdelta = 0.0;
|
||||
if (!model->BSIM3v1wrdswGiven)
|
||||
model->BSIM3v1wrdsw = 0.0;
|
||||
|
|
@ -461,7 +461,7 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1wetabGiven)
|
||||
model->BSIM3v1wetab = 0.0;
|
||||
if (!model->BSIM3v1wpclmGiven)
|
||||
model->BSIM3v1wpclm = 0.0;
|
||||
model->BSIM3v1wpclm = 0.0;
|
||||
if (!model->BSIM3v1wpdibl1Given)
|
||||
model->BSIM3v1wpdibl1 = 0.0;
|
||||
if (!model->BSIM3v1wpdibl2Given)
|
||||
|
|
@ -473,44 +473,44 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1wpscbe2Given)
|
||||
model->BSIM3v1wpscbe2 = 0.0;
|
||||
if (!model->BSIM3v1wpvagGiven)
|
||||
model->BSIM3v1wpvag = 0.0;
|
||||
if (!model->BSIM3v1wwrGiven)
|
||||
model->BSIM3v1wpvag = 0.0;
|
||||
if (!model->BSIM3v1wwrGiven)
|
||||
model->BSIM3v1wwr = 0.0;
|
||||
if (!model->BSIM3v1wdwgGiven)
|
||||
if (!model->BSIM3v1wdwgGiven)
|
||||
model->BSIM3v1wdwg = 0.0;
|
||||
if (!model->BSIM3v1wdwbGiven)
|
||||
if (!model->BSIM3v1wdwbGiven)
|
||||
model->BSIM3v1wdwb = 0.0;
|
||||
if (!model->BSIM3v1wb0Given)
|
||||
model->BSIM3v1wb0 = 0.0;
|
||||
if (!model->BSIM3v1wb1Given)
|
||||
if (!model->BSIM3v1wb1Given)
|
||||
model->BSIM3v1wb1 = 0.0;
|
||||
if (!model->BSIM3v1walpha0Given)
|
||||
if (!model->BSIM3v1walpha0Given)
|
||||
model->BSIM3v1walpha0 = 0.0;
|
||||
if (!model->BSIM3v1wbeta0Given)
|
||||
if (!model->BSIM3v1wbeta0Given)
|
||||
model->BSIM3v1wbeta0 = 0.0;
|
||||
|
||||
if (!model->BSIM3v1welmGiven)
|
||||
if (!model->BSIM3v1welmGiven)
|
||||
model->BSIM3v1welm = 0.0;
|
||||
if (!model->BSIM3v1wcgslGiven)
|
||||
if (!model->BSIM3v1wcgslGiven)
|
||||
model->BSIM3v1wcgsl = 0.0;
|
||||
if (!model->BSIM3v1wcgdlGiven)
|
||||
if (!model->BSIM3v1wcgdlGiven)
|
||||
model->BSIM3v1wcgdl = 0.0;
|
||||
if (!model->BSIM3v1wckappaGiven)
|
||||
if (!model->BSIM3v1wckappaGiven)
|
||||
model->BSIM3v1wckappa = 0.0;
|
||||
if (!model->BSIM3v1wcfGiven)
|
||||
if (!model->BSIM3v1wcfGiven)
|
||||
model->BSIM3v1wcf = 0.0;
|
||||
if (!model->BSIM3v1wclcGiven)
|
||||
if (!model->BSIM3v1wclcGiven)
|
||||
model->BSIM3v1wclc = 0.0;
|
||||
if (!model->BSIM3v1wcleGiven)
|
||||
if (!model->BSIM3v1wcleGiven)
|
||||
model->BSIM3v1wcle = 0.0;
|
||||
if (!model->BSIM3v1wvfbcvGiven)
|
||||
if (!model->BSIM3v1wvfbcvGiven)
|
||||
model->BSIM3v1wvfbcv = 0.0;
|
||||
|
||||
/* Cross-term dependence */
|
||||
if (!model->BSIM3v1pcdscGiven)
|
||||
model->BSIM3v1pcdsc = 0.0;
|
||||
if (!model->BSIM3v1pcdscbGiven)
|
||||
model->BSIM3v1pcdscb = 0.0;
|
||||
model->BSIM3v1pcdscb = 0.0;
|
||||
if (!model->BSIM3v1pcdscdGiven)
|
||||
model->BSIM3v1pcdscd = 0.0;
|
||||
if (!model->BSIM3v1pcitGiven)
|
||||
|
|
@ -524,8 +524,8 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1patGiven)
|
||||
model->BSIM3v1pat = 0.0;
|
||||
if (!model->BSIM3v1pa0Given)
|
||||
model->BSIM3v1pa0 = 0.0;
|
||||
|
||||
model->BSIM3v1pa0 = 0.0;
|
||||
|
||||
if (!model->BSIM3v1pagsGiven)
|
||||
model->BSIM3v1pags = 0.0;
|
||||
if (!model->BSIM3v1pa1Given)
|
||||
|
|
@ -545,33 +545,33 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1pxtGiven)
|
||||
model->BSIM3v1pxt = 0.0;
|
||||
if (!model->BSIM3v1pkt1Given)
|
||||
model->BSIM3v1pkt1 = 0.0;
|
||||
model->BSIM3v1pkt1 = 0.0;
|
||||
if (!model->BSIM3v1pkt1lGiven)
|
||||
model->BSIM3v1pkt1l = 0.0;
|
||||
if (!model->BSIM3v1pkt2Given)
|
||||
model->BSIM3v1pkt2 = 0.0;
|
||||
if (!model->BSIM3v1pk3Given)
|
||||
model->BSIM3v1pk3 = 0.0;
|
||||
model->BSIM3v1pk3 = 0.0;
|
||||
if (!model->BSIM3v1pk3bGiven)
|
||||
model->BSIM3v1pk3b = 0.0;
|
||||
model->BSIM3v1pk3b = 0.0;
|
||||
if (!model->BSIM3v1pw0Given)
|
||||
model->BSIM3v1pw0 = 0.0;
|
||||
model->BSIM3v1pw0 = 0.0;
|
||||
if (!model->BSIM3v1pnlxGiven)
|
||||
model->BSIM3v1pnlx = 0.0;
|
||||
model->BSIM3v1pnlx = 0.0;
|
||||
if (!model->BSIM3v1pdvt0Given)
|
||||
model->BSIM3v1pdvt0 = 0.0;
|
||||
model->BSIM3v1pdvt0 = 0.0;
|
||||
if (!model->BSIM3v1pdvt1Given)
|
||||
model->BSIM3v1pdvt1 = 0.0;
|
||||
model->BSIM3v1pdvt1 = 0.0;
|
||||
if (!model->BSIM3v1pdvt2Given)
|
||||
model->BSIM3v1pdvt2 = 0.0;
|
||||
if (!model->BSIM3v1pdvt0wGiven)
|
||||
model->BSIM3v1pdvt0w = 0.0;
|
||||
model->BSIM3v1pdvt0w = 0.0;
|
||||
if (!model->BSIM3v1pdvt1wGiven)
|
||||
model->BSIM3v1pdvt1w = 0.0;
|
||||
model->BSIM3v1pdvt1w = 0.0;
|
||||
if (!model->BSIM3v1pdvt2wGiven)
|
||||
model->BSIM3v1pdvt2w = 0.0;
|
||||
if (!model->BSIM3v1pdroutGiven)
|
||||
model->BSIM3v1pdrout = 0.0;
|
||||
model->BSIM3v1pdrout = 0.0;
|
||||
if (!model->BSIM3v1pdsubGiven)
|
||||
model->BSIM3v1pdsub = 0.0;
|
||||
if (!model->BSIM3v1pvth0Given)
|
||||
|
|
@ -591,10 +591,10 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1pu0Given)
|
||||
model->BSIM3v1pu0 = 0.0;
|
||||
if (!model->BSIM3v1puteGiven)
|
||||
model->BSIM3v1pute = 0.0;
|
||||
model->BSIM3v1pute = 0.0;
|
||||
if (!model->BSIM3v1pvoffGiven)
|
||||
model->BSIM3v1pvoff = 0.0;
|
||||
if (!model->BSIM3v1pdeltaGiven)
|
||||
if (!model->BSIM3v1pdeltaGiven)
|
||||
model->BSIM3v1pdelta = 0.0;
|
||||
if (!model->BSIM3v1prdswGiven)
|
||||
model->BSIM3v1prdsw = 0.0;
|
||||
|
|
@ -609,7 +609,7 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1petabGiven)
|
||||
model->BSIM3v1petab = 0.0;
|
||||
if (!model->BSIM3v1ppclmGiven)
|
||||
model->BSIM3v1ppclm = 0.0;
|
||||
model->BSIM3v1ppclm = 0.0;
|
||||
if (!model->BSIM3v1ppdibl1Given)
|
||||
model->BSIM3v1ppdibl1 = 0.0;
|
||||
if (!model->BSIM3v1ppdibl2Given)
|
||||
|
|
@ -621,77 +621,77 @@ IFuid tmpName;
|
|||
if (!model->BSIM3v1ppscbe2Given)
|
||||
model->BSIM3v1ppscbe2 = 0.0;
|
||||
if (!model->BSIM3v1ppvagGiven)
|
||||
model->BSIM3v1ppvag = 0.0;
|
||||
if (!model->BSIM3v1pwrGiven)
|
||||
model->BSIM3v1ppvag = 0.0;
|
||||
if (!model->BSIM3v1pwrGiven)
|
||||
model->BSIM3v1pwr = 0.0;
|
||||
if (!model->BSIM3v1pdwgGiven)
|
||||
if (!model->BSIM3v1pdwgGiven)
|
||||
model->BSIM3v1pdwg = 0.0;
|
||||
if (!model->BSIM3v1pdwbGiven)
|
||||
if (!model->BSIM3v1pdwbGiven)
|
||||
model->BSIM3v1pdwb = 0.0;
|
||||
if (!model->BSIM3v1pb0Given)
|
||||
model->BSIM3v1pb0 = 0.0;
|
||||
if (!model->BSIM3v1pb1Given)
|
||||
if (!model->BSIM3v1pb1Given)
|
||||
model->BSIM3v1pb1 = 0.0;
|
||||
if (!model->BSIM3v1palpha0Given)
|
||||
if (!model->BSIM3v1palpha0Given)
|
||||
model->BSIM3v1palpha0 = 0.0;
|
||||
if (!model->BSIM3v1pbeta0Given)
|
||||
if (!model->BSIM3v1pbeta0Given)
|
||||
model->BSIM3v1pbeta0 = 0.0;
|
||||
|
||||
if (!model->BSIM3v1pelmGiven)
|
||||
if (!model->BSIM3v1pelmGiven)
|
||||
model->BSIM3v1pelm = 0.0;
|
||||
if (!model->BSIM3v1pcgslGiven)
|
||||
if (!model->BSIM3v1pcgslGiven)
|
||||
model->BSIM3v1pcgsl = 0.0;
|
||||
if (!model->BSIM3v1pcgdlGiven)
|
||||
if (!model->BSIM3v1pcgdlGiven)
|
||||
model->BSIM3v1pcgdl = 0.0;
|
||||
if (!model->BSIM3v1pckappaGiven)
|
||||
if (!model->BSIM3v1pckappaGiven)
|
||||
model->BSIM3v1pckappa = 0.0;
|
||||
if (!model->BSIM3v1pcfGiven)
|
||||
if (!model->BSIM3v1pcfGiven)
|
||||
model->BSIM3v1pcf = 0.0;
|
||||
if (!model->BSIM3v1pclcGiven)
|
||||
if (!model->BSIM3v1pclcGiven)
|
||||
model->BSIM3v1pclc = 0.0;
|
||||
if (!model->BSIM3v1pcleGiven)
|
||||
if (!model->BSIM3v1pcleGiven)
|
||||
model->BSIM3v1pcle = 0.0;
|
||||
if (!model->BSIM3v1pvfbcvGiven)
|
||||
if (!model->BSIM3v1pvfbcvGiven)
|
||||
model->BSIM3v1pvfbcv = 0.0;
|
||||
|
||||
/* unit degree celcius */
|
||||
if (!model->BSIM3v1tnomGiven)
|
||||
model->BSIM3v1tnom = ckt->CKTnomTemp;
|
||||
if (!model->BSIM3v1LintGiven)
|
||||
if (!model->BSIM3v1tnomGiven)
|
||||
model->BSIM3v1tnom = ckt->CKTnomTemp;
|
||||
if (!model->BSIM3v1LintGiven)
|
||||
model->BSIM3v1Lint = 0.0;
|
||||
if (!model->BSIM3v1LlGiven)
|
||||
if (!model->BSIM3v1LlGiven)
|
||||
model->BSIM3v1Ll = 0.0;
|
||||
if (!model->BSIM3v1LlnGiven)
|
||||
if (!model->BSIM3v1LlnGiven)
|
||||
model->BSIM3v1Lln = 1.0;
|
||||
if (!model->BSIM3v1LwGiven)
|
||||
if (!model->BSIM3v1LwGiven)
|
||||
model->BSIM3v1Lw = 0.0;
|
||||
if (!model->BSIM3v1LwnGiven)
|
||||
if (!model->BSIM3v1LwnGiven)
|
||||
model->BSIM3v1Lwn = 1.0;
|
||||
if (!model->BSIM3v1LwlGiven)
|
||||
if (!model->BSIM3v1LwlGiven)
|
||||
model->BSIM3v1Lwl = 0.0;
|
||||
if (!model->BSIM3v1LminGiven)
|
||||
if (!model->BSIM3v1LminGiven)
|
||||
model->BSIM3v1Lmin = 0.0;
|
||||
if (!model->BSIM3v1LmaxGiven)
|
||||
if (!model->BSIM3v1LmaxGiven)
|
||||
model->BSIM3v1Lmax = 1.0;
|
||||
if (!model->BSIM3v1WintGiven)
|
||||
if (!model->BSIM3v1WintGiven)
|
||||
model->BSIM3v1Wint = 0.0;
|
||||
if (!model->BSIM3v1WlGiven)
|
||||
if (!model->BSIM3v1WlGiven)
|
||||
model->BSIM3v1Wl = 0.0;
|
||||
if (!model->BSIM3v1WlnGiven)
|
||||
if (!model->BSIM3v1WlnGiven)
|
||||
model->BSIM3v1Wln = 1.0;
|
||||
if (!model->BSIM3v1WwGiven)
|
||||
if (!model->BSIM3v1WwGiven)
|
||||
model->BSIM3v1Ww = 0.0;
|
||||
if (!model->BSIM3v1WwnGiven)
|
||||
if (!model->BSIM3v1WwnGiven)
|
||||
model->BSIM3v1Wwn = 1.0;
|
||||
if (!model->BSIM3v1WwlGiven)
|
||||
if (!model->BSIM3v1WwlGiven)
|
||||
model->BSIM3v1Wwl = 0.0;
|
||||
if (!model->BSIM3v1WminGiven)
|
||||
if (!model->BSIM3v1WminGiven)
|
||||
model->BSIM3v1Wmin = 0.0;
|
||||
if (!model->BSIM3v1WmaxGiven)
|
||||
if (!model->BSIM3v1WmaxGiven)
|
||||
model->BSIM3v1Wmax = 1.0;
|
||||
if (!model->BSIM3v1dwcGiven)
|
||||
if (!model->BSIM3v1dwcGiven)
|
||||
model->BSIM3v1dwc = model->BSIM3v1Wint;
|
||||
if (!model->BSIM3v1dlcGiven)
|
||||
if (!model->BSIM3v1dlcGiven)
|
||||
model->BSIM3v1dlc = model->BSIM3v1Lint;
|
||||
if (!model->BSIM3v1cfGiven)
|
||||
model->BSIM3v1cf = 2.0 * EPSOX / PI
|
||||
|
|
@ -702,7 +702,7 @@ IFuid tmpName;
|
|||
- model->BSIM3v1cgdl ;
|
||||
}
|
||||
else
|
||||
model->BSIM3v1cgdo = 0.6 * model->BSIM3v1xj * model->BSIM3v1cox;
|
||||
model->BSIM3v1cgdo = 0.6 * model->BSIM3v1xj * model->BSIM3v1cox;
|
||||
}
|
||||
if (!model->BSIM3v1cgsoGiven)
|
||||
{ if (model->BSIM3v1dlcGiven && (model->BSIM3v1dlc > 0.0))
|
||||
|
|
@ -710,7 +710,7 @@ IFuid tmpName;
|
|||
- model->BSIM3v1cgsl ;
|
||||
}
|
||||
else
|
||||
model->BSIM3v1cgso = 0.6 * model->BSIM3v1xj * model->BSIM3v1cox;
|
||||
model->BSIM3v1cgso = 0.6 * model->BSIM3v1xj * model->BSIM3v1cox;
|
||||
}
|
||||
|
||||
if (!model->BSIM3v1cgboGiven)
|
||||
|
|
@ -776,22 +776,41 @@ IFuid tmpName;
|
|||
model->BSIM3v1kf = 0.0;
|
||||
/* loop through all the instances of the model */
|
||||
for (here = model->BSIM3v1instances; here != NULL ;
|
||||
here=here->BSIM3v1nextInstance)
|
||||
{
|
||||
if (here->BSIM3v1owner == ARCHme)
|
||||
{
|
||||
/* allocate a chunk of the state vector */
|
||||
here=here->BSIM3v1nextInstance)
|
||||
{
|
||||
if (here->BSIM3v1owner == ARCHme)
|
||||
{
|
||||
/* allocate a chunk of the state vector */
|
||||
here->BSIM3v1states = *states;
|
||||
*states += BSIM3v1numStates;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/* perform the parameter defaulting */
|
||||
if(here->BSIM3v1m == 0.0)
|
||||
here->BSIM3v1m = 1.0;
|
||||
|
||||
if (!here->BSIM3v1wGiven)
|
||||
here->BSIM3v1w = 5e-6;
|
||||
|
||||
if (!here->BSIM3v1drainAreaGiven)
|
||||
here->BSIM3v1drainArea = 0.0;
|
||||
{
|
||||
if(model->BSIM3v1hdifGiven)
|
||||
here->BSIM3v1drainArea = here->BSIM3v1w * 2 * model->BSIM3v1hdif;
|
||||
else
|
||||
here->BSIM3v1drainArea = 0.0;
|
||||
}
|
||||
if (!here->BSIM3v1drainPerimeterGiven)
|
||||
here->BSIM3v1drainPerimeter = 0.0;
|
||||
{
|
||||
if(model->BSIM3v1hdifGiven)
|
||||
here->BSIM3v1drainPerimeter =
|
||||
2 * here->BSIM3v1w + 4 * model->BSIM3v1hdif;
|
||||
else
|
||||
here->BSIM3v1drainPerimeter = 0.0;
|
||||
}
|
||||
|
||||
if (!here->BSIM3v1drainSquaresGiven)
|
||||
here->BSIM3v1drainSquares = 1.0;
|
||||
|
||||
if (!here->BSIM3v1icVBSGiven)
|
||||
here->BSIM3v1icVBS = 0;
|
||||
if (!here->BSIM3v1icVDSGiven)
|
||||
|
|
@ -801,73 +820,87 @@ IFuid tmpName;
|
|||
if (!here->BSIM3v1lGiven)
|
||||
here->BSIM3v1l = 5e-6;
|
||||
if (!here->BSIM3v1sourceAreaGiven)
|
||||
here->BSIM3v1sourceArea = 0;
|
||||
{
|
||||
if(model->BSIM3v1hdifGiven)
|
||||
here->BSIM3v1sourceArea = here->BSIM3v1w * 2 * model->BSIM3v1hdif;
|
||||
else
|
||||
here->BSIM3v1sourceArea = 0.0;
|
||||
}
|
||||
|
||||
if (!here->BSIM3v1sourcePerimeterGiven)
|
||||
here->BSIM3v1sourcePerimeter = 0;
|
||||
{
|
||||
if(model->BSIM3v1hdifGiven)
|
||||
here->BSIM3v1sourcePerimeter =
|
||||
2 * here->BSIM3v1w + 4 * model->BSIM3v1hdif;
|
||||
else
|
||||
here->BSIM3v1sourcePerimeter = 0.0;
|
||||
}
|
||||
|
||||
if (!here->BSIM3v1sourceSquaresGiven)
|
||||
here->BSIM3v1sourceSquares = 1;
|
||||
|
||||
if (!here->BSIM3v1wGiven)
|
||||
here->BSIM3v1w = 5e-6;
|
||||
|
||||
if (!here->BSIM3v1mGiven)
|
||||
here->BSIM3v1m = 1;
|
||||
|
||||
|
||||
if (!here->BSIM3v1nqsModGiven)
|
||||
here->BSIM3v1nqsMod = model->BSIM3v1nqsMod;
|
||||
|
||||
|
||||
/* process drain series resistance */
|
||||
if ((model->BSIM3v1sheetResistance > 0.0) &&
|
||||
if ((model->BSIM3v1sheetResistance > 0.0) &&
|
||||
(here->BSIM3v1drainSquares > 0.0 ) &&
|
||||
(here->BSIM3v1dNodePrime == 0))
|
||||
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1name,"drain");
|
||||
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1name,"drain");
|
||||
if(error) return(error);
|
||||
here->BSIM3v1dNodePrime = tmp->number;
|
||||
|
||||
if (ckt->CKTcopyNodesets) {
|
||||
|
||||
if (ckt->CKTcopyNodesets) {
|
||||
if (CKTinst2Node(ckt,here,1,&tmpNode,&tmpName)==OK) {
|
||||
if (tmpNode->nsGiven) {
|
||||
tmp->nodeset=tmpNode->nodeset;
|
||||
tmp->nsGiven=tmpNode->nsGiven;
|
||||
tmp->nodeset=tmpNode->nodeset;
|
||||
tmp->nsGiven=tmpNode->nsGiven;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
else
|
||||
{ here->BSIM3v1dNodePrime = here->BSIM3v1dNode;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
else
|
||||
{ here->BSIM3v1dNodePrime = here->BSIM3v1dNode;
|
||||
}
|
||||
|
||||
/* process source series resistance */
|
||||
if ((model->BSIM3v1sheetResistance > 0.0) &&
|
||||
if ((model->BSIM3v1sheetResistance > 0.0) &&
|
||||
(here->BSIM3v1sourceSquares > 0.0 ) &&
|
||||
(here->BSIM3v1sNodePrime == 0))
|
||||
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1name,"source");
|
||||
(here->BSIM3v1sNodePrime == 0))
|
||||
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1name,"source");
|
||||
if(error) return(error);
|
||||
here->BSIM3v1sNodePrime = tmp->number;
|
||||
|
||||
if (ckt->CKTcopyNodesets) {
|
||||
if (CKTinst2Node(ckt,here,3,&tmpNode,&tmpName)==OK) {
|
||||
if (tmpNode->nsGiven) {
|
||||
tmp->nodeset=tmpNode->nodeset;
|
||||
tmp->nsGiven=tmpNode->nsGiven;
|
||||
tmp->nodeset=tmpNode->nodeset;
|
||||
tmp->nsGiven=tmpNode->nsGiven;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
else
|
||||
{ here->BSIM3v1sNodePrime = here->BSIM3v1sNode;
|
||||
else
|
||||
{ here->BSIM3v1sNodePrime = here->BSIM3v1sNode;
|
||||
}
|
||||
|
||||
/* internal charge node */
|
||||
|
||||
if ((here->BSIM3v1nqsMod) && (here->BSIM3v1qNode == 0))
|
||||
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1name,"charge");
|
||||
|
||||
if ((here->BSIM3v1nqsMod) && (here->BSIM3v1qNode == 0))
|
||||
{ error = CKTmkVolt(ckt,&tmp,here->BSIM3v1name,"charge");
|
||||
if(error) return(error);
|
||||
here->BSIM3v1qNode = tmp->number;
|
||||
}
|
||||
else
|
||||
{ here->BSIM3v1qNode = 0;
|
||||
else
|
||||
{ here->BSIM3v1qNode = 0;
|
||||
}
|
||||
|
||||
/* set Sparse Matrix Pointers */
|
||||
|
|
@ -902,7 +935,7 @@ if((here->ptr = SMPmakeElt(matrix,here->first,here->second))==(double *)NULL){\
|
|||
TSTALLOC(BSIM3v1SPdpPtr, BSIM3v1sNodePrime, BSIM3v1dNodePrime)
|
||||
|
||||
TSTALLOC(BSIM3v1QqPtr, BSIM3v1qNode, BSIM3v1qNode)
|
||||
|
||||
|
||||
TSTALLOC(BSIM3v1QdpPtr, BSIM3v1qNode, BSIM3v1dNodePrime)
|
||||
TSTALLOC(BSIM3v1QspPtr, BSIM3v1qNode, BSIM3v1sNodePrime)
|
||||
TSTALLOC(BSIM3v1QgPtr, BSIM3v1qNode, BSIM3v1gNode)
|
||||
|
|
@ -915,7 +948,7 @@ if((here->ptr = SMPmakeElt(matrix,here->first,here->second))==(double *)NULL){\
|
|||
}
|
||||
}
|
||||
return(OK);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -404,6 +404,8 @@ typedef struct sBSIM3v1model
|
|||
double BSIM3v1b1;
|
||||
double BSIM3v1alpha0;
|
||||
double BSIM3v1beta0;
|
||||
/* serban */
|
||||
double BSIM3v1hdif;
|
||||
|
||||
/* CV model */
|
||||
double BSIM3v1elm;
|
||||
|
|
@ -805,6 +807,7 @@ typedef struct sBSIM3v1model
|
|||
unsigned BSIM3v1b1Given :1;
|
||||
unsigned BSIM3v1alpha0Given :1;
|
||||
unsigned BSIM3v1beta0Given :1;
|
||||
unsigned BSIM3v1hdifGiven :1;
|
||||
|
||||
/* CV model */
|
||||
unsigned BSIM3v1elmGiven :1;
|
||||
|
|
@ -1236,6 +1239,8 @@ typedef struct sBSIM3v1model
|
|||
#define BSIM3v1_MOD_VERSION 193
|
||||
#define BSIM3v1_MOD_VFBCV 194
|
||||
|
||||
#define BSIM3v1_MOD_HDIF 198
|
||||
|
||||
/* Length dependence */
|
||||
#define BSIM3v1_MOD_LCDSC 201
|
||||
#define BSIM3v1_MOD_LCDSCB 202
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
#include "bsim3v1ext.h"
|
||||
#include "bsim3v1init.h"
|
||||
|
||||
SPICEdev B3v1info = {
|
||||
SPICEdev BSIM3v1info = {
|
||||
{ "BSIM3v1",
|
||||
"Berkeley Short Channel IGFET Model Version-3 (3.1)",
|
||||
|
||||
|
|
@ -78,5 +78,5 @@ SPICEdev B3v1info = {
|
|||
SPICEdev *
|
||||
get_bsim3v1_info(void)
|
||||
{
|
||||
return &B3v1info;
|
||||
return &BSIM3v1info;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -81,8 +81,6 @@ int add_udn(int,Evt_Udn_Info_t **);
|
|||
#include "bsim3/bsim3itf.h"
|
||||
#include "bsim3v0/bsim3v0itf.h"
|
||||
#include "bsim3v1/bsim3v1itf.h"
|
||||
#include "bsim3v1a/bsim3v1aitf.h"
|
||||
#include "bsim3v1s/bsim3v1sitf.h"
|
||||
#include "bsim3v32/bsim3v32itf.h"
|
||||
#include "bsim4/bsim4itf.h"
|
||||
#include "bsim4v2/bsim4v2itf.h"
|
||||
|
|
@ -192,8 +190,6 @@ spice_init_devices(void)
|
|||
DEVices[ 6] = get_bsim3_info();
|
||||
DEVices[ 7] = get_bsim3v0_info();
|
||||
DEVices[ 8] = get_bsim3v1_info();
|
||||
DEVices[ 9] = get_bsim3v1a_info();
|
||||
DEVices[10] = get_bsim3v1s_info();
|
||||
DEVices[11] = get_bsim3v32_info();
|
||||
DEVices[12] = get_b4soi_info();
|
||||
DEVices[13] = get_bsim4_info();
|
||||
|
|
|
|||
|
|
@ -200,7 +200,7 @@ INP2M (CKTcircuit *ckt, INPtables * tab, card * current)
|
|||
|
||||
if (thismodel != NULL)
|
||||
{
|
||||
if (thismodel->INPmodType != INPtypelook ("Mos1")
|
||||
if (thismodel->INPmodType != INPtypelook ("Mos1")
|
||||
&& thismodel->INPmodType != INPtypelook ("Mos2")
|
||||
&& thismodel->INPmodType != INPtypelook ("Mos3")
|
||||
&& thismodel->INPmodType != INPtypelook ("Mos5")
|
||||
|
|
@ -211,7 +211,7 @@ INP2M (CKTcircuit *ckt, INPtables * tab, card * current)
|
|||
&& thismodel->INPmodType != INPtypelook ("BSIM2")
|
||||
&& thismodel->INPmodType != INPtypelook ("BSIM3")
|
||||
&& thismodel->INPmodType != INPtypelook ("BSIM3v32")
|
||||
&& thismodel->INPmodType != INPtypelook ("B4SOI")
|
||||
&& thismodel->INPmodType != INPtypelook ("B4SOI")
|
||||
&& thismodel->INPmodType != INPtypelook ("B3SOIPD")
|
||||
&& thismodel->INPmodType != INPtypelook ("B3SOIFD")
|
||||
&& thismodel->INPmodType != INPtypelook ("B3SOIDD")
|
||||
|
|
@ -220,10 +220,8 @@ INP2M (CKTcircuit *ckt, INPtables * tab, card * current)
|
|||
&& thismodel->INPmodType != INPtypelook ("BSIM4v3")
|
||||
&& thismodel->INPmodType != INPtypelook ("BSIM4v4")
|
||||
&& thismodel->INPmodType != INPtypelook ("BSIM4v5")
|
||||
&& thismodel->INPmodType != INPtypelook ("BSIM3v0")
|
||||
&& thismodel->INPmodType != INPtypelook ("BSIM3v1")
|
||||
&& thismodel->INPmodType != INPtypelook ("BSIM3v1S")
|
||||
&& thismodel->INPmodType != INPtypelook ("BSIM3v1A")
|
||||
&& thismodel->INPmodType != INPtypelook ("BSIM3v0")
|
||||
&& thismodel->INPmodType != INPtypelook ("BSIM3v1")
|
||||
&& thismodel->INPmodType != INPtypelook ("SOI3")
|
||||
#ifdef CIDER
|
||||
&& thismodel->INPmodType != INPtypelook ("NUMOS")
|
||||
|
|
|
|||
|
|
@ -285,12 +285,6 @@ char *INPdomodel(CKTcircuit *ckt, card * image, INPtables * tab)
|
|||
if ( strcmp(ver, "3.1") == 0 ) {
|
||||
type = INPtypelook("BSIM3v1");
|
||||
}
|
||||
if ( strcmp(ver, "3.1s") == 0 ) {
|
||||
type = INPtypelook("BSIM3v1S");
|
||||
}
|
||||
if ( strcmp(ver, "3.1a") == 0 ) {
|
||||
type = INPtypelook("BSIM3v1A");
|
||||
}
|
||||
if ( prefix("3.2", ver)) { /* version string ver has to start with 3.2 */
|
||||
type = INPtypelook("BSIM3v32");
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue